Commit Graph

18176 Commits

Author SHA1 Message Date
Anton Korobeynikov
3a84b9baf6 First step of switch lowering refactoring: perform worklist-driven
strategy, emit JT's where possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35338 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 15:07:15 +00:00
Anton Korobeynikov
4be4e51a50 Fix authorship
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35337 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 13:44:26 +00:00
Chris Lattner
2ef14d9f7c fold constantexprs more aggressively, fixing PR1265
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35336 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 05:47:04 +00:00
Reid Spencer
7177c3a60a Refactor several ConstantExpr::getXXX calls with ConstantInt arguments
using the facilities of APInt. While this duplicates a tiny fraction of
the constant folding code, it also makes the code easier to read and
avoids large ConstantExpr overhead for simple, known computations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35335 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 05:33:51 +00:00
Chris Lattner
86c9c341e9 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35334 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 05:10:46 +00:00
Zhou Sheng
0fc5095d0e 1. Avoid unnecessary APInt construction if possible.
2. Use isStrictlyPositive() instead of isPositive() in two places where
   they need APInt value > 0 not only >=0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35333 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 05:01:29 +00:00
Chris Lattner
5df99b376f Implement support for vector operands to inline asm, implementing
CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35332 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 05:00:54 +00:00
Chris Lattner
013e051aac add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35330 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 04:46:28 +00:00
Chris Lattner
b6ead97b7e Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35329 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 04:44:03 +00:00
Chris Lattner
c13dd1cf4c implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35327 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 04:35:41 +00:00
Reid Spencer
2f5491791b Make more uses of getHighBitsSet and get rid of some pointless & of an
APInt with its type mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35325 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 04:26:16 +00:00
Chris Lattner
065421f99f Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35324 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:18:14 +00:00
Chris Lattner
4234f57fa0 switch TargetLowering::getConstraintType to take the entire constraint,
not just the first letter.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:14:49 +00:00
Reid Spencer
2b81207b4b More APIntification:
* Convert the last use of a uint64_t that should have been an APInt.
* Change ComputeMaskedBits to have a const reference argument for the Mask
  so that recursions don't cause unneeded temporaries. This causes temps
  to be needed in other places (where the mask has to change) but this
  change optimizes for the recursion which is more frequent.
* Remove two instances of &ing a Mask with getAllOnesValue. Its not
  needed any more because APInt is accurate in its bit computations.
* Start using the getLowBitsSet and getHighBits set methods on APInt
  instead of shifting. This makes it more clear in the code what is
  going on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35321 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:03:12 +00:00
Chris Lattner
1439352ece Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35320 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:01:03 +00:00
Chris Lattner
188b9fe834 enforce the proper range for the i386 N constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35319 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 01:57:35 +00:00
Chris Lattner
7cd5e07f3d Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35318 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 01:44:57 +00:00
Chris Lattner
42593e69e2 fix a regression on vector or instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35314 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 23:56:43 +00:00
Chris Lattner
82dcb4fe23 don't rely on ADL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35299 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 17:37:03 +00:00
Chris Lattner
0d3988f408 add a valuetype for v1i64, which is needed by mmx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35298 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 17:36:26 +00:00
Zhou Sheng
00f436c5bc Make some codes more efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35297 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 15:34:37 +00:00
Chris Lattner
1a77a556cd add a bad case evan though of.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35296 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 06:01:32 +00:00
Reid Spencer
f244252740 For PR1205:
Convert some calls to ConstantInt::getZExtValue() into getValue() and
use APInt facilities in the subsequent computations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35294 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 00:42:08 +00:00
Evan Cheng
dae54ce7fc Adjust offset to compensate for big endian machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35293 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24 00:02:43 +00:00
Anton Korobeynikov
3b5ee73a13 Autodetect MMX & SSE stuff for AMD processors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35292 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 23:46:48 +00:00
Bill Wendling
b8440a0c39 PR1260:
Add final support to get the QT example to compile.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35290 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 22:35:46 +00:00
Evan Cheng
e177e307fc Make sure SEXTLOAD of the specific type is supported on the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35289 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 22:13:36 +00:00
Reid Spencer
2ec619a29a For PR1205:
* APIntify visitAdd and visitSelectInst
* Remove unused uint64_t versions of utility functions that have been
  replaced with APInt versions.
This completes most of the changes for APIntification of InstCombine. This
passes llvm-test and llvm/test/Transforms/InstCombine/APInt.

Patch by Zhou Sheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35287 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 21:24:59 +00:00
Evan Cheng
b37b80ce46 Also replace uses of SRL if that's also folded during ReduceLoadWidth().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35286 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 20:55:21 +00:00
Reid Spencer
bca0e38baa For PR1205:
APIntify visitDiv, visitMul and visitRem.

Patch by Zhou Sheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35283 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 20:05:17 +00:00
Chris Lattner
2c7718a539 switch AddReachableCodeToWorklist from being recursive to being iterative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35282 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 19:17:18 +00:00
Reid Spencer
b35ae0371a For PR1205:
APIntify several utility functions supporting logical operators and shift
operators.

Patch by Zhou Sheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35281 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 18:46:34 +00:00
Reid Spencer
b8f1c1657f Fix constant fold of div by zero and rem by zero to match IEEE 754
requirements. We must return NaN in some cases and correctly signed
infinity in other cases. Passes CFP2006 (not that that says much).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35277 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 05:33:23 +00:00
Zhou Sheng
f62cc9f9e5 Make the "KnownZero ^ TypeMask" computation just once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35276 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 03:13:21 +00:00
Zhou Sheng
9c636fe6f2 Simplify the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35275 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 02:39:25 +00:00
Evan Cheng
0b063def98 A couple of bug fixes for reducing load width xform:
1. Address offset is in bytes.
2. Make sure truncate node uses are replaced with new load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35274 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23 02:16:52 +00:00
Reid Spencer
a03d45fa88 For PR1205:
APInt support for logical operators in visitAnd, visitOr, and visitXor.

Patch by Zhou Sheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35273 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 22:19:58 +00:00
Reid Spencer
ad6676e81b For PR1205:
* APIntify commonIntCastTransforms
* APIntify visitTrunc
* APIntify visitZExt

Patch by Zhou Sheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35271 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 20:56:53 +00:00
Reid Spencer
0460fb3ea5 For PR1205:
* Re-enable the APInt version of MaskedValueIsZero.
* APIntify the Comput{Un}SignedMinMaxValuesFromKnownBits functions
* APIntify visitICmpInst.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35270 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 20:36:03 +00:00
Bill Wendling
02ced83ce7 We generate a shufflevector instruction, so we don't need the builtin
intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35269 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 20:29:26 +00:00
Bill Wendling
a348c56fde Support added for shifts and unpacking MMX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35266 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 18:42:45 +00:00
Dan Gohman
ecb7a77885 Change uses of Function::front to Function::getEntryBlock for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35265 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 16:38:57 +00:00
Reid Spencer
66123626ad Add the NoUnwind function attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35260 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 02:14:48 +00:00
Reid Spencer
67d8ed9e60 Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35259 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 02:14:08 +00:00
Reid Spencer
a39dfd39e4 Add support for the noreturn and nounwind function attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35258 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 02:13:23 +00:00
Nick Lewycky
27e4da93b6 Fix broken optimization disabled by a logic bug.
Analyze GEPs. If the indices are all zero, transfer whether the pointer is
known to be not null through the GEP.

Add a few more cases for xor and shift instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35257 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 02:02:51 +00:00
Evan Cheng
c88138fb5e More opportunities to reduce load size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35254 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 01:54:19 +00:00
Evan Cheng
2c3535d2a6 Fix for PR1257. Bug in live range shortening as a result of copy coalescing
where the destination is dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35252 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-22 01:26:05 +00:00
Reid Spencer
e4e4003032 For PR1248:
* Fix some indentation and comments in InsertRangeTest
* Add an "IsSigned" parameter to AddWithOverflow and make it handle signed
  additions. Also, APIntify this function so it works with any bitwidth.
* For the icmp pred ([us]div %X, C1), C2 transforms, exit early if the
  div instruction's RHS is zero.
* Finally, for icmp pred (sdiv %X, C1), -C2, fix an off-by-one error. The
  HiBound needs to be incremented in order to get the range test correct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35247 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 23:19:50 +00:00
Dale Johannesen
fa4bce2b76 repair x86 performance, dejagnu problems from previous change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:51:52 +00:00
Anton Korobeynikov
3070cd7e80 Add TODO list for MSIL backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35244 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:48:59 +00:00
Anton Korobeynikov
099883f7eb Let the new backend begin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35242 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:38:25 +00:00
Dale Johannesen
aceaf5d26e add generation of unnecessary push/pop around calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35241 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:16:39 +00:00
Evan Cheng
007b69eeaa fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35239 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 20:14:05 +00:00
Nicolas Geoffray
82d4264c1f Protect R31's frame offset from being used by callee-saved registers, when R31
is the frame pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35233 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 16:44:14 +00:00
Zhou Sheng
6dbe233959 Fix a bug in getAllOnesValue() which broke
some test cases for bitwidth > 64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35232 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 04:34:37 +00:00
Evan Cheng
768143547b Mark re-materializable instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35230 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 00:16:56 +00:00
Evan Cheng
a125cbe839 Updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35229 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 22:32:39 +00:00
Evan Cheng
c3c70881cf Potential spiller improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35228 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 22:22:38 +00:00
Dale Johannesen
8e59e163db do not share old induction variables when this would result in invalid
instructions (that would have to be split later)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 21:54:54 +00:00
Dale Johannesen
69cb9b78f1 maintain LiveIn when splitting blocks (register scavenging needs it)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35226 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 21:35:06 +00:00
Devang Patel
cbdfb8a9d5 DominanceFrontier::calculate().
Avoid recursion, Use iterative algorithm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35225 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 21:25:31 +00:00
Jeff Cohen
c01a53007a Fix some VC++ warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35224 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:43:18 +00:00
Jeff Cohen
09dfd8e19d Fix (and simplify) 48-bit byte swap.
Get pos/neg infinity the correct way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35223 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:42:36 +00:00
Devang Patel
3b57b6f36e LoopSimplify::FindPHIToPartitionLoops()
Use ETForest instead of DominatorSet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35221 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:18:12 +00:00
Lauro Ramos Venancio
a0a26b7454 Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35220 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 20:09:03 +00:00
Evan Cheng
29a68fb5b7 Minor bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35219 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 19:32:11 +00:00
Lauro Ramos Venancio
64c88d741e bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted:
mov lr, pc
    bx lr
So, the function was not called.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35218 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 17:57:23 +00:00
Reid Spencer
9eba7a2cb5 Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35215 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 17:19:31 +00:00
Reid Spencer
810cce8434 Don't delete things before their last use (avoids bad reads).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35214 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 17:18:33 +00:00
Lauro Ramos Venancio
8334b9fa3b CopyToReg source operand can be a physical register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35213 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 16:46:44 +00:00
Zhou Sheng
2cde46cb66 Simplify isHighOnes().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35211 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 12:49:06 +00:00
Evan Cheng
2638e1a6b9 First cut trivial re-materialization support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35208 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:13:50 +00:00
Evan Cheng
c70d1849b7 Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35207 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:11:30 +00:00
Evan Cheng
5603dcf21e New entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35206 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:10:17 +00:00
Evan Cheng
bf2c8b3c96 Added MRegisterInfo hook to re-materialize an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35205 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 08:09:38 +00:00
Chris Lattner
a16b7cb1d3 Two changes:
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 06:08:29 +00:00
Chris Lattner
1719e13da0 fix indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35202 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 02:25:53 +00:00
Reid Spencer
66728ef3d2 Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35199 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 01:13:36 +00:00
Reid Spencer
2c9df214c7 Plug some PATypeHolder memory leaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35198 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 01:13:00 +00:00
Dale Johannesen
dc42f48ea9 use types of loads and stores, not address, in CheckForIVReuse
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35197 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:47:50 +00:00
Dale Johannesen
80dae195c7 fix obvious comment bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35196 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:30:56 +00:00
Chris Lattner
91857da2f5 Fix a nasty memory leak, caused by my revamp of the value symbol table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35195 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:18:10 +00:00
Reid Spencer
5f6a89562d Make isOneBitSet faster by using APInt::isPowerOf2. Thanks Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35194 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 00:16:52 +00:00
Reid Spencer
05227d88af APIntify the isHighOnes utility function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35190 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:29:50 +00:00
Reid Spencer
adf2a206ec Fix coding standards violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35189 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:19:02 +00:00
Reid Spencer
3a2a9fbf99 Implement isMaxValueMinusOne in terms of APInt instead of uint64_t.
Patch by Sheng Zhou.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35188 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:10:28 +00:00
Reid Spencer
727992c30a Implement isMinValuePlusOne using facilities of APInt instead of uint64_t
Patch by Zhou Sheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35187 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:08:07 +00:00
Reid Spencer
44e33e674a Implement isOneBitSet in terms of APInt::countPopulation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35186 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 21:04:43 +00:00
Reid Spencer
5a1e3e1a7d 1. Use APInt::getSignBit to reduce clutter (patch by Sheng Zhou)
2. Replace uses of the "isPositive" utility function with APInt::isPositive


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35185 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:58:18 +00:00
Reid Spencer
8439bc8d69 Remove a redundant clause in an if statement.
Patch by Sheng Zhou.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35184 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:47:50 +00:00
Reid Spencer
49d273e168 Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35183 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:40:51 +00:00
Reid Spencer
eac65746d7 Fix test/Assembler/2007-03-19-NegValue.ll by using the new "isSigned"
parameter on ConstantInt::get to indicate the signedness of the intended
value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35182 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:40:22 +00:00
Reid Spencer
7fc44c8c5f Allow ConstantInt::get(Ty, uint64_t) to interpret the 64-bit values as a
negative number. This is needed to fix test/Assembler/2007-03-19-NegValue.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35181 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:39:08 +00:00
Reid Spencer
3a34137548 Implement extension of sign bits for negative values in the uint64_t
constructor. This helps to fix test/Assembler/2007-03-19-NegValue.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35180 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:37:47 +00:00
Anton Korobeynikov
d437db1b7b Fix mingw32 build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35177 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 20:19:08 +00:00
Reid Spencer
93c40036c8 Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35174 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:40:50 +00:00
Reid Spencer
186a43f1ad For PR1248:
Eliminate support for type planes in numbered values. This simplifies the
data structures involved in managing forward definitions, etc. Instead of
requiring maps from type to value, we can now just use a vector of values.
These changes also required rewrites of some support functions such as
InsertValue, getBBVal, and ResolveDefinitions. Some other cosmetic changes
were made as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35173 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:39:36 +00:00
Reid Spencer
4e0422c7e6 Add and Operator== method to ValID so equality can be done properly for
named or numbered ValIDs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35172 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:34:28 +00:00
Reid Spencer
590b3c559f For PR1258:
Radically simplify the SlotMachine. There is no need to keep Value planes
around any more. This change causes slot numbering to number all un-named,
non-void values starting at 0 and incrementing monotonically through the
function, regardless of type (including BasicBlocks). Getting slot numbers
is now a single lookup operation instead of a double lookup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35171 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:32:53 +00:00
Chris Lattner
a9d1a843fc fix ScalarRepl/2007-03-19-CanonicalizeMemcpy.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35169 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:25:57 +00:00
Evan Cheng
757072d954 Remove -reduce-joining-phys-regs options. Make it on by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35165 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:08:26 +00:00
Evan Cheng
9f6636ff0c Fix naming inconsistencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6 Special LDR instructions to load from non-pc-relative constantpools. These are
rematerializable. Only used for constant generation for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417 Constant generation instructions are re-materializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:09:02 +00:00
Evan Cheng
e2e9e44d8f Added isReMaterializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:22:07 +00:00
Evan Cheng
79b098445b Minor bug fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 04:22:35 +00:00
Chris Lattner
d435dbcbf9 fix a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:39:32 +00:00
Chris Lattner
8bf9911932 implement the next chunk of SROA with memset/memcpy's of aggregates. This
implements Transforms/ScalarRepl/memset-aggregate-byte-leader.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:16:43 +00:00
Nick Lewycky
3f64b1ab1d Clean up this code and fix subtract miscompile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:58:46 +00:00
Chris Lattner
318bf7963a Implement InstCombine/and-xor-merge.ll:test[12].
Rearrange some code to simplify it now that shifts are binops


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35145 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:51:34 +00:00
Chris Lattner
11a3a9d27d minor updates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:41:33 +00:00
Nick Lewycky
7f4ba44f37 This is implemented. We now generate:
entry:
        icmp ugt i32 %x, 4              ; <i1>:0 [#uses=1]
        br i1 %0, label %cond_true, label %cond_false

cond_true:              ; preds = %entry
        %tmp1 = tail call i32 (...)* @bar( i32 12 )             ; <i32> [#uses=0]
        ret void

cond_false:             ; preds = %entry
        switch i32 %x, label %cond_true15 [
                 i32 4, label %cond_true3
                 i32 3, label %cond_true7
                 i32 2, label %cond_true11
                 i32 0, label %cond_false17
        ]

...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 14:37:20 +00:00
Evan Cheng
cf596c54d4 - Merge UsedBlocks info after two virtual registers are coalesced.
- Use distance to closest use to determine whether to abort coalescing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35141 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:05:55 +00:00
Evan Cheng
e951cd1647 Keep UsedBlocks info accurate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35140 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:02:31 +00:00
Nick Lewycky
1eda0f60d7 Propagate ValueRanges across equality.
Add some more micro-optimizations: x * 0 = 0, a - x = a --> x = 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35138 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 01:09:32 +00:00
Anton Korobeynikov
1cc6452181 Silence warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35137 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 14:48:06 +00:00
Evan Cheng
c6a2410d58 Track the BB's where each virtual register is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35135 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:29:54 +00:00
Evan Cheng
ba1a3df608 Joining a live interval of a physical register with a virtual one can turn out
to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!

Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35134 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:27:35 +00:00
Evan Cheng
db264ae07f Use SmallSet instead of std::set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35133 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 08:53:30 +00:00
Evan Cheng
2edd563825 If sdisel has decided to sink GEP index expression into any BB. Replace all uses
in that BB.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35132 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 08:22:49 +00:00
Devang Patel
84f7fd2483 Support 'I' inline asm constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
368f20fda4 Only ARMv6 has BSWAP.
Fix MultiSource/Applications/aha test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 22:54:16 +00:00
Evan Cheng
9e2d86add8 Turn on GEP index sinking by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35127 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 18:32:30 +00:00
Evan Cheng
9f5ead9601 Stupid bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35126 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 17:50:20 +00:00
Bill Wendling
1b7a81d3ae And now support for MMX logical operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 09:44:46 +00:00
Evan Cheng
3cd4e5095b Sink a binary expression into its use blocks if it is a loop invariant
computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:46:27 +00:00
Evan Cheng
2770747216 Added isLegalAddressExpression(). Only allows X +/- C for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:43:56 +00:00
Evan Cheng
14245a9d62 Added isLegalAddressExpression hook to test if the given expression can be
folded into target addressing mode for the given type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:42:32 +00:00
Nick Lewycky
4c70875774 Add more comments and update to new asm syntax.
Add new micro-optimizations.

Add icmp predicate snuggling. Given %x ULT 4, "icmp ugt %x, 2" becomes
"icmp eq %x, 3". This doesn't apply in any non-trivial cases yet due to missing
support for NE values in ValueRanges.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35119 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 02:37:39 +00:00
Bill Wendling
74027e98f1 Multiplication support for MMX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:24:36 +00:00
Evan Cheng
56fdd7af88 Debugging output stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35117 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:19:28 +00:00
Evan Cheng
c6deb3d447 Estimate a cost using the possible number of scratch registers required and use
it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35109 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:43:40 +00:00
Evan Cheng
ba693005e9 Under X86-64 large code model, do not emit 32-bit pc relative calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:11:11 +00:00
Evan Cheng
4485d3897b Notes about codegen issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35107 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 21:03:53 +00:00
Evan Cheng
e70ef98043 Clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35105 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 20:20:19 +00:00
Evan Cheng
774be29769 Oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 19:44:58 +00:00
Evan Cheng
a19ac52863 X86-64 JIT is in large code model. Need stubs for direct calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:51:55 +00:00
Evan Cheng
8510dc086e x86-64 JIT stub codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35096 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:48:08 +00:00
Evan Cheng
5c0b61a64b Preliminary support for X86-64 JIT stub codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:44:30 +00:00
Zhou Sheng
adc149549d ShiftAmt might equal to zero. Handle this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35094 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 09:07:33 +00:00
Zhou Sheng
9670445cd4 Enable KnownZero/One.clear().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35093 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 03:21:24 +00:00
Evan Cheng
61230d18d2 Try schedule def + use closer whne Sethi-Ullman numbers are the same.
e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4

Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2

This creates more short live intervals which work better with the register
allocator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35089 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 23:25:11 +00:00
Evan Cheng
a13fd108f2 AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 21:05:54 +00:00
Evan Cheng
961f879ed8 Zero is always a legal AM immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 20:37:59 +00:00
Evan Cheng
1d95816db5 Correct type info for isLegalAddressImmediate() check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35086 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 20:34:37 +00:00
Nicolas Geoffray
b2ec1cc6cb Stack and register alignment of call arguments in the ELF ABI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 15:02:46 +00:00
Chris Lattner
bc1dbfce62 ifdef out some dead code.
Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35082 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 14:27:42 +00:00
Zhou Sheng
b277b16593 For expression like
"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35080 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 06:40:59 +00:00
Zhou Sheng
771dbf7677 In APInt version ComputeMaskedBits():
1. Ensure VTy, KnownOne and KnownZero have same bitwidth.
  2. Make code more efficient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35078 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 02:23:10 +00:00
Evan Cheng
e8308df0b9 Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 01:20:42 +00:00
Evan Cheng
c289faf015 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35076 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:37:10 +00:00
Evan Cheng
b01fad6d19 Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:30:29 +00:00
Evan Cheng
861939152d More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:29:01 +00:00
Evan Cheng
a8a155e77f More flexible TargetLowering LSR hooks for testing whether an immediate is
a legal target address immediate or scale.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35073 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:28:50 +00:00
Evan Cheng
5eef2d21a0 Use new TargetLowering addressing modes hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35072 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:27:37 +00:00
Evan Cheng
37e8856f74 Stupid bug: SSE2 supports v2i64 add / sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35070 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 22:58:52 +00:00
Reid Spencer
4fd8606791 Revert the last patch as it violates the conditions of sext/zext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35068 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 18:37:25 +00:00
Jeff Cohen
2b7d7b57ae Unbreak C++ build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35067 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 17:57:00 +00:00
Jeff Cohen
c4558fde76 Unbreak VC++ build. Do not use identifiers starting with _ as they are reserved and
can collide with system defined names.  Windows defines _BB, for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35066 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 17:56:27 +00:00
Zhou Sheng
7d820f57e2 For APInt::z/sext(width), if width == BitWidth, just return *this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35065 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 17:47:45 +00:00
Reid Spencer
8cb6834ccf Add an APInt version of SimplifyDemandedBits.
Patch by Zhou Sheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35064 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 17:25:59 +00:00
Reid Spencer
6b79e2d202 Add an APInt version of ShrinkDemandedConstant.
Patch by Zhou Sheng.


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2007-03-12 17:15:10 +00:00
Zhou Sheng
edd089c86a Avoid to assert on "(KnownZero & KnownOne) == 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35062 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 16:54:56 +00:00
Zhou Sheng
430f626937 In function ComputeMaskedBits():
1. Replace getSignedMinValue() with getSignBit() for better code readability.
  2. Replace APIntOps::shl() with operator<<= for convenience.
  3. Make APInt construction more effective.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35060 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 05:44:52 +00:00
Nick Lewycky
e677a0b099 Add value ranges. Currently inefficient in both execution time and
optimization power.


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2007-03-10 18:12:48 +00:00
Anton Korobeynikov
e2ff29c17c Use range tests in LowerSwitch, where possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35057 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-10 16:46:28 +00:00
Nick Lewycky
3400e6af6b Add getter methods for the extremes of a ConstantRange.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35056 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-10 15:54:12 +00:00
Bill Wendling
c1fb0473ed Adding more arithmetic operators to MMX. This is an almost exact copy of
the addition. Please let me know if you have suggestions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35055 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-10 09:57:05 +00:00
Devang Patel
f7543fe35a Remove dead comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35053 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 23:41:03 +00:00
Devang Patel
a5b7dc5ef8 Avoid recursion. Use iterative algorithm for RenamePass().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35052 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 23:39:14 +00:00
Devang Patel
4fe26582c0 Increment iterator now because IVUseShouldUsePostIncValue may remove
User from the list of I users.


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2007-03-09 21:19:53 +00:00
Reid Spencer
afc378201d Regenerate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35050 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 21:19:09 +00:00
Evan Cheng
1a9da0d66c Minor stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35049 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:46:06 +00:00
Evan Cheng
44f4fca3c0 Add comments about LSR / ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:35:33 +00:00
Evan Cheng
2265b49193 Unfinished work and ideas related to register scavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35047 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:34:51 +00:00
Reid Spencer
87707b90b1 For PR1245:
Account for the sign bit when computing the number of bits required for
a negative integer literal constant.


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2007-03-09 19:26:52 +00:00
Dale Johannesen
818c085232 apply comments from review of last patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35045 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 19:18:59 +00:00
Dale Johannesen
a6bc6fc170 Add some observations from CoreGraphics benchmark. Remove register
scavenging todo item, since it is now implemented.


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2007-03-09 17:58:17 +00:00
Anton Korobeynikov
349ec1c11b Unbreak mingw32 build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35042 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 11:53:34 +00:00
Evan Cheng
e2ee99620f If a virtual register is already marked alive in this block, that means it is
alive in one of the successor block. Do not add it to the kill list.


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2007-03-09 09:48:56 +00:00
Evan Cheng
219705131d Print preds / succs BB numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35040 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 08:29:08 +00:00
Evan Cheng
f0e3bb1333 Avoid variable shadowing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35039 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-09 06:02:17 +00:00
Bill Wendling
47992ea4be Don't use std::hex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35038 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 23:37:24 +00:00
Bill Wendling
3bae2e97d9 Don't use a cast. It causes an error on some platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 23:26:50 +00:00
Evan Cheng
23a9570494 Implement inline asm modifier c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35035 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 22:42:46 +00:00
Chris Lattner
6dfc6806bf implement support for floating point constants used as inline asm memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 22:29:47 +00:00
Bill Wendling
2f88dcdfb3 Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
moves, loads, etc. are recognized.


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2007-03-08 22:09:11 +00:00
Evan Cheng
b582b1b1fc Fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35030 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 21:59:30 +00:00
Devang Patel
d46825c6a1 Speed Up Pass Manager.
- Check Immutableness before searching PreservedSet.
- Avoid unnecessary traversal while setting Last User.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35028 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 19:05:01 +00:00
Zhou Sheng
a47f60bfaf Fix a bug in function ComputeMaskedBits().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35027 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 15:15:18 +00:00
Evan Cheng
032953d747 Putting more constants which do not contain relocations into .literal{4|8|16}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35026 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 08:31:54 +00:00
Chris Lattner
b4ddac9bf7 make this fail even in non-assert builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35025 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 07:07:03 +00:00
Chris Lattner
97f9df1cd1 This appears correct, enable it so we can see perf changes on testers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35024 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 07:03:55 +00:00
Chris Lattner
c14d3cac4b Second half of PR1226. This is currently still disabled, until I have a chance to
do the correctness/performance analysis testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35023 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 06:36:54 +00:00
Zhou Sheng
9a28daa864 Fix a bug in APIntified ComputeMaskedBits().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35022 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 05:42:00 +00:00
Evan Cheng
bf822eb6a3 Change register allocation order to Dale's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35021 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 02:56:40 +00:00
Evan Cheng
11788fde93 Bug fix. Not advancing the register scavenger iterator correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35020 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 02:55:08 +00:00
Reid Spencer
e7816b5c9e For PR1205:
Provide an APIntified version of MaskedValueIsZero. This will (temporarily)
cause a "defined but not used" message from the compiler. It will be used
in the next patch in this series.

Patch by Sheng Zhou.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35019 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 01:52:58 +00:00
Reid Spencer
3e7594f187 For PR1205:
Add a new ComputeMaskedBits function that is APIntified. We'll slowly
convert things over to use this version. When its all done, we'll remove
the existing version.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35018 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-08 01:46:38 +00:00