.. |
128bit_load_store.ll
|
|
|
a57-csel.ll
|
|
|
aarch64_f16_be.ll
|
|
|
aarch64_tree_tests.ll
|
|
|
aarch64-2014-08-11-MachineCombinerCrash.ll
|
Revert "Revert "DI: Fold constant arguments into a single MDString""
|
2014-10-03 20:01:09 +00:00 |
aarch64-a57-fp-load-balancing.ll
|
AArch64: enable Cortex-A57 FP balancing on Cortex-A53.
|
2014-10-28 01:24:32 +00:00 |
aarch64-address-type-promotion-assertion.ll
|
|
|
aarch64-address-type-promotion.ll
|
|
|
aarch64-be-bv.ll
|
Add missing natual vector cast.
|
2014-10-01 09:59:45 +00:00 |
aarch64-fix-cortex-a53-835769.ll
|
[AArch64] Fix crash with empty/pseudo-only blocks in A53 erratum (835769) workaround
|
2014-10-14 14:02:41 +00:00 |
aarch64-neon-v1i1-setcc.ll
|
|
|
aarch64-smull.ll
|
[AArch64] Generate vector signed/unsigned mul and mla/mls long.
|
2014-10-08 02:31:24 +00:00 |
aarch64-wide-shuffle.ll
|
[AArch64] Fix a silent codegen fault in BUILD_VECTOR lowering.
|
2014-10-17 17:06:31 +00:00 |
adc.ll
|
|
|
addsub_ext.ll
|
|
|
addsub-shifted.ll
|
|
|
addsub.ll
|
|
|
alloca.ll
|
|
|
analyze-branch.ll
|
|
|
analyzecmp.ll
|
|
|
and-mask-removal.ll
|
|
|
andandshift.ll
|
|
|
arm64-2011-03-09-CPSRSpill.ll
|
|
|
arm64-2011-03-17-AsmPrinterCrash.ll
|
Revert "Revert "DI: Fold constant arguments into a single MDString""
|
2014-10-03 20:01:09 +00:00 |
arm64-2011-03-21-Unaligned-Frame-Index.ll
|
|
|
arm64-2011-04-21-CPSRBug.ll
|
|
|
arm64-2011-10-18-LdStOptBug.ll
|
[AArch64]Select wide immediate offset into [Base+XReg] addressing mode
|
2014-10-14 06:50:36 +00:00 |
arm64-2012-01-11-ComparisonDAGCrash.ll
|
|
|
arm64-2012-05-07-DAGCombineVectorExtract.ll
|
|
|
arm64-2012-05-07-MemcpyAlignBug.ll
|
|
|
arm64-2012-05-09-LOADgot-bug.ll
|
|
|
arm64-2012-05-22-LdStOptBug.ll
|
|
|
arm64-2012-06-06-FPToUI.ll
|
|
|
arm64-2012-07-11-InstrEmitterBug.ll
|
|
|
arm64-2013-01-13-ffast-fcmp.ll
|
|
|
arm64-2013-01-23-frem-crash.ll
|
|
|
arm64-2013-01-23-sext-crash.ll
|
|
|
arm64-2013-02-12-shufv8i8.ll
|
|
|
arm64-aapcs-be.ll
|
|
|
arm64-aapcs.ll
|
|
|
arm64-abi_align.ll
|
|
|
arm64-abi-varargs.ll
|
|
|
arm64-abi.ll
|
llvm/test/CodeGen: Some tests don't REQUIRE asserts any more. Remove them.
|
2014-10-12 06:47:47 +00:00 |
arm64-addp.ll
|
|
|
arm64-addr-mode-folding.ll
|
|
|
arm64-addr-type-promotion.ll
|
|
|
arm64-addrmode.ll
|
[AArch64]Select wide immediate offset into [Base+XReg] addressing mode
|
2014-10-14 06:50:36 +00:00 |
arm64-AdvSIMD-Scalar.ll
|
|
|
arm64-alloc-no-stack-realign.ll
|
|
|
arm64-alloca-frame-pointer-offset.ll
|
|
|
arm64-andCmpBrToTBZ.ll
|
|
|
arm64-ands-bad-peephole.ll
|
|
|
arm64-AnInfiniteLoopInDAGCombine.ll
|
|
|
arm64-anyregcc-crash.ll
|
|
|
arm64-anyregcc.ll
|
|
|
arm64-arith-saturating.ll
|
|
|
arm64-arith.ll
|
|
|
arm64-arm64-dead-def-elimination-flag.ll
|
|
|
arm64-atomic-128.ll
|
|
|
arm64-atomic.ll
|
Revert r216862 due to a performance regression
|
2014-10-01 15:22:13 +00:00 |
arm64-basic-pic.ll
|
|
|
arm64-bcc.ll
|
[AArch64] test case for compfail fixed by r219748
|
2014-10-20 16:08:33 +00:00 |
arm64-big-endian-bitconverts.ll
|
|
|
arm64-big-endian-eh.ll
|
|
|
arm64-big-endian-varargs.ll
|
|
|
arm64-big-endian-vector-callee.ll
|
|
|
arm64-big-endian-vector-caller.ll
|
|
|
arm64-big-imm-offsets.ll
|
|
|
arm64-big-stack.ll
|
|
|
arm64-bitfield-extract.ll
|
|
|
arm64-blockaddress.ll
|
|
|
arm64-build-vector.ll
|
|
|
arm64-call-tailcalls.ll
|
|
|
arm64-cast-opt.ll
|
|
|
arm64-ccmp-heuristics.ll
|
|
|
arm64-ccmp.ll
|
|
|
arm64-clrsb.ll
|
|
|
arm64-coalesce-ext.ll
|
|
|
arm64-code-model-large-abs.ll
|
|
|
arm64-collect-loh-garbage-crash.ll
|
|
|
arm64-collect-loh-str.ll
|
|
|
arm64-collect-loh.ll
|
|
|
arm64-complex-copy-noneon.ll
|
|
|
arm64-complex-ret.ll
|
|
|
arm64-const-addr.ll
|
|
|
arm64-convert-v4f64.ll
|
|
|
arm64-copy-tuple.ll
|
|
|
arm64-crc32.ll
|
|
|
arm64-crypto.ll
|
|
|
arm64-cse.ll
|
|
|
arm64-csel.ll
|
|
|
arm64-cvt.ll
|
|
|
arm64-dagcombiner-convergence.ll
|
|
|
arm64-dagcombiner-dead-indexed-load.ll
|
|
|
arm64-dagcombiner-load-slicing.ll
|
|
|
arm64-dead-def-frame-index.ll
|
|
|
arm64-dead-register-def-bug.ll
|
|
|
arm64-dup.ll
|
|
|
arm64-early-ifcvt.ll
|
|
|
arm64-elf-calls.ll
|
|
|
arm64-elf-constpool.ll
|
|
|
arm64-elf-globals.ll
|
|
|
arm64-EXT-undef-mask.ll
|
|
|
arm64-ext.ll
|
|
|
arm64-extend-int-to-fp.ll
|
|
|
arm64-extend.ll
|
|
|
arm64-extern-weak.ll
|
|
|
arm64-extload-knownzero.ll
|
|
|
arm64-extract_subvector.ll
|
|
|
arm64-extract.ll
|
|
|
arm64-fast-isel-addr-offset.ll
|
|
|
arm64-fast-isel-alloca.ll
|
Reapply "[FastISel][AArch64] Add custom lowering for GEPs."
|
2014-10-15 18:58:07 +00:00 |
arm64-fast-isel-br.ll
|
|
|
arm64-fast-isel-call.ll
|
|
|
arm64-fast-isel-conversion.ll
|
[FastISel][AArch64] Fold sign-/zero-extends into the load instruction.
|
2014-09-30 00:49:58 +00:00 |
arm64-fast-isel-fcmp.ll
|
|
|
arm64-fast-isel-gv.ll
|
|
|
arm64-fast-isel-icmp.ll
|
[FastISel][AArch64] Emit immediate version of icmp (subs) for null pointer check.
|
2014-10-27 19:58:36 +00:00 |
arm64-fast-isel-indirectbr.ll
|
|
|
arm64-fast-isel-intrinsic.ll
|
|
|
arm64-fast-isel-materialize.ll
|
|
|
arm64-fast-isel-noconvert.ll
|
|
|
arm64-fast-isel-rem.ll
|
llvm/test/CodeGen: Some tests don't REQUIRE asserts any more. Remove them.
|
2014-10-12 06:47:47 +00:00 |
arm64-fast-isel-ret.ll
|
|
|
arm64-fast-isel-store.ll
|
|
|
arm64-fast-isel.ll
|
|
|
arm64-fastcc-tailcall.ll
|
|
|
arm64-fastisel-gep-promote-before-add.ll
|
|
|
arm64-fcmp-opt.ll
|
|
|
arm64-fcopysign.ll
|
|
|
arm64-fixed-point-scalar-cvt-dagcombine.ll
|
|
|
arm64-fmadd.ll
|
|
|
arm64-fmax.ll
|
|
|
arm64-fminv.ll
|
|
|
arm64-fmuladd.ll
|
|
|
arm64-fold-address.ll
|
|
|
arm64-fold-lsl.ll
|
|
|
arm64-fp128-folding.ll
|
|
|
arm64-fp128.ll
|
|
|
arm64-fp-contract-zero.ll
|
|
|
arm64-fp-imm.ll
|
|
|
arm64-fp.ll
|
|
|
arm64-frame-index.ll
|
|
|
arm64-global-address.ll
|
|
|
arm64-hello.ll
|
|
|
arm64-i16-subreg-extract.ll
|
|
|
arm64-icmp-opt.ll
|
|
|
arm64-illegal-float-ops.ll
|
|
|
arm64-indexed-memory.ll
|
|
|
arm64-indexed-vector-ldst-2.ll
|
|
|
arm64-indexed-vector-ldst.ll
|
|
|
arm64-inline-asm-error-I.ll
|
|
|
arm64-inline-asm-error-J.ll
|
|
|
arm64-inline-asm-error-K.ll
|
|
|
arm64-inline-asm-error-L.ll
|
|
|
arm64-inline-asm-error-M.ll
|
|
|
arm64-inline-asm-error-N.ll
|
|
|
arm64-inline-asm-zero-reg-error.ll
|
|
|
arm64-inline-asm.ll
|
|
|
arm64-join-reserved.ll
|
|
|
arm64-jumptable.ll
|
|
|
arm64-large-frame.ll
|
|
|
arm64-ld1.ll
|
|
|
arm64-ldp.ll
|
|
|
arm64-ldur.ll
|
|
|
arm64-ldxr-stxr.ll
|
|
|
arm64-leaf.ll
|
|
|
arm64-long-shift.ll
|
|
|
arm64-memcpy-inline.ll
|
|
|
arm64-memset-inline.ll
|
|
|
arm64-memset-to-bzero.ll
|
|
|
arm64-misched-basic-A53.ll
|
|
|
arm64-misched-basic-A57.ll
|
|
|
arm64-misched-forwarding-A53.ll
|
|
|
arm64-movi.ll
|
|
|
arm64-mul.ll
|
|
|
arm64-named-reg-alloc.ll
|
|
|
arm64-named-reg-notareg.ll
|
|
|
arm64-neg.ll
|
|
|
arm64-neon-2velem-high.ll
|
|
|
arm64-neon-2velem.ll
|
|
|
arm64-neon-3vdiff.ll
|
|
|
arm64-neon-aba-abd.ll
|
|
|
arm64-neon-across.ll
|
|
|
arm64-neon-add-pairwise.ll
|
|
|
arm64-neon-add-sub.ll
|
|
|
arm64-neon-compare-instructions.ll
|
|
|
arm64-neon-copy.ll
|
|
|
arm64-neon-copyPhysReg-tuple.ll
|
|
|
arm64-neon-mul-div.ll
|
|
|
arm64-neon-scalar-by-elem-mul.ll
|
|
|
arm64-neon-select_cc.ll
|
|
|
arm64-neon-simd-ldst-one.ll
|
|
|
arm64-neon-simd-shift.ll
|
|
|
arm64-neon-simd-vget.ll
|
|
|
arm64-neon-v1i1-setcc.ll
|
|
|
arm64-neon-vector-list-spill.ll
|
|
|
arm64-patchpoint-scratch-regs.ll
|
|
|
arm64-patchpoint-webkit_jscc.ll
|
|
|
arm64-patchpoint.ll
|
|
|
arm64-pic-local-symbol.ll
|
|
|
arm64-platform-reg.ll
|
|
|
arm64-popcnt.ll
|
[Aarch64] Customer lowering of CTPOP to SIMD should check for NEON availability
|
2014-11-19 00:29:14 +00:00 |
arm64-prefetch.ll
|
|
|
arm64-promote-const.ll
|
|
|
arm64-redzone.ll
|
|
|
arm64-reg-copy-noneon.ll
|
|
|
arm64-register-offset-addressing.ll
|
|
|
arm64-register-pairing.ll
|
|
|
arm64-regress-f128csel-flags.ll
|
|
|
arm64-regress-interphase-shift.ll
|
|
|
arm64-return-vector.ll
|
|
|
arm64-returnaddr.ll
|
|
|
arm64-rev.ll
|
|
|
arm64-rounding.ll
|
|
|
arm64-scaled_iv.ll
|
|
|
arm64-scvt.ll
|
|
|
arm64-setcc-int-to-fp-combine.ll
|
|
|
arm64-shifted-sext.ll
|
|
|
arm64-shrink-v1i64.ll
|
|
|
arm64-simd-scalar-to-vector.ll
|
|
|
arm64-simplest-elf.ll
|
|
|
arm64-sincos.ll
|
|
|
arm64-sitofp-combine-chains.ll
|
|
|
arm64-sli-sri-opt.ll
|
|
|
arm64-smaxv.ll
|
|
|
arm64-sminv.ll
|
|
|
arm64-spill-lr.ll
|
|
|
arm64-spill.ll
|
|
|
arm64-sqshl-uqshl-i64Contant.ll
|
|
|
arm64-st1.ll
|
|
|
arm64-stack-no-frame.ll
|
|
|
arm64-stackmap.ll
|
|
|
arm64-stackpointer.ll
|
|
|
arm64-stacksave.ll
|
|
|
arm64-stp.ll
|
|
|
arm64-strict-align.ll
|
|
|
arm64-stur.ll
|
|
|
arm64-subsections.ll
|
|
|
arm64-subvector-extend.ll
|
|
|
arm64-swizzle-tbl-i16-layout.ll
|
|
|
arm64-tbl.ll
|
|
|
arm64-this-return.ll
|
|
|
arm64-tls-darwin.ll
|
|
|
arm64-tls-dynamic-together.ll
|
|
|
arm64-tls-dynamics.ll
|
|
|
arm64-tls-execs.ll
|
|
|
arm64-trap.ll
|
|
|
arm64-triv-disjoint-mem-access.ll
|
|
|
arm64-trn.ll
|
|
|
arm64-trunc-store.ll
|
|
|
arm64-umaxv.ll
|
|
|
arm64-uminv.ll
|
|
|
arm64-umov.ll
|
|
|
arm64-unaligned_ldst.ll
|
|
|
arm64-uzp.ll
|
|
|
arm64-vaargs.ll
|
|
|
arm64-vabs.ll
|
AArch64: Pattern match integer vector abs like we do on ARM.
|
2014-11-04 20:10:06 +00:00 |
arm64-vadd.ll
|
|
|
arm64-vaddlv.ll
|
|
|
arm64-vaddv.ll
|
|
|
arm64-variadic-aapcs.ll
|
|
|
arm64-vbitwise.ll
|
|
|
arm64-vclz.ll
|
|
|
arm64-vcmp.ll
|
|
|
arm64-vcnt.ll
|
|
|
arm64-vcombine.ll
|
|
|
arm64-vcvt_f32_su32.ll
|
|
|
arm64-vcvt_f.ll
|
|
|
arm64-vcvt_n.ll
|
|
|
arm64-vcvt_su32_f32.ll
|
|
|
arm64-vcvt.ll
|
|
|
arm64-vcvtxd_f32_f64.ll
|
|
|
arm64-vecCmpBr.ll
|
|
|
arm64-vecFold.ll
|
|
|
arm64-vector-ext.ll
|
|
|
arm64-vector-imm.ll
|
|
|
arm64-vector-insertion.ll
|
|
|
arm64-vector-ldst.ll
|
|
|
arm64-vext_reverse.ll
|
|
|
arm64-vext.ll
|
|
|
arm64-vfloatintrinsics.ll
|
|
|
arm64-vhadd.ll
|
|
|
arm64-vhsub.ll
|
|
|
arm64-virtual_base.ll
|
|
|
arm64-vmax.ll
|
|
|
arm64-vminmaxnm.ll
|
|
|
arm64-vmovn.ll
|
|
|
arm64-vmul.ll
|
|
|
arm64-volatile.ll
|
|
|
arm64-vpopcnt.ll
|
|
|
arm64-vqadd.ll
|
|
|
arm64-vqsub.ll
|
|
|
arm64-vselect.ll
|
|
|
arm64-vsetcc_fp.ll
|
|
|
arm64-vshift.ll
|
|
|
arm64-vshr.ll
|
|
|
arm64-vshuffle.ll
|
|
|
arm64-vsqrt.ll
|
|
|
arm64-vsra.ll
|
|
|
arm64-vsub.ll
|
|
|
arm64-weak-reference.ll
|
|
|
arm64-xaluo.ll
|
Fix previous commit: [FastISel][AArch64] Simplify XALU multiplies.
|
2014-09-18 07:26:26 +00:00 |
arm64-zero-cycle-regmov.ll
|
|
|
arm64-zero-cycle-zeroing.ll
|
|
|
arm64-zext.ll
|
|
|
arm64-zextload-unscaled.ll
|
|
|
arm64-zip.ll
|
|
|
asm-large-immediate.ll
|
|
|
assertion-rc-mismatch.ll
|
|
|
atomic-ops-not-barriers.ll
|
|
|
atomic-ops.ll
|
Optimize sext/zext insertion algorithm in back-end.
|
2014-09-19 05:30:35 +00:00 |
basic-pic.ll
|
|
|
bitfield-insert-0.ll
|
|
|
bitfield-insert.ll
|
|
|
bitfield.ll
|
|
|
blockaddress.ll
|
|
|
bool-loads.ll
|
|
|
br-undef-cond.ll
|
[AArch64] Keep flags on condition vreg when instantiating a CB branch.
|
2014-11-07 02:50:00 +00:00 |
branch-relax-asm.ll
|
|
|
breg.ll
|
|
|
callee-save.ll
|
|
|
cmp-const-max.ll
|
[AArch64] Fix miscompile of comparison with 0xffffffffffffffff
|
2014-11-03 15:28:40 +00:00 |
cmpwithshort.ll
|
|
|
cmpxchg-idioms.ll
|
|
|
code-model-large-abs.ll
|
|
|
combine-comparisons-by-cse.ll
|
[AArch64] CondOpt pass is missing FCMP instructions when searching backward for
|
2014-10-31 15:17:36 +00:00 |
compare-branch.ll
|
|
|
compiler-ident.ll
|
|
|
complex-copy-noneon.ll
|
|
|
complex-fp-to-int.ll
|
|
|
complex-int-to-fp.ll
|
|
|
cond-sel.ll
|
|
|
cpus.ll
|
|
|
dag-combine-invaraints.ll
|
Fix incorrect invariant check in DAG Combine
|
2014-10-30 22:21:03 +00:00 |
directcond.ll
|
|
|
dont-take-over-the-world.ll
|
|
|
dp1.ll
|
|
|
dp2.ll
|
|
|
dp-3source.ll
|
|
|
eliminate-trunc.ll
|
|
|
extern-weak.ll
|
|
|
extract.ll
|
|
|
f16-convert.ll
|
|
|
fast-isel-addressing-modes.ll
|
[FastISel][AArch64] Fix load/store with frame indices.
|
2014-10-27 18:21:58 +00:00 |
fast-isel-branch_weights.ll
|
|
|
fast-isel-call-return.ll
|
|
|
fast-isel-cbz.ll
|
[FastISel][AArch64] Optimize compare-and-branch for i1 to use 'tbz'.
|
2014-10-27 19:46:23 +00:00 |
fast-isel-cmp-branch.ll
|
|
|
fast-isel-folding.ll
|
|
|
fast-isel-gep.ll
|
[FastISel][AArch64] Don't bail during simple GEP instruction selection.
|
2014-11-13 20:50:44 +00:00 |
fast-isel-int-ext2.ll
|
[FastISel][AArch64] Fix sign-/zero-extend folding when SelectionDAG is involved.
|
2014-10-14 20:36:02 +00:00 |
fast-isel-int-ext3.ll
|
[FastISel][AArch64] Fix sign-/zero-extend folding when SelectionDAG is involved.
|
2014-10-14 20:36:02 +00:00 |
fast-isel-int-ext4.ll
|
[AArch64][FastISel] Fix kill flags for integer extends.
|
2014-11-10 21:05:31 +00:00 |
fast-isel-int-ext.ll
|
[FastISel][AArch64] Teach the address computation code to also fold sign-/zero-extends.
|
2014-10-07 03:40:06 +00:00 |
fast-isel-intrinsic.ll
|
[FastISel][AArch64] Add support for fabs intrinsic.
|
2014-11-11 23:10:44 +00:00 |
fast-isel-logic-op.ll
|
|
|
fast-isel-mul.ll
|
|
|
fast-isel-runtime-libcall.ll
|
|
|
fast-isel-sdiv.ll
|
|
|
fast-isel-select.ll
|
[FastISel][AArch64] Optimize select when one of the operands is a 'true' or 'false' value.
|
2014-11-13 00:36:46 +00:00 |
fast-isel-shift.ll
|
[FastISel][AArch64] Also allow folding of sign-/zero-extend and arithmetic
|
2014-11-18 22:41:49 +00:00 |
fast-isel-sqrt.ll
|
|
|
fast-isel-switch-phi.ll
|
llvm/test/CodeGen: Some tests don't REQUIRE asserts any more. Remove them.
|
2014-10-12 06:47:47 +00:00 |
fast-isel-tbz.ll
|
[FastISel][AArch64] Don't fold the 'and' instruction into the 'tbz/tbnz' instruction if it is in a different basic block.
|
2014-10-27 19:16:48 +00:00 |
fast-isel-trunc.ll
|
|
|
fast-isel-vector-arithmetic.ll
|
|
|
fast-isel-vret.ll
|
|
|
fastcc-reserved.ll
|
|
|
fastcc.ll
|
|
|
fcmp.ll
|
|
|
fcvt-fixed.ll
|
|
|
fcvt-int.ll
|
|
|
flags-multiuse.ll
|
|
|
floatdp_1source.ll
|
|
|
floatdp_2source.ll
|
|
|
fp16-instructions.ll
|
|
|
fp16-v4-instructions.ll
|
|
|
fp16-v8-instructions.ll
|
|
|
fp16-vector-bitcast.ll
|
|
|
fp16-vector-load-store.ll
|
|
|
fp16-vector-shuffle.ll
|
|
|
fp128-folding.ll
|
|
|
fp-cond-sel.ll
|
|
|
fp-dp3.ll
|
|
|
fpconv-vector-op-scalarize.ll
|
Make test for r220533 more robust by using GPR pattern.
|
2014-10-24 00:03:46 +00:00 |
fpimm.ll
|
|
|
frameaddr.ll
|
|
|
free-zext.ll
|
|
|
func-argpassing.ll
|
|
|
func-calls.ll
|
|
|
funcptr_cast.ll
|
|
|
global-alignment.ll
|
|
|
global-merge-1.ll
|
|
|
global-merge-2.ll
|
|
|
global-merge-3.ll
|
|
|
global-merge-4.ll
|
|
|
global-merge.ll
|
|
|
got-abuse.ll
|
|
|
half.ll
|
|
|
hints.ll
|
|
|
i1-contents.ll
|
|
|
i128-align.ll
|
|
|
i128-fast-isel-fallback.ll
|
|
|
illegal-float-ops.ll
|
|
|
init-array.ll
|
|
|
inline-asm-constraints-badI.ll
|
|
|
inline-asm-constraints-badK2.ll
|
|
|
inline-asm-constraints-badK.ll
|
|
|
inline-asm-constraints-badL.ll
|
|
|
inlineasm-ldr-pseudo.ll
|
|
|
intrinsics-memory-barrier.ll
|
|
|
jump-table.ll
|
Fix a bit of confusion about .set and produce more readable assembly.
|
2014-10-21 01:17:30 +00:00 |
large-consts.ll
|
|
|
ldst-opt.ll
|
|
|
ldst-regoffset.ll
|
|
|
ldst-unscaledimm.ll
|
|
|
ldst-unsignedimm.ll
|
|
|
legalize-bug-bogus-cpu.ll
|
PR20557: Fix the bug that bogus cpu parameter crashes llc on AArch64 backend.
|
2014-10-31 02:35:34 +00:00 |
lit.local.cfg
|
|
|
literal_pools_float.ll
|
|
|
local_vars.ll
|
|
|
logical_shifted_reg.ll
|
|
|
logical-imm.ll
|
|
|
machine_cse.ll
|
|
|
madd-combiner.ll
|
[AArch64] Use the correct register class for ORR.
|
2014-11-04 22:20:07 +00:00 |
madd-lohi.ll
|
|
|
mature-mc-support.ll
|
|
|
memcpy-f128.ll
|
|
|
movw-consts.ll
|
|
|
movw-shift-encoding.ll
|
|
|
mul_pow2.ll
|
|
|
mul-lohi.ll
|
|
|
neon-bitcast.ll
|
|
|
neon-bitwise-instructions.ll
|
|
|
neon-compare-instructions.ll
|
|
|
neon-diagnostics.ll
|
|
|
neon-extract.ll
|
|
|
neon-fma.ll
|
|
|
neon-fpround_f128.ll
|
|
|
neon-idiv.ll
|
|
|
neon-mla-mls.ll
|
|
|
neon-mov.ll
|
|
|
neon-or-combine.ll
|
|
|
neon-perm.ll
|
|
|
neon-scalar-by-elem-fma.ll
|
|
|
neon-scalar-copy.ll
|
AArch64: fall back to generic code for out of range extract/insert.
|
2014-07-15 10:00:26 +00:00 |
neon-shift-left-long.ll
|
|
|
neon-truncStore-extLoad.ll
|
|
|
nzcv-save.ll
|
|
|
paired-load.ll
|
|
|
PBQP-chain.ll
|
[AArch64] Cleanup A57PBQPConstraints
|
2014-10-22 12:40:20 +00:00 |
PBQP-coalesce-benefit.ll
|
[PBQP] Add a testcase for r220302: Fix coalescing benefits
|
2014-10-21 20:10:21 +00:00 |
PBQP-csr.ll
|
[PBQP] Callee saved regs should have a higher cost than scratch regs
|
2014-11-04 20:51:29 +00:00 |
PBQP.ll
|
[PBQP] Teach PassConfig to tell if the default register allocator is used.
|
2014-10-21 20:47:22 +00:00 |
pic-eh-stubs.ll
|
|
|
postra-mi-sched.ll
|
|
|
ragreedy-csr.ll
|
|
|
rbit.ll
|
|
|
Redundantstore.ll
|
[AArch64] Redundant store instructions should be removed as dead code
|
2014-09-27 17:02:54 +00:00 |
regress-bitcast-formals.ll
|
|
|
regress-f128csel-flags.ll
|
|
|
regress-fp128-livein.ll
|
|
|
regress-tail-livereg.ll
|
|
|
regress-tblgen-chains.ll
|
|
|
regress-w29-reserved-with-fp.ll
|
|
|
remat.ll
|
|
|
returnaddr.ll
|
|
|
rm_redundant_cmp.ll
|
Optimize sext/zext insertion algorithm in back-end.
|
2014-09-19 05:30:35 +00:00 |
sdivpow2.ll
|
[AArch64] Fix miscompile of sdiv-by-power-of-2.
|
2014-10-16 16:41:15 +00:00 |
setcc-takes-i32.ll
|
|
|
sibling-call.ll
|
|
|
sincos-expansion.ll
|
|
|
sincospow-vector-expansion.ll
|
|
|
stack_guard_remat.ll
|
|
|
stack-guard-remat-bitcast.ll
|
|
|
tail-call.ll
|
|
|
tailcall-fastisel.ll
|
|
|
tbz-tbnz.ll
|
|
|
trunc-v1i64.ll
|
[SelectionDAG] When scalarizing trunc, don't assert for legal operands.
|
2014-10-30 23:46:50 +00:00 |
tst-br.ll
|
|
|
zero-reg.ll
|
|
|