..
32-bit-local-address-space.ll
R600/SI: Use a ComplexPattern for DS loads and stores
2014-08-22 18:49:33 +00:00
64bit-kernel-args.ll
R600/SI: Print more immediates in hex format
2014-04-15 22:32:49 +00:00
128bit-kernel-args.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
add_i64.ll
R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operations
2014-09-05 14:07:59 +00:00
add-debug.ll
Fix classof for ISD::INTRINSIC_W_CHAIN and INTRINSIC_VOID
2014-08-13 01:15:37 +00:00
add.ll
R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operations
2014-09-05 14:07:59 +00:00
address-space.ll
R600/SI: Implement areLoadsFromSameBasePtr
2014-08-06 00:29:43 +00:00
and.ll
R600/SI: Prefer selecting more e64 instruction forms.
2014-09-15 17:15:02 +00:00
anyext.ll
R600/SI: Add a pattern for i32 anyext
2014-02-13 23:34:13 +00:00
array-ptr-calc-i32.ll
R600/SI: Relax a few tests to help enable scheduler
2014-09-06 20:44:41 +00:00
array-ptr-calc-i64.ll
R600/SI: Un-xfail tests which work now
2014-09-19 23:02:18 +00:00
atomic_cmp_swap_local.ll
R600/SI: Replace LDS atomics with no return versions
2014-09-08 15:07:31 +00:00
atomic_load_add.ll
R600/SI: Replace LDS atomics with no return versions
2014-09-08 15:07:31 +00:00
atomic_load_sub.ll
R600/SI: Replace LDS atomics with no return versions
2014-09-08 15:07:31 +00:00
basic-branch.ll
R600: Add failing control flow tests.
2014-03-01 21:45:41 +00:00
basic-loop.ll
R600: Add failing control flow tests.
2014-03-01 21:45:41 +00:00
bfe_uint.ll
R600: Disable the BFE pattern
2014-01-23 18:49:33 +00:00
bfi_int.ll
R600/SI: Prefer selecting more e64 instruction forms.
2014-09-15 17:15:02 +00:00
big_alu.ll
R600/SI: Add intrinsics for various math instructions.
2014-06-19 01:19:19 +00:00
bitcast.ll
R600/SI: Fix bitcast between v2i32 and f64
2014-06-11 19:31:13 +00:00
bswap.ll
R600: Fix selection failure for vector bswap
2014-06-09 16:20:25 +00:00
build_vector.ll
R600/SI: Change formatting of printed registers.
2013-11-12 02:35:51 +00:00
call_fs.ll
R600: Add a test for r183108
2013-06-04 15:03:35 +00:00
call.ll
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors
2014-04-29 23:12:53 +00:00
cayman-loop-bug.ll
R600: Workaround for cayman loop bug
2013-12-02 17:29:37 +00:00
cf_end.ll
R600: Stop emitting the instruction type byte before each instruction
2013-05-06 17:50:44 +00:00
cf-stack-bug.ll
R600: Recommit 199842: Add work-around for the CF stack entry HW bug
2014-01-23 16:18:02 +00:00
codegen-prepare-addrmode-sext.ll
R600/SI: Try to keep i32 mul on SALU
2014-09-03 23:24:35 +00:00
combine_vloads.ll
Add target hook to prevent folding some bitcasted loads.
2013-11-15 04:42:23 +00:00
complex-folding.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
concat_vectors.ll
R600/SI: Custom lower CONCAT_VECTORS
2014-08-09 01:06:56 +00:00
copy-illegal-type.ll
R600: Add dag combine for copy of an illegal type.
2014-07-15 02:06:31 +00:00
ctlz_zero_undef.ll
R600: Implement zero undef variants of ctlz/cttz
2014-07-15 15:51:09 +00:00
ctpop64.ll
R600/SI: Implement areLoadsFromSameBasePtr
2014-08-06 00:29:43 +00:00
ctpop.ll
R600/SI: Prefer selecting more e64 instruction forms.
2014-09-15 17:15:02 +00:00
cttz_zero_undef.ll
R600: Implement zero undef variants of ctlz/cttz
2014-07-15 15:51:09 +00:00
cvt_f32_ubyte.ll
R600/SI: Implement areLoadsFromSameBasePtr
2014-08-06 00:29:43 +00:00
dagcombiner-bug-illegal-vec4-int-to-fp.ll
R600: Prettier asmPrint of Alu
2013-05-02 21:52:30 +00:00
default-fp-mode.ll
R600: Add denormal handling subtarget features.
2014-07-14 23:40:49 +00:00
disconnected-predset-break-bug.ll
R600: use native for alu
2013-04-30 00:14:38 +00:00
dot4-folding.ll
R600: Const/Neg/Abs can be folded to dot4
2013-06-04 23:17:15 +00:00
ds-negative-offset-addressing-mode-loop.ll
R600/SI: Use a ComplexPattern for DS loads and stores
2014-08-22 18:49:33 +00:00
elf.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
elf.r600.ll
R600: Refactor stack size calculation
2014-01-22 21:55:43 +00:00
extload.ll
R600/SI: Add a ComplexPattern for selecting MUBUF _OFFSET variant
2014-08-11 22:18:17 +00:00
extract_vector_elt_i16.ll
R600/SI: Implement areLoadsFromSameBasePtr
2014-08-06 00:29:43 +00:00
fabs.f64.ll
R600/SI: Use source modifier for f64 fabs
2014-08-15 18:42:15 +00:00
fabs.ll
R600/SI: Move all fabs / fneg handling to patterns
2014-08-15 18:42:22 +00:00
fadd64.ll
R600/SI: Change formatting of printed registers.
2013-11-12 02:35:51 +00:00
fadd.ll
R600: Cleanup fadd and fsub tests
2014-08-06 20:27:55 +00:00
fceil64.ll
R600/SI: Relax a few tests to help enable scheduler
2014-09-06 20:44:41 +00:00
fceil.ll
R600: Expand vector fceil
2014-06-18 17:57:29 +00:00
fcmp64.ll
R600/SI: Add instruction shrinking pass
2014-07-21 16:55:33 +00:00
fcmp-cnd.ll
R600: Non vector only instruction can be scheduled on trans unit
2013-09-04 19:53:46 +00:00
fcmp-cnde-int-args.ll
R600: Improve custom lowering of select_cc
2013-03-08 15:37:09 +00:00
fcmp.ll
R600: Non vector only instruction can be scheduled on trans unit
2013-09-04 19:53:46 +00:00
fconst64.ll
R600/SI: Print more immediates in hex format
2014-04-15 22:32:49 +00:00
fcopysign.f32.ll
R600/SI: Relax a few tests to help enable scheduler
2014-09-06 20:44:41 +00:00
fcopysign.f64.ll
R600/SI: Implement areLoadsFromSameBasePtr
2014-08-06 00:29:43 +00:00
fdiv64.ll
R600/SI: Change formatting of printed registers.
2013-11-12 02:35:51 +00:00
fdiv.ll
R600/SI: Implement less wrong f32 fdiv
2014-07-15 20:18:31 +00:00
fetch-limits.r600.ll
R600: Fix the fetch limits for R600 generation GPUs
2013-06-07 20:28:55 +00:00
fetch-limits.r700+.ll
R600: Fix the fetch limits for R600 generation GPUs
2013-06-07 20:28:55 +00:00
ffloor.ll
R600/SI: Relax a few tests to help enable scheduler
2014-09-06 20:44:41 +00:00
flat-address-space.ll
R600/SI: Add preliminary support for flat address space
2014-09-15 15:41:53 +00:00
floor.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
fma.f64.ll
R600: Add FMA instructions for Evergreen
2014-07-24 17:41:01 +00:00
fma.ll
R600: Add FMA instructions for Evergreen
2014-07-24 17:41:01 +00:00
fmad.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
fmax.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
fmin.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
fmul64.ll
R600/SI: Make sure double vector fmul is tested
2014-09-15 17:04:54 +00:00
fmul.ll
Fix interference caused by fmul 2, x -> fadd x, x
2014-09-02 19:02:53 +00:00
fmuladd.ll
R600/SI: Change formatting of printed registers.
2013-11-12 02:35:51 +00:00
fnearbyint.ll
R600: Handle fnearbyint
2014-06-18 22:03:45 +00:00
fneg-fabs.f64.ll
R600/SI: Move all fabs / fneg handling to patterns
2014-08-15 18:42:22 +00:00
fneg-fabs.ll
R600/SI: Move all fabs / fneg handling to patterns
2014-08-15 18:42:22 +00:00
fneg.f64.ll
R600/SI: Use source modifiers for f64 fneg
2014-08-15 18:42:18 +00:00
fneg.ll
R600/SI: Change formatting of printed FP immediates
2014-09-17 17:32:13 +00:00
fp16_to_fp.ll
R600: support f16 -> f64 conversion intrinsic.
2014-07-18 08:43:24 +00:00
fp32_to_fp16.ll
R600: rename misleading fp16 test.
2014-07-18 08:43:30 +00:00
fp64_to_sint.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
fp_to_sint.ll
[SDAG] When performing post-legalize DAG combining, run the legalizer
2014-07-26 05:49:40 +00:00
fp_to_uint.f64.ll
R600/SI: Match fp_to_uint / uint_to_fp for f64
2014-05-22 03:20:30 +00:00
fp_to_uint.ll
[SDAG] When performing post-legalize DAG combining, run the legalizer
2014-07-26 05:49:40 +00:00
fpext.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
fptrunc.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
frem.ll
R600: Custom lower frem
2014-09-10 21:44:27 +00:00
fsqrt.ll
R600/SI: Change formatting of printed registers.
2013-11-12 02:35:51 +00:00
fsub64.ll
R600/SI: Prettier operand printing for 64-bit ops.
2014-06-18 17:13:51 +00:00
fsub.ll
R600: Cleanup fadd and fsub tests
2014-08-06 20:27:55 +00:00
ftrunc.ll
R600/SI: Add a pattern for f32 ftrunc
2014-06-20 17:06:09 +00:00
gep-address-space.ll
R600/SI: Use a ComplexPattern for DS loads and stores
2014-08-22 18:49:33 +00:00
gv-const-addrspace-fail.ll
R600/SI: Un xfail a test that works now
2014-09-19 22:42:40 +00:00
gv-const-addrspace.ll
R600/SI: Use scratch memory for large private arrays
2014-07-21 15:45:01 +00:00
half.ll
R600: support fpext/fptrunc operations to and from f16.
2014-07-18 13:01:37 +00:00
i8-to-double-to-float.ll
R600: Use KCache for kernel arguments
2013-07-23 01:48:18 +00:00
icmp64.ll
R600/SI: Add i64 cmp tests
2013-12-10 21:11:55 +00:00
icmp-select-sete-reverse-args.ll
R600: Non vector only instruction can be scheduled on trans unit
2013-09-04 19:53:46 +00:00
imm.ll
R600/SI: Change formatting of printed FP immediates
2014-09-17 17:32:13 +00:00
indirect-addressing-si.ll
R600/SI: Change formatting of printed registers.
2013-11-12 02:35:51 +00:00
indirect-private-64.ll
R600/SI: Clean up some of the unused REGISTER_{LOAD,STORE} code
2014-07-21 15:45:06 +00:00
infinite-loop-evergreen.ll
R600: Add failing control flow tests.
2014-03-01 21:45:41 +00:00
infinite-loop.ll
R600/SI: Print more immediates in hex format
2014-04-15 22:32:49 +00:00
input-mods.ll
R600: Expand vector fexp2
2014-06-20 17:06:05 +00:00
insert_vector_elt.ll
R600/SI: Un-xfail tests which work now
2014-09-19 23:02:18 +00:00
jump-address.ll
Add a RequireStructuredCFG Field to TargetMachine.
2013-12-07 01:49:19 +00:00
kcache-fold.ll
R600: Fix handling of NAN in comparison instructions
2013-09-28 02:50:50 +00:00
kernel-args.ll
R600: Correctly set the src value offset for scalarized kernel args
2014-08-13 18:14:11 +00:00
large-alloca.ll
R600: Use LDS and vectors for private memory
2014-06-17 16:53:14 +00:00
large-constant-initializer.ll
R600/SI: Store constant initializer data in constant memory
2014-07-21 14:01:14 +00:00
lds-oqap-crash.ll
R600: LDS instructions shouldn't implicitly define OQAP
2014-03-13 17:13:04 +00:00
lds-output-queue.ll
Allow aliases to be unnamed_addr.
2014-06-06 01:20:28 +00:00
lds-size.ll
Allow aliases to be unnamed_addr.
2014-06-06 01:20:28 +00:00
legalizedag-bug-expand-setcc.ll
LegalizeDAG: Respect the result of TLI.getBooleanContents() when expanding SETCC
2013-03-08 15:37:02 +00:00
lit.local.cfg
Reduce verbiage of lit.local.cfg files
2014-06-09 22:42:55 +00:00
literals.ll
R600: Move code handling literal folding into R600ISelLowering.
2013-09-12 23:44:53 +00:00
llvm.AMDGPU.abs.ll
R600: Add a few tests I forgot to add.
2014-06-19 04:24:43 +00:00
llvm.AMDGPU.barrier.global.ll
R600: Add missing tests for some intrinsics
2014-07-12 00:36:19 +00:00
llvm.AMDGPU.barrier.local.ll
R600: Add missing tests for some intrinsics
2014-07-12 00:36:19 +00:00
llvm.AMDGPU.bfe.i32.ll
R600: Better fix for bug 20982
2014-09-19 00:42:06 +00:00
llvm.AMDGPU.bfe.u32.ll
R600: Try to convert BFE back to standard bit ops when possible.
2014-05-22 18:09:12 +00:00
llvm.AMDGPU.bfi.ll
R600: Add BFE, BFI, and BFM intrinsics to help with writing tests.
2014-03-31 18:21:18 +00:00
llvm.AMDGPU.bfm.ll
R600: Add BFE, BFI, and BFM intrinsics to help with writing tests.
2014-03-31 18:21:18 +00:00
llvm.AMDGPU.brev.ll
R600/SI: Add intrinsics for brev instructions
2014-06-18 17:13:57 +00:00
llvm.AMDGPU.clamp.ll
R600: Add a few tests I forgot to add.
2014-06-19 04:24:43 +00:00
llvm.AMDGPU.cube.ll
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
llvm.AMDGPU.cvt_f32_ubyte.ll
R600/SI: Use v_cvt_f32_ubyte* instructions
2014-06-11 17:50:44 +00:00
llvm.AMDGPU.div_fixup.ll
R600/SI: Add intrinsics for various math instructions.
2014-06-19 01:19:19 +00:00
llvm.AMDGPU.div_fmas.ll
R600/SI: Add intrinsics for various math instructions.
2014-06-19 01:19:19 +00:00
llvm.AMDGPU.div_scale.ll
R600/SI: Fix div_scale intrinsic.
2014-06-23 18:28:28 +00:00
llvm.amdgpu.dp4.ll
R600: Add missing tests for some intrinsics
2014-07-12 00:36:19 +00:00
llvm.AMDGPU.fract.ll
R600: Add a few tests I forgot to add.
2014-06-19 04:24:43 +00:00
llvm.AMDGPU.imad24.ll
R600: Expand mad24 for GPUs without it
2014-05-22 18:00:20 +00:00
llvm.AMDGPU.imax.ll
R600/SI: Move instruction patterns to scalar versions.
2014-03-21 18:01:18 +00:00
llvm.AMDGPU.imin.ll
R600/SI: Move instruction patterns to scalar versions.
2014-03-21 18:01:18 +00:00
llvm.AMDGPU.imul24.ll
R600: Expand mul24 for GPUs without it
2014-05-22 18:00:24 +00:00
llvm.AMDGPU.kill.ll
R600: Add missing tests for some intrinsics
2014-07-12 00:36:19 +00:00
llvm.amdgpu.kilp.ll
R600: Add missing tests for some intrinsics
2014-07-12 00:36:19 +00:00
llvm.AMDGPU.ldexp.ll
R600/SI: Add intrinsic for ldexp
2014-08-15 17:30:25 +00:00
llvm.AMDGPU.legacy.rsq.ll
R600: Fix inconsistency in rsq instructions.
2014-06-24 22:13:39 +00:00
llvm.amdgpu.lrp.ll
R600: Add missing tests for some intrinsics
2014-07-12 00:36:19 +00:00
llvm.AMDGPU.mul.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
llvm.AMDGPU.rcp.f64.ll
R600/SI: Allow using f32 rcp / rsq when denormals not handled.
2014-07-15 23:50:10 +00:00
llvm.AMDGPU.rcp.ll
R600: Match rcp node on pre-SI
2014-07-24 06:59:24 +00:00
llvm.AMDGPU.rsq.clamped.f64.ll
R600: Fix inconsistency in rsq instructions.
2014-06-24 22:13:39 +00:00
llvm.AMDGPU.rsq.clamped.ll
R600: Fix inconsistency in rsq instructions.
2014-06-24 22:13:39 +00:00
llvm.AMDGPU.rsq.ll
R600/SI: Prefer selecting more e64 instruction forms.
2014-09-15 17:15:02 +00:00
llvm.AMDGPU.tex.ll
R600: Swizzle texture/export instructions
2013-06-04 15:04:53 +00:00
llvm.AMDGPU.trig_preop.ll
R600/SI: Add intrinsics for various math instructions.
2014-06-19 01:19:19 +00:00
llvm.AMDGPU.trunc.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
llvm.AMDGPU.umad24.ll
R600: Expand mad24 for GPUs without it
2014-05-22 18:00:20 +00:00
llvm.AMDGPU.umax.ll
R600: Compute masked bits for min and max
2014-03-31 19:35:33 +00:00
llvm.AMDGPU.umin.ll
R600: Compute masked bits for min and max
2014-03-31 19:35:33 +00:00
llvm.AMDGPU.umul24.ll
R600: Expand mul24 for GPUs without it
2014-05-22 18:00:24 +00:00
llvm.cos.ll
R600: Expand vector sin and cos.
2014-05-02 15:41:47 +00:00
llvm.exp2.ll
R600: Expand vector fexp2
2014-06-20 17:06:05 +00:00
llvm.floor.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
llvm.log2.ll
R600: Expand vector flog2
2014-06-20 17:06:07 +00:00
llvm.memcpy.ll
R600: Increase nearby load scheduling threshold.
2014-08-06 00:29:49 +00:00
llvm.pow.ll
R600: Enable vector fpow.
2014-02-04 17:18:37 +00:00
llvm.rint.f64.ll
R600: Custom lower f64 frint for pre-CI
2014-06-18 17:05:26 +00:00
llvm.rint.ll
R600: Mostly remove remaining AMDIL intrinsics.
2014-06-12 21:15:44 +00:00
llvm.round.ll
R600: Fix FROUND
2014-09-05 14:26:54 +00:00
llvm.SI.fs.interp.constant.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
llvm.SI.gather4.ll
R600/SI: add gather4 and getlod intrinsics (v3)
2014-06-18 22:00:29 +00:00
llvm.SI.getlod.ll
R600/SI: add gather4 and getlod intrinsics (v3)
2014-06-18 22:00:29 +00:00
llvm.SI.image.ll
R600/SI: Use i32 vectors for resources and samplers
2014-07-11 17:11:52 +00:00
llvm.SI.image.sample.ll
R600/SI: Use i32 vectors for resources and samplers
2014-07-11 17:11:52 +00:00
llvm.SI.image.sample.o.ll
R600/SI: Use i32 vectors for resources and samplers
2014-07-11 17:11:52 +00:00
llvm.SI.imageload.ll
R600/SI: Change formatting of printed registers.
2013-11-12 02:35:51 +00:00
llvm.SI.load.dword.ll
R600/SI: Add intrinsic for BUFFER_LOAD_DWORD* instructions
2014-01-27 07:20:51 +00:00
llvm.SI.resinfo.ll
R600/SI: Relax a few tests to help enable scheduler
2014-09-06 20:44:41 +00:00
llvm.SI.sample-masked.ll
R600/SI: Add ShaderType attribute to some tests
2014-02-13 23:34:07 +00:00
llvm.SI.sample.ll
R600/SI: Add ShaderType attribute to some tests
2014-02-13 23:34:07 +00:00
llvm.SI.sampled.ll
R600/SI: Add ShaderType attribute to some tests
2014-02-13 23:34:07 +00:00
llvm.SI.sendmsg.ll
R600/SI: Add intrinsic for S_SENDMSG instruction
2014-01-27 07:20:44 +00:00
llvm.SI.tbuffer.store.ll
R600/SI: Print more immediates in hex format
2014-04-15 22:32:49 +00:00
llvm.SI.tid.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
llvm.sin.ll
R600/SI: Change formatting of printed FP immediates
2014-09-17 17:32:13 +00:00
llvm.sqrt.ll
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors
2014-04-29 23:12:53 +00:00
llvm.trunc.ll
R600: Allow ftrunc
2013-12-20 05:11:55 +00:00
load64.ll
R600/SI: Minor improvements to test.
2013-12-14 00:38:04 +00:00
load-i1.ll
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors
2014-04-29 23:12:53 +00:00
load-input-fold.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
load.ll
R600: Add dag combine for copy of an illegal type.
2014-07-15 02:06:31 +00:00
load.vec.ll
R600/SI: Change formatting of printed registers.
2013-11-12 02:35:51 +00:00
local-64.ll
R600/SI: Use a ComplexPattern for DS loads and stores
2014-08-22 18:49:33 +00:00
local-atomics64.ll
R600/SI: Replace LDS atomics with no return versions
2014-09-08 15:07:31 +00:00
local-atomics.ll
R600: Test local atomics for evergreen
2014-09-11 15:02:52 +00:00
local-memory-two-objects.ll
R600/SI: Use a ComplexPattern for DS loads and stores
2014-08-22 18:49:33 +00:00
local-memory.ll
Allow aliases to be unnamed_addr.
2014-06-06 01:20:28 +00:00
loop-address.ll
R600: add a pass that merges clauses.
2013-10-01 19:32:58 +00:00
loop-idiom.ll
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors
2014-04-29 23:12:53 +00:00
lshl.ll
R600/SI: Prefer SALU instructions for bit shift operations
2013-11-13 23:36:37 +00:00
lshr.ll
R600/SI: Prefer SALU instructions for bit shift operations
2013-11-13 23:36:37 +00:00
mad_int24.ll
R600: Match 24-bit arithmetic patterns in a Target DAGCombine
2014-04-07 19:45:41 +00:00
mad_uint24.ll
R600: Match 24-bit arithmetic patterns in a Target DAGCombine
2014-04-07 19:45:41 +00:00
mad-sub.ll
R600/SI: Use mad for fsub + fmul
2014-08-29 16:01:14 +00:00
max-literals.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
missing-store.ll
R600/SI: Fix losing chain when fixing reg class of loads.
2014-09-10 23:26:19 +00:00
mubuf.ll
R600/SI: Add some mubuf testcases.
2014-09-15 16:48:01 +00:00
mul_int24.ll
R600: Match 24-bit arithmetic patterns in a Target DAGCombine
2014-04-07 19:45:41 +00:00
mul_uint24.ll
R600/SI: Do abs/neg folding with ComplexPatterns
2014-08-01 00:32:39 +00:00
mul.ll
R600/SI: Try to keep i32 mul on SALU
2014-09-03 23:24:35 +00:00
mulhu.ll
R600/SI: Print more immediates in hex format
2014-04-15 22:32:49 +00:00
no-initializer-constant-addrspace.ll
R600: Fix asserts related to constant initializers
2014-06-14 04:26:05 +00:00
operand-spacing.ll
R600/SI: Fix extra whitespace in asm str
2014-08-03 05:27:14 +00:00
or.ll
R600/SI: Fix hardcoded register numbers in test
2014-09-02 20:43:07 +00:00
packetizer.ll
R600: Fix typo in R600Schedule.td
2013-06-25 02:39:20 +00:00
parallelandifcollapse.ll
R600: Un-xfail a test which passes with pass disabled
2014-09-19 23:02:20 +00:00
parallelorifcollapse.ll
R600: Use LDS and vectors for private memory
2014-06-17 16:53:14 +00:00
predicate-dp4.ll
R600: Make dot_4 instructions predicable
2013-11-16 16:24:41 +00:00
predicates.ll
R600: Enable the IR structurizer by default
2013-11-18 19:43:44 +00:00
private-memory-atomics.ll
R600: Don't crash on unhandled instruction in promote alloca
2014-06-27 16:52:49 +00:00
private-memory-broken.ll
Revert "Temporary hack to try cleaning extra .s file from bots."
2014-06-27 23:11:26 +00:00
private-memory.ll
R600/SI: Add a ComplexPattern for selecting MUBUF _OFFSET variant
2014-08-11 22:18:17 +00:00
pv-packing.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
pv.ll
R600/SI: Add intrinsics for various math instructions.
2014-06-19 01:19:19 +00:00
r600-encoding.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
r600-export-fix.ll
[SDAG] Make the DAGCombine worklist not grow endlessly due to duplicate
2014-07-23 07:08:53 +00:00
r600-infinite-loop-bug-while-reorganizing-vector.ll
R600: Fix an infinite loop when trying to reorganize export/tex vector input
2013-12-10 14:43:31 +00:00
r600cfg.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
README
R600: Reorganize lit tests and document how they should be organized
2013-04-19 02:10:53 +00:00
reciprocal.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
register-count-comments.ll
R600/SI: Fix off by 1 error in used register count
2014-09-11 22:51:37 +00:00
reorder-stores.ll
R600: Fix mishandling of load / store chains.
2014-07-07 18:34:45 +00:00
rotl.i64.ll
R600/SI: Relax some ordering in tests.
2014-09-02 21:45:50 +00:00
rotl.ll
R600/SI: Relax some ordering in tests.
2014-09-02 21:45:50 +00:00
rotr.i64.ll
R600/SI: Relax a few tests to help enable scheduler
2014-09-06 20:44:41 +00:00
rotr.ll
R600/SI: Fix selection error on i64 rotl / rotr.
2014-06-13 04:00:30 +00:00
rsq.ll
R600/SI: Prefer selecting more e64 instruction forms.
2014-09-15 17:15:02 +00:00
rv7x0_count3.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
saddo.ll
R600: Move add/sub with overflow out of AMDILISelLowering
2014-06-23 18:00:49 +00:00
salu-to-valu.ll
R600/SI: Teach moveToVALU how to handle more S_LOAD_* instructions
2014-08-21 20:41:00 +00:00
scalar_to_vector.ll
R600/SI: Fix selection failure on scalar_to_vector
2014-06-11 17:40:32 +00:00
schedule-fs-loop-nested-if.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
schedule-fs-loop-nested.ll
R600: Enable -verify-machineinstrs in some tests.
2013-10-01 19:32:38 +00:00
schedule-fs-loop.ll
R600: Enable -verify-machineinstrs in some tests.
2013-10-01 19:32:38 +00:00
schedule-global-loads.ll
R600/SI: Add a ComplexPattern for selecting MUBUF _OFFSET variant
2014-08-11 22:18:17 +00:00
schedule-if-2.ll
R600: Enable -verify-machineinstrs in some tests.
2013-10-01 19:32:38 +00:00
schedule-if.ll
R600: Enable -verify-machineinstrs in some tests.
2013-10-01 19:32:38 +00:00
schedule-kernel-arg-loads.ll
R600/SI: Implement areLoadsFromSameBasePtr
2014-08-06 00:29:43 +00:00
schedule-vs-if-nested-loop-failure.ll
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors
2014-04-29 23:12:53 +00:00
schedule-vs-if-nested-loop.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
sdiv.ll
R600: Fix assert on vector sdiv
2014-06-15 21:08:54 +00:00
sdivrem24.ll
R600: Use i24 optimized path for SREM
2014-08-12 17:31:17 +00:00
select64.ll
Revert "Revert r212640, "Add trunc (select c, a, b) -> select c (trunc a), (trunc b) combine.""
2014-07-10 18:21:04 +00:00
select-i1.ll
R600/SI: Fix select on i1
2014-07-15 21:44:37 +00:00
select-vectors.ll
R600/SI: Expand selects on vectors.
2014-03-06 17:34:03 +00:00
select.ll
R600/SI: Fix select on i1
2014-07-15 21:44:37 +00:00
selectcc-cnd.ll
R600: Non vector only instruction can be scheduled on trans unit
2013-09-04 19:53:46 +00:00
selectcc-cnde-int.ll
R600: Non vector only instruction can be scheduled on trans unit
2013-09-04 19:53:46 +00:00
selectcc-icmp-select-float.ll
R600: Prettier asmPrint of Alu
2013-05-02 21:52:30 +00:00
selectcc-opt.ll
R600/SI: Remove dead code and add missing tests.
2014-07-20 06:11:02 +00:00
selectcc.ll
R600: Expand i64 SELECT_CC
2014-05-09 16:42:19 +00:00
set-dx10.ll
R600: Fix handling of NAN in comparison instructions
2013-09-28 02:50:50 +00:00
setcc64.ll
R600/SI: Use VALU instructions for i1 ops
2014-05-15 14:41:50 +00:00
setcc-equivalent.ll
[SDAG] When performing post-legalize DAG combining, run the legalizer
2014-07-26 05:49:40 +00:00
setcc-opt.ll
R600/SI: Remove dead code and add missing tests.
2014-07-20 06:11:02 +00:00
setcc.ll
R600/SI: Use VALU instructions for i1 ops
2014-05-15 14:41:50 +00:00
seto.ll
R600/SI: Add instruction shrinking pass
2014-07-21 16:55:33 +00:00
setuo.ll
R600/SI: Add instruction shrinking pass
2014-07-21 16:55:33 +00:00
sext-in-reg.ll
R600/SI: Relax some ordering in tests.
2014-09-02 21:45:50 +00:00
sgpr-control-flow.ll
R600/SI: Only select SALU instructions in the entry or exit block
2014-04-29 23:12:48 +00:00
sgpr-copy-duplicate-operand.ll
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors
2014-04-29 23:12:53 +00:00
sgpr-copy.ll
R600/SI: Add intrinsics for various math instructions.
2014-06-19 01:19:19 +00:00
shared-op-cycle.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
shl_add_constant.ll
Add DAG combine for shl + add of constants.
2014-09-11 17:34:19 +00:00
shl_add_ptr.ll
Add DAG combine for shl + add of constants.
2014-09-11 17:34:19 +00:00
shl.ll
R600: Implement 64bit SHL
2014-06-18 12:27:13 +00:00
si-annotate-cf-assertion.ll
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors
2014-04-29 23:12:53 +00:00
si-lod-bias.ll
R600/SI: Change formatting of printed registers.
2013-11-12 02:35:51 +00:00
si-sgpr-spill.ll
R600/SI: Add intrinsics for various math instructions.
2014-06-19 01:19:19 +00:00
si-vector-hang.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
sign_extend.ll
R600/SI: Try to keep i32 mul on SALU
2014-09-03 23:24:35 +00:00
simplify-demanded-bits-build-pair.ll
R600: Run more tests with promote alloca disabled.
2014-07-13 02:46:17 +00:00
sint_to_fp64.ll
SelectionDAG: Expand SELECT_CC to SELECT + SETCC
2014-06-10 16:01:22 +00:00
sint_to_fp.ll
R600/SI: Fix [s|u]int_to_fp for i1
2014-05-31 06:47:42 +00:00
smrd.ll
R600/SI: Fix test to prepare for scheduler
2014-09-19 18:11:16 +00:00
split-scalar-i64-add.ll
R600/SI: Add failing testcase.
2014-09-02 19:12:31 +00:00
sra.ll
R600: Implement 64bit SRA
2014-06-18 12:27:17 +00:00
srem.ll
R600: Remove a few more things from AMDILISelLowering
2014-06-15 21:08:58 +00:00
srl.ll
R600: Implement 64bit SRL
2014-06-18 12:27:15 +00:00
ssubo.ll
R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operations
2014-09-05 14:07:59 +00:00
store-v3i32.ll
R600: Add failing testcase for <3 x i32> stores.
2014-03-25 16:50:55 +00:00
store-v3i64.ll
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors
2014-04-29 23:12:53 +00:00
store-vector-ptrs.ll
R600/SI: Make sure SCRATCH_WAVE_OFFSET is added as Live-In to the function
2014-08-21 20:40:58 +00:00
store.ll
R600: Promote i64 stores to v2i32
2014-06-24 23:33:04 +00:00
store.r600.ll
R600: Change the RAT instruction assembly names so they match the docs
2013-08-16 01:11:46 +00:00
structurize1.ll
R600: Fix a crash in the AMDILCFGStrucurizer
2013-11-18 19:43:38 +00:00
structurize.ll
R600: Enable the IR structurizer by default
2013-11-18 19:43:44 +00:00
sub.ll
R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operations
2014-09-05 14:07:59 +00:00
swizzle-export.ll
[SDAG] Make the DAGCombine worklist not grow endlessly due to duplicate
2014-07-23 07:08:53 +00:00
tex-clause-antidep.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
texture-input-merge.ll
R600: Use function inputs to represent data stored in gpr
2013-11-11 22:10:24 +00:00
trunc-store-i1.ll
R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errors
2014-04-29 23:12:53 +00:00
trunc-vector-store-assertion-failure.ll
SelectionDAG: Make sure stores are always added to the LegalizedNodes list
2013-08-21 22:42:58 +00:00
trunc.ll
R600/SI: Prefer selecting more e64 instruction forms.
2014-09-15 17:15:02 +00:00
uaddo.ll
R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operations
2014-09-05 14:07:59 +00:00
udiv.ll
R600: Fix LowerUDIVREM
2013-11-06 17:36:04 +00:00
udivrem24.ll
R600: Use optimized 24bit path in udivrem
2014-08-12 17:31:20 +00:00
udivrem64.ll
R600: Try to convert BFE back to standard bit ops when possible.
2014-05-22 18:09:12 +00:00
udivrem.ll
R600: Add udivrem test
2014-06-22 21:42:58 +00:00
uint_to_fp.f64.ll
SelectionDAG: Expand SELECT_CC to SELECT + SETCC
2014-06-10 16:01:22 +00:00
uint_to_fp.ll
R600/SI: Change formatting of printed FP immediates
2014-09-17 17:32:13 +00:00
unaligned-load-store.ll
R600/SI: Fix broken check lines
2014-09-14 18:32:05 +00:00
unhandled-loop-condition-assertion.ll
R600: Add failing control flow tests.
2014-03-01 21:45:41 +00:00
unroll.ll
R600: Unconditionally unroll loops that contain GEPs with alloca pointers
2014-01-23 18:49:28 +00:00
unsupported-cc.ll
R600: Fix handling of NAN in comparison instructions
2013-09-28 02:50:50 +00:00
urecip.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
urem.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
usubo.ll
R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operations
2014-09-05 14:07:59 +00:00
v1i64-kernel-arg.ll
R600: Match sign_extend_inreg to BFE instructions
2014-03-17 18:58:11 +00:00
v_cndmask.ll
R600/SI: Promote f32 SELECT to i32
2014-05-16 20:56:41 +00:00
valu-i1.ll
R600/SI: Use VALU instructions for copying i1 values
2014-04-30 15:31:33 +00:00
vector-alloca.ll
R600: Run more tests with promote alloca disabled.
2014-07-13 02:46:17 +00:00
vertex-fetch-encoding.ll
R600: Add support for v4i32 stores on Cayman
2013-08-16 01:12:00 +00:00
vop-shrink.ll
R600/SI: Do abs/neg folding with ComplexPatterns
2014-08-01 00:32:39 +00:00
vselect64.ll
SelectionDAG: Optimize expansion of vec_type = BITCAST scalar_type
2013-11-22 00:41:05 +00:00
vselect.ll
R600/SI: Use -verify-machineinstrs for most tests
2013-10-10 17:11:46 +00:00
vtx-fetch-branch.ll
R600: Correctly handle vertex fetch clauses the precede ENDIFs
2014-01-23 18:49:31 +00:00
vtx-schedule.ll
Fix broken CHECK lines.
2014-01-11 21:06:00 +00:00
wait.ll
R600/SI: Implement areLoadsFromSameBasePtr
2014-08-06 00:29:43 +00:00
work-item-intrinsics.ll
R600: Modernize work item intrinsics test
2014-07-31 22:11:03 +00:00
wrong-transalu-pos-fix.ll
TBAA: remove !tbaa from testing cases when they are not needed.
2013-09-30 18:17:35 +00:00
xor.ll
R600/SI: Use VALU for i1 XOR
2014-07-21 14:01:10 +00:00
zero_extend.ll
R600/SI: Add a ComplexPattern for selecting MUBUF _OFFSET variant
2014-08-11 22:18:17 +00:00