Commit Graph

612 Commits

Author SHA1 Message Date
Maxim Poliakovski
c54c1cdb65 Sc53C94: improve status register. 2022-11-01 02:11:06 +01:00
Maxim Poliakovski
8abefb8f8d machinepdm: properly insert SCSI hard disk image.
Skip SCSI hard disk registration if no disk image was given.
2022-11-01 01:17:50 +01:00
Maxim Poliakovski
6ffe28a8a4 Implement SCSI Pseudo-DMA register on PDM. 2022-11-01 01:17:50 +01:00
Maxim Poliakovski
7ab44886c4 Sc53C94: implement information transfer command. 2022-11-01 01:17:50 +01:00
Maxim Poliakovski
fbfae98d6d scsi_bus: packet data transfers. 2022-10-31 23:21:35 +01:00
Maxim Poliakovski
c7ceb9d6b9 sc53c94: fix setting internal transfer counter. 2022-10-31 23:21:35 +01:00
Maxim Poliakovski
3f2b77fd59 amic: basic writing to the VIA2 IFR. 2022-10-31 23:21:35 +01:00
Maxim Poliakovski
c28fd138c2 nvram: fix initialization bug. 2022-10-31 01:01:46 +01:00
dingusdev
b480903c7a Slight code clean-up
Prevents crashing
2022-10-30 15:38:09 -07:00
Maxim Poliakovski
46a0e82258 scsi_hd: some fixes and improvements. 2022-10-27 14:19:58 +02:00
Maxim Poliakovski
a58c9b1a62 ScsiDevice: fix process_command() signature. 2022-10-27 14:07:20 +02:00
Maxim Poliakovski
f3cd5b8b36 sc53c94: fix sending commands to SCSI devices. 2022-10-27 13:49:41 +02:00
dingusdev
2065f3588b Inquiry cmd fixed 2022-10-26 09:30:05 -07:00
dingusdev
f792b38ea3 Started SCSI command reading 2022-10-26 09:18:32 -07:00
Maxim Poliakovski
4f6bd16f3a sc53c94: support selection and command transfer. 2022-10-25 03:03:15 +02:00
Maxim Poliakovski
c51ea575ca scsi_bus: various fixes and improvements. 2022-10-25 03:03:15 +02:00
Maxim Poliakovski
9efac80271 scsi_hd: fix notify() method. 2022-10-25 03:03:15 +02:00
Maxim Poliakovski
eeb576a927 Improve ScsiDevice class. 2022-10-25 02:53:21 +02:00
dingusdev
3af9729e5b Modest refactoring for SCSI HDs 2022-10-23 16:45:58 -07:00
joevt
9f1d613a2d Fix PCI struct offset size
The Pointer to PCI Data Structure is supposed to be two bytes. It is described in the PCI Firmware Specification Revision 3.0, section 5.1.1. PCI Expansion ROM Header Format.
The pointer is two bytes at 0x18. The pointer is supposed to be a multiple of 4 which means there's always at least two bytes of padding after the pointer. Some BIOS firmware images may use the 2 bytes following the pointer for other purposes (plus additional bytes before the PCI Data Structure) so we cannot assume the bytes will be zero.
Some PCI expansion ROMs may include both BIOS and Open Firmware images.
2022-10-23 00:26:32 -07:00
Maxim Poliakovski
c2abc89a3b Fix SCSI HD interface so it can be added to a bus. 2022-10-22 23:41:19 +02:00
dingusdev
aa1d23e08b Fixed hard disk support
Compiles, still unfinished
2022-10-22 11:41:52 -07:00
dingusdev
ee9573327c Reorganized hard disk code
Not compiling yet.
2022-10-08 16:51:54 -07:00
Maxim Poliakovski
3a5c61797c
Revert "PCI fixes" 2022-09-02 23:24:06 +00:00
joevt
24ecdbe75b Allow non-HFS/MFS raw floppies
Such as FAT formatted floppies which should be readable in Open Firmware (when floppy support is updated to work in Open Firmware).
2022-09-02 03:39:50 -07:00
joevt
b654424465 Fix PCI config r/w of byte and word and unaligned
dingusppc could not read bytes from offset 1,2,3 or words from offset 2.
dingusppc did not read words from offset 1,3 and longs from offset 1,2,3 in the same way as a real Power Mac 8600 or B&W G3.
This commit fixes those issues.

- Added pci_cfg_rev_read. It takes a 32 bit value from offset 0 and returns a value of the specified size using bytes starting from the specified offset. Offsets 4,5, & 6 wrap around to 0,1, & 2 respectively. The result bytes are in flipped order as required by the pci_cfg_read method (so a value of 0x12345678 is returned as 0x78563412)
A real Power Mac 8600 might return a random byte for offset 4, 5, 6 for vci0 but usually not for pci1. A B&W G3 seems to always wrap around correctly. We won't read random bytes, and we won't read a default such as 00 or FF. We'll do the wrap around which makes the most sense because writing 0x12345678 to any offset and reading from the same offset should produce the value that was written.

- Added pci_cfg_rev_write. It takes a 32 bit value from offset 0, and modifies a specified number of bytes starting at a specified offset with the offset wrapping around to 0 if it exceeds 3. The modified bytes take their new values from the flipped bytes passed to pci_cfg_write. When size is 4, the original value is not used since all bytes will be modified.

Basically, those two functions handle all the sizes and all the offsets and replace calls to BYTESWAP_32, read_mem or read_mem_rev, and write_mem or write_mem_rev.
read_mem_rev, as it was used by pcidevice and some other places, could read beyond offset 3 if it were ever passed a reg_offs value that did not have offset as 0. Since the offset was always zero, it would always read the wrong byte or word if they were not at offset 0. Same for read_mem as used by mpc106.
write_mem_rev, as it was used by pcidevice and some other places, could write beyond offset 3 if it were ever passed a reg_offs value that did not have offset as 0. Since the offset was always zero, it would always write the wrong byte or word if they were not at offset 0. Same for write_mem as used by mpc106.

The PCI controllers (bandit, chaos, mpc106) need to encode the offset (0,1,2,3) into the reg_offs parameter passed to pci_cfg_read and pci_cfg_write so they can return or modify the correct bytes of the dword at reg_offs & 3.

The pci_cfg_read and pci_cfg_write methods extract the offset from reg_offs and report unaligned accesses.

pci_cfg_read uses pci_cfg_rev_read to read from the reg using the size and offset to determine which bytes to read.

pci_cfg_write uses pci_cfg_rev_write to write to the reg using the size and offset to determine which bytes to modify.

Other changes:
- for unimplemented config register reads and writes, bandit and ATIRage now includes offset and size (and value in the case of writes) in log warnings.
- for unimplemented config register reads and writes, pcidevice now includes offset in log warnings.
- pci_read and pci_write of mpc106 require an offset parameter since config_addr does not contain the offset (it is always a multiple of 4). The offset is included in the log warninings for non-existent PCI devices.
- ATIRage uses pci_cfg_rev_read and pci_cfg_rev_write which correctly places user_cfg at byte 0x40 instead of 0x43 and writes the correct byte depending on size and offset.

Notes:
- pci_cfg_read calls READ_DWORD_LE_A and pci_cfg_write calls WRITE_DWORD_LE_A. When reading or writing memory that is organized as little endian dwords, such as my_pci_cfg_hdr of mpc106, the function should explicitly state that it's little endian so that the emulator may be ported one day to a CPU architecture that is not little endian.
2022-09-02 03:39:50 -07:00
joevt
d91e14abc6 Log PCI config write values MSB first
Writes to config registers of invalid or non-existent PCI devices are logged. They should be logged with most significant byte first.
The values enter the methods in reverse byte order so they need to be byte swapped (except when size is 1) for logging.
The result is that this command in Open Firmware:
`12345678 16800 config-l!`
will log this:
`VCI0 err: write attempt to non-existing VCI device ??:0d.0 @00.l = 12345678`
2022-09-02 03:39:50 -07:00
joevt
a08e70781a Add BAR 0 to control
BAR 0 exists on a real Power Mac 8600 and the dingusppc 7500.

On a Power Mac 8600, the initial value is 0x84000003. In Open Firmware, you can write to all bits of the BAR and read the value back except the 2 least significant bits are always %11. Bit 0 indicates I/O space. Bit 1 is reserved and should be zero so maybe this is not a real I/O space BAR. 0x8400000 is written to the BAR by Open Firmware. It doesn't look like a normal I/O address which are usually 16 bits.

On the emulated 7500, 0x02000000 is written to the BAR by Open Firmware sometime during probe-all. The BAR did not behave as it does in the Power Mac 8600. This commit fixes that.

Two questions remain:
1) Which fcode writes to the BAR? Is it the probe fcode or is it the control fcode? There's no config-_! in the control fcode.
2) What is the purpose of the BAR? Writing to it can cause a hang. The testbits code below seems to succeed - it restores the original value after reading the result of testing each bit and before displaying the result. The values shown for the MSB (0x84 on the 8600 and 0x02 on the 7500) could be three flag bits.

```
dev vci0
: testbits { adr ; org }
	cr
	adr config-l@ dup -> org ." original : " 8 u.r cr
	20 0 do
		1 1f i - << dup 8 u.r ."  : "
		adr config-l!
		adr config-l@
		org adr config-l!
		8 u.r cr
	loop
	;

15810 testbits \ 15810 is the address of the BAR on the emulated 7500.
```
2022-09-02 03:39:50 -07:00
joevt
a24840803c Allow bit 1 of I/O BARs to be set
Usually bit 1 of I/O BARs is 0 since it is reserved, but control has an I/O BAR where this bit is set.
bar_cfg is used to determine the default values of the least significant bits (2 bits for I/O BARs and 4 bits for Memory BARs).
The upper bits of bar_cfg determine which bits can be set and also determines the size of the BAR.
2022-09-02 03:39:50 -07:00
joevt
7e7522d4b7 Fix Expansion ROM BAR writes
The bits that can be set are the enable bit (bit 0) plus the bits represented by exp_bar_cfg which is determined by the size of the ROM which is calculated to be a power of 2 and a minimum of 2K.
2022-09-02 03:39:50 -07:00
dingusdev
a61dd5701a Initial prototyping for hard disks 2022-09-01 22:10:52 -07:00
Maxim Poliakovski
5b08f283e5 Hacks for debugging HW interrupts. 2022-08-27 17:38:53 +02:00
joevt
e41b196977 Fix return value for bad pci config address
PCI config read fails should return all 1 bits.
All unused registers in an existing PCI device should return 0.

Because that's what my Power Mac 8600 returns when I run my Open Firmware lspci command.
Any bus/device/function that doesn't exist returns FF and won't be listed by lspci.
Any registers that are unused will show as 00 in the lspci output.

Make grackle log bus:device.function @register.size in all cases.
2022-08-24 07:58:12 -07:00
Maxim Poliakovski
6c59bf4203 heathrow: fix interrupt processing. 2022-08-24 14:58:07 +02:00
Maxim Poliakovski
bb77b2d525 grandcentral: fix interrupt processing. 2022-08-24 14:58:07 +02:00
Maxim Poliakovski
293c5a40f3 amic: fix PDM interrupts. 2022-08-24 14:58:07 +02:00
Maxim Poliakovski
994f8d7155 viacuda: fix interrupts. 2022-08-24 14:15:48 +02:00
joevt
1c1300ce5a Add nvedit
setenv doesn't allow entering strings that include multiple lines which is useful for nvramrc.

nvedit uses CTRL-C to end editing, like Open Firmware. It does not support deleting characters from a line or editing previous lines or any other special keys. It doesn't have nvstore or nvquit or nvrecover commands. Basically, you should edit your nvramrc in a text editor, then copy and paste into the debugger.
2022-08-22 17:21:58 -07:00
joevt
1ccc8d1a25 Fix setenv and printenv
- Allow changing integer variables. Previously they could not be changed.
- Allow changing string variables. Previously they could only be changed if their length increased.
- printenv had a bug with strings longer than 32 characters.
- printenv now translates carriage return (used in nvramrc) as endl (which should perform carriage return and linefeed)
- For integers, setenv assumes decimal number input but if that fails it will try hex conversion. 0x prefix for hex numbers is optional unless the number only has digits 0 - 9.
- setenv converts linefeed to carriage return for string variables. nvramrc requires this for proper editing in Open Firmware.
- Added Open Firmware 2.4 nvram field names to OfNvramHdr comments.
2022-08-22 17:20:04 -07:00
joevt
67b7c86755 serial backend socket fixes
- increase delay to 800 consecutive characters (reduces times when Open Firmware throws away pasted text)
- don't log the first sock read error (when accept hasn't been called yet) but do log sock read error if accept was called successfully already.
2022-08-22 17:16:22 -07:00
joevt
3ee2ea1871 Fix read/write argument names
base class uses reg_start so derived classes should do the same.
Some derived class already uses reg_start for read method.
2022-08-22 17:16:22 -07:00
joevt
3b4f40635a Register offsets should be logged as hex
- decimal values are confusing (can't tell if 12 means 12 or 18)
- most specs show hex values for register offsets.
2022-08-22 17:16:22 -07:00
joevt
c644d1609f PCI Expansion ROM size should be power of 2
The expansion rom base register indicates the size of the expansion rom by the number of bits that remain zero after code attempts to set them all to 1. For example, a result of fffe0000 means 128K. The 11 least significant bits are ignored in the size calculation, which means the minimum rom size is indicated by fffff800 = 2K.

Handle the case where an expansion rom file might not have a size that is a multiple of 2 or is not greater than 2K.
Bytes between the end of the file and the end of the calculated rom size are set to 0xff.
2022-08-22 17:16:22 -07:00
joevt
d843091a4d Allow setting PCI capabilities pointer
The capabilities pointer is usually a constant, but whatever the capabilities pointer points to has to be handled by the derived class.
2022-08-22 17:16:22 -07:00
joevt
6fad095730 Allow setting PCI status register
Don't always return 0 when reading it. The status register contains some bits that Open Firmware uses to set some properties.
A PCI device can set a default status register value to set those bits.
	this->status = 0x02B0; // 0000  0 01 0  1 0 1 1  0000 Capabilities List, 66 MHz, Fast Back-to-Back, DevSel Speed: Medium
2022-08-22 17:16:22 -07:00
joevt
6af8b52376 changes to pci logging
For invalid or unsupported PCI accesses, do the following:
- log a device's full pci address using pciutils setpci command format bb:dd.f @rr.s (bus:device:function @register+offset.size).
- report as read or write access.
- log value for writes.
- bus, device, function, and register values cannot be determined from Invalid IDSEL values so they will output as ??.
- for invalid IDSEL values, report the entire value of the config_addr.
- for valid IDSEL values, the bus number cannot be determined since IDSEL only specifies device number. It's probably bus 00 but we'll show ?? to indicate an IDSEL type access.

Add missing config type read access logging for chaos.
2022-08-22 17:16:17 -07:00
joevt
63248b0fa2 Set Bandit's HWComponent name
Bandit has two names:
- PCIDevice->pci_name
- PCIDevice:MMIODevice:HWComponent->name
The latter was not being set.
2022-08-22 17:07:50 -07:00
joevt
cd122ce263 Open Firmware is two words
Not OpenFirmware.
Also fixed a spelling mistake and removed some extra spaces.
2022-08-22 16:47:38 -07:00
Maxim Poliakovski
e097b7a0a1 bandit: fix return value for empty slots. 2022-08-22 15:05:35 +02:00
Maxim Poliakovski
32b8c8ed43 pcidevice: fix expansion ROM mapping. 2022-08-20 12:51:08 +02:00
Maxim Poliakovski
5220b03f0f MPC106: insert PCI devices using the CLI. 2022-08-19 20:07:22 +02:00
Maxim Poliakovski
56c54e4c8c pcihost: add attach_pci_device method. 2022-08-19 18:55:33 +02:00
Maxim Poliakovski
f4c0499078 deviceregistry: add device_registered method. 2022-08-19 18:53:05 +02:00
Maxim Poliakovski
4964008511 machineid: improve Gossamer ID description. 2022-08-15 20:49:06 +02:00
joevt
93fae1ee68 Merge remote-tracking branch 'upstream/master' 2022-08-14 16:38:51 -07:00
joevt
650c2c88dd Add socket type for serial_backend
With the option --serial_backend=socket, input and output to a serial port will use a SOCK_STREAM type UNIX domain socket. This allows you to do Open Firmware in one window, while the first window can be used for dingusppc debugger.

Other fixes:

- Added SIGTERM handler so that if the user force quits dingusppc, the terminal settings are properly restored. A user needs to force quit when --serial_backend=stdio and Open Firmware is taking input from ttya. If terminal settings are not restored, then running dingusppc after a force quit will cause Control-C to not work when --serial_backend is not stdio.

- Added a couple numbers to rcv_char_available - 15 is the number of consecutive characters that can processed. 400 is the total number of calls to rcv_char_available after 15 consecutive characters have been read before additional characters can be read. This delay in processing additional characters allows pasting arbitrarily large amounts of text into Open Firmware. A real serial port terminal app might have a text pacing option to limit the number of output characters per second but that is not an option since the emulator is not limiting character data to a baud rate.

Related Notes:

The socket file is created when dingusppc starts.
The socket file is named dingusppcsocket and is created in the current working directory (usually where the executable is located and where the dingusppc.log, nvram.bin, and pram.bin files are created).
The socket file is not visible in the Finder. You can see it in the terminal using the ls command.
The socket file can be used with the following command in a new terminal window:
socat UNIX-CLIENT:dingussocket -,cs8,parenb=0,echo=0,icanon=0,isig=0,icrnl=0
When dingusppc quits, the socat command ends.

Other notes:

The dingusppc --debugger option causes dingusppc to enter the debugger before Open Firmware outputs anything. You can connect to the socket while dingusppc is in the debugger. Then enter the go command to leave the debugger and start Open Firmware. However, since the startup sound takes a long time, you can probably connect to the socket before Open Firmware starts even without the --debugger option. It's like with a real Power Mac - you have a few seconds to hold Command-Option-O-F except in this case you have a few seconds to press the up arrow and press enter (for executing the last command from the terminal command history) and if you do it too late you'll still get into Open Firmware if auto-boot? was previously set to false using the dingusppc debugger which is actually the only way to get into Open Firmware since a keyboard is currently not emulated?).

To set ttya as the input and output device in Open Firmware, you can use the setenv command in the dingusppc debugger. The device path needs to be longer than the current device path (because code for handling shortening of the paths is currently not implemented). For example, ttya can replace kbd for the input-device, but to replace screen for the output-device you need to add some extra characters like this: ttya,11 (I think the number is for baud but we're not using a real serial port so baud doesn't matter).

Future ideas:

- Have dingusppc execute the socat command for you so that it opens a terminal window before Open Firmware starts.
- Add another --serial_backend for the printer port (ttyb) since now we have more than one type of serial backend. If both serial ports use socket backend, then a different name for the second socket is required.
- Have an option to make dingusppc block until something connects to the socket (this means calling accept after listen instead of after select).
- Test compatibility with serial port socket created by Parallels Desktop virtual machines in macOS.
- Find a solution that works with Windows.
- Test with Linux.
- Create a serial_backend type for tty devices. I suppose maybe socat can pipe the file socket to tty but a direct connection might be easier to setup.
- Allow using a socket created by some other app (for example, socat UNIX-LISTEN). This means dingusppc will assume the client role and will call connect instead of accept.
2022-08-14 16:36:52 -07:00
Maxim Poliakovski
3f3af68582 machinegossamer: add Whisper ID PROM. 2022-08-14 23:01:55 +02:00
Maxim Poliakovski
8cdbd9f81f Generic I2C PROM emulation. 2022-08-14 23:01:55 +02:00
joevt
b76bfedf4b Remove unnecessary linefeeds from log
To remove blank lines in the dingusppc.log file or in the console output when -d is used.
2022-08-14 05:26:56 -07:00
Maxim Poliakovski
b67644ba35 athens: support ID reading & dot clock disabling. 2022-08-11 01:43:29 +02:00
Maxim Poliakovski
56db0426a4 heathrow: fix EMMO bit. 2022-08-08 21:06:57 +02:00
Maxim Poliakovski
5463c8e6cb athens: fix compilation with GCC. 2022-08-07 15:32:05 +02:00
Maxim Poliakovski
8dfdf55dff Initial emulation for the Control video. 2022-08-07 15:25:58 +02:00
Maxim Poliakovski
a0e660f6b4 videoctrl: remove unnecessary delay. 2022-08-07 15:25:58 +02:00
Maxim Poliakovski
cd1d0031e6 GC: implement attachable IOBus devices. 2022-08-07 15:25:58 +02:00
Maxim Poliakovski
4216c412b3 Initial Hammerhead ASIC emulation. 2022-08-07 15:25:58 +02:00
Maxim Poliakovski
bd19914132 Initial emulation of the Athens clock ASIC. 2022-08-07 15:25:58 +02:00
Maxim Poliakovski
9a6336adb9 Move DRAM capacity constants to memctrlbase.h 2022-08-07 15:25:58 +02:00
Maxim Poliakovski
e3900b9062 bandit: add Chaos support. 2022-08-06 19:29:45 +02:00
Maxim Poliakovski
ea0fb3b410 bandit: initialize address mask register. 2022-07-25 12:51:55 +02:00
Maxim Poliakovski
c3939e3b25 Gossamer: factory test control. 2022-07-20 20:08:37 +02:00
Maxim Poliakovski
f0553720d6 Catalyst: factory test control. 2022-07-20 01:36:45 +02:00
Maxim Poliakovski
3c062443f6 PDM: factory test control. 2022-07-20 01:36:05 +02:00
Maxim Poliakovski
b9fb0b9c5f Switch fdd_wr_prot to BinProperty. 2022-07-19 23:48:17 +02:00
Maxim Poliakovski
b8915f11a2 debugger: fix ofnvram commands for Nubus machines. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
c0078ce97d Refactor MachineBase and MachineFactory classes.
Adding new machines is much easier now.
A significant amount of duplicated code has been reduced.
2022-07-18 20:27:34 +02:00
Maxim Poliakovski
9971052a78 mesh: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
7db0a31cc5 nvram: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
5e6f3a51b5 soundserver: shut-down safely. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
c37893847a atimach64gx: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
1d37982d02 mace: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
41a314d6d6 bandit: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
2dfc160e30 sc53c94: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
5f8a927846 platinum: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
97b3b9a6f8 MPC106: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
cb68b70d52 hmc: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
66debbc730 viacuda: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
9056d53474 macio: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
ca51c34157 amic: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
7fc28baf96 escc: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
439029cafe swim3: self-registration with the device registry. 2022-07-18 20:27:34 +02:00
Maxim Poliakovski
dc5373ae27 Implement basic device registry. 2022-07-18 20:24:40 +02:00
Maxim Poliakovski
f9ec73cd05 Merge branch 'tnt' 2022-06-18 18:47:31 +02:00
Maxim Poliakovski
5668fc161f macio: fix SWIM3 register space accesses. 2022-06-13 23:15:48 +02:00
Maxim Poliakovski
1d6f296d10 chario: working Windows CharIo backend. 2022-06-12 17:55:34 +02:00
Maxim Poliakovski
913944c607 platinum: implement video controller registers. 2022-06-09 23:16:03 +02:00
dingusdev
fd3ff7b703 Initial attempt at terminal support for Windows 2022-05-22 17:46:40 -07:00
Maxim Poliakovski
06001a778f GCC compilation fixes. 2022-05-21 15:10:40 +02:00
Maxim Poliakovski
f93df3b5c3 GrandCentral: improve error logging. 2022-05-21 14:51:28 +02:00
Maxim Poliakovski
51e6ffb24f GrandCentral: properly connect Curio SCSI. 2022-05-21 14:51:28 +02:00
Maxim Poliakovski
d928d3ff55 CharIoStdin: disable SIGINT generation with Ctrl-C. 2022-05-21 14:51:28 +02:00
Maxim Poliakovski
4c9001901e ESCC: connect NULL and STDIO backends. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
da25e72668 Fix ESCC register addressing. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
0df1b2c408 ATI Mach64 GX controller emulation. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
226b51d8db displayid: constructor with parameters. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
cd7624feb5 videoctrl: add pixel_depth member. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
bd24b644c9 Move ATI Mach64 definitions to separate header. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
ed02a06bb8 pcidevice: loading of expansion ROMs from files. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
5b7e79b979 Bandit: implement I/O space transactions. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
bfd48eeeb2 Bandit: implement address mask register. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
4225f0aec2 ofnvram: implement changing of string variables. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
6b686e402e videoctrl: fix surface size. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
dd79ec38e4 ATIRage: hack to support OF output. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
a7e06f4e4b Utility class for viewing/changing OF NVRAM variables. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
4b2f3cedc7 Make NVRAM a full-fledged HW component. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
32891867f2 GrandCentral: basic device interrupt handling. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
0ab4f4a7f9 GrandCentral: external SCSI (Curio style). 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
934f794d20 GrandCentral: fix access to NVRAM subdevice. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
9317719814 GrandCentral: access to ESCC and board reg 1. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
4676cfeee2 Platinum: implement memory controller registers. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
8be44dad82 Heathrow: interrupt registers & mode 1 interrupts. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
617f75851b Initial emulation of the GrandCentral I/O controller. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
fc3901676b Heathrow: use common PCI configuration code. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
fcfb2372b9 MPC106: use common PCI configuration code. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
36098af5eb ATIRage: use common PCI configuration code. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
d863fa0c80 Bandit: use common PCI configuration code. 2022-05-21 14:51:27 +02:00
Maxim Poliakovski
1f67a57d7b Common code for handling PCI config space. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
9d7d9f3103 MACE: add MaceEnet namespace. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
8d9691cc6f MESH: add MeshScsi namespace. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
6c564cb720 amic: fix MACE register range. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
4b32e9bd30 Initial emulation of the Platinum Memory controller. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
23a046d889 Refine Bandit config address handling. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
cdb34032bc Initial emulation of the Bandit ARBus-to-PCI bridge. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
74f4dbd7e6 pcihost: pull common code from Grackle. 2022-05-21 14:51:26 +02:00
Maxim Poliakovski
8889759f33 GrandCentral: improve error logging. 2022-05-21 14:45:33 +02:00
Maxim Poliakovski
533edf6ef5 GrandCentral: properly connect Curio SCSI. 2022-05-17 13:27:58 +02:00
Maxim Poliakovski
b26baaaeff CharIoStdin: disable SIGINT generation with Ctrl-C. 2022-05-07 23:42:33 +02:00
Maxim Poliakovski
e0b94e0b47 ESCC: connect NULL and STDIO backends. 2022-05-07 21:47:22 +02:00
Maxim Poliakovski
d4c08bbe31 Fix ESCC register addressing. 2022-05-07 21:47:22 +02:00
Maxim Poliakovski
57b102dae2 ATI Mach64 GX controller emulation. 2022-04-13 23:31:44 +02:00
Maxim Poliakovski
0e09ecdfa4 displayid: constructor with parameters. 2022-04-13 23:31:44 +02:00
Maxim Poliakovski
8fcdc5298a videoctrl: add pixel_depth member. 2022-04-13 23:31:44 +02:00
Maxim Poliakovski
3a4f22f459 Move ATI Mach64 definitions to separate header. 2022-04-13 23:31:44 +02:00
Maxim Poliakovski
b78f17c161 pcidevice: loading of expansion ROMs from files. 2022-04-13 23:31:44 +02:00
Maxim Poliakovski
4bba61a920 Bandit: implement I/O space transactions. 2022-04-13 23:31:44 +02:00
Maxim Poliakovski
d64f901f85 Bandit: implement address mask register. 2022-04-13 23:31:44 +02:00
Maxim Poliakovski
883aac2d05 ofnvram: implement changing of string variables. 2022-04-13 23:27:53 +02:00
Maxim Poliakovski
f6e5d72e3c videoctrl: fix surface size. 2022-04-13 23:27:53 +02:00
Maxim Poliakovski
c967eb3c65 ATIRage: hack to support OF output. 2022-04-13 23:27:53 +02:00
Maxim Poliakovski
ba8e3b657c Utility class for viewing/changing OF NVRAM variables. 2022-03-29 01:55:11 +02:00
Maxim Poliakovski
4d87ed9b38 Make NVRAM a full-fledged HW component. 2022-03-29 01:55:11 +02:00
Maxim Poliakovski
d71a7b8694 GrandCentral: basic device interrupt handling. 2022-03-28 18:33:59 +02:00
Maxim Poliakovski
e01d0e3d59 GrandCentral: external SCSI (Curio style). 2022-03-28 18:26:47 +02:00
Maxim Poliakovski
4525fd50cc GrandCentral: fix access to NVRAM subdevice. 2022-03-28 18:26:47 +02:00
Maxim Poliakovski
29ce960dbf GrandCentral: access to ESCC and board reg 1. 2022-03-28 18:26:47 +02:00
Maxim Poliakovski
ac5078f133 Platinum: implement memory controller registers. 2022-03-28 18:26:47 +02:00
Maxim Poliakovski
276cd37cfe Heathrow: interrupt registers & mode 1 interrupts. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
1500c63e26 Initial emulation of the GrandCentral I/O controller. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
4c45b3dfa2 Heathrow: use common PCI configuration code. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
574677490f MPC106: use common PCI configuration code. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
e47b66e1af ATIRage: use common PCI configuration code. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
73aa68bc30 Bandit: use common PCI configuration code. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
3bce7bb1ea Common code for handling PCI config space. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
6d004f0bf8 MACE: add MaceEnet namespace. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
e913f39812 MESH: add MeshScsi namespace. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
3235018260 amic: fix MACE register range. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
a7e4dc9d83 Initial emulation of the Platinum Memory controller. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
13f18c416d Refine Bandit config address handling. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
400ce0b713 Initial emulation of the Bandit ARBus-to-PCI bridge. 2022-03-14 18:13:47 +01:00
Maxim Poliakovski
289df32817 pcihost: pull common code from Grackle. 2022-03-14 18:13:47 +01:00
dingusdev
36fa53e8c1 MSVC compilation fixes 2022-03-12 15:43:45 -07:00
Maxim Poliakovski
827d7f10dd pdmonboard: reduce logging messages. 2022-02-26 13:37:47 +01:00
Maxim Poliakovski
4de10898ea Improve ESCC stub to bypass LocalTalk. 2022-02-26 10:57:13 +01:00
Maxim Poliakovski
205b5a4956 escc: implement reset commands. 2022-02-26 10:57:13 +01:00
Maxim Poliakovski
c946693450 escc: unify compatible and MacRISC addressing. 2022-02-26 10:57:13 +01:00
dingusdev
80a4864a92 Floppy disk write protection 2022-02-24 07:33:30 -07:00
Maxim Poliakovski
edd3979647 Cuda: increase size of the input buffer. 2022-02-19 23:23:24 +01:00
Maxim Poliakovski
689fe51d80 Add required includes for gcc. 2022-02-17 00:50:37 +01:00
Maxim Poliakovski
2ce2cae48c SWIM3: implement disk reading. 2022-02-15 15:55:16 +01:00
Maxim Poliakovski
579a56f749 AMIC: implement floppy DMA channel. 2022-02-15 15:54:21 +01:00
Maxim Poliakovski
2525398b6e SWIM3: add support for floppy DMA. 2022-02-15 15:53:18 +01:00
Maxim Poliakovski
e91843034b Superdrive: method for retrieving disk data. 2022-02-15 15:49:12 +01:00
Maxim Poliakovski
9da4a9ec6a SWIM3: respect interrupt enable flag in mode register. 2022-02-14 23:06:07 +01:00
Maxim Poliakovski
cfb8977f09 AMIC: implement floppy DMA registers. 2022-02-13 23:47:45 +01:00
Maxim Poliakovski
54107b2aac SWIM3: track seeking and header reading. 2022-02-13 03:07:32 +01:00
Maxim Poliakovski
8d8cecbaba Superdrive: implement track seeking. 2022-02-13 03:05:55 +01:00
Maxim Poliakovski
0d3fd01fef Improve emulation of the VIA timers. 2022-02-13 03:02:17 +01:00
Maxim Poliakovski
9f3f46603f AMIC: handle SWIM3 interrupts. 2022-02-07 23:10:17 +01:00
Maxim Poliakovski
c77155199b Superdrive: report track zero status. 2022-02-07 23:05:58 +01:00
Maxim Poliakovski
1872eca44f SWIM3: implement head stepping. 2022-02-07 23:05:58 +01:00
Maxim Poliakovski
9aaf441625 Superdrive: more commands and status requests. 2022-02-07 15:05:57 +01:00
Maxim Poliakovski
b9fbd9b7c9 Superdrive: support for inserting of virtual disks. 2022-02-06 21:23:20 +01:00
Maxim Poliakovski
5e2f2b12e4 Properly connect Superdrive to SWIM3 and machines. 2022-02-06 15:23:30 +01:00
Maxim Poliakovski
b25b526582 hwcomponent: add floppy disk drive component type. 2022-02-06 15:20:07 +01:00
Maxim Poliakovski
dea863b6e6 Superdrive: support disk-in-drive status. 2022-02-06 03:25:35 +01:00
Maxim Poliakovski
00093bdc95 sc53c94: support interrupts. 2022-02-06 01:50:54 +01:00
Maxim Poliakovski
298135fd7a AMIC: process VIA2 interrupts. 2022-02-06 01:50:54 +01:00
Maxim Poliakovski
7c53620a40 sc53c94: implement sequencer and some commands. 2022-02-06 01:50:54 +01:00
Maxim Poliakovski
b5f70feb28 Initial SCSI bus emulation. 2022-02-06 01:50:54 +01:00
Maxim Poliakovski
5c177cc50f Simplify registration of HW component types. 2022-01-26 16:45:21 +01:00
Maxim Poliakovski
dc34f282b7 53C94: support more registers and commands. 2022-01-24 22:55:49 +01:00
Maxim Poliakovski
5883524fb8 53C94: chip initialization and identification. 2022-01-22 04:37:52 +01:00
Maxim Poliakovski
3bdc6f915a AMIC: implement periodic VBL (60.15 Hz) interrupt. 2022-01-21 12:42:05 +01:00
Maxim Poliakovski
0899186ffc ViaCuda: implement post-initialization. 2022-01-21 12:42:05 +01:00
Maxim Poliakovski
c1208b398e Add posti-initialization to HW components. 2022-01-21 12:42:05 +01:00
Maxim Poliakovski
4867a68e11 VIA: public method for asserting control lines. 2022-01-21 11:08:32 +01:00
Maxim Poliakovski
9c4e6c8a86 Rewrite ViaCuda to support SR and T2 interrupts. 2022-01-10 17:56:24 +01:00
Maxim Poliakovski
c218badd5a Clean up some ctors/dtors. 2022-01-10 17:56:24 +01:00
Maxim Poliakovski
d61d1d71eb Add interrupt processing to AMIC. 2022-01-10 17:56:24 +01:00
Maxim Poliakovski
d9d8384d4a Add interrupt controller interface and definitions. 2022-01-10 17:56:24 +01:00
Maxim Poliakovski
d4ecb77b24 pdmonboard: enable periodic video updates. 2022-01-10 17:56:24 +01:00
Maxim Poliakovski
9a0c340712 Basic SWIM3 and Superdrive emulation. 2021-12-12 21:40:04 +01:00
Maxim Poliakovski
9caaf0f538 Basic emulation of the PDM on-board video. 2021-12-07 22:54:03 +01:00
Maxim Poliakovski
476d893094 videoctrl: add framebuffer conversion callback. 2021-12-07 22:47:25 +01:00
Maxim Poliakovski
fff597075d Monitor type can be now specified from the command line. 2021-12-06 00:40:40 +01:00
Maxim Poliakovski
793335d9b8 Clean up includes. 2021-12-05 20:01:57 +01:00
Maxim Poliakovski
f39188beb1 Initial support for floppy disk images. 2021-12-04 14:22:02 +01:00
Maxim Poliakovski
609fb43726 Rewrite DisplayID to work with AMIC & ATI Rage. 2021-11-30 01:26:32 +01:00
Maxim Poliakovski
99f5aba12e atirage: replace raw pointers with unique_ptr. 2021-11-17 23:30:43 +01:00
Maxim Poliakovski
cbf4e266e1 atirage: better name for HW registers. 2021-11-11 14:57:31 +01:00
dingusdev
84ded9fc7a Added further CUDA commands 2021-11-10 07:56:50 -07:00
Maxim Poliakovski
a01cd9c993 Make display ID method selectable in video controller. 2021-11-09 14:15:21 +01:00
Maxim Poliakovski
fc44cdcc83 Heathrow: logging monitor sense status. 2021-11-09 13:41:48 +01:00
Maxim Poliakovski
958d3ee96a Factor out common video controller code. 2021-11-09 13:40:13 +01:00
Maxim Poliakovski
392fa87ba4 Add NCR 53C90 stub. 2021-10-26 19:00:04 +02:00
Maxim Poliakovski
87b8e1759a Connect ESCC to AMIC and Heathrow. 2021-10-25 22:19:45 +02:00
Maxim Poliakovski
cb946e41b5 Initial ESCC emulation. 2021-10-25 22:19:45 +02:00
Maxim Poliakovski
3f20d0a700 heathrow: use unique_ptr with internal objects. 2021-10-25 22:19:45 +02:00
Maxim Poliakovski
6a756df5e3 Add MACE Ethernet emulation stub. 2021-10-24 21:02:30 +02:00
Maxim Poliakovski
c0cd6eb38f Add missing licence headers, update license date. 2021-10-23 21:00:31 +02:00
Maxim Poliakovski
9329d56d83 Move devices into dedicated subdirectories. 2021-10-23 20:17:47 +02:00
Maxim Poliakovski
7daf4aa317 viacuda: improve READ_MCU_MEM & WRITE_MCU_MEM emulation.
68k boot code in ROM uses those commands for applying patches
to Cuda and getting Cuda firmware version. This commit
implements as much as needed for boot code to work.
2021-10-18 23:52:12 +02:00
Maxim Poliakovski
f194887d34 viacuda: properly initialize VIA registers. 2021-10-18 16:38:12 +02:00
Maxim Poliakovski
46549d68a2 viacuda: remove superfluous newlines and casts from messages. 2021-10-18 16:38:12 +02:00
Maxim Poliakovski
c7544d9c2f amic: reorganize registers in blocks. 2021-10-16 15:07:53 +02:00
Maxim Poliakovski
2f725fe3e4 viacuda: fix PRAM reading and writing. 2021-10-14 00:01:30 +02:00
Maxim Poliakovski
7c47b9c1e7 amic: implement AMIC2 identification. 2021-10-13 09:06:16 +02:00
Maxim Poliakovski
9caef55c19 amic: implement diagnostics register. 2021-10-10 22:01:02 +02:00
Maxim Poliakovski
89e79d05cb Load bootrom code to primary ROM region. 2021-10-10 22:01:02 +02:00
Maxim Poliakovski
c313a9c8bb Use std::bind() based callbacks. 2021-10-05 00:29:27 +02:00
Maxim Poliakovski
03e58dac35 Overhaul AWACs and implement PDM sound HW. 2021-10-05 00:29:27 +02:00
Maxim Poliakovski
3ca7a78a37 AWAC-PDM control and status registers. 2021-10-01 01:02:43 +02:00
Maxim Poliakovski
0f55877137 Add basic PDM I/O emulation. 2021-09-30 23:01:56 +02:00
Maxim Poliakovski
b4d399ffa2 Improve three logging messages. 2021-09-30 23:01:56 +02:00
Maxim Poliakovski
8c9f23daf4 Fix memory controller interface for PDM. 2021-09-30 22:55:10 +02:00
Maxim Poliakovski
e9fcc51b93 Debugger fixes for PDM. 2021-09-26 14:21:31 +02:00
Maxim Poliakovski
e052eb4a87 Merge branch 'atirage-hacks'. 2021-09-25 23:16:38 +02:00
Maxim Poliakovski
d2cd43fcb1 Merge branch 'machine-pdm'. 2021-09-25 22:30:31 +02:00
Maxim Poliakovski
84e111290f Fix includes for loguru and SDL. 2021-09-16 00:46:38 +02:00
dingusdev
1c77057860 Fixed building through CMake 2021-09-12 08:08:22 -07:00
dingusdev
738e2d3bd1 Fixed compiling for Visual Studio 2019 2021-09-11 22:55:24 -07:00
Maxim Poliakovski
ea5b0d9f52 atirage: framebuffer rendering and various improvements. 2021-09-11 21:02:46 +02:00
Maxim Poliakovski
16d9e6c681 Basic MESH emulation skeleton with events logging. 2021-08-23 00:20:28 +02:00
Maxim Poliakovski
05330bc942 memctrlbase: allocate address map entries with new(). 2021-05-16 00:50:44 +02:00
Maxim Poliakovski
baa7f8b211 atirage: use standard names for common pixel formats. 2021-02-08 22:25:36 +01:00
Maxim Poliakovski
2f4a3b955e atirage: calculation of display parameters. 2021-02-08 02:20:55 +01:00
Maxim Poliakovski
a4eb658309 atirage: increase PLL registers count to 64. 2021-02-05 02:01:31 +01:00
Maxim Poliakovski
508ef2eaa9 atirage: increase registers array and add boundary checks. 2021-02-05 01:23:04 +01:00
Maxim Poliakovski
a5ef814ec4 atirage: add reading and writing of PLL registers. 2021-02-05 01:23:04 +01:00
Maxim Poliakovski
ace19c0bdf atirage: clean up register names. 2021-02-05 01:11:23 +01:00
Maxim Poliakovski
3a9ed2671c atirage: remove obsolete memaccess code. 2021-02-04 19:05:39 +01:00
Maxim Poliakovski
3c787a87cd atirage: add ASIC ID for Rage Pro. 2021-02-04 19:01:55 +01:00
Maxim Poliakovski
a0b43754a7 atirage: fix and clean up PCI interface. 2021-02-04 01:03:23 +01:00
Maxim Poliakovski
1adbf90e21 MPC106: use memaccess thoroughly. 2021-02-03 23:39:19 +01:00
Maxim Poliakovski
478ca1065f MPC106: fix RAM size calculation. 2021-02-03 23:29:48 +01:00
Maxim Poliakovski
7628ec92c0 Rename memreadwrite.h to memaccess.h 2021-02-03 12:19:18 +01:00
dingusdev
2bac606365 Added to Heathrow
Plus some debugging stuff to help figure out what register 0x34 is responsible for.
2021-01-08 15:29:43 -07:00
dingusdev
9210244c0c Further ATI Rage registers 2021-01-08 14:32:06 -07:00
dingusdev
14d3874382 More ATI Rage register names added 2021-01-08 13:12:06 -07:00
Maxim Poliakovski
18a19cd52f Add an implementation for the Highspeed Memory Controller. 2020-12-19 09:56:39 +01:00
Maxim Poliakovski
282940e580 memctrlbase: fix range bug in add_mem_mirror. 2020-12-19 08:24:04 +01:00
Maxim Poliakovski
81b3c3c4a0 Default initialization of Heathrow registers. 2020-11-26 03:03:52 +01:00
Maxim Poliakovski
3b29ff9514 atirage: fix monitor identification. 2020-10-14 16:55:38 +02:00
dingusdev
14ef7564cd CLI fixes - RAM and GFXMEM work better 2020-08-25 20:07:02 -07:00
Maxim Poliakovski
8094fb30f6 atirage: add access to internal DAC palette. 2020-06-11 01:30:10 +02:00
Maxim Poliakovski
f753bb1911 atirage: replace magic numbers with named constants. 2020-06-11 00:49:00 +02:00
Maxim Poliakovski
5d57086795 Add one more missing include. 2020-06-03 20:28:57 +02:00
Maxim Poliakovski
3be46aa44d Add missing includes. 2020-06-03 20:21:52 +02:00
Maxim Poliakovski
39a643aff6 Merge branch 'machines'
Also disable SDL for now because it produces build errors.
2020-06-03 18:21:51 +02:00
Maxim Poliakovski
07340d82dd atirage: add video RAM. 2020-05-28 23:47:20 +02:00
Maxim Poliakovski
55a14ca28f atirage: fix big memory aperture registration. 2020-05-28 22:36:55 +02:00
Maxim Poliakovski
bcc0e38e9f More sound fixes and cleanups. 2020-05-18 20:45:37 +02:00
Maxim Poliakovski
ae78a1f04f Fix AWACs sound playback with WASAPI. 2020-05-18 03:02:30 +02:00
Maxim Poliakovski
e59939541e WIP: initial Cubeb integration. 2020-05-15 02:44:00 +02:00
Waqar Ahmed
0ab9380be3 clang-format everything 2020-05-12 23:55:45 +05:00
Waqar Ahmed
286897398c Fix build on linux 2020-05-12 21:20:57 +05:00
Maxim Poliakovski
d4c39f13af Changes related to Windows build. 2020-05-09 14:29:37 +02:00
Maxim Poliakovski
f7d67a91e0 New AWAC and sound server implementation. 2020-05-08 23:12:04 +02:00
Maxim Poliakovski
a5c63c1b09 viacuda: fix autopoll control commands. 2020-04-27 02:50:53 +02:00
dingusdev
d24a71528b Slightly readjusted key mappings 2020-04-25 11:02:47 -07:00
Maxim Poliakovski
3b98dee232 adb.cpp: fix indentation. 2020-04-25 03:01:16 +02:00
dingusdev
f2ab933884 Slightly clean-up and expansion for future uses 2020-04-23 18:22:47 -07:00
dingusdev
c0d0187190 ADB Refactoring, Pt. 2 2020-04-23 18:08:27 -07:00
dingusdev
d0f03f722e ADB Refactoring Pt. 1 2020-04-22 14:14:49 -07:00
dingusdev
a5b740eafc Slightly reworked ADB work so far 2020-04-21 19:45:59 -07:00
dingusdev
70f5b45e71 Started work on ADB input 2020-04-21 15:23:55 -07:00
dingusdev
add11ecc62 Adding further Heathrow registers 2020-04-19 11:28:51 -07:00
dingusdev
8fb2e851d7 Started work for ADB polling 2020-04-17 17:23:50 -07:00
Maxim Poliakovski
3461f2e353 displayid.cpp: fix indentation. 2020-04-14 13:03:43 +02:00
Maxim Poliakovski
54a86972cd Basic support for display identification. 2020-04-14 01:04:37 +02:00