Commit Graph

156 Commits

Author SHA1 Message Date
transistor
f601290771 Fixed bug in MOVEM and added tests for it
It was previously decrementing addresses if the direction was from
registers to memory, but that's incorrect.  It should increment the
address always when using an addressing mode other than the ARecDec
mode.  I also added a memory location to the test cases to test the
MOVEM instruction by comparing what memory was read/written (but it's
only one u32 because that's the minimum we need)
2021-11-19 09:55:31 -08:00
transistor
02b10c5b32 Changed msp to ssp to match docs 2021-11-18 12:13:36 -08:00
transistor
812f6800a8 Minor fixes 2021-11-18 08:46:41 -08:00
transistor
a342ef3b86 Added MOVEP and more tests to m68k and IM to z80 2021-11-15 20:52:19 -08:00
transistor
1d8065026d Minor fixes 2021-11-15 20:51:33 -08:00
transistor
a00d7b2f26 Fixed warnings 2021-11-13 11:39:20 -08:00
transistor
674f03c3b8 Refactored m68k tests to use data for test cases 2021-11-13 10:55:58 -08:00
transistor
e0d863a845 Fixed overflow bug in m68k 2021-11-13 10:54:59 -08:00
transistor
9d799e308d Added command line options for minifb and TRS-80 2021-11-11 09:52:18 -08:00
transistor
1938fcc78c Added Z80 test with verified flag values 2021-11-10 16:05:16 -08:00
transistor
f6105de939 Fixed decode and excute issues with Z80 2021-11-10 13:28:31 -08:00
transistor
0836b6de8b Added decoding of most Z80 instructions, and additional bugfixes 2021-11-09 11:03:57 -08:00
transistor
d3efa072c2 TRS-80 Model 1 Basic is now working 2021-11-07 22:44:40 -08:00
transistor
6cb9b985ad Reworked Z80 flags 2021-11-07 16:28:44 -08:00
transistor
5bfde2bff0 Added TRS-80 simulation to test Z80 impl 2021-11-06 21:46:17 -07:00
transistor
7e999d4c3a Changed the way frontend works and added keyboard support 2021-11-06 21:44:25 -07:00
transistor
2c6a1a1b3a Added debugging and shift instructions to Z80 2021-11-06 21:18:45 -07:00
transistor
3da58c8d17 Added decoding of more of the DD/FD instructions 2021-11-06 15:08:03 -07:00
transistor
1a28208784 Added more Z80 instructions 2021-11-04 21:30:33 -07:00
transistor
7d2a4e4b44 Fixed m68k overflow flags (almost) 2021-11-04 21:29:52 -07:00
transistor
8ba506cc11 Added tracing mode to debugger 2021-11-04 13:32:51 -07:00
transistor
2cb21d7b8d Fixed a number of instruction bugs with m68k 2021-11-03 23:55:50 -07:00
transistor
b6cccea437 Added read only memory and debugger numbered continuations
There is also a breakpoint error, so that if a read-only memory
location is written to, it will escape to the debugger rather than
exiting the program.
2021-11-03 15:33:22 -07:00
transistor
bd5a798fa1 Fixed bug in ADDA/SUBA instructions 2021-11-03 15:30:38 -07:00
transistor
dc25a9f171 Started filling in Z80 execution 2021-11-02 20:58:03 -07:00
transistor
a87aab9b70 Modified write_beu*() functions and added little endian versions 2021-11-02 20:33:27 -07:00
transistor
e0ef1d8fd9 Added start of Z80 decoder 2021-11-01 22:06:40 -07:00
transistor
58fc9ac827 Moved the debugger out of m68k 2021-11-01 16:51:45 -07:00
transistor
a3a11f7459 Fixed some sprites issues 2021-10-31 23:01:56 -07:00
transistor
8fe76334af Added joystick host adapter 2021-10-31 11:00:14 -07:00
transistor
a02d8e5241 Fixed graphics finally for YM7101 scrolls 2021-10-30 16:17:28 -07:00
transistor
93c080eae6 Fixed interrupts
Previously the m68k wasn't masking interrupts with an equal priorty.
I also modified how they work, such that the cpus will check the
controller rather than wait for the notification call
2021-10-29 22:02:29 -07:00
transistor
c1ca666aa4 Simplified event queue 2021-10-29 20:06:15 -07:00
transistor
250c0e83d2 Minor fixes 2021-10-29 15:05:41 -07:00
transistor
aa9aeaf3b4 Movied computie binaries to their own directory 2021-10-27 21:04:24 -07:00
transistor
109ae4db55 Added minifb frontend with very WIP genesis peripherals 2021-10-27 21:01:18 -07:00
transistor
892f93f053 Added BusPort to more accurately emulate the bus requests of the 68k
The BusPort is created before the CPU and is passed to it.  It can
have an offset, limit the address sizes, and break up bus request
beyond a certain number of bytes into multiple requests
2021-10-26 21:32:25 -07:00
transistor
8bbffbe34c Modified the read interface yet again 2021-10-26 17:33:23 -07:00
transistor
1ad7ad1807 Added Debuggable trait and added tests 2021-10-26 12:17:59 -07:00
transistor
c980c2f56d Added WIP 2021-10-25 19:31:28 -07:00
transistor
0b17b0fc8c Modified timer to store its own start time 2021-10-25 19:29:39 -07:00
transistor
089f25903b Added adjustable frequency to m68k, and added log levels 2021-10-25 10:29:13 -07:00
transistor
fd894f0638 Modified to use a nanosecond clock 2021-10-23 22:22:02 -07:00
transistor
2ed528a140 Modified the PTY implementation to be use channels 2021-10-22 19:36:05 -07:00
transistor
447b3727ed Fixed bug in DIVW instruction 2021-10-22 13:02:48 -07:00
transistor
f9e018742b Refactored how UI interfacing will work 2021-10-21 21:55:27 -07:00
transistor
fab763a867 Added rough host window updating options for future reference 2021-10-21 20:59:26 -07:00
transistor
8d39d84545 Refactored to separate out the commands, and machine configs
Machine definitions are now in their own module and can be
optionally compiled in, and there is now a console and soon
to be gui version of the compiled binary, with individual
binaries for each machine
2021-10-20 15:53:25 -07:00
transistor
e81a5d430a Fixed some bugs and added the ROXd instruction 2021-10-19 19:50:42 -07:00
transistor
3579529764 Minor fixes and refactoring 2021-10-19 11:33:51 -07:00
transistor
492027fa7a Fixed a bug in bit field instruction decode
We were trying to decode the effective address before fetching the
second instruction word for bitfield instructions, which was causing
it to use the wrong word for the offset:width information, which was
preventing the shell from printing to the screen after boot
2021-10-18 21:41:42 -07:00
transistor
2d8e5f6359 Added support for long word MUL and DIV instructions 2021-10-18 21:22:57 -07:00
transistor
b88b0a890c Updated tests for new addressing modes 2021-10-18 16:34:55 -07:00
transistor
731c89845e Added MC68020+ addressing modes 2021-10-18 15:44:42 -07:00
transistor
3fc76335d0 Moved m68k instruction types to their own file 2021-10-18 12:05:10 -07:00
transistor
32d2d591ce Added bit field instructions, and fixed some bugs 2021-10-17 21:18:59 -07:00
transistor
758621c410 Fixed bug in indexing modes 2021-10-17 11:13:46 -07:00
transistor
1262cbd8c0 Modified to use a common trait to derive other traits 2021-10-17 10:39:43 -07:00
transistor
4bdbe7c7f0 Refactored a bit
Now all traits are in the devices file, and host adapters will be
in under src/host/.
2021-10-16 20:30:50 -07:00
transistor
93c9307829 Moved I/O to a separate thread
but I'm not happy with it, and will likely change it in future,
possibly to use two threads and two sets of channels to pass chars
back and forth
2021-10-16 16:11:50 -07:00
transistor
853626584e Once again modified how the memory addressing works 2021-10-16 10:58:27 -07:00
transistor
24e050a840 Added supervisor checks 2021-10-16 10:01:14 -07:00
transistor
ffd4faa9a3 Fixed decode of EXT, and fixed some bugs with 020+ code 2021-10-15 14:37:31 -07:00
transistor
1732c90f5b Added formatter for Instruction to output assembly 2021-10-15 11:12:47 -07:00
transistor
eba1f9c9fc Fixed bug with ANDtoSR, which was actually using "or" 2021-10-14 22:04:14 -07:00
transistor
72457aca5c Minor changes 2021-10-14 21:53:42 -07:00
transistor
43b1abfa19 Minor changes 2021-10-14 21:16:31 -07:00
transistor
e558fc01bf Refactored and fixed some warnings 2021-10-11 15:16:04 -07:00
transistor
91825e1cb9 Added a bunch of unit tests 2021-10-11 15:04:39 -07:00
transistor
39ecd1b0d9 Added decode for ABCD and SBCD 2021-10-10 20:47:51 -07:00
transistor
94141e112e Reorganized decode and add some support for other m68k processors 2021-10-10 14:26:54 -07:00
transistor
b588563acc Updated readme 2021-10-09 20:35:52 -07:00
transistor
fbb5153121 Refactored mc68681 to make a common port struct and fixed a bug in DIV 2021-10-09 17:35:23 -07:00
transistor
f0637e81f1 Added separate interrupt controller 2021-10-09 11:00:32 -07:00
transistor
c4f41d73ab Put the types and traits from system into new devices file 2021-10-08 23:11:52 -07:00
transistor
8bb43f61ee Fixed interrupts and added tx enable for OS buffered output 2021-10-08 10:52:15 -07:00
transistor
ecbaf6a68b Added interrupt triggering from mc68681 2021-10-07 13:57:50 -07:00
transistor
7bd7f3e64f Added cpu to system, and refactored m68k a bit 2021-10-07 11:35:15 -07:00
transistor
73d11ddb79 Switched to using Rc<RefCell<Box<dyn Trait>>> for devices 2021-10-07 09:41:01 -07:00
transistor
e186637f49 Refactored such that System is the top level object 2021-10-06 16:14:56 -07:00
transistor
5ea2ccc128 Added TRAP instruction and exception handling 2021-10-05 21:53:18 -07:00
transistor
59019d9c8e Refactored address space again 2021-10-05 19:58:22 -07:00
transistor
f2a23a21cb Added ROd instruction and fixed bug with MOVEM 2021-10-05 16:22:21 -07:00
transistor
f5283730c2 Added start of ata device 2021-10-04 13:02:58 -07:00
transistor
e561c533ef Added stack tracer and fixed bug with CMPA instruction 2021-10-04 11:13:10 -07:00
transistor
2f54c18fcf Modified memory operations to be simpler 2021-10-03 21:05:10 -07:00
transistor
dd21771bb3 Added better processing of debug commands, and timers 2021-10-03 20:45:50 -07:00
transistor
338e68a1d9 Fixed some erroneous instruction decodes and added binaries 2021-10-03 09:55:20 -07:00
transistor
10e905674b Added MUL, DIV, NEG, DBcc, and Scc instructions, and fixed issue with ADD/SUB flags
With ADDA, SUBA, and ADDQ/SUBQ when the target is an address register, the condition
flags should not be changed, but the code was changing them, which caused problems.
I've fixed it by making the ADD/SUB executions check for an address target and
will not update flags in that case.  This should only occur when the actual instruction
was an ADDA or ADDQ with an address register target
2021-10-02 21:59:28 -07:00
transistor
98883e3daa Added the Asd, LINK, and UNLK instructions 2021-10-02 15:35:08 -07:00
transistor
80c8fe9797 Fixed bug with PC offsets and the value of PC when calculated 2021-10-02 09:48:21 -07:00
transistor
4b577ad403 Separated debugging code into its own file 2021-10-02 09:35:25 -07:00
transistor
38bcf0af3f Reorganized state and decoding into their own structs 2021-10-02 08:47:20 -07:00
transistor
f453e6dde2 Fixed bug in MOVEM and added multiple breakpoints 2021-10-01 22:06:53 -07:00
transistor
b0f094cb59 Added start of a testsuite 2021-10-01 19:27:05 -07:00
transistor
3c4e69378a Fixed pty code to actually read input 2021-10-01 17:53:55 -07:00
transistor
a5cac4d309 Fixed indexing, flags, and added logical shift
The effective modes that used signed offsets were not properly
sign extending the immediate or register index values before adding
them to the address, resulting in incorrect addresses.

The flags were incorrect for some instructions, and I added the
logical shift instruction implementation
2021-10-01 15:38:21 -07:00
transistor
f7529bbb41 Added PTY terminal for I/O via the MC68681 module
Also fixed a bug where MOVEA needs to behave differently than MOVE,
such that the data is sign extended to a long and the condition flags
are not changed.  I also modifed how Addressable returns data because
I need to return owned data from MC68681, so that the stored data can
be updated (ie. the status flag must be modified after a read)
2021-10-01 12:25:23 -07:00
transistor
01b4bdf859 Added bit test instructions and got boot message working 2021-09-30 20:27:01 -07:00
transistor
7868bc3014 Fixed instruction decode for MOVEM and EXT
It's now possible to run the monitor program until it loops waiting
for the serial transmitter to be ready for writing
2021-09-30 15:15:23 -07:00