Anton Korobeynikov
1bb8cd723d
Make handling of conditional stuff much more straightforward
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:19:09 +00:00
Anton Korobeynikov
1fcfb6b6d2
Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70766 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:18:50 +00:00
Anton Korobeynikov
f2f540261b
Expand divisions into libcalls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:18:33 +00:00
Anton Korobeynikov
b78e214274
Custom lower SIGN_EXTEND
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70763 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:17:49 +00:00
Anton Korobeynikov
1394db0eeb
Some eye-candy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70762 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:17:31 +00:00
Anton Korobeynikov
6130fc8ea3
Print function header / footer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70761 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:17:11 +00:00
Anton Korobeynikov
d9e89f6ea4
Fix printing: je => jeq
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70760 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:16:54 +00:00
Anton Korobeynikov
bf8ef3f29d
Add 8bit shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70759 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:16:37 +00:00
Anton Korobeynikov
e699d0f549
Handle logical shift right (at least I hope so :) )
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70758 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:16:17 +00:00
Anton Korobeynikov
e375a7c768
Handle anyext
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70757 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:15:57 +00:00
Anton Korobeynikov
0dbf292f68
Expand all sorts of indirect branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:15:40 +00:00
Anton Korobeynikov
8644af3690
Add InsertBranch() hook for tail mergeing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70754 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:15:22 +00:00
Anton Korobeynikov
49ebc22784
Implement bswap
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70753 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:15:03 +00:00
Anton Korobeynikov
5d59f68ade
Properly handle ExternalSymbol's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:14:46 +00:00
Anton Korobeynikov
8725bd22bf
Expand muls (all mulls!) to libcalls for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:14:25 +00:00
Anton Korobeynikov
b8f03c9578
Provide addc and subc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70748 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:13:34 +00:00
Anton Korobeynikov
ea54c9846b
Add left shift
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70747 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:13:17 +00:00
Anton Korobeynikov
824d8ddae8
Add direct branch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:12:58 +00:00
Anton Korobeynikov
0af5af823b
It's error-prone to maintain two separate variants of asmprinting stuff, one of which is even used. Drop second (aka 'intel') variant of operands. It can be added later, if needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:12:37 +00:00
Anton Korobeynikov
8b528e52ee
Lower select with custom inserted and make condjumps generic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:12:23 +00:00
Anton Korobeynikov
ed1a51af37
Add first draft for conditions, conditional branches, etc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:12:06 +00:00
Anton Korobeynikov
6e4f62790b
Hanle i8 returns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:11:48 +00:00
Anton Korobeynikov
c08163e72d
Small tweaking
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70741 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:11:35 +00:00
Anton Korobeynikov
ce45d30fa1
Add prologue/epilogue emission. Fix frame pointer handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:11:20 +00:00
Anton Korobeynikov
d5047cb9f7
Add code for save/restore of callee-saved registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:11:04 +00:00
Anton Korobeynikov
875e1eb8ab
Two more hooks for RA and FP registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70738 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:10:40 +00:00
Anton Korobeynikov
40477317f3
Proper handle loading of effective address of stack slot stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:10:26 +00:00
Anton Korobeynikov
82e46c2595
Match frame indexes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:10:11 +00:00
Anton Korobeynikov
aa29915b58
First draft of stack slot loads / stores lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70735 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:09:57 +00:00
Anton Korobeynikov
cf14ae5500
Reverse order of memory arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:09:40 +00:00
Anton Korobeynikov
aecfa7897f
Remove bogus pattern
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:09:24 +00:00
Anton Korobeynikov
1deea5f3a7
Correct asmprinting of memory operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70732 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:09:10 +00:00
Anton Korobeynikov
0eb6af40e3
Match wrapper node for address
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70731 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:08:51 +00:00
Anton Korobeynikov
3513ca81c6
Add lowering for global address nodes. Not pretty efficient though.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70730 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:08:33 +00:00
Anton Korobeynikov
3c2684d136
Some early full call lowering draft for direct calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:08:13 +00:00
Anton Korobeynikov
b561264d2b
Add call frame setup instruction elimination and lowerid for bunch of call-related stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70728 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:07:54 +00:00
Anton Korobeynikov
4428885c5a
Add CALL lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:07:31 +00:00
Anton Korobeynikov
01e0e8d119
Add bunch of mem-whatever patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70726 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:07:10 +00:00
Anton Korobeynikov
2682bf5979
Add bunch of reg-mem inst patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70725 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:06:46 +00:00
Anton Korobeynikov
54f30d3fc9
Add normal and trunc stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:06:26 +00:00
Anton Korobeynikov
36b6e533c1
Basic support for mem=>reg moves
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:06:03 +00:00
Anton Korobeynikov
51c31d6888
Add 8-bit insts. zext behaviour is not modelled yet
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70722 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:05:42 +00:00
Anton Korobeynikov
cf9adf2cbb
Add 8-bit regclass and pattern for sext_inreg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70721 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:05:22 +00:00
Anton Korobeynikov
0fc32dae8f
Add pattern for OR
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:05:00 +00:00
Anton Korobeynikov
6ee626a1c1
Add reg-imm variants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70719 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:04:41 +00:00
Anton Korobeynikov
c8166ac760
Add hint to nop
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70718 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:04:23 +00:00
Anton Korobeynikov
0ba0a89c6b
Add more instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70717 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:04:06 +00:00
Anton Korobeynikov
b8639f5214
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70716 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:03:50 +00:00
Anton Korobeynikov
d2c94ae49e
Add dummy lowering for shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:03:33 +00:00
Anton Korobeynikov
1476d97037
We don't have any div at all - thus mark it as expensive
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:03:14 +00:00
Anton Korobeynikov
8d7bb3998b
We're not going to spend 100% of time in interrupts, do we? :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70713 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:02:57 +00:00
Anton Korobeynikov
431beb5fa7
Add simple reg-reg add.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70712 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:02:39 +00:00
Anton Korobeynikov
fff5f76c46
gas uses lower letter for register names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:02:22 +00:00
Anton Korobeynikov
1df221f2bb
Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70710 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:02:04 +00:00
Anton Korobeynikov
09c42f509a
Add function body printing routine
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70709 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:01:41 +00:00
Anton Korobeynikov
f3085ac973
Add 'msp430' target triple recognizer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70708 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:01:23 +00:00
Anton Korobeynikov
e37db97928
Make emit{Prologue,Epilogue}() noop for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:01:04 +00:00
Anton Korobeynikov
fbf165a74b
Add callee-saved regs & reg classes getter hooks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:00:46 +00:00
Anton Korobeynikov
3a4fbcfd33
Add simple FP indicator for given function hook
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:00:28 +00:00
Anton Korobeynikov
dcb802cf7b
Provide set of reserved registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70704 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:00:11 +00:00
Anton Korobeynikov
fd1b7c778c
Add proper ISD::RET lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:59:50 +00:00
Anton Korobeynikov
c8fbb6ae20
Add first draft of MSP430 calling convention stuff and draft of ISD::FORMAL_ARGUMENTS node lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70702 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:59:33 +00:00
Anton Korobeynikov
2dd6cdc920
Fix register names, fix register allocation order, handle frame pointer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:59:16 +00:00
Anton Korobeynikov
43ed64a182
Clearify the usage and add some debug stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70700 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:58:58 +00:00
Anton Korobeynikov
9e12339cb2
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70699 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:58:40 +00:00
Anton Korobeynikov
b78e17b33a
Add cmake script. No idea whether it works or not :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:58:22 +00:00
Anton Korobeynikov
fe3fc5ace7
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:58:05 +00:00
Anton Korobeynikov
f99601fab4
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70695 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:57:47 +00:00
Anton Korobeynikov
f2c3e179ec
Dummy MSP430 backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70694 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 12:57:15 +00:00
Chris Lattner
c650f1f141
'The attached patch fixes an issue where llc -march=cpp fails with
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"Invalid primitive type" on input containing the x86_fp80 type.'
Patch by Collin Winter!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01 23:54:26 +00:00
Argyrios Kyrtzidis
9eddfd3687
Fix compilation for some targets other than x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70522 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 23:50:26 +00:00
Argyrios Kyrtzidis
a26eae64dd
Make DebugLoc independent of DwarfWriter.
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-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 23:22:31 +00:00
Jakob Stoklund Olesen
ba67d87fe4
getCommonSubClass() - Calculate the largest common sub-class of two register
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classes.
This is implemented as a function rather than a method on TargetRegisterClass
because it is symmetric in its arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70512 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 21:23:32 +00:00
Dan Gohman
78e04d4aa0
Set mayLoad on MOVZX32_NOREXrm8 too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70466 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 03:11:48 +00:00
Evan Cheng
8c1474050d
Mark MOV8mr_NOREX and MOV8rm_NOREX as mayStore / mayLoad respectively.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70461 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 00:58:57 +00:00
Chris Lattner
cf189964d7
remove progname which is never set. PR4085
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70453 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 00:24:33 +00:00
Bill Wendling
98a366d547
Instead of passing in an unsigned value for the optimization level, use an enum,
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which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 23:29:43 +00:00
Nate Begeman
ec8eee2d3a
Fix infinite recursion in the C++ code which handles movddup by making it unnecessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 22:47:44 +00:00
Nate Begeman
5a5ca1519e
Implement review feedback for vector shuffle work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 05:20:52 +00:00
Sanjiv Gupta
a3518a1d6a
Add a public method called getAddressSpace() to the GlobalAddressSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 04:43:24 +00:00
Bill Wendling
be8cc2a3de
Second attempt:
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Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 00:15:41 +00:00
Anton Korobeynikov
573c92d8ba
Properly print 'P' modifier on inline asm memory operands.
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This should fix PR3379 and PR4064.
Patch inspired by Edwin Török!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 21:49:33 +00:00
Sanjiv Gupta
23b0543e3f
GlobalValue is always pointer type, so an assert isn't required.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70300 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 16:39:45 +00:00
Bill Wendling
c69d56f115
r70270 isn't ready yet. Back this out. Sorry for the noise.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 01:04:53 +00:00
Bill Wendling
2e9d5f912a
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
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use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 00:21:31 +00:00
Nate Begeman
9008ca6b6b
2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.
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PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 18:41:29 +00:00
Dan Gohman
4af325d1b4
Rename GR8_ABCD to GR8_ABCD_L and create GR8_ABCD_H, and use these
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to precisely describe the h-register subreg register classes.
Thanks to Jakob Stoklund Olesen for spotting this and for the
initial patch!
Also, make getStoreRegOpcode and getLoadRegOpcode aware of the
needs of h registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70211 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 16:41:36 +00:00
Dan Gohman
6241762c5a
Rename GR8_, GR16_, GR32_, and GR64_ to GR8_ABCD, GR16_ABCD,
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GR32_ABCD, and GR64_ABCD, respectively, to help describe them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 16:33:14 +00:00
Dan Gohman
4d47b9bcb9
Break up long multi-mnemonic strings into separate lines for readability.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 15:13:28 +00:00
Mon P Wang
a7e01d7efd
Revised 68749 to allow matching of load/stores for address spaces < 256.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70197 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 07:22:10 +00:00
Chris Lattner
bc58322d6a
add support for detecting process features on win64, patch by
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Nicolas Capens!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25 18:27:23 +00:00
Bob Wilson
8091524d98
Change LowerCallResult method so that CCValAssign::BCvt can be used with
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f64 types. This is not used for anything yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25 00:33:20 +00:00
Bob Wilson
d55bd51f31
Adjust a comment to reflect what the code does. Splitting a 64-bit argument
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between registers and the stack may be required with the APCS ABI, but it
isn't tied to using a particular version of the ARM architecture.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 17:05:01 +00:00
Bob Wilson
4d59e1d666
Fix up some problems with getCopyToReg and getCopyFromReg nodes being
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chained and "flagged" together. I also made a few changes to handle the
chain and flag values more consistently. I found these problems by
inspection so I'm not aware of anything that breaks because of them
(thus no testcase).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 17:00:36 +00:00
Bob Wilson
1c2c462d0f
Remove unnecessary references to f32 types. After specifying that f32
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should be bit-converted to i32, it is sufficient to list only i32 in
subsequent definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 16:55:25 +00:00
Rafael Espindola
15f1b66d64
Fix PR 4004 by including the call to __tls_get_addr in X86tlsaddr. This is not
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very elegant, but neither is the tls specification :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 12:59:40 +00:00
Rafael Espindola
15684b2955
Revert 69952. Causes testsuite failures on linux x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 12:40:33 +00:00
Nate Begeman
b706d29f9c
PR2957
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ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 03:42:54 +00:00
Dan Gohman
f1d012c595
Fix spurious indentation in a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69934 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 22:41:05 +00:00
Sanjiv Gupta
b1f321b553
Banksel immediate constant will always immediately follow the GA/ES, so scan an insn from beginnin to find out the banksel operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69883 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 10:34:58 +00:00
Dan Gohman
146a310e66
Add support for printing MO_ExternalSymbol operands in
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memory operand tuples. This doesn't ever come up in normal
code however.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 00:57:37 +00:00
Sanjiv Gupta
dd92dba644
Make the function begin label start after ther data pointer.
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The address of data frame for function can be obtained by subtracting 2 from the function begin label.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69801 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-22 12:02:36 +00:00
Duncan Sands
005e7984cc
Get rid of what looks like a copy-and-pasted typo.
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Spotted by gcc-4.5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 09:44:39 +00:00
Rafael Espindola
7daa13c2a4
TLS_addr64 and TLS_addr32 define RDI and EAX. They don't use them.
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This fixes PR4002.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 08:22:09 +00:00
Sanjiv Gupta
e16178b75f
Handle direct aggregate type arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69665 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 05:54:51 +00:00
Dan Gohman
70bc17dbf5
Make X86's copyRegToReg able to handle copies to and from subclasses.
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This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69635 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 22:54:34 +00:00
Daniel Dunbar
75397f4092
Remove unused variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69624 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 20:34:38 +00:00
Bob Wilson
998e125a87
Move duplicated AddLiveIn function from X86 and ARM backends to be a method
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in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock. Thanks for Anton for suggesting this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69615 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 18:36:57 +00:00
Devang Patel
91b477d2fa
Match C backend only if it explicitly requested.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69613 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 18:07:22 +00:00
Sanjiv Gupta
2bdf490d71
Emit the auto variables of a function into a different section than parameters.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69605 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 16:59:35 +00:00
Mon P Wang
0bd07fc5dd
Fixed a few 64 bit cases in X86InstrInfo::commuteInstruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-18 05:16:01 +00:00
Bill Wendling
1824773689
Recommit r69335 and r69336. These were not causing problems.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69394 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 22:40:38 +00:00
Bob Wilson
e3fa9ef936
Move the AddLiveIn function definition closer to its uses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 20:42:34 +00:00
Bob Wilson
e65586b37b
Rearrange code to reduce indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 20:40:45 +00:00
Bob Wilson
dee46d7f6d
Clean up formatting, remove trailing whitespace, fix comment typos and
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punctuation. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 20:35:10 +00:00
Bob Wilson
1f595bb429
Use CallConvLower.h and TableGen descriptions of the calling conventions
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for ARM. Patch by Sandeep Patel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69371 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 19:07:39 +00:00
Rafael Espindola
2ee3db3003
For general dynamic TLS access we must use
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leaq foo@TLSGD(%rip), %rdi
as part of the instruction sequence. Using a register other than %rdi and then
copying it to %rdi is not valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69350 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 14:35:58 +00:00
Bill Wendling
c3a76ef955
Revert r69335 and r69336. They were causing build failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69347 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 04:19:22 +00:00
Dan Gohman
d10a4ce582
MOV8rr_NOREX is a "Move" instruction. This doesn't currently
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matter, because this instruction isn't generated until after
things that care.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 00:45:17 +00:00
Dan Gohman
d51def353c
Don't use MOV8rr_NOREX on x86-32. It doesn't actually hurt anything at
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present, but it's inconsistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69335 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 00:43:09 +00:00
Chris Lattner
9062d9a55b
Fix some failures in targets on available_externally functions,
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this fixes a crash on CodeGen/Generic/externally_available.ll
on ppc hosts. Thanks to Nicholas L for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69333 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 00:26:12 +00:00
Rafael Espindola
7c36683fa3
fix PR3995. A scale must be 1, 2, 4 or 8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69284 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 12:34:53 +00:00
Dan Gohman
df7dfc7715
Fix 80-column violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69204 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:48:57 +00:00
Dan Gohman
25174963f6
Add a folding table entry for MOV8rr_NOREX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:48:28 +00:00
Dan Gohman
6288b93f00
Fix X86MachineFunctionInfo's doxygen comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:20:18 +00:00
Dan Gohman
aaa1fdb271
Do for GR16_NOREX what r69049 did for GR8_NOREX, to avoid trouble with
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the local register allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69115 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:10:16 +00:00
Dan Gohman
6d9305c7fd
Add a new MOV8rr_NOREX, and make X86's copyRegToReg use it when
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either the source or destination is a physical h register.
This fixes sqlite3 with the post-RA scheduler enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69111 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:04:23 +00:00
Dan Gohman
a2f3703efd
GR8_NOREX can contain the H registers, since they don't require
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REX prefixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:00:48 +00:00
Dan Gohman
62ad138d70
For the h-register addressing-mode trick, use the correct value for
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any non-address uses of the address value. This fixes 186.crafty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 22:45:05 +00:00
Evan Cheng
b3f5bfe37f
Some of GR8_NOREX registers are only available in 64-bit mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 16:57:43 +00:00
Sanjiv Gupta
85be408a32
Handle aggregate type arguments to direct and indirect calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 02:49:52 +00:00
Dan Gohman
88c7af096b
Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
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it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 21:06:25 +00:00
Devang Patel
0f7fef3872
Reapply 68847.
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Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 17:02:03 +00:00
Dan Gohman
21e3dfbc86
Implement x86 h-register extract support.
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- Add patterns for h-register extract, which avoids a shift and mask,
and in some cases a temporary register.
- Add address-mode matching for turning (X>>(8-n))&(255<<n), where
n is a valid address-mode scale value, into an h-register extract
and a scaled-offset address.
- Replace X86's MOV32to32_ and related instructions with the new
target-independent COPY_TO_SUBREG instruction.
On x86-64 there are complicated constraints on h registers, and
CodeGen doesn't currently provide a high-level way to express all of them,
so they are handled with a bunch of special code. This code currently only
supports extracts where the result is used by a zero-extend or a store,
though these are fairly common.
These transformations are not always beneficial; since there are only
4 h registers, they sometimes require extra move instructions, and
this sometimes increases register pressure because it can force out
values that would otherwise be in one of those registers. However,
this appears to be relatively uncommon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 16:09:41 +00:00
Dan Gohman
8433df36fb
Remove x86's special-case handling for ISD::TRUNCATE and
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ISD::SIGN_EXTEND_INREG. Tablegen-generated code can handle
these cases, and the scheduling issues observed earlier
appear to be resolved now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68959 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:29:31 +00:00
Dan Gohman
3cf9b3e455
Fix copy+pastos in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68958 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:28:29 +00:00
Dan Gohman
ee30047386
List the l registers before h registers, for consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:18:42 +00:00
Dan Gohman
3cd0aa3260
Use X86::SUBREG_8BIT instead of hard-coding the equivalent constant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68951 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:14:03 +00:00
Dan Gohman
04d19f0241
Add a comment about MOVSX64rr8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68950 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:13:28 +00:00
Dan Gohman
8cc632f705
Fix another hard-coded constant to use X86AddrNumOperands.
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This unbreaks the JIT on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68948 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:04:25 +00:00
Rafael Espindola
7ff5bff45e
X86-64 TLS support for local exec and initial exec.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 13:02:49 +00:00
Sanjiv Gupta
12f23a86e2
While passing arg of types larger than char only one byte at lower end was getting passed. We couldn't catch this as we did not have tests that were passing an int value larger than 256.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 09:38:38 +00:00
Chris Lattner
266c7bbbbc
Add a new "available_externally" linkage type. This is intended
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to support C99 inline, GNU extern inline, etc. Related bugzilla's
include PR3517, PR3100, & PR2933. Nothing uses this yet, but it
appears to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 05:44:34 +00:00
Rafael Espindola
b215776fa1
In X86DAGToDAGISel::MatchWrapper, if base or index are set, avoid matching
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only if symbolic addresses are RIP relatives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68924 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 23:00:38 +00:00
Rafael Espindola
49a168daae
refactor some code into X86DAGToDAGISel::MatchWrapper
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68915 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 21:55:03 +00:00
Chris Lattner
8d57b778b5
fix a cross-block fastisel crash handling overflow intrinsics.
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See comment for details. This fixes rdar://6772169
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68890 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 07:51:14 +00:00
Chris Lattner
a9a42259ed
simplify code by using IntrinsicInst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68887 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 07:36:01 +00:00
Chris Lattner
0461c0a8f5
Add new TargetInstrDesc::hasImplicitUseOfPhysReg and
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hasImplicitDefOfPhysReg methods. Use them to remove a
look in X86 fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 07:26:51 +00:00
Dan Gohman
c6fa3ff0bd
Revert r68847. It breaks the build on non-Darwin targets, with this message
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from the assembler:
Error: unknown pseudo-op: `.debug_inlined'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-11 15:57:04 +00:00
Devang Patel
2057532679
Keep track of inlined functions and their locations. This information is collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.)
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Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-11 00:16:47 +00:00
Sanjiv Gupta
a3613be963
Added code to handle spilling and reloading of FSRs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68783 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 15:10:14 +00:00
Rafael Espindola
dbcfb3080a
Don't fold a load if the other operand is a TLS address.
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With this we generate
movl %gs:0, %eax
leal i@NTPOFF(%eax), %eax
instead of
movl $i@NTPOFF, %eax
addl %gs:0, %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 10:09:34 +00:00
Chris Lattner
c2406f2341
a few fixes to "addrspace(256) is reference offset of GS segment register".
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It turns out that there are still several problems with this, will file a bugzilla.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 00:16:23 +00:00
Bill Wendling
7d16e85bfc
Pass in the std::string parameter instead of returning it by value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68747 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 00:12:49 +00:00
Dan Gohman
fc1665793e
Remove the obsolete SelectionDAG::getNodeValueTypes and simplify
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code that uses it by using SelectionDAG::getVTList instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 23:54:40 +00:00
Owen Anderson
3ca15c989c
Give register alias checking the hash table treatment too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68730 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 22:19:30 +00:00
Bob Wilson
d9df501704
Fix pr3954. The register scavenger asserts for inline assembly with
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register destinations that are tied to source operands. The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 17:16:43 +00:00
Sanjiv Gupta
37831d0a12
The way we are trying to figure out banksel immediate operand may yield different results for different type of insns. This will eventually need to be changed but currently let us prevent the crash in cases of incorrect detection of banksel operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68713 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 17:06:24 +00:00
Sanjiv Gupta
e206b1d142
Arguments to indirect calls were being passed incorrectly. They are not fixed to start after return value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68705 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 10:29:32 +00:00
Chris Lattner
a1cd83a258
Fix code size computation on x86-64, patch by Zoltan Varga!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68690 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 06:10:51 +00:00
Sanjiv Gupta
6e2a46a0b4
r68576 unconverd a bug in PIC16 port (Thanks to Dan Gohman) where we were custom lowering an ADD to ADDC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68671 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 04:03:43 +00:00
Owen Anderson
7d770be047
Convert TargetRegisterInfo's super-register checking to use a pre-computed hash table just like subregister checking does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68669 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 03:50:16 +00:00
Dan Gohman
349ba4951f
Fix grammaros in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68666 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 02:06:09 +00:00
Rafael Espindola
094fad37b9
Re-apply 68552.
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Tested by bootstrapping llvm-gcc and using that to build llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68645 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 21:14:34 +00:00
Bob Wilson
2c7dab1864
Fix PR3795: Apply Dan's suggested fix for
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ARMTargetLowering::isLegalAddressingMode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68619 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 17:55:28 +00:00
Rafael Espindola
8ef2b89131
Avoid a hard coded constant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68603 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 08:09:33 +00:00
Sanjiv Gupta
c1fa70c35a
Emit .line debug directives for stoppoints. The debug location is retrieved by the MachineInstr itself, rather than by custom handling the DBG_STOPPOINT nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 06:24:04 +00:00
Sanjiv Gupta
7836fc129a
Handle indirect function calls.
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Every function has the address of its frame in the beginning of code section.
The frame address is retrieved and used to pass arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68597 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 05:38:48 +00:00
Dan Gohman
97121ba2af
Implement support for using modeling implicit-zero-extension on x86-64
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with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.
This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.
Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.
Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.
Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.
Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 00:15:30 +00:00
Bill Wendling
044b5344c4
Temporarily revert r68552. This was causing a failure in the self-hosting LLVM
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builds.
--- Reverse-merging (from foreign repository) r68552 into '.':
U test/CodeGen/X86/tls8.ll
U test/CodeGen/X86/tls10.ll
U test/CodeGen/X86/tls2.ll
U test/CodeGen/X86/tls6.ll
U lib/Target/X86/X86Instr64bit.td
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86InstrInfo.td
U lib/Target/X86/X86RegisterInfo.cpp
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86CodeEmitter.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86InstrInfo.h
U lib/Target/X86/X86ISelDAGToDAG.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86ISelLowering.h
U lib/Target/X86/X86InstrInfo.cpp
U lib/Target/X86/X86InstrBuilder.h
U lib/Target/X86/X86RegisterInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 22:35:25 +00:00
Rafael Espindola
2a6411bbbd
Reduce code duplication on the TLS implementation.
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This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.
Will work on it and on X86-64 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68552 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 21:37:46 +00:00
Jim Grosbach
30eae3c022
PR2985 / <rdar://problem/6584986>
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When compiling in Thumb mode, only the low (R0-R7) registers are available
for most instructions. Breaking the low registers into a new register class
handles this. Uses of R12, SP, etc, are handled explicitly where needed
with copies inserted to move results into low registers where the rest of
the code generator can deal with them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68545 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 20:34:09 +00:00
Bob Wilson
8f3434647d
Handle 'a' modifier in ARM inline assembly.
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Patch by Richard Pennington.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-06 21:46:51 +00:00
Sanjiv Gupta
cae1b628a7
Map stack based frameindices for spills to zero based indices that can be accessed based on an external symbol defining the location of temporary data for a function. For example: we have spill slots addressed as foo.tmp + 0, foo.tmp + 1 etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68442 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-06 10:54:50 +00:00
Bob Wilson
eec4b2d730
Wrap some lines to fix indentation problems.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68405 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 21:08:42 +00:00
Bob Wilson
1b46a68015
Fix some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 20:53:25 +00:00
Oscar Fuentes
fcf054bbd4
CMake: removed IA64AsmPrinter.cpp from lib/Target/IA64/CMakeLists.txt
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 12:11:43 +00:00
Anton Korobeynikov
6c5cfec73e
Separate MIPS asmprinter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 10:41:41 +00:00
Anton Korobeynikov
60a19a4edd
Fix target library name
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 10:41:17 +00:00
Anton Korobeynikov
c67d1127d0
Fix comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 10:41:00 +00:00
Anton Korobeynikov
ea38970596
Move IA64 asmprinter to separate library
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 10:38:51 +00:00
Mon P Wang
1e95580925
Added a x86 dag combine to increase the chances to use a
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movq for v2i64 on x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68368 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 02:43:30 +00:00
Sanjiv Gupta
c2eb87afc1
Fixed build warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68333 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-02 18:33:12 +00:00
Sanjiv Gupta
5274a4afb7
To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-02 18:03:10 +00:00
Sanjiv Gupta
b84d5a476a
Params are not being generated as static globals now. The caller passes them onto the callee's stack directly and the callee loads the argvals from its own stack. Clang generated frameindexes validatd by recalculating the stack as if all frameindexes represent 1-byte slots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68327 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-02 17:42:00 +00:00
Chris Lattner
5867de1243
silence warning in release-asserts build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68253 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-01 22:14:45 +00:00
Dan Gohman
de551f91d8
Use CHAR_BIT instead of hard-coding 8 in several places where it
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is appropriate. This helps visually differentiate host-oriented
calculations from target-oriented calculations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68227 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-01 18:45:54 +00:00
Dan Gohman
77c5b0d7dc
Use LLVM type names instead of C type names in comments, to be
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less ambiguous and less C-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-01 18:10:16 +00:00
Bob Wilson
bf6396bed0
Fix PR3862: Recognize some ARM-specific constraints for immediates in inline
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assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-01 17:58:54 +00:00
Evan Cheng
d54f2d571d
i128 shift libcalls are not available on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68133 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 19:38:51 +00:00
Dan Gohman
968dc7a207
Reapply 68073, with fixes. EH Landing-pad basic blocks are not
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entered via fall-through. Don't miss fallthroughs from blocks
terminated by conditional branches. Also, move
isOnlyReachableByFallthrough out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68129 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 18:39:13 +00:00
Rafael Espindola
523249f856
remove unused arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68109 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 16:16:57 +00:00
Bill Wendling
df4881c68a
Really temporarily revert r68073.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68100 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 08:42:40 +00:00
Bill Wendling
e67f5e4273
Oy! When reverting r68073, I added in experimental code. Sorry...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 08:41:31 +00:00
Bill Wendling
8fe00540fc
Revert r68073. It's causing a failure in the Apple-style builds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68092 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 08:26:26 +00:00
Evan Cheng
4d95232469
X86 address mode isel tweak. If the base of the address is also used by a CopyToReg (i.e. it's likely live-out), do not fold the sub-expressions into the addressing mode to avoid computing the address twice. The CopyToReg use will be isel'ed to a LEA, re-use it for address instead.
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This is not yet enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68082 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 01:13:53 +00:00
Dan Gohman
80c93e7442
Except in asm-verbose mode, avoid printing labels for blocks that are
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only reachable via fall-through edges. This dramatically reduces the
number of labels printed, and thus also the number of labels the
assembler must parse and remember.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68073 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 22:55:17 +00:00
Evan Cheng
73f24c9f0d
When optimzing a mul by immediate into two, the resulting mul's should get a x86 specific node to avoid dag combiner from hacking on them further.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68066 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 21:36:47 +00:00
Bob Wilson
d83712ad67
Fix comment to match function name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 18:49:37 +00:00
Anton Korobeynikov
29519b1de0
Fix thinko: put stuff with both global and local relocations into data.rel{.ro}, not .local
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 17:37:43 +00:00