Jim Grosbach
0811fe13d6
Thumb2 assembly parsing and encoding for LDRSB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 19:42:40 +00:00
Jim Grosbach
95d397c3b1
Thumb2 assembly parsing and encoding for LDRH.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139386 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 19:13:53 +00:00
Jim Grosbach
1efd9a0e8b
Shuffle a bit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139385 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 19:09:54 +00:00
Jim Grosbach
b6aed508e3
Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 18:37:27 +00:00
Jim Grosbach
e3a0adf162
Add FIXME.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09 16:45:31 +00:00
Jim Grosbach
a77295db19
Thumb2 assembly parsing and encoding for LDRD(immediate).
...
Refactor operand handling for STRD as well. Tests for that forthcoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08 22:07:06 +00:00
Jim Grosbach
9ea33b0c03
Add tests for Thumb2 LDRB indexed addressing w/ writeback.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08 16:49:36 +00:00
Jim Grosbach
e64fb28da1
Thumb2 assembly parsing and encoding for LDR post-indexed.
...
More cleanup of the general indexed addressing T2 instructions. Still more to
do, especially for stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139272 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08 01:01:32 +00:00
Jim Grosbach
eeec025cf5
Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback.
...
Adjust encoding of writeback load/store instructions to better reflect the
way the operand types are represented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139270 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08 00:39:19 +00:00
Jim Grosbach
f0eee6eca8
Thumb2 assembly parsing and encoding for LDRBT.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139267 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07 23:39:14 +00:00
Jim Grosbach
489c693f65
Thumb2 assembly parsing and encoding for LDRB(register).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07 23:17:00 +00:00
Jim Grosbach
ab899c1bcc
Thumb2 assembly parsing and encoding for LDR(register).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139264 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07 23:10:15 +00:00
Jim Grosbach
8bb5a861a0
Thumb2 assembly parsing and encoding for LDRB(immediate).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07 21:41:25 +00:00
Jim Grosbach
1aedfb47f9
Thumb2 assembly parsing and encoding for LDR(literal).
...
Need branch relocation support to distinguish this encoding from the
16-bit Thumb1 encoding w/o the explicit .w suffix. That comes later, though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139257 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07 21:33:16 +00:00
Jim Grosbach
ed1cb6defa
Add tests for Thumb2 LDR(immediate) from r139254.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139255 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07 21:06:46 +00:00
Jim Grosbach
94f914e3fd
Thumb2 parsing and encoding for LDMDB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139251 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07 19:57:53 +00:00
Jim Grosbach
76ecc3d35b
Thumb2 parsing and encoding for LDMIA.
...
Choose 32-bit vs. 16-bit encoding when there's no .w suffix in post-processing
as match classes are insufficient to handle the context-sensitiveness of
the writeback operand's legality for the 16-bit encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07 18:05:34 +00:00
Jim Grosbach
aa833e53dc
Thumb2 parsing and encoding for ISB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139200 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 22:53:27 +00:00
Jim Grosbach
8f6d8104fc
Thumb2 parsing and encoding for EOR.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 22:44:50 +00:00
Jim Grosbach
94d1c489a5
Thumb2 parsing and encoding for DSB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 22:19:40 +00:00
Jim Grosbach
06c1a51241
Thumb2 parsing and encoding for DMB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 22:14:58 +00:00
Jim Grosbach
77951908b7
Thumb2 parsing and encoding for DBG.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139191 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 22:06:40 +00:00
Jim Grosbach
ef88a92677
Thumb2 parsing and encoding for CMN and CMP.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139188 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 21:44:58 +00:00
Jim Grosbach
0b533a3bd3
Thumb2 parsing and encoding for CLZ.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139177 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 20:44:17 +00:00
Jim Grosbach
ad2dad930d
Thumb2 parsing and encoding for CLREX.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 20:27:04 +00:00
Jim Grosbach
79d56a66c3
Thumb2 parsing and encoding for CDP/CDP2.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139168 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06 20:12:23 +00:00
Jim Grosbach
83452b2064
Thumb2 parsing and encoding for CBZ/CBNZ.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139054 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:46:10 +00:00
Jim Grosbach
6c3e11ea55
Thumb2 parsing and encoding for BXJ.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:43:09 +00:00
Jim Grosbach
cefd2020a6
Thumb2 parsing and encoding for BIC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:37:54 +00:00
Jim Grosbach
0b9a3d37c5
Thumb2 parsing and encoding for BFI.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139051 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:28:46 +00:00
Jim Grosbach
7413f41d3b
Thumb2 parsing and encoding for BFC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:25:46 +00:00
Jim Grosbach
a110988b39
Thumb2 parsing and encoding of B instruction.
...
Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:22:08 +00:00
Jim Grosbach
5f25fb01b4
Thumb2 parsing and encoding for ASR.
...
For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 21:28:54 +00:00
Jim Grosbach
5c1ac55542
Thumb2 parsing and encoding for AND (register).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:41:35 +00:00
Jim Grosbach
f0851e5d95
Thumb2 parsing and encoding for ADD (register).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139017 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:14:46 +00:00
Jim Grosbach
ca52a7e38c
Tests for Thumb2 AND (immediate) instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:44:27 +00:00
Jim Grosbach
aca878c5e6
Add FIXME. Thumb2 ADR encoding choice is non-trivial.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:21:59 +00:00
Jim Grosbach
2f25d9b933
ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:22:13 +00:00
Owen Anderson
7f17b5a483
t2Bcc is allowed to have a predicate without a preceding IT instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 17:47:45 +00:00
Jim Grosbach
20ed2e7939
Thumb2 assembly parsing and encoding for ADD(immediate).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 00:28:52 +00:00
Owen Anderson
721cb1fde0
Fix encoding for tBcc with immediate offset operand.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 20:26:14 +00:00
Jim Grosbach
e0e42bf0bb
Run the Thumb1 parser tests in Thumb2 mode, as well.
...
Thumb2 is a superset of Thumb1, so all of the encodings should still work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138883 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 19:50:28 +00:00
Jim Grosbach
d82175c1f0
Thumb NOP encoding varies depending on ARCH revision.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138876 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:35:46 +00:00
Owen Anderson
559c277aa9
Fix roundtripping of Thumb BL/BLX instructions with immediate offsets instead of labels.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138874 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:30:20 +00:00
Jim Grosbach
72335d55d9
Thumb2 parsing and encoding for ADC(register).
...
Also add instruction aliases for non-.w versions of SBC since they're the
same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138871 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:23:08 +00:00
Jim Grosbach
0f3abd8d68
Tweak Thumb1 ADD encoding selection a bit.
...
When the destination register of an add immediate instruction is
explicitly specified, encoding T1 is preferred, else encoding T2 is
preferred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 17:07:33 +00:00
Owen Anderson
21df36c57a
Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather than labels.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 22:15:17 +00:00
Owen Anderson
a7710edd98
Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets instead of labels.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138835 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 22:10:03 +00:00
Owen Anderson
391ac65377
Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138834 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 22:03:20 +00:00
Owen Anderson
694e0ffb8a
Add missing encoding information for some of the GPR<->FP register moves.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138780 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:15:25 +00:00
Jim Grosbach
abd3f60859
Remove redundant tests from XFAIL'ed test file.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138779 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:04:04 +00:00
Jim Grosbach
a01e12499f
Thumb2 assembly parsing and encoding support for ADC(immediate).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:01:38 +00:00
Jim Grosbach
056cb4c0f6
Remove test file. Superceded by other more exhaustive tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138777 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:00:19 +00:00
Jim Grosbach
f8e1e3e729
Thumb2 parsing and encoding for IT blocks.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138773 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 22:24:09 +00:00
Owen Anderson
0da10cf44d
Improve handling of #-0 offsets for many more pre-indexed addressing modes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138754 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 19:36:44 +00:00
Owen Anderson
63553c77cd
Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:17:09 +00:00
Owen Anderson
f1eab597b2
Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 23:32:08 +00:00
Owen Anderson
d7568e1c35
Correct encoding of BL with immediate offset.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138673 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 22:54:51 +00:00
Owen Anderson
96425c8464
Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 18:09:22 +00:00
Jim Grosbach
070260cb29
Update tests for 138501.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 22:30:18 +00:00
Jim Grosbach
f69c804036
Thumb parsing and encoding for SUB (SP minu immediate).
...
Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 21:42:27 +00:00
Jim Grosbach
72f39f8436
Thumb parsing and encoding support for ADD SP instructions.
...
Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 21:22:15 +00:00
Jim Grosbach
99e84e07ff
Thumb parsing and encoding for WFE, WFI and YIELD.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 20:02:30 +00:00
Jim Grosbach
3284db5bfb
Thumb parsing and encoding for UXTB and UXTH.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138363 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 19:59:32 +00:00
Jim Grosbach
010bebc696
Thumb parsing and encoding for TST.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138362 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 19:53:17 +00:00
Jim Grosbach
4b6658dd0a
Thumb parsing and encoding for SXTB and SXTH.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138361 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 19:51:42 +00:00
Jim Grosbach
ec8b866434
Thumb parsing and encoding for SVC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 19:49:10 +00:00
Jim Grosbach
414b02357a
Thumb parsing and encoding for SUB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138359 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 19:45:45 +00:00
Jim Grosbach
743c0fa779
Thumb parsing and encoding for STRH.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 18:56:20 +00:00
Jim Grosbach
aec3a61c8b
Thumb parsing and encoding for STRB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138349 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 18:43:06 +00:00
Jim Grosbach
803b1aa8ef
Thumb parsing and encoding for tSTRspi.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 18:39:41 +00:00
Jim Grosbach
4c821d800a
Thumb parsing and encoding for STR.
...
Not including tSTRspi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138347 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 18:33:38 +00:00
Jim Grosbach
1e84f19337
Thumb parsing and encoding for STM.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 18:15:37 +00:00
Jim Grosbach
7e99b5c8a3
Thumb parsing and encoding for SETEND.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138312 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:58:02 +00:00
Jim Grosbach
04d55f1905
Thumb parsing and encoding for SBC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:55:58 +00:00
Jim Grosbach
934755ac04
Thumb parsing and encoding for RSB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138308 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:47:13 +00:00
Jim Grosbach
3f57a9a2cf
Thumb parsing and encoding for ROR.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138304 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:40:51 +00:00
Jim Grosbach
ab585e6146
Thumb parsing and encoding for REV/REV16/REVSH.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138303 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:39:25 +00:00
Jim Grosbach
6dcafc0d0b
Improve error checking for tPUSH and tPOP register lists.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138295 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:17:34 +00:00
Jim Grosbach
762f70bc49
Tidy up. Trailing whitespace.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:13:54 +00:00
Jim Grosbach
0c2165bbd0
Thumb parsing and encoding for PUSH.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138290 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:05:11 +00:00
Jim Grosbach
10fd9ad8f3
Fix think-o.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138288 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:04:26 +00:00
Jim Grosbach
7260c6a4ea
Thumb assemmbly parsing diagnostic improvements for LDM.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138287 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:01:07 +00:00
Jim Grosbach
d937d95125
Thumb assembly parsing and encoding for POP.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138286 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:00:19 +00:00
Jim Grosbach
011af5ca80
Thumb assembly parsing and encoding for ORR.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 17:41:44 +00:00
Jim Grosbach
0780b6303b
Thumb parsing and encoding support for NOP.
...
The irony is not lost that this is not a completely trivial patchset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138143 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 23:24:36 +00:00
Jim Grosbach
2c3f70e5d4
Thumb assembly parsing and encoding for NEG.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:51:03 +00:00
Jim Grosbach
7a01069420
Be more lenient on tied operand matching for MUL.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:30:46 +00:00
Jim Grosbach
c4762a9c91
Thumb assembly parsing and encoding for MVN.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138109 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:09:23 +00:00
Jim Grosbach
88ae2bc6d5
Thumb assembly parsing and encoding for MUL.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 22:07:46 +00:00
Jim Grosbach
584fb0e663
Add FIXME.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138077 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 20:48:54 +00:00
Jim Grosbach
4ec6e888ec
Thumb assembly parsing and encoding for MOV.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138076 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 20:46:54 +00:00
Jim Grosbach
c7ebca335d
Thumb assembly parsing and encoding for LSR.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 19:34:22 +00:00
Jim Grosbach
560ef9f2fe
Thumb assembly parsing and encoding for LSL(register).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 19:30:58 +00:00
Jim Grosbach
1b7b68f087
Thumb assembly parsing and encoding for LSL(immediate).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 19:29:25 +00:00
Jim Grosbach
05b0156734
Thumb assembly parsing and encoding for LDRSB and LDRSH.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138061 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 19:17:58 +00:00
Jim Grosbach
38466309d5
Thumb assembly parsing and encoding for LDRH.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138060 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 18:55:51 +00:00
Jim Grosbach
48ff5ffe9e
Thumb assembly parsing and encoding for LDRB.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 18:49:59 +00:00
Jim Grosbach
09f6e0dfda
Thumb assembly parsing and encoding for LDR(register).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138056 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 18:35:06 +00:00
Jim Grosbach
67b95f902a
Thumb assembly parsing and encoding for LDR(literal).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 18:20:48 +00:00
Jim Grosbach
ecd8589683
Thumb assembly parsing and encoding for LDR(immediate) form T2.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 18:13:48 +00:00
Jim Grosbach
60f91a3d95
Thumb assembly parsing and encoding for LDR(immediate) form T1.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-19 17:55:24 +00:00
Jim Grosbach
93b3eff623
Thumb assembly parsing and encoding for LDM instruction.
...
Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 21:50:53 +00:00
Jim Grosbach
1eba8a66b6
Thumb assembly parsing and encoding for EOR.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 18:10:38 +00:00
Jim Grosbach
0d1511c022
Thumb assembly parsing and encoding for CMP.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 18:08:29 +00:00
Jim Grosbach
7750b8df6a
Thumb assembly parsing and encoding test for CMN.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137957 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:55:03 +00:00
Jim Grosbach
6ea80e964b
ARM assembly parsing and encoding test for BX/BLX (register).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137949 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:02:28 +00:00
Jim Grosbach
ded439886a
ARM assembly parsing and encoding test for BL/BLX (immediate).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137948 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:00:09 +00:00
Jim Grosbach
37f88c7812
ARM assembly parsing and encoding test for BKPT.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137898 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 23:11:13 +00:00
Jim Grosbach
5b657de62b
ARM assembly parsing and encoding test for BIC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 23:00:53 +00:00
Jim Grosbach
395b453bed
Thumb assembly parsing and encoding for B.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:57:40 +00:00
Jim Grosbach
00f5d98205
Thumb assembly parsing and encoding for ASR.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:49:09 +00:00
Jim Grosbach
5a1cd045cd
Thumb assembly parsing and encoding for ADR.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 20:37:40 +00:00
Jim Grosbach
53727fc659
Add a couple of FIXMEs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 20:35:57 +00:00
Jim Grosbach
358499ea3b
Thumb assembly parsing and encoding for ADC(register) instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:55:28 +00:00
Jim Grosbach
b1ee18ee69
Add missing '@' delimiter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137832 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:46:01 +00:00
Jim Grosbach
89e2aa6afd
Thumb ADD(immediate) parsing support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137788 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 23:57:34 +00:00
Jim Grosbach
194bd89829
Thumb parsing diagnostics for low-reg requirements on ADD and MOV.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137779 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 22:20:01 +00:00
Jim Grosbach
3912b73c74
Thumb assembly parsing and encoding for ADD(register) instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137759 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:34:08 +00:00
Jim Grosbach
c2408d3ce5
Add testcase for r137746.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137754 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:11:21 +00:00
Jim Grosbach
be2ac8ca7b
Tidy up formatting.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137747 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 20:55:41 +00:00
Jim Grosbach
47a0d52b69
ARM thumb assembly parsing for arithmetic flag setting instructions.
...
Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 20:45:50 +00:00
Jim Grosbach
d0d3f7e01f
ARM .align NOP padding uses different encoding pre-ARMv6.
...
Patch by Kristof Beyls and James Malloy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137723 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 17:06:20 +00:00
Owen Anderson
5df7ef6cdb
Fix incorrect encoding of UMAAL and friends. Patch by James Molloy.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 20:08:25 +00:00
Jim Grosbach
7a8729effc
Tidy up formatting.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 17:43:31 +00:00
Jim Grosbach
46c38aff89
Tidy up formatting.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137464 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 17:01:02 +00:00
Jim Grosbach
29e7b7deb4
Clean up formatting a bit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137393 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 23:57:17 +00:00
Jim Grosbach
857e1a7b3f
ARM vector compare to zero instruction assembly parsing support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 23:51:13 +00:00
Jim Grosbach
c69c26d95e
Fix tests per now-correct encoding as of r137371.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:31:48 +00:00
Jim Grosbach
342ebd5f38
ARM STRT assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:18:00 +00:00
Jim Grosbach
dd32ba337a
ARM load shifted register pre-index fix shift value asm parser encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:05:09 +00:00
Jim Grosbach
2ef8241ce7
ARM STRHT assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:39:41 +00:00
Jim Grosbach
7b8f46cf9e
ARM STRH assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:17:22 +00:00
Jim Grosbach
14605d1a67
ARM STRD assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137342 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:28:23 +00:00
Jim Grosbach
10348e70d5
ARM STRBT assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:04:56 +00:00
Jim Grosbach
961afdf1b6
Add FIXME.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 19:43:42 +00:00
Jim Grosbach
534de6cad8
ARM STRB assembly parsing and encoding tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 19:42:58 +00:00
Jim Grosbach
c15bd92d2f
Fix a copy/paste error so that LDRB(register) actually gets tested.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137333 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 19:34:23 +00:00
Jim Grosbach
f91c14920c
ARM STR(register) assembly parsing and encoding tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137332 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 19:26:17 +00:00
Jim Grosbach
548340c4bf
ARM STR(immediate) assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 19:22:40 +00:00
Jim Grosbach
f6713916fb
ARM push of a single register encodes as pre-indexed STR.
...
Per the ARM ARM, a 'push' of a single register encodes as an STR,
not an STM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 18:07:11 +00:00
Jim Grosbach
f8fce711e8
ARM pop of a single register encodes as post-indexed LDR.
...
Per the ARM ARM, a 'pop' of a single register encodes as an LDR,
not an LDM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 17:35:48 +00:00
Jim Grosbach
64104f48f2
ARM tests for LDRSHT assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137274 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:18:30 +00:00
Jim Grosbach
e0109c07ff
ARM tests for LDRSH assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137272 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:12:25 +00:00
Jim Grosbach
7d179b59cd
ARM tests for LDRSBT assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137271 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:08:56 +00:00
Jim Grosbach
5e92159400
ARM tests for LDRSB assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137270 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:06:44 +00:00
Jim Grosbach
263bb07135
Add FIXME.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137265 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:56:43 +00:00
Jim Grosbach
de2f526c7c
ARM tests for LDRHT assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137263 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:55:38 +00:00
Jim Grosbach
46b355479f
ARM tests for LDRH(register) assembly parsing and encoding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137261 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:45:42 +00:00
Jim Grosbach
623a454b0f
ARM LDRH(immediate) assembly parsing and encoding support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137260 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:42:16 +00:00
Jim Grosbach
c7de52fcff
Add FIXME
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:20:38 +00:00
Jim Grosbach
251bf25e7e
ARM LDRD(register) assembly parsing and encoding.
...
Add support for literal encoding of #-0 along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137254 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 21:56:18 +00:00
Jim Grosbach
2fd2b87ded
ARM LDRD(immediate) assembly parsing and encoding support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 20:29:19 +00:00
Jim Grosbach
3148a65490
ARM parsing and encoding for LDRBT instruction.
...
Fix the instruction representation to correctly only allow post-indexed form.
Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08 23:28:47 +00:00
Jim Grosbach
bc6fc20fcc
ARM parsing and encoding for LDRB instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08 22:37:06 +00:00
Jim Grosbach
8668a5b0c8
Add FIXME.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-08 22:11:33 +00:00
Jim Grosbach
0d6fac36ed
ARM load instruction shifted register index operands.
...
Parsing and encoding for shifted index operands for load instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-05 22:03:36 +00:00
Jim Grosbach
f4fa3d6e46
ARM indexed load assembly parsing and encoding.
...
More parsing support for indexed loads. Fix pre-indexed with writeback
parsing for register offsets and handle basic post-indexed offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136982 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-05 21:28:30 +00:00
Jim Grosbach
6fc1c08635
Add ARM LDR parsing tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-05 20:33:39 +00:00
Rafael Espindola
71a8f5ca12
print st_type with the correct number of bits.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136875 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-04 15:24:00 +00:00
Rafael Espindola
d7c278326f
Print st_bind with the correct number of bits.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136874 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-04 15:10:35 +00:00
Rafael Espindola
a83f8ef9b4
Print r_sym with the correct number of bits.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-04 14:48:27 +00:00
Rafael Espindola
f81f6758f3
Print r_type with the correct number of bits.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136872 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-04 14:39:30 +00:00
Rafael Espindola
65ad8dc807
Another counter goes decimal.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136871 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-04 14:27:46 +00:00
Rafael Espindola
f7179de2a5
Change anther counter to decimal.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136870 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-04 14:01:03 +00:00
Rafael Espindola
014180d387
Don't print a counter in hex.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-04 13:39:15 +00:00
Jim Grosbach
7ce057983e
ARM refactoring assembly parsing of memory address operands.
...
Memory operand parsing is a bit haphazzard at the moment, in no small part
due to the even more haphazzard representations of memory operands in the .td
files. Start cleaning that all up, at least a bit.
The addressing modes in the .td files will be being simplified to not be
so monolithic, especially with regards to immediate vs. register offsets
and post-indexed addressing. addrmode3 is on its way with this patch, for
example.
This patch is foundational to enable going back to smaller incremental patches
for the individual memory referencing instructions themselves. It does just
enough to get the basics in place and handle the "make check" regression tests
we already have.
Follow-up work will be fleshing out the details and adding more robust test
cases for the individual instructions, starting with ARM mode and moving from
there into Thumb and Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136845 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-03 23:50:40 +00:00
Jim Grosbach
e1cf5902ec
ARM SRS instruction parsing, diassembly and encoding support.
...
Fix the instruction encoding for operands. Refactor mode to use explicit
instruction definitions per FIXME to be more consistent with loads/stores.
Fix disassembler accordingly. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136509 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 20:26:09 +00:00
Jim Grosbach
2c6363a62d
ARM assembly parsing and encoding for RFE instruction.
...
Fill in the missing fixed bits and the register operand bits of the instruction
encoding. Refactor the definition to make the mode explicit, which is
consistent with how loads and stores are normally represented and makes
parsing much easier. Add parsing aliases for pseudo-instruction variants.
Update the disassembler for the new representations. Add tests for parsing and
encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136479 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 18:47:24 +00:00
Jim Grosbach
71d3d67508
ARM update tests for CPS instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-29 17:39:27 +00:00
Jim Grosbach
c5b3c58ae8
CBZ/CBNZ are Thumb2 only. No need for ARM mode tests for them.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 21:59:38 +00:00
Jim Grosbach
cf121c35c4
ARM assembly parsing and encoding for BLX (immediate).
...
Add parsing support for BLX (immediate). Since the register operand version is
predicated and the label operand version is not, we have to use some special
handling to get the operand list right for matching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 21:57:55 +00:00
Jim Grosbach
43afb6ff1c
Remove obsolete FIXME reference in comment.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 21:37:05 +00:00
Jim Grosbach
293a2ee306
ARM assembly parsing and encoding for BFC and BFI.
...
Add parsing support that handles converting the lsb+width source into the
odd way we represent the instruction (an inverted bitfield mask).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 21:34:26 +00:00
Jim Grosbach
70a0915cd1
ARM parsing and encoding for ADR.
...
The label does not have a '#' prefix. Add parsing and encoding tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 16:33:54 +00:00
Jim Grosbach
19b9d6912a
Update ARM tests for parsing and encoding of WFE, WFI and YIELD.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 16:00:41 +00:00
Jim Grosbach
8050a61914
ARM parsing and encoding tests.
...
UXTAB, UXTAB16, UXTAH, UXTB, UXTB16, and UXTH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136312 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 00:37:03 +00:00
Jim Grosbach
ed398468b5
ARM assembly parsing and encoding for USUB16 and USUB8.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136289 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 23:10:05 +00:00
Jim Grosbach
953e2e81de
ARM assembly parsing and encoding for USAX.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136288 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 23:07:00 +00:00
Jim Grosbach
fc2eb31a3c
Clean up tabs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136286 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:35:06 +00:00
Jim Grosbach
addec77b54
ARM assembly parsing and encoding support for USAT and USAT16.
...
Use range checked immediate operands for instructions. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136285 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:34:17 +00:00
Jim Grosbach
5f33d13da4
ARM assembly parsing and encoding tests for USAD8 and USADA8.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136284 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:23:02 +00:00
Jim Grosbach
144da2c8f0
ARM assembly parsing and encoding tests for UQSUB16 and UQSUB8.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:13:08 +00:00
Jim Grosbach
41438398c1
Fix comment copy/paste-o.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136281 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:11:41 +00:00
Jim Grosbach
29e85bc728
ARM assembly parsing and encoding tests for UQASX and UQSAX.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136280 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:09:30 +00:00
Jim Grosbach
24a541b79f
ARM assembly parsing and encoding tests for UQADD16 and UQADD8.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136279 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:08:14 +00:00
Jim Grosbach
49f2ceddd2
ARM assembly parsing and encoding for UMULL.
...
Fix parsing of the 's' suffix for the mnemonic. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136277 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:01:42 +00:00
Jim Grosbach
71725a099e
ARM assembly parsing and encoding for UMLAL.
...
Fix parsing of the 's' suffix for the mnemonic. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136274 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 21:58:11 +00:00
Jim Grosbach
2adba4156b
ARM assembly parsing and encoding tests for UMAAL.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136272 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 21:53:42 +00:00
Jim Grosbach
f36b0a2ee4
ARM assembly parsing and encoding tests for UHSUB16 and UHSUB8.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136267 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 21:21:59 +00:00
Jim Grosbach
66c8982244
ARM assembly parsing and encoding tests for UHADD16, UHADD8 and UHASX.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 21:20:45 +00:00
Jim Grosbach
fb8989e640
ARM parsing and encoding of SBFX and UBFX.
...
Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136264 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 21:09:25 +00:00
Jim Grosbach
b6854ad2b1
ARM assembly parsing and encoding tests for UADD16, UADD8 and UASX.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136261 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 20:43:44 +00:00
Jim Grosbach
8b3fd56e0f
ARM assembly parsing and encoding tests for TST instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136260 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 20:38:58 +00:00
Jim Grosbach
f1ae78af17
ARM assembly parsing and encoding tests for TEQ instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136259 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 20:37:36 +00:00
Owen Anderson
06470311c5
Refactor the STRT and STRBT instructions to distinguish between the register-addend and immediate-addend versions. Temporarily XFAIL the asm parsing tests for these instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136255 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 20:29:48 +00:00
Jim Grosbach
7e1547ebf7
ARM assembly parsing and encoding for extend instructions.
...
Assembly parser handling for extend instruction rotate operands. Add tests
for the sign extend instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136252 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 20:15:40 +00:00
Jim Grosbach
189610f946
ARM diagnostics for ldrexd/stredx out of order paired register operands.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:25:39 +00:00
Jim Grosbach
36711e4a3c
ARM parsing and encoding tests for load/store exclusive instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:07:21 +00:00
Jim Grosbach
4f6f13db1a
ARM assembly parsing and encoding for SWP[B] instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:15:11 +00:00