Chris Lattner
d4060cc989
Convert saturating PADD/PSUB's to use a multiclass
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30806 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 18:48:46 +00:00
Chris Lattner
8139e28a79
Convert PAVG*, PMADDWD, and PMUL* to use multiclasses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30805 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 18:39:00 +00:00
Chris Lattner
3dca490ff0
Fix typo in packsswb instr definition, where the load had the wrong type.
...
This allows us to use the multiclass for other packs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30804 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 18:23:58 +00:00
Chris Lattner
783d45ef14
handle pmin/pmax with multiclasses
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30800 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 07:49:33 +00:00
Chris Lattner
7733799464
simplify pack and shift intrinsics with multiclasses
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30797 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 07:06:17 +00:00
Chris Lattner
01998742c3
Use a multiclass to simplify 'SSE2 Integer comparison'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30796 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 06:47:08 +00:00
Chris Lattner
736c020fc8
move class defns close to uses to make it easier to read
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30795 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 06:33:36 +00:00
Chris Lattner
fb996ee727
simplify horizontal op definitions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30794 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 06:31:41 +00:00
Chris Lattner
3b57a833a5
remove more unneeded type info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30793 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 06:27:03 +00:00
Chris Lattner
aab370db24
remove unneeded definitions and type info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30792 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 06:19:41 +00:00
Chris Lattner
15258d5f9d
remove some unneeded type info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30791 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 06:17:43 +00:00
Chris Lattner
845fb75536
simplify patterns by merging in operand info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30790 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 05:50:25 +00:00
Chris Lattner
d1b651d5de
Factor operands into packed unary classes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30789 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 05:47:20 +00:00
Chris Lattner
dc5aa21b10
remove dead/duplicate instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 05:41:52 +00:00
Chris Lattner
a0ea63db75
Pull operand info up into parent class for scalar sse intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30787 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 05:26:13 +00:00
Chris Lattner
86c1b3a2fd
convert the sole sd unary intrinsic to a multiclass for consistency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30786 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 05:19:31 +00:00
Chris Lattner
3b8378552e
pull operand string into the multiclass
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30785 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 05:13:26 +00:00
Chris Lattner
9498ed8ac9
Remove RSQRTSS[rm] RCPSS[rm], which are dead.
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Introduce SS_IntUnary, a multiclass to replace SS_Int[rm].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30784 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 05:09:48 +00:00
Chris Lattner
4cc84edd3b
eliminate redundancy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30783 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-07 04:52:09 +00:00
Evan Cheng
485130fbf4
These don't have immediate operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30694 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-03 06:55:11 +00:00
Evan Cheng
734503be59
X86ISD::CMP now produces a chain as well as a flag. Make that the chain
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operand of a conditional branch to allow load folding into CMP / TEST
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30241 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-11 02:19:56 +00:00
Evan Cheng
23b3122c44
JIT encoding bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30112 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 05:59:25 +00:00
Evan Cheng
55371739de
Can't commute shufps. The high / low parts elements come from different vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29275 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-25 20:25:40 +00:00
Evan Cheng
206ee9d86c
X86 target specific DAG combine: turn build_vector (load x), (load x+4),
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(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).
e.g.
__m128 test(float a, float b, float c, float d) {
return _mm_set_ps(d, c, b, a);
}
_test:
movups 4(%esp), %xmm0
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-07 08:33:52 +00:00
Evan Cheng
775ff18257
Should just use xorps to clear XMM registers for all data types. pxor is also one byte longer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28984 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 18:04:54 +00:00
Evan Cheng
a8e83ec8c3
Always use xorps to clear XMM registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28979 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-29 00:34:23 +00:00
Chris Lattner
30da68acce
Remove some ugly now-redundant casts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28864 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:25:29 +00:00
Chris Lattner
a973993c0c
Fix some mismatched type constraints
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28862 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 00:12:37 +00:00
Evan Cheng
b21495043e
Minor clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28860 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-19 19:25:30 +00:00
Evan Cheng
015188ffbc
Type of vector extract / insert index operand should be iPTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:14:54 +00:00
Evan Cheng
190717d3cf
Rename instructions for consistency sake.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28594 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 19:00:07 +00:00
Evan Cheng
9d09b89f39
Select vector_shuffle v1, undef <2, 3, ?, ?> to MOVHLPS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28582 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 00:51:37 +00:00
Evan Cheng
b5e406afc3
MAXP{D|S} and MINP{D|S} are commutable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28578 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 23:47:30 +00:00
Evan Cheng
efeaed8fb4
Commute shufps / shufpd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28577 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 23:34:30 +00:00
Evan Cheng
ccba76bb25
Allow shufps x, x, mask to be converted to pshufd x, mask to save a move.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28565 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-30 20:26:50 +00:00
Evan Cheng
069287d460
X86 integer register classes naming changes. Make them consistent with FP, vector classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28324 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 07:21:53 +00:00
Chris Lattner
bd04aa5796
Teach the code generator to use cvtss2sd as extload f32 -> f64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28131 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:35:18 +00:00
Evan Cheng
9e062ed516
Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when
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movlps cannot be used (e.g. when load from m64 has multiple uses).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28089 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 20:32:03 +00:00
Evan Cheng
3d1be07141
Fix a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27968 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 17:48:41 +00:00
Evan Cheng
a2137b592e
Explicitly specify result type for def : Pat<> patterns (if it produces a vector
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result). Otherwise tblgen will pick the default (v16i8 for 128-bit vector).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27965 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 00:50:01 +00:00
Evan Cheng
a7fc64222a
Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is
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a temporary workaround for the 2-wide vector_shuffle problem (i.e. its mask
would have type v2i32 which is not legal).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27964 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 23:34:56 +00:00
Evan Cheng
64e9769339
Some missing movlps, movhps, movlpd, and movhpd patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27960 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 21:58:20 +00:00
Evan Cheng
017dcc6e55
Now generating perfect (I think) code for "vector set" with a single non-zero
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scalar value.
e.g.
_mm_set_epi32(0, a, 0, 0);
==>
movd 4(%esp), %xmm0
pshufd $69, %xmm0, %xmm0
_mm_set_epi8(0, 0, 0, 0, 0, a, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
==>
movzbw 4(%esp), %ax
movzwl %ax, %eax
pxor %xmm0, %xmm0
pinsrw $5, %eax, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 01:05:10 +00:00
Evan Cheng
fd111b5be5
Prefer {p}unpack* and mov*dup over {p}shuf* as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 21:15:24 +00:00
Evan Cheng
2dadaea5d2
- Renamed AddedCost to AddedComplexity.
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- Added more movhlps and movlhps patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27842 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 20:37:34 +00:00
Evan Cheng
f66a094cac
More mov{h|l}p{d|s} patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27836 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 18:20:17 +00:00
Evan Cheng
cc0e98c8ed
- More mov{h|l}ps patterns.
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- Increase cost (complexity) of patterns which match mov{h|l}ps ops. These
are preferred over shufps in most cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27835 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 18:11:52 +00:00
Evan Cheng
f0d4e3d7c0
- PEXTRW cannot take a memory location as its first source operand.
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- PINSRWrmi encoding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27818 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:59:43 +00:00
Evan Cheng
b7a5c527ae
Name change for clarity sake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27816 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:55:35 +00:00
Evan Cheng
7b7bd57abd
Name change for clarity sake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27814 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:29:50 +00:00
Evan Cheng
fb2a3b2964
Left a pattern out
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27813 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 21:29:08 +00:00
Evan Cheng
df2a1908b2
Fixed an encoding bug: movd from XMM to R32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27807 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 18:19:00 +00:00
Evan Cheng
cdfc3c82a7
Use movss to insert_vector_elt(v, s, 0).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27782 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 22:45:49 +00:00
Evan Cheng
23b72005fa
Encoding bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27773 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 21:33:57 +00:00
Evan Cheng
083248e143
Errors in patterns preventing load folding
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27762 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 18:05:01 +00:00
Evan Cheng
06aef15843
movduprm, movshduprm bugs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27734 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-16 18:11:28 +00:00
Evan Cheng
d8e8223ea1
Encoding bugs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27733 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-16 07:02:22 +00:00
Evan Cheng
60d3fa24ba
More encoding bugs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27722 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 06:10:09 +00:00
Evan Cheng
1af18985b8
pslldrm, psrawrm, etc. encoding bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27721 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 05:59:08 +00:00
Evan Cheng
7076e2daee
hsubp{s|d} encoding bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27720 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 05:52:42 +00:00
Evan Cheng
57ebe9fbf0
Silly bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27719 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 05:37:34 +00:00
Evan Cheng
9ab1ac5e99
Some clean up
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27715 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 23:32:40 +00:00
Evan Cheng
d953947d26
Last few SSE3 intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27711 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 21:59:03 +00:00
Evan Cheng
f3e1b1d716
Misc. SSE2 intrinsics: clflush, lfench, mfence
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27699 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 07:43:12 +00:00
Evan Cheng
bb5c43e73d
pcmpeq* and pcmpgt* intrinsics.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27685 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 01:39:53 +00:00
Evan Cheng
0ac8ea9a4f
psll*, psrl*, and psra* intrinsics.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27684 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 00:14:05 +00:00
Evan Cheng
2b21ac6d4c
Doh. PANDrm, etc. are not commutable.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27668 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13 18:11:28 +00:00
Evan Cheng
00586948aa
psad, pmax, pmin intrinsics.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27647 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13 06:11:45 +00:00
Evan Cheng
2f40b1b27e
Various SSE2 packed integer intrinsics: pmulhuw, pavgw, etc.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27645 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13 05:24:54 +00:00
Evan Cheng
49ac1bf1c4
padds{b|w}, paddus{b|w}, psubs{b|w}, psubus{b|w} intrinsics.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27639 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13 00:43:35 +00:00
Evan Cheng
a50a086341
Naming inconsistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27638 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13 00:00:23 +00:00
Evan Cheng
d2a6d54f26
SSE / SSE2 conversion intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27637 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 23:42:44 +00:00
Evan Cheng
2c3ae37213
All "integer" logical ops (pand, por, pxor) are now promoted to v2i64.
...
Clean up and fix various logical ops issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27633 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 21:21:57 +00:00
Evan Cheng
91b740da12
Promote v4i32, v8i16, v16i8 load to v2i64 load.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27612 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 17:12:36 +00:00
Evan Cheng
d03db7a36c
Various SSE2 conversion intrinsics
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 05:20:24 +00:00
Evan Cheng
397edeff50
Added __builtin_ia32_storelv4si, __builtin_ia32_movqv4si,
...
__builtin_ia32_loadlv4si, __builtin_ia32_loaddqu, __builtin_ia32_storedqu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27599 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 22:28:25 +00:00
Evan Cheng
df3c33c57e
gcc lower SSE prefetch into generic prefetch intrinsic. Need to add support
...
later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27591 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 18:04:57 +00:00
Evan Cheng
135c6a9d83
Misc. intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27590 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 17:35:57 +00:00
Evan Cheng
fcf5e21b96
movnt* and maskmovdqu intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27587 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 06:57:30 +00:00
Evan Cheng
d6d1cbd692
Added support for _mm_move_ss and _mm_move_sd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27575 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 00:19:04 +00:00
Evan Cheng
3d60df480a
Remove some bogus patterns; clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27569 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-10 22:35:16 +00:00
Evan Cheng
56e73013c7
Added some missing shuffle patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27564 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-10 21:42:19 +00:00
Evan Cheng
aa9fb8c70e
movups / movupd
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27562 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-10 21:11:06 +00:00
Evan Cheng
f7c378e9ea
Conditional move of vector types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27556 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-10 07:23:14 +00:00
Evan Cheng
372db540d9
ldmxcsr and stmxcsr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27506 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 00:47:44 +00:00
Evan Cheng
664ade71b9
Added patterns for MOVHPSmr and MOVLPSmr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27497 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-07 21:20:58 +00:00
Evan Cheng
85c0965db1
A MOVPS2SSmr, i.e. _mm_store_ss, encoding bug.
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Also MOVPDI2DIrr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27476 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 23:53:29 +00:00
Evan Cheng
5ced1d812e
- movlp{s|d} and movhp{s|d} support.
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- Normalize shuffle nodes so result vector lower half elements come from the
first vector, the rest come from the second vector. (Except for the
exceptions :-).
- Other minor fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27474 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 23:23:56 +00:00
Evan Cheng
c6cb5bb679
POR encoded as PAND, yikes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27446 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 01:49:20 +00:00
Evan Cheng
6be2c58c8c
Support for comi / ucomi intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27444 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 23:38:46 +00:00
Evan Cheng
1d5a8cca00
Handle canonical form of e.g.
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vector_shuffle v1, v1, <0, 4, 1, 5, 2, 6, 3, 7>
This is turned into
vector_shuffle v1, <undef>, <0, 0, 1, 1, 2, 2, 3, 3>
by dag combiner.
It would match a {p}unpckl on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27437 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-05 07:20:06 +00:00
Evan Cheng
ff65e38aaf
Added pslldq and psrldq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27412 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 21:49:39 +00:00
Evan Cheng
8703be4ab6
Minor fixes + naming changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27410 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 19:12:30 +00:00
Evan Cheng
5333b7b8e2
PSHUF* encoding bugs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27405 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 18:40:36 +00:00
Evan Cheng
21760460b9
cmpps / cmppd encoding bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27393 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 03:04:07 +00:00
Evan Cheng
6e96740c6c
Compact some intrinsic definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27388 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-04 00:10:53 +00:00
Evan Cheng
97ac5fadb7
Some SSE1 intrinsics: min, max, sqrt, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27384 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 23:49:17 +00:00
Evan Cheng
20e3ed102b
Use movlpd to: store lower f64 extracted from v2f64.
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Use movhpd to: store upper f64 extracted from v2f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27382 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 22:30:54 +00:00
Evan Cheng
11e15b38e9
- More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc.
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- Some bug fixes and naming inconsistency fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27377 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 20:53:28 +00:00
Evan Cheng
653159f4aa
Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed
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INSERT_VECTOR_ELT to insert a 16-bit value in a 128-bit vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27314 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 21:55:24 +00:00
Evan Cheng
4b1734f70b
Added support for SSE3 horizontal ops: haddp{s|d} and hsub{s|d}.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 21:29:33 +00:00
Evan Cheng
b067a1e7e6
Add support to use pextrw and pinsrw to extract and insert a word element
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from a 128-bit vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27304 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 19:22:53 +00:00
Evan Cheng
7d9061e300
Make sure all possible shuffles are matched.
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Use pshufd, pshuhw, and pshulw to shuffle v4f32 if shufps doesn't match.
Use shufps to shuffle v4f32 if pshufd, pshuhw, and pshulw don't match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27259 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 19:54:57 +00:00
Evan Cheng
1b32f22b0f
More logical ops patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27257 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 07:33:32 +00:00
Evan Cheng
0876aa5178
Add support for _mm_cmp{cc}_ss and _mm_cmp{cc}_ps intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27256 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 06:21:22 +00:00
Evan Cheng
c5fb2b14ca
Add 128-bit pmovmskb intrinsic support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27255 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-30 00:33:26 +00:00
Evan Cheng
591f740a40
Change SSE pack operation definitions to fit what the intrinsics expected.
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For example, packsswb actually creates a v16i8 from a pair of v8i16. But since
the intrinsic specification forces the output type to match the operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27254 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 23:53:14 +00:00
Evan Cheng
506d3dfa90
- Added some SSE2 128-bit packed integer ops.
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- Added SSE2 128-bit integer pack with signed saturation ops.
- Added pshufhw and pshuflw ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27252 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 23:07:14 +00:00
Evan Cheng
691c923e47
Need to special case splat after all. Make the second operand of splat
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vector_shuffle undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27250 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 19:02:40 +00:00
Evan Cheng
5aa97b200b
Floating point logical operation patterns should match bit_convert. Or else
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integer vector logical operations would match andp{s|d} instead of pand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27248 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 18:47:40 +00:00
Evan Cheng
475aecf467
- More shuffle related bug fixes.
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- Whenever possible use ops of the right packed types for vector shuffles /
splats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27246 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 03:04:49 +00:00
Evan Cheng
4f5633883b
- Only use pshufd for v4i32 vector shuffles.
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- Other shuffle related fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-29 01:30:51 +00:00
Evan Cheng
c46349de29
Added aliases to scalar SSE instructions, e.g. addss, to match x86 intrinsics.
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The source operands type are v4sf with upper bits passes through.
Added matching code for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27240 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 23:51:43 +00:00
Evan Cheng
9bbfd4f68c
movlps and movlpd should be modeled as two address code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27221 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 07:01:28 +00:00
Evan Cheng
be296ac5ca
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27219 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 06:53:49 +00:00
Evan Cheng
2064a2b47e
* Prefer using operation of matching types. e.g unpcklpd rather than movlhps.
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* Bug fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27218 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 06:50:32 +00:00
Evan Cheng
4fcb922c70
- Clean up / consoladate various shuffle masks.
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- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27210 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 02:43:26 +00:00
Evan Cheng
0038e59803
Model unpack lower and interleave as vector_shuffle so we can lower the
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intrinsics as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27200 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 00:39:58 +00:00
Chris Lattner
749b758b2e
unbreak the build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-27 16:52:45 +00:00
Evan Cheng
a0b3afbe14
Use pcmpeq to generate vector of all ones.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27167 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-27 07:00:16 +00:00
Evan Cheng
ffea91e522
Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes / cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27150 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-26 09:53:12 +00:00
Evan Cheng
c60bd97b94
Build arbitrary vector with more than 2 distinct scalar elements with a
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series of unpack and interleave ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27119 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-25 09:37:23 +00:00
Evan Cheng
ecac9cb959
Added SSE cachebility ops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-25 06:03:26 +00:00
Evan Cheng
7b1d34bc6c
Added 128-bit packed integer subtraction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-25 01:33:37 +00:00
Evan Cheng
7dda4052f5
Added CVTSS2SI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27094 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-25 01:00:18 +00:00
Evan Cheng
bc4832bc64
Support for scalar to vector with zero extension.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 23:15:12 +00:00
Evan Cheng
c653d48022
Added LDMXCSR
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27087 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 22:28:37 +00:00
Chris Lattner
ac53eadc29
plug the intrinsics into the patterns for movmsk*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27083 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 21:49:18 +00:00
Evan Cheng
386031a06f
Handle BUILD_VECTOR with all zero elements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27056 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 07:29:27 +00:00
Evan Cheng
2c0dbd01d2
More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27040 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 02:58:06 +00:00
Evan Cheng
14aed5e66b
Handle more shuffle cases with SHUFP* instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 01:18:28 +00:00
Evan Cheng
24dc1f5975
Following icc's lead: use movdqa to load / store 128-bit integer vectors
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23 07:44:07 +00:00
Evan Cheng
3b047f7bfa
Add v4i32 <-> v4f32 bitconvert patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26969 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23 02:36:37 +00:00
Evan Cheng
a971f6f967
Add 128-bit integer vector load and add (for testing).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26967 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23 01:57:24 +00:00
Evan Cheng
0cea6d2b9c
SHUFP* are two address code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26959 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 20:08:18 +00:00
Evan Cheng
1bffadd7fb
- Supposely movlhps is faster / better than unpcklpd.
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- Don't forget pshufd is only available with sse2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26956 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 19:16:21 +00:00
Evan Cheng
0188ecba85
- Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support
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splat and PSHUFD cases.
- Clean up shuffle / splat matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26954 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 18:59:22 +00:00
Evan Cheng
63d3300da1
- VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches
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PSHUFD. We can make permutes entries which point to the undef pointing
anything we want.
- Change some names to appease Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26951 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 08:01:21 +00:00
Evan Cheng
2da953f77a
Fix PSHUF* and SHUF* jit code emission problems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26949 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 07:10:28 +00:00
Evan Cheng
b9df0ca67b
Some splat and shuffle support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26940 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 02:53:00 +00:00
Evan Cheng
48090aa814
- Use movaps to store 128-bit vector integers.
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- Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 23:01:21 +00:00
Evan Cheng
82521dd838
- Remove scalar to vector pseudo ops. They are just wrong.
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- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS
and MOVAPD. Mark them as move instructions and *hope* they will be deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26919 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 07:09:35 +00:00
Evan Cheng
811ec1c92a
x86 ISD::SCALAR_TO_VECTOR support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26911 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 00:33:35 +00:00
Evan Cheng
ba753c61b7
Move a few things around.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26893 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20 06:04:52 +00:00
Evan Cheng
c12e6c488e
Vector undef's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26870 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-19 09:38:54 +00:00
Evan Cheng
2246f8449f
Use the generic vector register classes VR64 / VR128 rather than V4F32,
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V8I16, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26838 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-18 01:23:20 +00:00
Evan Cheng
06a8aa14b3
Move some pattern fragments to the right files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26831 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-17 19:55:52 +00:00
Evan Cheng
470a6adc78
Added MMX, SSE1, and SSE2 vector instructions and some simple patterns.
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Fixed some existing bugs (wrong predicates, prefixes) at the same time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 02:26:30 +00:00
Evan Cheng
4e4c71e423
One more round of reorg so sabre doesn't freak out. :-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26303 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 20:00:20 +00:00
Evan Cheng
beb07e117d
A big more cleaning up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26302 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 19:30:30 +00:00