Evan Cheng
5b3332cc27
Make sure not to break eh_return.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39978 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-17 18:40:47 +00:00
Evan Cheng
698b63862c
Update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39977 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-17 18:39:45 +00:00
Evan Cheng
f27795d174
Missed the case where alloca is used but the stack size (not including callee-saved portion) is zero. Thanks Dan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39974 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-17 18:03:34 +00:00
Evan Cheng
89d1659cf2
Use push / pop for prologues and epilogues.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39967 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-17 07:59:08 +00:00
Chris Lattner
c3dbe70ce7
no email addrs in file headers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-17 05:56:43 +00:00
Dan Gohman
07a96765da
Fix comments about vectors to use the current wording.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39921 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-16 14:29:03 +00:00
Anton Korobeynikov
2365f51ed0
Long live the exception handling!
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This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-14 14:06:15 +00:00
Evan Cheng
03494d7c8f
Fix for PR1540: Specify F0, F1 are sub-registers of D0, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39843 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-13 23:55:50 +00:00
Dale Johannesen
e7e7d0d7e3
Skeleton of post-RA scheduler; doesn't do anything yet.
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Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39816 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-13 17:13:54 +00:00
Chris Lattner
8dc4b59b85
Fix CodeGen/Generic/print-arith-fp.ll on sparc (PR1551)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39813 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-13 16:24:10 +00:00
Dale Johannesen
66a2a8f878
ARM: make branch folder remove unconditional branches
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following jump tables that it earlier inserted. This
would be OK on other targets but is needed for correctness
only on ARM (constant islands needs to find jump tables).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39782 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-12 16:45:35 +00:00
Chris Lattner
ca23e17adf
another missed SSE optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39772 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-12 06:31:38 +00:00
Bruno Cardoso Lopes
a4e8200366
Added support for Mips specific GAS directives
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Fixed print immediate
Fixed Identation on MipsISelDAGToDAG.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39764 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 23:24:41 +00:00
Bruno Cardoso Lopes
7b155fbd60
Added support for framepointer
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Prologue/Epilogue support fp,ra save/restore and use the stack frame the right
way!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39763 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 23:21:31 +00:00
Bruno Cardoso Lopes
758dcca57a
Now that stack is represented the right way, LOA starts at 0
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39761 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 23:17:41 +00:00
Bruno Cardoso Lopes
2ab22d1b93
Fixed AddLiveOut issues
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FI's created the write way to represent Mips stack
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39760 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 23:16:16 +00:00
Bruno Cardoso Lopes
332a3d22a2
Removed unused immediate PatLeaf, fixed lui instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39759 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 22:47:02 +00:00
Bruno Cardoso Lopes
4215a59a76
Added MipsMachineFunction class, to hold Mips dinamic stack info when inserting Prologue/Epilog
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 22:44:21 +00:00
Lauro Ramos Venancio
a126bb71d5
Handle packed structs in the CBackend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39752 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 19:56:53 +00:00
Dale Johannesen
5d9c4b6020
Fix hang compiling TimberWolf (allow for islands
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of size other than 4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39743 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 18:32:38 +00:00
Lauro Ramos Venancio
75ce010f7b
Assert when TLS is not implemented.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39737 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 17:19:51 +00:00
Chris Lattner
082ced9391
Fix an oversight: for modules with no other identifying target info,
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the sparc backend should be preferred when running on sparcs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39142 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 16:32:10 +00:00
Evan Cheng
8202010364
Didn't mean the last commit. Revert.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38515 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 22:00:16 +00:00
Dale Johannesen
afdc7fda65
Fix fp_constant_op failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38514 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 21:53:30 +00:00
Evan Cheng
c608ff22e7
Update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38513 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 21:49:47 +00:00
Dale Johannesen
bf6b8272b1
fix 80 columnn violations, increasing the world's
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pedantic satisfaction level.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38512 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 20:53:41 +00:00
Chris Lattner
36c5155d0f
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38507 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 20:03:50 +00:00
Evan Cheng
13ab020ea0
Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38501 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 18:08:01 +00:00
Evan Cheng
2bf821c4bf
Remove clobbersPred.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38500 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 18:07:08 +00:00
Dan Gohman
2038252c6a
Define non-intrinsic instructions for vector min, max, sqrt, rsqrt, and rcp,
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in addition to the intrinsic forms. Add spill-folding entries for these new
instructions, and for the scalar min and max instrinsic instructions which
were missing. And add some preliminary ISelLowering code for using the new
non-intrinsic vector sqrt instruction, and fneg and fabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38478 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-10 00:05:58 +00:00
Dan Gohman
532dc2e1f2
Change getCopyToParts and getCopyFromParts to always use target-endian
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register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38471 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-09 20:59:04 +00:00
Chris Lattner
87bdba6d6a
The various "getModuleMatchQuality" implementations should return
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zero if they see a target triple they don't understand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38463 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-09 17:25:29 +00:00
Evan Cheng
9ad6f03166
No need for ccop anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37965 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 23:34:09 +00:00
Evan Cheng
4b9cb7d135
Incorrect check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 23:23:19 +00:00
Evan Cheng
06aae67b83
Do away with ImmutablePredicateOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37961 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 23:22:46 +00:00
Evan Cheng
14c4655403
isUnpredicatedTerminator should treat conditional branches as unpredicated terminator.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 23:22:03 +00:00
Evan Cheng
49ce02e408
Do away with ImmutablePredicateOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37959 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 23:21:02 +00:00
Rafael Espindola
1aa7efbd2c
Add the byval attribute
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37940 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 10:57:03 +00:00
Evan Cheng
dfb2ebac29
Print the s bit if the instruction is toggled to its CPSR setting form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37932 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 01:01:34 +00:00
Evan Cheng
04c813d00c
PredicateDefOperand -> OptionalDefOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37931 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 01:00:49 +00:00
Evan Cheng
e496d78f16
Add OptionalDefOperand to stand for optionally defined result.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37930 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-06 01:00:16 +00:00
Evan Cheng
148b6a419f
Initial ARM JIT support by Raul Fernandes Herbster.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37926 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 21:15:40 +00:00
Anton Korobeynikov
4304bcc1ed
Proper flag __alloca call
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37923 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 20:36:08 +00:00
Evan Cheng
c48072fed5
Doh
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37917 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 17:21:33 +00:00
Evan Cheng
1f6d77b54a
Unbreak the build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37915 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 17:13:56 +00:00
Evan Cheng
d54874a06d
Unbreak the build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37914 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 17:13:19 +00:00
Gabor Greif
a99be51bf5
Here is the bulk of the sanitizing.
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Almost all occurrences of "bytecode" in the sources have been eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37913 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 17:07:56 +00:00
Chris Lattner
461d79c2ee
the arm backend is not building, temporarily disable it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37911 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 16:11:52 +00:00
Evan Cheng
0e1d37904a
Reflects the chanegs made to PredicateOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37898 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:18:20 +00:00
Evan Cheng
16b6598325
Added ARM::CPSR to represent ARM CPSR status register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37897 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:17:13 +00:00
Evan Cheng
ee568cf794
Unfortunately we now require C++ code to isel Bcc, conditional moves, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37896 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:15:27 +00:00
Evan Cheng
c85e832eb7
Each ARM use predicate operand is now made up of two components. The new component is the CPSR register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37895 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:13:32 +00:00
Evan Cheng
3b5b8368f3
Added ARM::CPSR to represent ARM CPSR status register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37894 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:11:03 +00:00
Evan Cheng
7e36966de4
PPC conditional branch predicate does not change after isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37893 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:09:50 +00:00
Evan Cheng
2aa133ef72
- Added zero_reg def to stand for register 0.
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- Added two variants of PredicateOperand: ImmutablePredicateOperand, whose predicate does not change after isel; PredicateDefOperand, which represent a predicate defintion operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37892 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:09:09 +00:00
Evan Cheng
0e4a276c72
Do not check isPredicated() on non-predicable instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37891 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-05 07:06:46 +00:00
Dale Johannesen
e377d4d142
Refactor X87 instructions. As a side effect, all
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their names are changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37876 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-04 21:07:47 +00:00
Bill Wendling
10404c47d1
Support generation of GR64 to MMX code in the JIT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37866 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-04 01:29:22 +00:00
Bill Wendling
93888428d4
Allow a GR64 to be moved into an MMX register via the "movd" instruction.
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Still need to have JIT generate this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-04 00:19:54 +00:00
Dale Johannesen
411d9c5467
Some spacing fixes. Cosmetic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37853 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-03 17:07:33 +00:00
Dale Johannesen
849f214a4e
Fix for PR 1505 (and 1489). Rewrite X87 register
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model to include f32 variants. Some factoring
improvments forthcoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37847 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-03 00:53:03 +00:00
Dan Gohman
1866f6ec7b
Vector results may be returned in XMM0 and XMM1, not just XMM0. With
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the recent lowering changes, this allows types like <4 x double> to
be returned, using two vector registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37844 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-02 16:21:53 +00:00
John Criswell
e644ef7b09
Convert .cvsignore files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37801 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-29 16:35:07 +00:00
Evan Cheng
2bda17c922
Prevent PPC::BCC first operand, the PRED number, from being isel'd into a LI instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37790 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-29 01:25:06 +00:00
Evan Cheng
a72cb0ea09
No vector fneg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37786 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-29 00:18:15 +00:00
Evan Cheng
0db5862cb8
Type of vector extract / insert index operand should be iPTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37784 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-29 00:01:20 +00:00
Bill Wendling
1a636de33b
Set implied features based upon the CPU's feature list.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37768 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 23:34:06 +00:00
Dan Gohman
6445f61806
Remove a redundant newline in the asm output for ELF .rodata sections.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37756 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 15:09:47 +00:00
Evan Cheng
e2446c6076
Silence a warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37737 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 18:31:22 +00:00
Dan Gohman
d45eddd214
Revert the earlier change that removed the M_REMATERIALIZABLE machine
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instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 00:48:07 +00:00
Dan Gohman
7f32156bb9
Generalize MVT::ValueType and associated functions to be able to represent
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extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.
This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 16:23:39 +00:00
Dan Gohman
32791e06d8
Make minor adjustments to whitespace and comments to reduce differences
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between SSE1 instructions and their respective SSE2 analogues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37718 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 15:44:19 +00:00
Dan Gohman
01976307d2
Fix loadv2i32 to be loadv4i32, though it isn't actually used anywhere yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37717 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 15:19:03 +00:00
Dan Gohman
8bc49c2fe7
Say AT&T instead of Intel in the comments for AT&T support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37716 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 15:11:25 +00:00
Owen Anderson
0819a9d386
Fix the build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37705 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 16:59:54 +00:00
Dan Gohman
ea859be53c
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
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TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 14:59:07 +00:00
Dale Johannesen
5411835165
Quote complex names for Darwin X86 and ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37700 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 00:54:56 +00:00
Evan Cheng
97e604e7d8
Be more conservative of duplicating blocks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37669 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 23:55:02 +00:00
Evan Cheng
277f0741c5
Allow predicated immediate ARM to ARM calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37659 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 21:05:09 +00:00
Dan Gohman
b5bec2b6f6
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
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for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 14:13:56 +00:00
Chris Lattner
3ee774091b
describe an argument, hide it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37650 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 05:46:06 +00:00
Dan Gohman
82a87a0172
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
...
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 01:48:05 +00:00
Evan Cheng
eaa91b0a1f
Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37643 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 01:26:51 +00:00
Chris Lattner
52387be1e0
If a function is vararg, never pass inreg arguments in registers. Thanks to
...
Anton for half of this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37641 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 00:13:10 +00:00
Evan Cheng
49892af264
Look for VECTOR_SHUFFLE that's identity operation on either LHS or RHS. This can happen before DAGCombiner catches it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37636 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 00:02:56 +00:00
Dan Gohman
638c96d391
Define the pushq instruction for x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37625 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-18 14:12:56 +00:00
Bill Wendling
a9e64f6f2d
Revert patch. It regresses:
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define double @test2(i64 %A) {
%B = bitcast i64 %A to double
ret double %B
}
$ llvm-as < t.ll | llc -march=x86-64
before:
.align 4
.globl _test2
_test2:
movd %rdi, %xmm0
ret
after:
_test2:
subq $8, %rsp
movq %rdi, (%rsp)
movsd (%rsp), %xmm0
addq $8, %rsp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37617 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-16 23:57:15 +00:00
Bill Wendling
e81369f2a5
Fix a failure to bit_convert from integer GPR to MMX register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37611 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-16 06:17:31 +00:00
Evan Cheng
d42e56e166
Instructions with unique labels or embedded jumptables cannot be duplicated during ifcvt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37606 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 21:15:00 +00:00
Dan Gohman
51eaa86758
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 22:58:02 +00:00
Dale Johannesen
318093b6f8
Do not treat FP_REG_KILL as terminator in branch analysis (X86).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37578 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 22:03:45 +00:00
Dan Gohman
c101e95cb6
Add a target hook to allow loads from constant pools to be rematerialized, and an
...
implementation for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37576 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 20:50:44 +00:00
Dan Gohman
af67ea7318
Eliminate some redundant newlines in asm output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37574 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 15:00:27 +00:00
Christopher Lamb
a321125e8b
Add support to tablegen for specifying subregister classes on a per register class basis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37572 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13 22:20:15 +00:00
Dale Johannesen
13e8b51e3e
Handle blocks with 2 unconditional branches in AnalyzeBranch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37571 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13 17:59:52 +00:00
Chris Lattner
fdbe720416
fix x86-64 mmx calling convention for real, which passes in integer gprs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37534 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-09 05:08:10 +00:00
Chris Lattner
6b7c21cc30
fix mmx handling bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37533 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-09 05:01:50 +00:00
Evan Cheng
bfd2ec4a8e
Add a utility routine to check for unpredicated terminator instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37528 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 21:59:56 +00:00
Lauro Ramos Venancio
61718a6285
Define AsmTransCBE for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37527 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 21:06:23 +00:00
Evan Cheng
1fc7cb695c
Fix ARM condition code subsumission check.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37517 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 09:14:47 +00:00
Evan Cheng
f81dea45b5
tBcc is not a barrier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37516 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 09:13:23 +00:00
Evan Cheng
9328c1ac66
Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compilation warning? I blame it on the FE folks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37484 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-07 01:37:54 +00:00
Evan Cheng
2c614c5c69
Mark these instructions clobbersPred. They modify the condition code register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37468 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-06 10:17:05 +00:00
Evan Cheng
c1d7384cb0
Added clobbersPred.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37466 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-06 10:15:28 +00:00
Bruno Cardoso Lopes
972f5896e4
Initial Mips support, here we go! =)
...
- Modifications from the last patch included
(issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37461 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-06 07:42:06 +00:00
Evan Cheng
5e148a37d3
Print predicate of the second instruction of the two-piece constant MI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37437 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-05 18:55:18 +00:00
Evan Cheng
341dcccb4e
PIC label asm printing cosmetic changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37434 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-05 07:36:38 +00:00
Evan Cheng
111354ff99
Misuse of hasExternalLinkage(), should be checking isDeclaration().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37419 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-04 18:54:57 +00:00
Chris Lattner
c621ae7bba
update this entry, now that Anton implemented shift/and lowering for
...
switches. There is one really easy isel thing here with tst we are not
getting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37400 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-02 18:45:14 +00:00
Evan Cheng
c354334ac4
Opcode modifier s comes after condition code. e.g. addlts, not addslt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37388 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 20:51:29 +00:00
Evan Cheng
144fd1ff0f
Set ARM ifcvt duplication limit to 3 for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37385 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 08:28:59 +00:00
Evan Cheng
df4da14948
Make jumptable non-predicable for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37381 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 00:56:15 +00:00
Chris Lattner
3a4205367d
Fix the asmprinter so that a globalvalue can specify an explicit alignment
...
smaller than the preferred alignment, but so that the target can actually
specify a minimum alignment if needed. This fixes some objc protocol
failures Devang tracked down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37373 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-31 18:57:45 +00:00
Evan Cheng
c6f2f6fbb9
For VFP2 fldm, fstm instructions, the condition code is printed after the address mode and size specifier. e.g. fstmiaseq, not fstmeqias.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37351 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 23:34:19 +00:00
Evan Cheng
fd488edb1d
For ldrb, strh, etc., the condition code is before the width specifier. e.g. streqh, not strheq.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37349 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 23:32:06 +00:00
Evan Cheng
62ccdbf0b3
Add missing const qualifiers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37342 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 18:42:18 +00:00
Evan Cheng
f277ee4be7
Add missing const qualifiers.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37341 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 18:35:22 +00:00
Nicolas Geoffray
2fb813d70b
Implementation of compilation callback in PPC ELF32
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37340 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 16:33:18 +00:00
Dan Gohman
237898ac1f
Add explicit qualification for namespace MVT members.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37320 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-24 14:33:05 +00:00
Evan Cheng
69d555611a
Hooks for predication support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37308 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-23 07:22:05 +00:00
Evan Cheng
d90733035d
Rename a parameter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37307 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-23 07:21:11 +00:00
Dale Johannesen
e6e435498c
name change requested by review of previous patch
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37289 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-22 18:31:04 +00:00
Dale Johannesen
81da02b553
Make tail merging the default, except on powerPC. There was no prior art
...
for a target-dependent default with a command-line override; this way
should be generally usable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37285 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-22 17:14:46 +00:00
Bill Wendling
cd6cea0823
We only need to specify the most-implied feature for an architecture.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37275 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-22 05:15:37 +00:00
Evan Cheng
94679e66bb
Fix some -march=thumb regressions. tBR_JTr is not predicable.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37272 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21 23:17:32 +00:00
Dale Johannesen
f23b8cf239
Use AXI3 not AXI2 for appropriate PIC PC-relative loads and stores. Cosmetic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37271 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21 22:42:04 +00:00
Dale Johannesen
86d4069666
Add some patterns for PIC PC-relative loads and stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37269 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21 22:14:33 +00:00
Evan Cheng
5a18ebc70c
BlockHasNoFallThrough() now returns true if block ends with a return instruction; AnalyzeBranch() should ignore predicated instructionsd.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37268 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21 18:56:31 +00:00
Evan Cheng
126f17a176
BlockHasNoFallThrough() now returns true if block ends with a return instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37266 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-21 18:44:17 +00:00
Dan Gohman
f5135be3fc
Apply this patch:
...
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37240 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 23:21:46 +00:00
Chris Lattner
60c7a136f3
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37239 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 20:18:14 +00:00
Dan Gohman
fa0f77d9b7
Use MVT::FIRST_VECTOR_VALUETYPE and MVT::LAST_VECTOR_VALUETYPE.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37234 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 18:44:07 +00:00
Evan Cheng
dcc50a4aee
Mark calls non-predicable for now. Need to ensure it's the last instruction in the if-converted block or make sure it preserve condition code.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37199 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 01:53:54 +00:00
Evan Cheng
e5e7ce458a
Silence some compilation warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37197 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 01:19:57 +00:00
Evan Cheng
9f8cbd147c
Set ARM if-conversion block size threshold to 10 instructions for now.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37194 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 00:19:34 +00:00
Evan Cheng
6ae3626a4f
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37193 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 00:18:17 +00:00
Evan Cheng
b5cdaa257e
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 00:05:48 +00:00
Dale Johannesen
8dd86c14d4
More effective breakdown of memcpy into repeated load/store. These are now
...
in the order lod;lod;lod;sto;sto;sto which means the load-store optimizer
has a better chance of producing ldm/stm. Ideally you would get cooperation
from the RA as well but this is not there yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37179 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 21:31:21 +00:00
Evan Cheng
213d2cf94f
Fix a bogus check that prevented folding VECTOR_SHUFFLE to UNDEF; add an optimization to fold VECTOR_SHUFFLE to a zero vector.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37173 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 18:45:50 +00:00
Evan Cheng
174f803395
Added missing patterns for UNPCKH* and PUNPCKH*.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37172 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 18:44:37 +00:00
Chris Lattner
07c70cd866
This is the correct fix for PR1427. This fixes mmx-shuffle.ll and doesn't
...
cause other regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37160 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 17:13:13 +00:00
Anton Korobeynikov
f840202953
Revert patch for PR1427. It breaks almost all vector tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37159 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 07:50:14 +00:00
Chris Lattner
ccde4cb8ab
add support for 128-bit add/sub on ppc64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37158 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 06:52:46 +00:00
Chris Lattner
a066810681
add support for 128-bit integer add/sub
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37154 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 06:35:11 +00:00
Chris Lattner
da66472ea6
Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37141 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 03:29:42 +00:00
Evan Cheng
d9e9efb253
Remove. Not needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37139 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-17 00:11:35 +00:00
Evan Cheng
e425956b72
Default implementation of TargetInstrInfo::getBlockSize().
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37138 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 23:53:44 +00:00
Evan Cheng
3f8602cf20
ARM::tB is also predicable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 21:53:43 +00:00
Evan Cheng
02c602b333
PredicateInstruction returns true if the operation was successful.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37124 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 21:53:07 +00:00
Evan Cheng
2eb80fa433
Add default implementation of PredicateInstruction().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 21:20:37 +00:00
Evan Cheng
75604f81b7
Move if-conversion after all passes that may use register scavenger.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37120 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 20:52:46 +00:00
Evan Cheng
b5f8eff566
Removed isPredicable().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37119 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 20:50:23 +00:00
Evan Cheng
5ada199246
Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operand so they are not predicable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 20:50:01 +00:00
Evan Cheng
064d7cdd3c
Added isPredicable bit to class Instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37117 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 20:47:01 +00:00
Evan Cheng
aeafca0a25
Conditional branch is not a barrier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37103 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 07:45:54 +00:00
Chris Lattner
738a6ec0ae
implement the missing maskmovq mmx intrinsic that akor hit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37100 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 06:08:17 +00:00
Evan Cheng
2706f9771d
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37098 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 05:14:06 +00:00
Evan Cheng
9307292ae2
Hooks for predication support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37093 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 02:01:49 +00:00
Chris Lattner
9f5d5783ec
fix some subtle inline asm selection issues
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37067 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-15 01:31:05 +00:00
Evan Cheng
44bec52b1b
Add PredicateOperand to all ARM instructions that have the condition field.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37066 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-15 01:29:07 +00:00
Chris Lattner
709fd414e2
fix subtle bugs in inline asm operand selection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37065 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-15 01:28:08 +00:00
Lauro Ramos Venancio
5d3d44a848
Fix previous patch. GOTOFF can be used only when the symbol has internal
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linkage or hidden visibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37055 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-14 23:20:21 +00:00
Lauro Ramos Venancio
930d161ba2
Optimize PIC implementation. GOTOFF can be used when the symbol is defined
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and used in the same module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37044 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-14 18:46:23 +00:00
Lauro Ramos Venancio
69642f11ed
Enable aliases on arm-linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37042 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-14 18:32:56 +00:00
Chris Lattner
40c1b66d88
Fix PR1413
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37023 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-13 22:19:27 +00:00
Anton Korobeynikov
0ff3ca4f92
More DWARF-related things cleanup:
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1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37015 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-12 22:36:25 +00:00
Chris Lattner
0f1621bb4c
add some notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36965 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-10 00:08:04 +00:00
Evan Cheng
42d712b306
Switch BCC, MOVCCr, etc. to PredicateOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36948 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-08 21:08:43 +00:00
Evan Cheng
f88b3a5698
PredicateOperand can be used as a normal operand for isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36947 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-08 21:06:08 +00:00
Evan Cheng
43182ac0d6
R0 is a sub-register of X0, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36939 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-08 17:03:51 +00:00
Lauro Ramos Venancio
356e72c4f1
Fix PR1390 in a better way.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36916 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-07 23:15:16 +00:00
Evan Cheng
c4e600362e
This is no longer needed after enabling the DAG combiner xform.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36909 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-07 21:29:41 +00:00
Chris Lattner
31c2ec3afb
add this back
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36892 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-06 20:31:17 +00:00
Anton Korobeynikov
f13090c436
Update MSIL BE. This patch fixes most weird glitches outlined in
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README.txt. Patch by Roman Samoilov!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36890 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-06 20:13:33 +00:00
Bill Wendling
11d8fdaf6a
3DNowA implies 3DNow. 64-bit implies SSE1, SSE2, and I assume MMX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36860 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-06 07:56:19 +00:00
Nate Begeman
9a22530696
Reference correct header
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36834 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-06 04:00:55 +00:00
Lauro Ramos Venancio
8f57667a5d
Fix PR1390.
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Don't spill extra register to align the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36814 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 23:44:41 +00:00
Chris Lattner
f110a2bdb6
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36811 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 22:44:08 +00:00
Chris Lattner
5e14b0d3e6
the mason example is implemented. Move some examples out of llvm/test,
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upgrade the syntax of some other examples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36806 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 22:29:06 +00:00
Chris Lattner
0d75f57f75
implement anyextend from i1 -> i64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36802 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 22:17:00 +00:00
Chris Lattner
0258011bb9
move CodeGen/X86/overlap-add.ll here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36799 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 22:10:24 +00:00
Anton Korobeynikov
2a07e2f4df
Emit sections/directives in the proper order. This fixes PR1376. Also,
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some small cleanup was made.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36780 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-05 09:04:50 +00:00
Lauro Ramos Venancio
a8e9562906
Add a processor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36765 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-04 22:16:30 +00:00
Bill Wendling
4222d806fa
Add an "implies" field to features. This indicates that, if the current
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feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36756 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-04 20:38:40 +00:00
Evan Cheng
97c9bb5cc6
On Mac OS X, GV requires an extra load only when relocation-model is non-static.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36718 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-04 00:26:58 +00:00
Evan Cheng
bdc9869dbf
Should never see an indexed load / store with zero offset.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36714 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 23:30:36 +00:00
Dale Johannesen
4ac075c859
Evan's patch to avoid FPreg->intreg copy for cvt; store to mem
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36693 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 20:54:42 +00:00
Lauro Ramos Venancio
e8e5495474
Debug support for arm-linux.
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Patch by Raul Herbster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36690 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 20:28:35 +00:00
Dan Gohman
9570165ef0
Indent the .text, .data, and .bss directives in assembly output, so that
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they are consistent with the other directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36687 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 18:46:30 +00:00
Chris Lattner
dc43a88b81
Fix two classes of bugs:
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1. x86 backend rejected (&gv+c) for the 'i' constraint when in static mode.
2. the matcher didn't correctly reject and accept some global addresses.
the right predicate is GVRequiresExtraLoad, not "relomodel = pic".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36670 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 16:52:29 +00:00
Chris Lattner
388488d604
add support for printing offset from global
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36669 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 16:42:23 +00:00
Chris Lattner
5f696035e5
revert accidental commit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36668 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 16:40:25 +00:00
Chris Lattner
4105a9fec0
add support for printing offset of global
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36667 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 16:39:48 +00:00
Dan Gohman
6f858e250b
Sets the section names for fixed-size constants and use the mergeable
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flag for ELF on x86 so that duplicate constants can be eliminated by
the linker. This matches what GCC does with its -fmerge-constants
option, which is enabled at most -O levels.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36666 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 16:38:57 +00:00
Chris Lattner
72623366c4
revert reid's patch to fix these failures:
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test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll for PR1099 [DEJAGNU]
Applications/SPASS/SPASS [CBE]
Regression/C/2004-03-15-IndirectGoto [CBE]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36664 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 02:57:13 +00:00
Evan Cheng
0b0a9a90a4
Typo. It's checking if V is multiple of 4, not multiple of 3. :-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36663 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 02:00:18 +00:00
Devang Patel
1997473cf7
Drop 'const'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36662 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 01:11:54 +00:00
Chris Lattner
72939126d4
match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36660 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 00:32:00 +00:00
Chris Lattner
a7ad3d1ed3
expose HonorSignDependentRoundingFPMathOption to .td files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36658 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 00:27:11 +00:00
Chris Lattner
aa4f1e164b
Add a new option.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36657 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-03 00:16:07 +00:00
Bill Wendling
ddd35321fb
Non-algorithmic change. Moved definitions around into separate sections
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for SSE1, SSE2, SSE3, and SSSE3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 23:11:52 +00:00
Bill Wendling
4b693b01fb
Update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36653 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 21:42:20 +00:00
Devang Patel
3e15bf33e0
Use 'static const char' instead of 'static const int'.
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36652 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 21:39:20 +00:00
Lauro Ramos Venancio
c718288f49
Fix build error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36648 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 20:37:47 +00:00
Anton Korobeynikov
ce3b46552a
Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux
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with non-llvm-compiled (e.g. "native") unwind runtime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36647 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 19:53:33 +00:00
Anton Korobeynikov
038082d966
Emit correct DWARF reg # for RA (return address) register
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36646 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 08:46:03 +00:00
Reid Spencer
cee7ba389e
Make sign extension work correctly for unusual bit widths.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36635 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 02:17:41 +00:00
Dale Johannesen
67cf561b7f
Add some support for (Darwin) code-generating directives in getInlineAsmLength.
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Support is incomplete, but more accurate than gcc's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36634 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-02 01:02:40 +00:00
Anton Korobeynikov
79dda2b048
Fix couple of bugs connected with eh info:
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1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36633 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 22:23:12 +00:00
Devang Patel
794fd75c67
Do not use typeinfo to identify pass in pass manager.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 21:15:47 +00:00
Evan Cheng
1b20168433
Doh. PC displacement is between the constantpool and the add instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36630 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 20:27:19 +00:00
Anton Korobeynikov
edb4a6bd76
Use correct PC symbol
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36628 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 10:19:31 +00:00
Anton Korobeynikov
71144d8428
Adjust correct EH-related sections
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36627 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 10:16:06 +00:00
Evan Cheng
97de913821
eliminateFrameIndex() change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36626 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 09:13:03 +00:00
Nate Begeman
7bf1c272ab
llvm bug #1350 , parts 1, 2, and 3.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36618 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 05:57:02 +00:00
Evan Cheng
5c3885ce8e
Under normal circumstances, when a frame pointer is not required, we reserve
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argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36607 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-01 00:52:08 +00:00
Dale Johannesen
9118dbc7bd
Remove item: thumb padding in constant islands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36586 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 00:32:06 +00:00
Dale Johannesen
23c968478e
remove unused variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36585 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 00:30:48 +00:00
Lauro Ramos Venancio
0a1817392d
Enable protected visibility on ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36583 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-30 00:23:51 +00:00
Dale Johannesen
8593e41855
Rewrite of Thumb constant islands handling (exact allowance for padding
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around islands and jump tables).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36573 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 19:19:30 +00:00
Dale Johannesen
8650199fbb
Make ARM-specific version of getInlineAsmLength
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36572 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 19:17:45 +00:00
Anton Korobeynikov
6f9896fcc8
Implement protected visibility. This partly implements PR1363. Linker
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should be taught to deal with protected symbols.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36565 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-29 18:35:00 +00:00
Dale Johannesen
caa8055cf5
change per review
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36519 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 00:36:37 +00:00
Dale Johannesen
25c1f9e125
Prevent Thumb code from generating ARM instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36518 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 22:17:18 +00:00
Lauro Ramos Venancio
4c6d20a096
add parenthesis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36514 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 20:10:08 +00:00
Evan Cheng
185ea1e2aa
Doh. ARM::LEApcrel is a single instruction MI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36513 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 18:27:13 +00:00
Lauro Ramos Venancio
fdc9692f97
In Thumb mode, the frame register must be R7.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36512 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 17:58:03 +00:00
Lauro Ramos Venancio
64f4fa5e0e
ARM TLS: implement "general dynamic", "initial exec" and "local exec" models.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36506 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 13:54:47 +00:00
Evan Cheng
b1df8f2750
Darwin runtime library does not have these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36505 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 08:15:43 +00:00
Evan Cheng
768c9f725b
Special handling of LEApcrel and tLEApcrel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36504 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 08:14:15 +00:00
Evan Cheng
eec041a037
Back out previous check-in. Incorrect.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36503 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 07:50:02 +00:00
Evan Cheng
33fdc983fd
tLEApcrel is a AddrModeTs, i.e. pc relative.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36502 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-27 07:37:22 +00:00
Dan Gohman
2a3250cd23
Fix PR1339 and CodeGen/X86/dollar-name.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36495 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 21:07:05 +00:00
Bill Wendling
bff35d11f1
Have MMX registers clobbered in x86-64 too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36494 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 21:06:48 +00:00
Evan Cheng
faa510726f
Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36483 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 19:00:32 +00:00
Evan Cheng
a24ddddf68
Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36456 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-26 01:09:28 +00:00
Evan Cheng
6c087e5585
Match MachineFunction::UsedPhysRegs changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 22:13:27 +00:00
Bill Wendling
3f3a17dd62
Add SSSE3 as a feature of Core2. Add MMX registers to the list of registers
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clobbered by a call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36448 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 21:31:48 +00:00
Chris Lattner
7c6eefa5f1
do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292
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when promoted to 64-bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36442 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 17:23:53 +00:00
Lauro Ramos Venancio
305b8a5f62
remember to emit weak reference in one more case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36438 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 14:50:40 +00:00
Anton Korobeynikov
8b0a8c84da
Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part
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will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36435 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 14:27:10 +00:00
Evan Cheng
1e341729dd
Relex assertions to account for additional implicit def / use operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36430 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 07:12:14 +00:00
Chris Lattner
ea84c5ee95
support for >4G stack frames
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36425 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 04:30:24 +00:00
Chris Lattner
618078016d
support >4G stack frames
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36423 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 04:25:10 +00:00
Chris Lattner
6c2d260161
Fix PR1351 and CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36410 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 22:51:03 +00:00
Bill Wendling
a2c38ae90d
Update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36407 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:20:03 +00:00
Bill Wendling
b53e98eb30
Add the PADDQ to the list.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36406 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:19:14 +00:00
Bill Wendling
69dc5332de
Add the final MMX instructions. Correct a few wrong patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36405 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:18:37 +00:00
Bill Wendling
6dd29e08f7
Remove some invalid instructions from this check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36404 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:17:46 +00:00
Bill Wendling
2f9bb1a0a4
Support for the special case of a vector with the canonical form:
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vector_shuffle v1, v2, <2, 6, 3, 7>
I.e.
vector_shuffle v, undef, <2, 2, 3, 3>
MMX only has a shuffle for v4i16 vectors. It needs to use the unpackh for
this type of operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36403 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-24 21:16:55 +00:00