Bill Wendling
ae595dc9da
Moved this option to the front-end.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56901 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-01 01:02:18 +00:00
Dan Gohman
70695fee51
Use explicit target-triples to unbreak this test on non-darwin systems.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56896 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-01 00:25:38 +00:00
Bill Wendling
6e08738d4b
Just don't transform this memset into "bzero" if no-builtin is specified.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56888 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30 22:05:33 +00:00
Bill Wendling
fd8ca5a0ef
- Initialize "--no-builtin" to "false".
...
- Testcase for r56885.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56886 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30 21:40:30 +00:00
Evan Cheng
dc37786595
Re-apply 56835 along with header file changes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56848 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30 15:44:16 +00:00
Duncan Sands
46292be362
Revert commit 56835 since it breaks the build.
...
"If a re-materializable instruction has a register
operand, the spiller will change the register operand's
spill weight to HUGE_VAL to avoid it being spilled.
However, if the operand is already in the queue ready
to be spilled, avoid re-materializing it".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56837 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30 10:00:30 +00:00
Evan Cheng
d41474d2c0
If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56835 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30 06:36:58 +00:00
Evan Cheng
d47e0b664f
Fix PR2835. Do not change the width of a volatile load.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56792 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-29 17:26:18 +00:00
Evan Cheng
184793fc8a
Re-apply 56683 with fixes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-27 01:56:22 +00:00
Devang Patel
2c9c3e7368
Implement function notes as function attributes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56716 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 23:51:19 +00:00
Evan Cheng
b7a75a5a54
Implement "punpckldq %xmm0, $xmm0" as "pshufd $0x50, %xmm0, %xmm" unless optimizing for code size.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56711 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 23:41:32 +00:00
Bill Wendling
d5d8191b20
Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
...
/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 22:10:44 +00:00
Evan Cheng
36a55023c1
Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 19:48:35 +00:00
Evan Cheng
a67f32abb5
Avoid spilling EBP / RBP twice in the prologue.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56675 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 19:14:21 +00:00
Evan Cheng
4dcc8a373d
Prefer movlhps over punpcklqdq, etc. in more cases.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56627 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 23:35:16 +00:00
Evan Cheng
0b457f0c3a
With sse3 and when the source is a load or has multiple uses, favors movddup over shuffp*, pshufd, etc. Without sse3 or when the source is from a register, make use of movlhps
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56620 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 20:50:48 +00:00
Dale Johannesen
c9c6da61ac
Accept 'inreg' attribute on x86 functions as
...
meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0). Update documentation
to reflect reality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56619 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-25 20:47:45 +00:00
Evan Cheng
ca57f78332
Fix patterns for SSE4.1 move and sign extend instructions. Also add instructions which fold VZEXT_MOVL and VZEXT_LOAD.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56594 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 23:27:55 +00:00
Dale Johannesen
8e3455ba17
Remove SelectionDag early allocation of registers
...
for earlyclobbers. Teach Local RA about earlyclobber,
and add some tests for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56592 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 23:13:09 +00:00
Evan Cheng
da43bcf624
Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 00:05:32 +00:00
Evan Cheng
364091e090
Support x86 specific inline asm modifier 'J'.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22 23:57:37 +00:00
Arnold Schwaighofer
290ae0398e
Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56436 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22 14:50:07 +00:00
Evan Cheng
5e8d9def77
Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56381 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-20 01:28:05 +00:00
Evan Cheng
4070e60efe
Clean up the test.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-20 01:26:27 +00:00
Evan Cheng
91a23c8233
No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56378 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-20 00:13:45 +00:00
Dan Gohman
2ff7fd1461
Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
...
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56371 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 22:16:54 +00:00
Evan Cheng
20580a1cf6
Re-materalized definition instructions may be dead. Whack them.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56352 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19 17:38:47 +00:00
Dale Johannesen
91aac1015e
Add a bit to mark operands of asm's that conflict
...
with an earlyclobber operand elsewhere. Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way
that conflicts with an earlyclobber. See also comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 21:13:11 +00:00
Evan Cheng
870e4bef41
Unallocatable registers do not have live intervals.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56287 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 18:36:25 +00:00
Bill Wendling
7795932d41
Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"
...
function with appropriate parameters. This allows us to support blocks on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56267 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 00:30:57 +00:00
Dan Gohman
ad7321f58a
Teach LSR to optimize away SMAX operations for tripcounts in common
...
cases. See the comment above OptimizeSMax for the full story, and
the testcase for an example. This cancels out a pessimization
commonly attributed to indvars, and will allow us to lift some of
the artificial throttles in indvars, rather than add new ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56230 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15 21:22:06 +00:00
Dan Gohman
5eb0cecbc5
Re-enable SelectionDAG CSE for calls. It matters in the case of
...
libcalls, as in this testcase on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56226 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15 19:46:03 +00:00
Bruno Cardoso Lopes
f19063b33f
Added testcase for bswap allegrexel intrinsic
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56225 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15 19:38:11 +00:00
Evan Cheng
25f34a30d6
Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56199 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15 06:28:41 +00:00
Evan Cheng
ee9e1b0a85
On some targets, non-move instructions can become move instructions because of coalescing. e.g.
...
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1 // after coalescing vr0 with vr1
Update the value# of the destination register with the copy instruction if that happens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56165 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 18:13:14 +00:00
Arnold Schwaighofer
363f53f3ec
Add indirect tail call (function pointer) examples.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56127 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 22:24:28 +00:00
Arnold Schwaighofer
1fdc40f062
When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56119 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 20:28:43 +00:00
Evan Cheng
8db866808c
Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g.
...
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56118 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 20:07:10 +00:00
Evan Cheng
4086906a0f
Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56112 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 18:40:32 +00:00
Evan Cheng
d9c553f262
Propagate subreg index when promoting a load to a copy.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56085 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 01:02:12 +00:00
Evan Cheng
b188dd9c5b
Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56061 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 18:25:29 +00:00
Evan Cheng
4b88702ac3
Legalizer was missing code that expand fpow to a libcall.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56028 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 23:02:14 +00:00
Evan Cheng
5530216989
Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 20:22:01 +00:00
Evan Cheng
59fbc80f6b
Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55975 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 01:26:59 +00:00
Anton Korobeynikov
369bbbb421
Reapply 55902: Add test for checking proper lowering of eh_return & unwind init intrinsics on 32bit x86 targets
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55960 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 21:14:36 +00:00
Anton Korobeynikov
b9fb005246
Reapply 55903: Testcase for 64-bit lowering of eh_return & unwind_init
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55959 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 21:14:19 +00:00
Dan Gohman
36d81baa37
Add a target triple; apparently LLVM doesn't use 64-bit
...
data directives on darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55941 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 20:16:18 +00:00
Bill Wendling
fdddcc0575
Remove these testcases associated with changes between r 55898 and r 55909.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55931 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 18:00:39 +00:00
Bill Wendling
a425e0073d
Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin:
...
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 17:59:12 +00:00
Evan Cheng
debdea0a66
Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55925 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 17:15:42 +00:00
Dan Gohman
82f94f1ad9
Add AsmPrinter support for i128 and larger static initializer data.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55919 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 16:40:13 +00:00
Anton Korobeynikov
e665c0789e
Testcase for 64-bit lowering of eh_return & unwind_init
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55903 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 14:23:16 +00:00
Anton Korobeynikov
a8268a77df
Add test for checking proper lowering of eh_return & unwind init intrinsics on 32bit x86 targets
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55902 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 14:22:57 +00:00
Rafael Espindola
1db6a2bac8
Add testcase from bug 2770.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55897 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 11:17:54 +00:00
Evan Cheng
98d2d07d41
Correctly handle physical register inputs. They are not explicit input operands in the resulting machine instrs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 08:39:33 +00:00
Evan Cheng
10a8d9c737
Handle x86 truncate to i8 with target hook for now.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55877 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-07 08:47:42 +00:00
Eli Friedman
d0c0fae63b
Fix for PR2687: Add patterns to match sint_to_fp and fp_to_sint for <2 x
...
i32>. This is a little messy, but it works.
We should really get rid of the intrinsics, though, since they map
perfectly well to standard LLVM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55864 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 23:07:03 +00:00
Evan Cheng
7f132122c8
Fix test.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55849 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 20:04:37 +00:00
Evan Cheng
e2471a9169
If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55840 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 17:24:07 +00:00
Evan Cheng
4a03775777
For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55807 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 22:59:58 +00:00
Owen Anderson
79924eb6f5
Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55777 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 16:48:33 +00:00
Owen Anderson
a3971dfbfe
Add a first attempt at implementing stores for X86 fast isel using target hooks.
...
Dan or Evan, please review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55764 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 07:08:58 +00:00
Evan Cheng
373d50af1d
Load from GV stub should be locally CSE'd.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55763 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 06:18:33 +00:00
Evan Cheng
c2feb5c262
Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55756 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 01:04:15 +00:00
Evan Cheng
8b19e56051
Add X86 target hook to implement load (even from GlobalAddress).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55693 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 06:44:39 +00:00
Duncan Sands
14a093ac4c
Turn this legalize types test on.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55605 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 12:00:55 +00:00
Bill Wendling
9440e35b98
Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR
...
instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55582 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:59:23 +00:00
Bill Wendling
70fcb6bf58
CellSPU doesn't appear to support fully the "ISD::ROTR" operation. The DAG
...
combiner can now generate ROTR if the backend says that it can handle it. Cell
SPU says this, but gets an error from code gen saying that it can't select
ROTR. I'm xfailing this test until this can be fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55579 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:32:12 +00:00
Evan Cheng
cd04708f59
Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55564 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 09:09:33 +00:00
Evan Cheng
eb9f89287e
Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 02:03:58 +00:00
Dale Johannesen
c4db7276e0
Testcases for ppc atomics.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55556 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 00:54:31 +00:00
Evan Cheng
456704476f
Swap fp comparison operands and change predicate to allow load folding (safely this time).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:22:12 +00:00
Evan Cheng
50ead9099d
xfail this.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55550 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 22:59:13 +00:00
Chris Lattner
33e4e610b5
allow this to pass.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55540 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:18:26 +00:00
Evan Cheng
4d46d0af58
Swap fp comparison operands and change predicate to allow load folding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:48:31 +00:00
Mon P Wang
5ad0bf658a
In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55499 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:04:05 +00:00
Dan Gohman
a3f8b7a4ce
Optimize DAGCombiner's worklist processing. Previously it started
...
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.
This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55498 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:01:56 +00:00
Dan Gohman
f641395435
Revert r55467; it causes regressions in UnitTests/Vector/divides,
...
Benchmarks/sim/sim, and others on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55475 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 17:22:54 +00:00
Evan Cheng
9242cb8b82
If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55467 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 07:53:51 +00:00
Dale Johannesen
f2c785edf0
This test crashes on non-x86 host; make SSE explicit.
...
Feel free to fix a better way!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55456 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 01:51:09 +00:00
Dan Gohman
10df0fa73e
Basic FastISel support for floating-point constants.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55401 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 01:09:54 +00:00
Chris Lattner
6ba50a9252
If an xmm register is referenced explicitly in an inline asm, make sure to
...
assign it to a version of the xmm register with the regclass that matches its
type. This fixes PR2715, a bug handling some crazy xpcom case in mozilla.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 06:19:02 +00:00
Evan Cheng
ab6c3bb44d
Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55338 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 21:27:18 +00:00
Owen Anderson
6d0c25ec3a
Add support for fast isel of (integer) immediate materialization pattens, and use them to support
...
bitcast of constants in fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55325 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 20:20:32 +00:00
Dale Johannesen
8bb2ef4760
Adjust grep's for new code sequence.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55320 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 18:53:58 +00:00
Evan Cheng
e7321441ac
Fix asm printing of MOVSDto64mr and MOV64toSDrm.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55300 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 04:11:42 +00:00
Bill Wendling
3574c2d849
Fix this test. Don't null out the file, just XFAIL it until patch can be fixed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55296 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-24 21:48:46 +00:00
Bill Wendling
59b63e4a18
Temporarily reverting r55292. It's causing a bootstraping failure:
...
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55295 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-24 21:45:30 +00:00
Evan Cheng
32c727cd95
Move callseq_start above the call address load to allow load to be folded into the call node.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55292 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-24 19:19:55 +00:00
Anton Korobeynikov
8ff7ce3dd2
Testcase for 64bit maskmovq
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55239 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 15:53:47 +00:00
Dale Johannesen
169b5ed46e
Test all currently supported atomic builtins on x86-{32,64}.
...
These just test that they go through the BE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55208 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 22:39:21 +00:00
Dan Gohman
22bb31103d
Factor out the predicate check code from DAGISelEmitter.cpp
...
and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 00:20:26 +00:00
Bill Wendling
403483c200
Testcase for PR2585.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55151 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 23:04:49 +00:00
Dan Gohman
c67670b1ae
Add -mattr=sse2 so this test doesn't fail on non-x86 hosts.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55145 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 22:34:25 +00:00
Dale Johannesen
e2122a5e2e
Make x86 and sse2 explicit for non-x86 hosts.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55141 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 21:26:06 +00:00
Evan Cheng
1887c1c2f9
Fix a number of byval / memcpy / memset related codegen issues.
...
1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying.
2. Do not use byte repeat move and store operations. These are slow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 21:00:15 +00:00
Dan Gohman
5cc101ec89
getelementptr doesn't work on x86-64 yet, because it
...
has MOV64ri32 and no plain MOV64ri.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55126 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 17:28:42 +00:00
Dan Gohman
7a0e6593d0
MVT::getMVT uses iPTR for pointer types, while we need the actual
...
intptr_t type in this case. FastISel can now select simple
getelementptr instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55125 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 17:25:26 +00:00
Dan Gohman
d5fe57d2f9
Basic fast-isel support for instructions with constant int operands.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55099 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 01:41:07 +00:00
Dan Gohman
5c6aea9714
Add a -march line for this test, and run it on x86-64 too for fun.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55030 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:56:07 +00:00
Dan Gohman
8014e86580
Add FastISel support for floating-point operations.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55021 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:23:20 +00:00
Dan Gohman
bdedd44773
Add FastISel support for several more binary operators.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55020 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:11:48 +00:00
Bill Wendling
108ecf3975
Add support for the __sync_sub_and_fetch atomics and friends for X86. The code
...
was already present, but not hooked up to anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55018 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 23:09:18 +00:00
Dan Gohman
d3aedf445c
Fast-isel is now *minimally* functional. Add a testcase to
...
demonstrate the extent of its capabilities. Note that it
only attempts to operate on one of the blocks in this
testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55016 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 22:37:59 +00:00
Dale Johannesen
140be2dfb7
Add support for 8 and 16 bit forms of __sync
...
builtins on X86.
Change "lock" instructions to be on a separate line.
This is needed to work around a bug in the Darwin
assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54999 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 18:47:28 +00:00
Evan Cheng
0ac3fc2a61
Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54903 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 19:22:34 +00:00
Dan Gohman
7f8613e5b8
Improve support for vector casts in LLVM IR and CodeGen.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54784 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 20:04:46 +00:00
Dan Gohman
6ab6422f25
Allow SelectionDAG to create EXTRACT_VECTOR_ELT nodes with
...
non-constant indices. Only a few of the peephole checks require
a constant index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54764 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-13 21:51:37 +00:00
Dan Gohman
00f19b6542
Improve the grep commands for this test to be tolerant of ABI
...
differences, and to be more specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54648 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-11 20:10:41 +00:00
Dan Gohman
8cea8ff34c
Take the FrameOffset into account when computing the alignment
...
of stack objects. This fixes PR2656.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54646 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-11 18:27:03 +00:00
Dan Gohman
d9ced09299
Add an EXTRACTPSmr pattern to match the pattern that
...
X86ISelLowering creates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54544 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:30:21 +00:00
Evan Cheng
711b6dce24
It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54519 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 06:56:16 +00:00
Nick Lewycky
d6227385fc
Don't crash printing the asm for a ConstantExpr PtrToInt just because the int
...
is narrower than the pointer. This testcase emits:
.byte (((17) - 16) & 255)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54517 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 06:34:07 +00:00
Bruno Cardoso Lopes
65ad452536
Support added for ctlz intrinsic, test case added.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54516 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 06:16:31 +00:00
Bruno Cardoso Lopes
ab243df91f
[Last] Batch 7 of Mips CodeGen tests
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54512 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:12:42 +00:00
Bruno Cardoso Lopes
4230586091
Batch 6 of Mips CodeGen tests
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54511 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:11:30 +00:00
Bruno Cardoso Lopes
0b4e136c74
Batch 5 of Mips CodeGen tests
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54510 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:09:57 +00:00
Bruno Cardoso Lopes
29b4ff7c73
Batch 4 of Mips CodeGen tests
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54509 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:08:30 +00:00
Bruno Cardoso Lopes
ba3442fc24
Batch 3 of Mips CodeGen tests
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:05:51 +00:00
Bruno Cardoso Lopes
e5813b7aa8
Batch 2 of Mips CodeGen tests
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54507 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:03:25 +00:00
Bruno Cardoso Lopes
6d523c0fe3
Batch 1 of Mips CodeGen tests, more coming...
...
I had a lot of simple local codegen tests and they are now ready to be placed
in test/CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54506 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 03:58:34 +00:00
Anton Korobeynikov
feac94b18d
Print section flags ok on platforms, which use '@' as comment string. Fix test.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:55:06 +00:00
Dan Gohman
e3d920699c
Re-enable elimination of unnecessary SUBREG_TO_REG instructions in
...
LowerSubregs, and fix an x86-64 isel bug that this exposed.
SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54444 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 02:54:50 +00:00
Dan Gohman
865db4566e
Add an extra example that shouldn't get an and instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54443 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 02:23:06 +00:00
Dan Gohman
8a1510d192
Re-introduce the 8-bit subreg zext-inreg patterns for x86-32,
...
this time using MOV32to32_ and MOV16to16_. Thanks to Evan for
suggesting this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54418 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-06 18:27:21 +00:00
Evan Cheng
e9d5035838
Fix PR2620: Fix X86cmppd selection code so it expects operands to be v2f64.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54376 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 22:19:15 +00:00
Evan Cheng
e3b8a48d32
Fix PR2596: out of bound reference.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54375 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 21:51:46 +00:00
Owen Anderson
b6634e9e27
Update the remaining tests not to use -disable-correct-folding, and remove two
...
that couldn't be updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 18:19:14 +00:00
Owen Anderson
551ddf718c
One more -disable-correct-folding case removed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 18:08:56 +00:00
Owen Anderson
2a1f07ea6a
Remove another -disable-correct-folding use.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54357 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 18:05:58 +00:00
Owen Anderson
d6db225800
Eliminate another use of -disable-correct-folding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54356 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 18:03:01 +00:00
Owen Anderson
287b7b7ed7
This check is unnecessary, and getting rid of it removes a use of -disable-correct-folding.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54355 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 17:52:54 +00:00
Owen Anderson
3888aa0b7d
Remove the need for -disable-correct-folding from this test.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54354 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 17:49:52 +00:00
Evan Cheng
068b4ff553
Fix PR2568: Fix bug that cause redudant kill marker after its live interval has been extended due to coalescing.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54346 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 07:10:38 +00:00
Owen Anderson
2b85dc3544
Update these tests to work by disabling the new correct CFG generation. This flag should ONLY be used to for tests like these.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54334 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 23:55:29 +00:00
Dan Gohman
6f498b0a8e
Fix SDISel lowering of PHI nodes to use ComputeValueVTs.
...
This allows it to work correctly on aggregate values.
This fixes PR2623.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54331 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 23:42:46 +00:00
Dan Gohman
1f565bcff6
Fix SDISel lowering of zeroinitializer and undef to use ComputeValueVTs.
...
This allows it to work correctly on nested aggregate values.
This fixes PR2625.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54330 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 23:30:41 +00:00
Dale Johannesen
3b4c45203e
Make sse2 explicit, for non-x86 hosts.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54251 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-31 20:16:33 +00:00
Dan Gohman
75dcf08243
Improve dagcombining for sext-loads and sext-in-reg nodes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54239 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-31 00:50:31 +00:00
Dan Gohman
90d33ee746
Don't look for leaf values to store when lowering stores of
...
empty structs. This fixes PR2612.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54226 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 18:36:51 +00:00
Dan Gohman
1053502486
I missed this file in r54223. movzbl is now used instead
...
of movzbw here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54224 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 18:23:34 +00:00
Dan Gohman
11ba3b1af6
Reapply r54147 with a constraint to only use the 8-bit
...
subreg form on x86-64, to avoid the problem with x86-32
having GPRs that don't have 8-bit subregs.
Also, change several 16-bit instructions to use
equivalent 32-bit instructions. These have a smaller
encoding and avoid partial-register updates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54223 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 18:09:17 +00:00
Mon P Wang
e3b3a7241c
Added support for overloading intrinsics (atomics) based on pointers
...
to different address spaces. This alters the naming scheme for those
intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54195 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 04:36:53 +00:00
Duncan Sands
68d4d1d49c
Fix PR2609. If a label is deleted, then it needs
...
to be marked invalid regardless of whether it is
a debug, an exception handling or (hopefully) a
GC label.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54172 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-29 20:56:02 +00:00
Dan Gohman
7ba145b0b4
Revert 54147.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54148 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-29 01:02:18 +00:00
Dan Gohman
b1e8cad61e
Add x86 isel patterns to match what would be a ZERO_EXTEND_INREG operation,
...
which is represented in codegen as an 'and' operation. This matches them
with movz instructions, instead of leaving them to be matched by and
instructions with an immediate field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54147 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-28 22:18:25 +00:00
Dan Gohman
6c4942641f
Fix embedded CRLF characters.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54125 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27 18:37:58 +00:00
Nate Begeman
907f46a81f
Fix test RUN line
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54040 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 19:08:59 +00:00
Nate Begeman
fb8ead0c20
Disable mov{L, LP, HP, HLP, *DUP} shuffles for mmx
...
mmx needs its own fancy shuffle logic based on unpack; for now we get correct but awful code.
Also commit Mon Ping's VSETCC patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54039 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 19:05:58 +00:00
Dan Gohman
1f335e3139
This test needs -aggressive-remat enabled.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54015 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 15:25:32 +00:00
Evan Cheng
d1b3da621b
Teach ARM isLegalAddressingMode to handle unknown type without crashing. This fixes pr2589.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54004 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 00:55:17 +00:00
Dan Gohman
6d69ba8a69
Enable rematerialization of constants using AliasAnalysis::pointsToConstantMemory,
...
and knowledge of PseudoSourceValues. This unfortunately isn't sufficient to allow
constants to be rematerialized in PIC mode -- the extra indirection is a
complication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54000 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 00:02:30 +00:00
Dan Gohman
5444c30723
Add target triples so these tests behave as expected on non-darwin hosts.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53991 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-24 18:08:01 +00:00
Evan Cheng
982a05955a
Fix a catastrophic PPC64 ABI bug: i32 operands which are passed in memory (all of the parameter registers are used) are loaded from sp offsets that were off by 4.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53979 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-24 08:17:07 +00:00
Evan Cheng
2d58bfac59
New test case.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53971 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-24 00:22:05 +00:00
Evan Cheng
5e6ebaf4d1
Fix PR2485: do all 4-element SSE shuffles in max. of 2 shuffle instructions.
...
Based on patch by Nicolas Capens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53939 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-23 00:22:17 +00:00
Duncan Sands
11e56cb4dc
LegalizeTypes support for VSETCC. Fixes PR2575.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53938 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 23:54:03 +00:00
Evan Cheng
2925786765
Fix pr2566: incorrect assumption about bit_convert. It doesn't not have to output a vector value. Patch by Nicolas Capens!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53932 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 20:42:56 +00:00
Evan Cheng
52672b813e
Fix PR2574: implement v2f32 scalar_to_vector.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53927 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 18:39:19 +00:00
Bill Wendling
3180e20cda
Fix for first part of PR2562. Generate the "pinsrw" instruction for inserts
...
into v4i16 vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53807 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-20 02:32:23 +00:00
Anton Korobeynikov
33500e5882
Testcase for PR2549
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53785 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-19 06:31:12 +00:00
Duncan Sands
c3e26727c1
Softfloat support for FDIV. Patch by
...
Richard Pennington.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53773 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-18 21:18:48 +00:00
Dan Gohman
5a11abaf2c
In the CBackend, use casts to force integer add, subtract, and
...
multiply to be done as unsigned, so that they have well defined
behavior on overflow. This fixes PR2408.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53767 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-18 18:43:12 +00:00
Evan Cheng
76a4d58998
Subreg live interval valno may not have a corresponding def machineinstr since it's less precise.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 19:48:53 +00:00
Evan Cheng
d1718252b5
Add nounwind.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53733 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 19:48:04 +00:00
Dan Gohman
e8be6c6391
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
...
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 19:10:17 +00:00
Duncan Sands
79ada108dd
LegalizeTypes support for what seems to be the
...
only missing ppc long double operations: FNEG
and FP_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53723 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 17:35:14 +00:00
Duncan Sands
f00e74f4d6
Turn LegalizeTypes back off again for the moment:
...
it is breaking Darwin bootstrap due to missing
functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53721 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 17:06:03 +00:00
Duncan Sands
95db39a9de
Add support for promoting and expanding AssertZext
...
and AssertSext. Needed when passing huge integer
parameters with the zeroext or signext attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53684 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 16:03:07 +00:00
Duncan Sands
836b3e63bd
Test passing of integer parameters for integers
...
of all sizes from i1 to i256. The code is not
always that great, for example (x86)
movw %di, %ax
movw %ax, i17_s
where the store could be directly from %di.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 13:37:36 +00:00
Duncan Sands
8b5e62f0db
Test codegen of loads and stores of all integer
...
sizes from i1 to i256. The generated code is
like one huge bug report of things that the DAG
combiner fails to simplify!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53676 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 13:10:20 +00:00
Duncan Sands
7f1d8aeef6
Turn on LegalizeTypes by default.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53671 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 11:36:51 +00:00
Duncan Sands
17991c3234
The atomic.cmp.swap promotion logic is wrong: it
...
simply does the atomic.cmp.swap on the larger type,
which means it blows away whatever is sitting in
the bytes just after the memory location, i.e.
causes a buffer overflow. This really requires
target specific code, which is why LegalizeTypes
doesn't try to handle this case generically. The
existing (wrong) code in LegalizeDAG will go away
automatically once the type legalization code is
removed from LegalizeDAG so I'm leaving it there
for the moment. Meanwhile, don't test for this
feature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53669 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 08:09:48 +00:00
Duncan Sands
295a7cddbd
LegalizeTypes support for fabs on ppc long double.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53613 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 15:02:44 +00:00
Duncan Sands
c07e6e53f7
LegalizeTypes support for promotion of bswap.
...
In LegalizeDAG the value is zero-extended to
the new type before byte swapping. It doesn't
matter how the extension is done since the new
bits are shifted off anyway after the swap, so
extend by any old rubbish bits. This results
in the final assembler for the testcase being
one line shorter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 10:18:22 +00:00
Duncan Sands
8d56a6f4d8
LegalizeTypes support for promotion of SIGN_EXTEND_INREG.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53603 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15 10:14:24 +00:00
Evan Cheng
79a796c2b1
Fix PR2536: a nasty spiller bug. If a two-address instruction uses a register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g.
...
8 %reg1024<def> = IMPLICIT_DEF
12 %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2
The live range [12, 14) are not part of the r1024 live interval since it's defined by an implicit def. It will not conflicts with live interval of r1025. Now suppose both registers are spilled, you can easily see a situation where both registers are reloaded before the INSERT_SUBREG and both target registers that would overlap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53503 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-12 01:56:02 +00:00
Duncan Sands
edfba7e707
Port a shift-by-1 optimization from LegalizeDAG: it
...
was presumably added after the rest of the code was
copied to LegalizeTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53459 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 16:54:57 +00:00
Bill Wendling
71ca353ae6
The frame address on an x86-64 box needs to be offset by -8, not -4.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53450 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 07:18:52 +00:00
Bill Wendling
bbcec684e3
Put CPPBackend tests into their own directory and run them only if they're
...
supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53427 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10 22:35:32 +00:00
Chris Lattner
85e7ac0353
Fix an altivec constant miscompilation that Duncan found through
...
his work on legalizetypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53410 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10 16:33:38 +00:00
Evan Cheng
331e2bd942
Fix for PR2472. Use movss to set lower 32-bits of a zero XMM vector.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53386 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10 01:08:23 +00:00
Anton Korobeynikov
091be59220
Testcase for PR2024
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53327 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-09 14:09:41 +00:00
Dan Gohman
95d110920e
Refactor the tablegen DAGISelEmitter code for outputing calls to
...
getTargetNode and SelectNodeTo to reduce duplication, and to
make some of the getTargetNode code available to SelectNodeTo.
Use SelectNodeTo instead of getTargetNode in several new
interesting cases, as it mutates nodes in place instead of
creating new ones.
This triggers some scheduling behavior differences due to nodes
being presented to the scheduler in a different order. Some of the
arbitrary scheduling decisions it makes are now arbitrarily made
differently. This is visible in CodeGen/PowerPC/LargeAbsoluteAddr.ll,
where a trivial scheduling difference led to a trivial register
allocation difference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53203 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-07 21:00:17 +00:00
Evan Cheng
1ce75dcbbc
Fix two serious LSR bugs.
...
1. LSR runOnLoop is always returning false regardless if any transformation is made.
2. AddUsersIfInteresting can create new instructions that are added to DeadInsts. But there is a later early exit which prevents them from being freed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53193 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-07 19:51:32 +00:00
Dale Johannesen
ecdc82a643
Considering predecessors of exit blocks gets
...
us a little more tail merging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52986 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 21:50:49 +00:00
Chris Lattner
80c1a5622a
Implement split and scalarize for SELECT_CC, fixing PR2504
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52887 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 02:43:01 +00:00
Chris Lattner
bd2acd736d
test doesn't need eh info
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52811 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-27 03:14:20 +00:00
Dale Johannesen
4e97790682
Allow for rounding up of stack frame.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52751 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-26 01:55:32 +00:00
Chris Lattner
cda8875433
when we know the signbit of an input to uint_to_fp is zero,
...
change it to sint_to_fp on targets where that is cheaper (and
visaversa of course). This allows us to compile uint_to_fp to:
_test:
movl 4(%esp), %eax
shrl $23, %eax
cvtsi2ss %eax, %xmm0
movl 8(%esp), %eax
movss %xmm0, (%eax)
ret
instead of:
.align 3
LCPI1_0: ## double
.long 0 ## double least significant word 4.5036e+15
.long 1127219200 ## double most significant word 4.5036e+15
.text
.align 4,0x90
.globl _test
_test:
subl $12, %esp
movl 16(%esp), %eax
shrl $23, %eax
movl %eax, (%esp)
movl $1127219200, 4(%esp)
movsd (%esp), %xmm0
subsd LCPI1_0, %xmm0
cvtsd2ss %xmm0, %xmm0
movl 20(%esp), %eax
movss %xmm0, (%eax)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52747 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-26 00:16:49 +00:00
Evan Cheng
ab26227c8c
- Fix a x86 vector isel bug: illegal transformation of a vector_shuffle into a
...
shift.
- Add a readme entry for a missing vector_shuffle optimization that results in
awful codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52740 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 20:52:59 +00:00
Mon P Wang
2887310630
Added MemOperands to Atomic operations since Atomics touches memory.
...
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 08:15:39 +00:00
Evan Cheng
601ca4b434
Enable two-address remat by default.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52701 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25 01:16:38 +00:00
Dale Johannesen
4a103e6d7e
v2f32 is now a valid (MMX) type which breaks this
...
test (doesn't work for any MMX vector types, it's
not me). Rewritten to use v2i16 which is generic
and going to stay that way; I think that preserves
the point of the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 22:03:36 +00:00
Evan Cheng
9ef4ca2e81
If it's determined safe, remat MOV32r0 (i.e. xor r, r) and others as it is instead of using the longer MOV32ri instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52670 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-24 07:10:51 +00:00
Bill Wendling
ebcba612b5
This situation can occur:
...
,------.
| |
| v
| t2 = phi ... t1 ...
| |
| v
| t1 = ...
| ... = ... t1 ...
| |
`------'
where there is a use in a PHI node that's a predecessor to the defining
block. We don't want to mark all predecessors as having the value "alive" in
this case. Also, the assert was too restrictive and didn't handle this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52655 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-23 23:41:14 +00:00
Bill Wendling
04eeefb32a
Make test work on non-x86 machines (like my G4 PPC).
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52619 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-23 06:16:31 +00:00
Duncan Sands
a1ace76c70
Support for load/store of expanded float types. I
...
don't know if a truncating store is possible here,
but added support for it anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52577 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 17:00:47 +00:00
Evan Cheng
c3417609ae
Undo spill weight tweak. Need to investigate the performance regressions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-21 06:45:54 +00:00
Evan Cheng
c8af52c898
ISD::UNDEF should be expanded recursively / iteratively.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-19 22:01:11 +00:00
Eli Friedman
2c8e64d3e4
Fix a bug with <8 x i16> shuffle lowering on X86 where parts of the
...
shuffle could be skipped. The check is invalid because the loop index i
doesn't correspond to the element actually inserted. The correct check is
already done a few lines earlier, for whether the element is already in
the right spot, so this shouldn't have any effect on the codegen for
code that was already correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52486 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-19 06:09:51 +00:00
Evan Cheng
0d46d753f9
New test case.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52483 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-19 01:50:24 +00:00
Evan Cheng
72d255aff9
This also got better (55 - 51 instructions). But doing one more re-materialization.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52482 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-19 01:50:13 +00:00
Evan Cheng
81d39e63e2
This got better.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52481 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-19 01:46:43 +00:00
Evan Cheng
c3de802ad9
Do not issue identity copies.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52373 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 22:52:53 +00:00
Evan Cheng
6bd9567a6a
- Add "Commutative" property to intrinsics. This allows tblgen to generate the commuted variants for dagisel matching code.
...
- Mark lots of X86 intrinsics as "Commutative" to allow load folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52353 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-16 20:29:38 +00:00
Evan Cheng
87bb991aa8
Teach the spiller to commute instructions in order to fold a reload. This hits 410 times on 444.namd and 122 times on 252.eon.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52266 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-13 23:58:02 +00:00
Duncan Sands
d4b9c17fb7
Disable some DAG combiner optimizations that may be
...
wrong for volatile loads and stores. In fact this
is almost all of them! There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access. These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used. Consider
loading an i32 but only using the lower 8 bits. It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes. It
is also unwise to make a load/store wider. For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects. (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware. (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several. For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores). In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic. My policy here is
to say that the number of processor operations for
an illegal operation is undefined. So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok. It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal! That is because
operations are marked legal by default, regardless of
whether the type is legal or not. In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation. However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal. So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before. This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52254 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-13 19:07:40 +00:00
Evan Cheng
933b5065e5
Fix some tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52245 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-12 21:23:38 +00:00
Matthijs Kooijman
d4646cd40f
Don't try to compile tests for the ev56 alpha subtarget, which hasn't been
...
supported since r33492.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52237 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-12 13:44:26 +00:00
Dale Johannesen
287abdb357
Fix parameter spelling: sse not sse1
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52185 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-10 17:57:58 +00:00
Matthijs Kooijman
5efb967052
Fix some more quoting issues in RUN lines, this time regarding unintended
...
variable expansions involving the $ character.
This fixes 4 tests that were not running properly before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52183 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-10 16:10:32 +00:00
Matthijs Kooijman
7f88d9c62b
Remove double pipes in RUN commandlines.
...
This fixes 5 testcases that were not being run properly before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52180 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-10 15:11:36 +00:00
Matthijs Kooijman
1cd8f11cc0
For all RUN lines starting with "not", redirect stderr to /dev/null so tests
...
don't fail when (expected) error output is produced. This fixes 17 tests.
While I was there, I also made all RUN lines of the form "not llvm-as..." a bit
more consistent, they now all redirect stderr and stdout to /dev/null and use
input redirect to read their input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52174 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-10 12:57:32 +00:00
Dan Gohman
c5b822b5b6
Convert several tests to use temporary files instead of redundantly
...
executing the test commands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52163 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-10 00:36:41 +00:00
Rafael Espindola
d674b4e87d
add support for PIC on linux x86-64
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09 09:52:31 +00:00
Anton Korobeynikov
7aa700e979
Remove invalid test
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52093 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 16:59:10 +00:00
Anton Korobeynikov
7aa8d44429
Testcase for PR2418
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52047 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 16:08:56 +00:00
Evan Cheng
fb4db316d8
Fix a memcpy lowering bug. Even though the memcpy alignment is smaller than the desired alignment, the frame destination alignment may still be larger than the desired alignment. Don't change its alignment to something smaller.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51970 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 23:37:54 +00:00
Chris Lattner
67f631dfd5
Rewrite a bunch of the CBE's inline asm code, giving it the
...
ability to handle indirect input operands. This fixes PR2407.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51952 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-04 18:03:28 +00:00
Scott Michel
8bf61e8c2a
Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
...
issue is operand promotion for setcc/select... but looks like the fundamental
stuff is implemented for CellSPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51884 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02 22:18:03 +00:00
Dan Gohman
193c235850
Implement CBE support for first-class structs and array values,
...
and insertvalue and extractvalue instructions.
First-class array values are not trivial because C doesn't
support them. The approach I took here is to wrap all arrays
in structs. Feedback is welcome.
The 2007-01-15-NamedArrayType.ll test needed to be modified
because it has a "not grep" for a string that now exists,
because array types now have associated struct types, and
those struct types have names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51881 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02 21:30:49 +00:00
Dan Gohman
37cdad3e59
Fix the position of MemOperands in nodes that use variadic_ops
...
in DAGISelEmitter output. This bug was recently uncovered by the
addition of patterns for CALL32m and CALL64m, which are nodes
that now have both MemOperands and variadic_ops.
This bug was especially visible with PIC in various configurations,
because the new patterns are matching the indirect call code used
in many PIC configurations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51877 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-02 17:40:38 +00:00
Chris Lattner
76931954f8
update this patch to handle an extraneous &1. This should be pulled
...
into the 2.3 release branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51824 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-31 19:50:53 +00:00
Chris Lattner
e56d946a38
Fix the CBE's handling of instructions whose result is an i1. Previously,
...
we did not truncate the value down to i1 with (x&1). This caused a problem
when the computation of x was nontrivial, for example, "add i1 1, 1" would
return 2 instead of 0.
This makes the testcase compile into:
...
llvm_cbe_t = (((llvm_cbe_r == 0u) + (llvm_cbe_r == 0u))&1);
llvm_cbe_u = (((unsigned int )(bool )llvm_cbe_t));
...
instead of:
...
llvm_cbe_t = ((llvm_cbe_r == 0u) + (llvm_cbe_r == 0u));
llvm_cbe_u = (((unsigned int )(bool )llvm_cbe_t));
...
This fixes a miscompilation of mediabench/adpcm/rawdaudio/rawdaudio and
403.gcc with the CBE, regressions from LLVM 2.2. Tanya, please pull
this into the release branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51813 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-31 09:23:55 +00:00
Dan Gohman
b4106170dd
Add patterns for CALL32m and CALL64m. They aren't matched in most
...
cases due to an isel deficiency already noted in
lib/Target/X86/README.txt, but they can be matched in this fold-call.ll
testcase, for example.
This is interesting mainly because it exposes a tricky tblgen bug;
tblgen was incorrectly computing the starting index for variable_ops
in the case of a complex pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51706 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 21:50:34 +00:00
Dan Gohman
21323f3a82
Expand small memmovs using inline code. Set the X86 threshold for expanding
...
memmove to a more plausible value, now that it's actually being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 19:42:22 +00:00
Evan Cheng
f26ffe987c
Implement vector shift up / down and insert zero with ps{rl}lq / ps{rl}ldq.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51667 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 08:22:04 +00:00
Evan Cheng
e65b9a48e3
Add nounwind.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51665 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-29 07:09:24 +00:00
Evan Cheng
d77d4f98fb
Fix PR2289: vr defined by multiple implicit_def as result of coalescing.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51648 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 17:40:10 +00:00
Evan Cheng
33d3d4ad40
Teach local register allocator to deal with landing pad MBB's.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51647 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-28 17:22:32 +00:00
Dan Gohman
caa98d3ab9
Specify a target so that this tests tests what it's intended to test.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51600 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-27 17:55:57 +00:00
Dan Gohman
95628cd44a
Make this test independent of the target-triple; the stack alignment
...
is specifically what this test depends on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51599 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-27 17:44:23 +00:00
Nick Lewycky
3978927dfa
The Linux ABI emits an extra "movl %esp, %ebp" in function prologue and
...
sometimes a "mov %ebp, %esp" in the epilogue.
Force these tests that rely on counting 'mov' to use i686-apple-darwin8.8.0
where they were written.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51568 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-26 20:18:56 +00:00
Evan Cheng
ef1ba3844d
New loadl_pd and loadh_pd tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51525 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-24 00:10:02 +00:00
Evan Cheng
cd0baf21a1
Use movlps / movhps to modify low / high half of 16-byet memory location.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51501 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 21:23:16 +00:00
Dan Gohman
0b924dcef8
Use PMULDQ for v2i64 multiplies when SSE4.1 is available. And add
...
load-folding table entries for PMULDQ and PMULLD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51489 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 17:49:40 +00:00
Evan Cheng
b1938263c7
Bug: rcpps can only folds a load if the address is 16-byte aligned. Fixed many 'ps' load folding patterns in X86InstrSSE.td which are missing the proper alignment checks.
...
Also fixed some 80 col. violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51462 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 00:37:07 +00:00
Evan Cheng
d86323efc9
Add a couple of test cases.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51441 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22 21:19:19 +00:00
Evan Cheng
c36c0ab44b
Add missing patterns.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51435 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22 18:56:56 +00:00
Chris Lattner
f6a048c3a8
Add support for multiple-return values in inline asm. This should
...
get inline asm working as well as it did previously with the CBE
with the new MRV support for inline asm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51420 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22 06:19:37 +00:00
Chris Lattner
9c287c2ab4
testcase for PR2267
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51408 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-22 04:45:22 +00:00
Evan Cheng
f4ea510371
Fix PR2343. An *interesting* coalescer bug.
...
BB1:
vr1025 = copy vr1024
..
BB2:
vr1024 = op
= op vr1025
<loop eventually branch back to BB1>
Even though vr1025 is copied from vr1024, it's not safe to coalesced them since live range of vr1025 intersects the def of vr1024. This happens when vr1025 is assigned the value of the previous iteration of vr1024 in the loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51394 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-21 22:34:12 +00:00
Gabor Greif
5edf210bdf
Eliminate questionable syntax for stdin redirection. This probably also speeds things up a bit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51357 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 22:07:21 +00:00
Gabor Greif
f6cadc440c
sabre brings to my attention that the 'tr' suffix is also obsolete
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51349 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 21:00:03 +00:00
Gabor Greif
722243bd40
Rename the last test with .llx extension to .ll, resolve duplicate test by renaming to isnan2. Now that no test has llx ending there is no need to search for them from dg.exp too.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51328 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 19:52:04 +00:00
Evan Cheng
7a0f1851ec
More local spiller complexity!
...
If local spiller optimization turns some instruction into an identity copy, it will be removed. If the output register happens to be dead (and source is obviously killed), transfer the kill / dead information to last use / def in the same MBB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51306 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 08:13:21 +00:00
Evan Cheng
b0a6f62c9b
Don't spill dead def.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51305 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 08:10:37 +00:00
Dan Gohman
ad2ef21c76
Run vortex-bug as x86-64, which is what the original bug was triggered on.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51289 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 00:54:39 +00:00
Dale Johannesen
e44b1bd3dc
Use common where we mean common, not weak.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51173 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16 00:52:30 +00:00