Rafael Espindola
d6379a993c
Reenable tail duplication of bb with just an unconditional jump, but
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don't remove blocks that have their address taken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133659 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-22 22:31:57 +00:00
Nick Lewycky
6d3a0e287b
Needs a triple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-22 19:42:14 +00:00
Nick Lewycky
5b7ac1402f
Emit trailing padding on constant vectors when TargetData says that the vector
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is larger than the sum of the elements (including per-element padding).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-22 18:55:03 +00:00
Justin Holewinski
6332fdef15
PTX: Add signed integer comparisons
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133599 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-22 02:09:50 +00:00
Justin Holewinski
a9c85f9ead
PTX: Add .address_size directive if PTX version >= 2.3
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Patch by Wei-Ren Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133589 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-22 00:43:56 +00:00
Devang Patel
f11bb7f80d
Test case for r133560.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133585 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-22 00:03:42 +00:00
Bob Wilson
38c892624b
Revert r133452: "Emit movq for 64-bit register to XMM register moves..."
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This is breaking compiler-rt and llvm-gcc builds on MacOSX when not using
the integrated assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133524 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21 17:35:13 +00:00
Anna Zaks
0ac56845d1
Add support for sadd.with.overflow and uadd.with.overflow intrinsics to the CBackend by emitting definitions for each intrinsic that occurs in the module.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21 17:18:15 +00:00
Evan Cheng
9568e5c3c3
Teach dag combine to match halfword byteswap patterns.
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1. (((x) & 0xFF00) >> 8) | (((x) & 0x00FF) << 8)
=> (bswap x) >> 16
2. ((x&0xff)<<8)|((x&0xff00)>>8)|((x&0xff000000)>>8)|((x&0x00ff0000)<<8))
=> (rotl (bswap x) 16)
This allows us to eliminate most of the def : Pat patterns for ARM rev16
revsh instructions. It catches many more cases for ARM and x86.
rdar://9609108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133503 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21 06:01:08 +00:00
Akira Hatanaka
21afc63ea7
Re-apply 132758 and 132768 which were speculatively reverted in 132777.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-21 00:40:49 +00:00
Justin Holewinski
c882df2560
PTX: Fix conversion between predicates and value types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-20 18:42:48 +00:00
Nick Lewycky
1bd15700a0
Emit movq for 64-bit register to XMM register moves, but continue to accept
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movd when assembling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133452 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-20 18:33:26 +00:00
Roman Divacky
8e9d6720c3
Don't apply on PPC64 the 32bit ADDIC optimizations as there's no overflow
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with 32bit values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-20 15:28:39 +00:00
Nadav Rotem
4720611025
Fix PromoteIntRes_TRUNCATE: Add support for cases where the
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source vector type is to be split while the target vector is to be promoted.
(eg: <4 x i64> -> <4 x i8> )
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-20 07:15:58 +00:00
Benjamin Kramer
9cfcc6c1e1
Update test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-19 12:14:34 +00:00
Nadav Rotem
c17d3552da
Reduce the runtime of the test. Keep only the interesting cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-19 08:12:43 +00:00
Chris Lattner
a53616d08b
Remove support for parsing the "type i32" syntax for defining a numbered
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top level type without a specified number. This syntax isn't documented
and blocks forward progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-19 00:03:46 +00:00
Chris Lattner
b85e4eba85
rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is
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for pre-2.9 bitcode files. We keep x86 unaligned loads, movnt, crc32, and the
target indep prefetch change.
As usual, updating the testsuite is a PITA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 06:05:24 +00:00
Jakob Stoklund Olesen
0a074ed3ef
Switch ARM to using AltOrders instead of MethodBodies.
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This slightly changes the GPR allocation order on Darwin where R9 is not
a callee-saved register:
Before: %R0 %R1 %R2 %R3 %R12 %R9 %LR %R4 %R5 %R6 %R8 %R10 %R11
After: %R0 %R1 %R2 %R3 %R9 %R12 %LR %R4 %R5 %R6 %R8 %R10 %R11
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133326 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 01:14:46 +00:00
Galina Kistanova
a566ec94e6
Moved to the right place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 00:59:37 +00:00
Eric Christopher
a3071455e5
Fix UMULO support for 2x register width to allow the full
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range without a libcall to a new mulo<mode> libcall
that we'd have to create.
Finishes the rest of rdar://9090077 and rdar://9210061
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-18 00:09:57 +00:00
Nadav Rotem
da26ad501b
Fix a bug in the type-lowering of integer-promoted elements. Add a check that
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the newly created simple type is valid before checking its legality.
Re-commit the test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133291 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 20:54:12 +00:00
Evan Cheng
6d6c55bc27
Add an alternative rev16 pattern. We should figure out a better way to handle these complex rev patterns. rdar://9609108
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133289 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 20:47:21 +00:00
Eric Christopher
362fee90b9
Lower multiply with overflow checking to __mulo<mode>
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calls if we haven't been able to lower them any
other way.
Fixes rdar://9090077 and rdar://9210061
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133288 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 20:41:29 +00:00
Galina Kistanova
ed6fa188c4
est 2008-06-04-indirectmem.ll is X86-specific. Move to X86 folder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133275 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 18:26:23 +00:00
Chris Lattner
a16546a70b
Stop accepting and ignoring attributes in function types. Attributes are applied
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to functions and call/invokes, not to types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 17:37:13 +00:00
Roman Divacky
951cd021c1
Fix a few places where 32bit instructions/registerset were used on PPC64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133260 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 15:21:10 +00:00
Justin Holewinski
707fd44038
PTX: Adjust rounding modes
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* rounding modes for fp add, mul, sub now use .rn
* float -> int rounding correctly uses .rzi not .rni
* 32bit fdiv for sm13 uses div.rn (instead of div.approx)
* 32bit fdiv for sm10 now uses div (instead of div.approx)
Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit.
All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend.
Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133253 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 12:12:42 +00:00
Chris Lattner
d589099eec
make the asmparser reject function and type redefinitions. 'Merging' hasn't been
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needed since llvm-gcc 3.4 days.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133248 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 07:06:44 +00:00
Chris Lattner
424545e950
remove asmparser support for the old getresult instruction, which has been subsumed by extractvalue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 06:57:15 +00:00
Chris Lattner
437544f25c
remove parser support for the obsolete "multiple return values" syntax, which
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was replaced with return of a "first class aggregate".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 06:49:41 +00:00
Chris Lattner
7a1b9bdd2b
Remove support for using "foo" as symbols instead of %"foo". This is ancient
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syntax and has been long obsolete. As usual, updating the tests is the nasty
part of this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 06:36:20 +00:00
Chris Lattner
26b0000166
manually upgrade a bunch of tests to modern syntax, and remove some that
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are either unreduced or only test old syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 03:14:27 +00:00
Cameron Zwarich
cd4e0b593d
Update an insertion point iterator after replacing a return instruction with a
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tail call pseudoinstruction. This fixes <rdar://problem/9624333>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133227 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-17 02:16:43 +00:00
Jakob Stoklund Olesen
c02a6fa7d8
Don't use register classes larger than TLI->getRegClassFor(VT).
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In Thumb mode we cannot handle GPR virtual registers, even though some
instructions can. When isel is lowering a CopyFromReg, it should limit
itself to subclasses of getRegClassFor(VT).
<rdar://problem/9624323>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133210 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 22:50:38 +00:00
Nick Lewycky
d61f84ee65
There's no need to be so picky about the particular register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 21:00:00 +00:00
Justin Holewinski
e0aef2de81
PTX: Finish new calling convention implementation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 17:50:00 +00:00
Bruno Cardoso Lopes
d381a7a91e
Add AVX suport for fpextend.
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Original patch by Syoyo Fujita with more comments by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 07:03:21 +00:00
Eli Friedman
e8e1e4444b
FileCheck-ize test, and make it work on EABI hosts, like clang-native-arm-cortex-a9.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133139 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 02:36:32 +00:00
Eli Friedman
33b4f725ea
Force a triple here so this test doesn't fail on EABI hosts (like clang-native-arm-cortex-a9).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133134 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:49:31 +00:00
Nick Lewycky
3cae396e03
Commit the right set of tests for r133124. Sorry 'bout that!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:35:45 +00:00
Andrew Trick
9b91a88f1d
Reenabling this test with REQUIRES: Asserts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:34:41 +00:00
Chad Rosier
6fce128dd1
Typos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:24:24 +00:00
Chad Rosier
689edc8b28
Revision r128665 added an optimization to make use of NEON multiplier
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accumulator forwarding. Specifically (from SVN log entry):
Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier
accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2
Make sure it catches cases where operand 1 is add/fadd/sub/fsub, which was
intended in the original revision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:21:54 +00:00
Nick Lewycky
c06b5bf340
Add a DAGCombine for (ext (binop (load x), cst)).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 01:15:49 +00:00
Anna Zaks
589badd863
Rename the test. Thanks Cameron! Use shorter/generic names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:34:10 +00:00
Anna Zaks
3c397eb741
Function::getNumBlockIDs() should be used instead of Function::size() to set the upper limit on the block IDs since basic blocks might get removed (simplified away) after being initially numbered. Plus the test case, in which SelectionDAGBuilder::visitBr() calls llvm::MachineFunction::removeFromMBBNumbering(), which introduces the hole in numbering leading to an assert in llc (prior to the fix).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 00:03:21 +00:00
Rafael Espindola
cff6193ebd
Testcase for previous commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133089 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 21:18:51 +00:00
John McCall
3a3465b71d
Add a new function attribute, nonlazybind, which inhibits lazy-loading
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optimizations when emitting calls to the function; instead those calls may
use faster relocations which require the function to be immediately resolved
upon loading the dynamic object featuring the call. This is useful when it
is known that the function will be called frequently and pervasively and
therefore there is no merit in delaying binding of the function.
Currently only implemented for x86-64, where it turns into a call through
the global offset table.
Patch by Dan Gohman, who assures me that he's going to add LangRef documentation
for this once it's committed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 20:36:13 +00:00
Andrew Trick
2f473cee28
Disabling this test until I can figure out the right lit flags.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 18:25:38 +00:00
Jakob Stoklund Olesen
b79e30cc9e
Remove custom allocation orders in SystemZ.
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Note that this actually changes code generation, and someone who
understands this target better should check the changes.
- R12Q is now allocatable. I think it was omitted from the allocation
order by mistake since it isn't reserved. It as apparently used as a
GOT pointer sometimes, and it should probably be reserved if that is
the case.
- The GR64 registers are allocated in a different order now. The
register allocator will automatically put the CSRs last. There were
other changes to the order that may have been significant.
The test fix is because r0 and r1 swapped places in the allocation order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 18:02:56 +00:00
Evan Cheng
f60ceac9cd
Another revsh pattern. rdar://9609059
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 17:17:48 +00:00
Andrew Trick
4cb971ce1c
Added -stress-sched flag in the Asserts build.
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Added a test case for handling physreg aliases during pre-RA-sched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 17:16:12 +00:00
Chad Rosier
0e7f08bde5
TargetLoweringOpt is a struct used by DAGCombine, not a pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 16:48:02 +00:00
Nadav Rotem
6f2b85ddd4
This test was failing on X86 machines which do not have SSE4. Fixed the test by
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specifying that the target CPU is corei7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 12:26:53 +00:00
Evan Cheng
bf188aeae7
PerformBFICombine - (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff
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the bits being cleared by the AND are not demanded by the BFI.
The previous BFI dag combine rule was actually incorrect (or used to be
correct until BFI representation changed).
rdar://9609030
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-15 01:12:31 +00:00
Tanya Lattner
189531f317
Add an optimization that looks for a specific pair-wise add pattern and generates a vpaddl instruction instead of scalarizing the add.
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Includes a test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 23:48:48 +00:00
Rafael Espindola
a6ad823675
Add triple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 23:47:36 +00:00
Chad Rosier
92bcd96bbc
When pattern matching during instruction selection make sure shl x,1 is not
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converted to add x,x if x is a undef. add undef, undef does not guarantee
that the resulting low order bit is zero.
Fixes <rdar://problem/9453156> and <rdar://problem/9487392>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 22:29:10 +00:00
Rafael Espindola
1c61990b2d
Check the llc output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 22:24:32 +00:00
Stuart Hastings
0ca7338083
Test case for x86 MMX inline asm. rdar://problem/8886707
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133014 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 21:51:38 +00:00
Rafael Espindola
29a3aa855e
Add a test for the recent regression.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133009 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 20:38:50 +00:00
Dan Gohman
1ae4168e36
This test is still failing. Delete the rest of it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 18:07:36 +00:00
Dan Gohman
a3b9b007a8
Revert r132991. This test is failing on the
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llvm-gcc-x86_64-linux-selfhost buildbot and others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133000 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 18:03:11 +00:00
Rafael Espindola
f924dea8dd
Add 132986 back, but avoid non-determinism if a bb address gets reused.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 15:31:54 +00:00
Nadav Rotem
ebf69c34c4
Add a testcase for #9623
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132991 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 13:23:10 +00:00
Rafael Espindola
7a07083c25
revert 132986 to see if the bots go green.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 12:48:26 +00:00
Nadav Rotem
bfdbd00d9d
This testcase cause a failure on some bots. Remove the failing test until
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further investigation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 09:10:37 +00:00
Nadav Rotem
c2492c28ef
Add a testcase for checking the integer-promotion of many different vector
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types (with power of two types such as 8,16,32 .. 512).
Fix a bug in the integer promotion of bitcast nodes. Enable integer expanding
only if the target of the conversion is an integer (when the type action is
scalarize).
Add handling to the legalization of vector load/store in cases where the saved
vector is integer-promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132985 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 08:11:52 +00:00
Rafael Espindola
f5b5c5156c
Implement Jakob's suggestion on how to detect fall thought without calling
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AnalyzeBranch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132981 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 06:08:32 +00:00
Bruno Cardoso Lopes
79abd1c27c
Since ARM's prefetch implementation predicted the presence of a instruction
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cache prefetch and now that the info from "prefetch" to "ARMPreload" is present,
only add a testcase for PLI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 05:11:46 +00:00
Bruno Cardoso Lopes
9a767330f5
Add one more argument to the prefetch intrinsic to indicate whether it's a data
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or instruction cache access. Update the targets to match it and also teach
autoupgrade.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 04:58:37 +00:00
Rafael Espindola
3a42565ccb
Make the threshold used by branch folding softer. Before we would get a
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sharp all or nothing transition when one extra predecessor was added. Now
we still test first ones for merging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 04:41:17 +00:00
Bill Wendling
740e5b3586
Heuristic: If the number of operands in the alias are more than the number of
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operands in the aliasee, don't print the alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-14 03:17:20 +00:00
Jakob Stoklund Olesen
5e5ed44577
Be less aggressive about hinting in RAFast.
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In particular, don't spill dirty registers only to satisfy a hint. It is
not worth it.
The attached test case provides an example where the fast allocator
would spill a register when other registers are available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-13 03:26:46 +00:00
Rafael Espindola
1edc08b09f
Really fix the fall-through logic.
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Add a triple to the tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-12 05:57:01 +00:00
Rafael Espindola
c1e903ceb3
Test for the previous commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-12 05:35:39 +00:00
Rafael Espindola
4509ec42b8
AnalyzeBranch doesn't change which successors a bb has, just the order
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we try to branch to them.
Before we were creating successor lists with duplicated entries. Fixing that
found a bug in isBlockOnlyReachableByFallthrough that would causes it to
return the wrong answer for
-----------
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jne foo
jmp bar
foo:
----------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132882 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-12 03:20:32 +00:00
Eli Friedman
25255cbe00
Add full x86 fast-isel support for memcpy and memset.
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rdar://9431466
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-10 23:39:36 +00:00
Eli Friedman
5e05deebb9
Add -mattr=+sse2 to make the buildbots happy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132839 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-10 08:26:26 +00:00
Chad Rosier
86431e9a31
Adding a test case for revision 132825.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-10 02:44:19 +00:00
Eli Friedman
88b2af7e61
Add a simple test which makes sure folding immediate float zero to a memory operand works.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132824 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-10 00:30:08 +00:00
Cameron Zwarich
a2e979565b
A CCState was being created without setting whether it is in the Call or Prologue state,
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causing an assertion failure downstream. This fixes <rdar://problem/9562908>.
This really seems like it should always be set at CCState creation time, so mistakes like
this can never happen. I'll take a look at doing that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09 22:30:07 +00:00
Eli Friedman
2a6d9eb10b
Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://9562809.
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The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09 22:14:44 +00:00
Eric Christopher
6f3661fdcd
Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132777 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09 16:03:19 +00:00
Eric Christopher
622ab4ab50
Recommit r132764 since it didn't cause the windows buildbot failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132776 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09 15:39:01 +00:00
Eric Christopher
7b3f72ff81
Temporarily revert 132764 to see if it fixes the Windows buildbot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132771 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09 06:29:54 +00:00
Akira Hatanaka
c53cc48ca9
Initial support for inline asm memory operand constraints.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132768 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09 03:31:05 +00:00
Eric Christopher
efe12907dd
If the alignment of the byval argument is greater than the alignment
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of the frame then increase the maximum alignment of the frame to
match.
Fixes PR6965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132764 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09 00:15:19 +00:00
Akira Hatanaka
69b9044c66
Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of the
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dynamically allocated stack area was not set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-08 21:28:09 +00:00
Cameron Zwarich
aaa5f14d7c
Fix an issue where the two-address conversion pass incorrectly rewrites untied
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operands to an early clobber register. This fixes <rdar://problem/9566076>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132738 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-07 23:54:00 +00:00
Rafael Espindola
d846e3fb5a
Fix a silly error I introduce in r131951.
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Fixes PR10095.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132735 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-07 23:26:45 +00:00
Stuart Hastings
a0dab9cfdf
Tweak this test for ARM-hosted 'bot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-07 15:23:11 +00:00
Nadav Rotem
1e471820b8
Move the legalizer tests to the X86 directory because the test uses the x86
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codegen. Thanks Galina.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-07 05:23:58 +00:00
Akira Hatanaka
8464fff30b
Add test case for C++ exception handling and fix the following mistakes in MipsFrameLowering::emitPrologue:
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- cfi directives are not inserted at the right location or in the right order.
- The source MachineLocation for the cfi directive that changes the cfa register
to $fp should be MachineLocation::VirtualFP.
- A PROLOG_LABEL that marks the beginning of cfi_offset directives for
callee-saved register is emitted even when no callee-saved registers are
saved.
- When a callee-saved double precision register is saved, two cfi_offset
directives, one for each of the paired single precision registers, should be
emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132703 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-07 02:17:21 +00:00
Jakob Stoklund Olesen
b3e705f889
Simplify local live range splitting's safeguard to fix PR10070.
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When local live range splitting creates a live range with the same
number of instructions as the old range, mark it as RS_Local. When such
a range is seen again, require that it be split in a way that reduces
the number of instructions. That guarantees we are making progress while
still being able to perform 3 -> 2+3 splits as required by PR10070.
This also means that the PrevSlot map is no longer needed. This was also
used to estimate new spill weights, but that is no longer necessary
after slotIndexes::insertMachineInstrInMaps() got the extra Late
insertion argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132697 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-06 23:55:20 +00:00
Stuart Hastings
f99a4b82a4
Followup to 132458, omit unnecessary stack copy when x87 input is a
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load. rdar://problem/6373334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132696 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-06 23:15:58 +00:00
Nadav Rotem
fc3623bc50
Add methods to support the integer-promotion of vector types. Methods to
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legalize SDNodes such as BUILD_VECTOR, EXTRACT_VECTOR_ELT, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-06 20:55:56 +00:00
Stuart Hastings
9a9f8f3ba9
Test case for PR10085.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-06 20:03:22 +00:00
Eli Friedman
0b4d96baec
PR10077: fix fast-isel of extractvalue of aggregate constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-06 05:46:34 +00:00
Benjamin Kramer
a2898673ac
Harden tests for windows path separators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132671 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-05 18:20:05 +00:00
Jakob Stoklund Olesen
8f1282d9cb
Fix a test that keeps breaking when allocation orders change.
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Who said FileCheck couldn't handle arbitrarily complex conditions?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 23:34:40 +00:00
Nadav Rotem
0b66636879
TypeLegalizer: Add support for passing of vector-promoted types in registers (copyFromParts/copyToParts).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132649 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 20:58:08 +00:00
Stuart Hastings
865f09334f
Reapply 132424 with fixes. This fixes PR10068.
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rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 23:53:54 +00:00
Jakob Stoklund Olesen
2e3e720d76
Fix some tests that depend on register allocation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132602 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 22:45:21 +00:00
Eric Christopher
ec281c8934
Another possible bug. Stopgap until we can autogenerate tables and
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constraint lengths.
Part of rdar://9037836 and rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 22:09:12 +00:00
Eric Christopher
ce1ecf59c8
Fix an off by one error.
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Part of rdar://9037836 and rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:44:52 +00:00
Jakob Stoklund Olesen
5f2316a3b5
Switch AllocationOrder to using RegisterClassInfo instead of a BitVector
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of reserved registers.
Use RegisterClassInfo in RABasic as well. This slightly changes som
allocation orders because RegisterClassInfo puts CSR aliases last.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:34:53 +00:00
Eric Christopher
cf714d44b8
Make the Uv constraint a memory operand. This doesn't solve the
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addressing mode problem mentioned in r132559.
Backend part of rdar://9037836 and part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 17:24:37 +00:00
Roman Divacky
0c9b559bfd
Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant.
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- Check for MTCTR8 in addition to MTCTR when looking up a hazard.
- When lowering an indirect call use CTR8 when targeting 64bit.
- Introduce BCTR8 that uses CTR8 and use it on 64bit when expanding ISD::BRIND.
The last change fixes PR8487. With those changes, we are able to compile a
running "ls" and "sh" on FreeBSD/PowerPC64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 15:47:49 +00:00
Eli Friedman
d6412c940e
Add ARM fast-isel support for materializing the address of a global in cases where the global uses an indirect symbol.
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rdar://9431157
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 01:13:19 +00:00
Devang Patel
cf4cc84738
During post RA scheduling, do not try to chase reg defs. to preserve DBG_VALUEs. This approach has several downsides, for example, it does not work when dbg value is a constant integer, it does not work if reg is defined more than once, it places end of debug value range markers in the wrong place. It even causes misleading incorrect debug info when duplicate DBG_VALUE instructions point to same reg def.
...
Instead, use simpler approach and let DBG_VALUE follow its predecessor instruction. After live debug value analysis pass, all DBG_VALUE instruction are placed at the right place. Thanks Jakob for the hint!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 20:07:12 +00:00
Rafael Espindola
580cbd9cf0
Add test for PR10068.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 20:02:48 +00:00
Rafael Espindola
251b4a0405
Revert 132424 to fix PR10068.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132479 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 19:57:47 +00:00
Stuart Hastings
552c0ee4f9
Andy pointed out a dumb omission in this test case. Thanks Andy!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 19:26:49 +00:00
Stuart Hastings
1f344f052e
Jakob pointed out a dumb omission in this test case. Thanks Jakob!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 18:44:05 +00:00
Stuart Hastings
84be958ed8
Omit unnecessary stack copy when x87 input is a load.
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rdar://problem/6373334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132458 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 15:57:11 +00:00
Stuart Hastings
ac92565384
Tweak testcase for ARM bot. rdar://problem/5993888
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 05:05:39 +00:00
Akira Hatanaka
5e06903e66
Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 01:03:14 +00:00
Akira Hatanaka
f876bf81df
Test case for r132444.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132445 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 00:25:53 +00:00
Devang Patel
c432907eca
Do not drop constant values when a variable's content is described using .debug_loc entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 22:03:25 +00:00
Stuart Hastings
ec880283b3
Recommit 132404 with fixes. rdar://problem/5993888
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 21:33:14 +00:00
Eric Christopher
9aaa02a1d2
Allow bitcasts between valid types of the same size and vector
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types if the vector type is legal.
Fixes rdar://9306086
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 19:55:10 +00:00
Stuart Hastings
4abc5fea9c
Revert 132404 to appease a buildbot. rdar://problem/5993888
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132419 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 19:52:20 +00:00
Stuart Hastings
0f971b1fdb
Cleanup test case. rdar://problem/5660695
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 18:23:14 +00:00
Stuart Hastings
10ff0bbdfb
Add support for x86 CMPEQSS and friends. These instructions do a
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floating-point comparison, generate a mask of 0s or 1s, and generally
DTRT with NaNs. Only profitable when the user wants a materialized 0
or 1 at runtime. rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 17:17:45 +00:00
Stuart Hastings
d7de954644
A forthcoming SSE patch will break this test; since the test is also
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valid for x87, re-target to x87. rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132401 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 16:13:09 +00:00
Stuart Hastings
b909d35de4
Test case for 132396. rdar://problem/5660695
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 15:50:29 +00:00
Nadav Rotem
b6fbec3a54
This patch is another step in the direction of adding vector select. In this
...
patch we add a flag to enable a new type legalization decision - to promote
integer elements in vectors. Currently, the rest of the codegen does not support
this kind of legalization. This flag will be removed when the transition is
complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132394 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 12:51:46 +00:00
Richard Osborne
9497466190
Add XCore intrinsic for crc8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 16:24:49 +00:00
Richard Osborne
7736c37c14
Add XCore intrinsic for crc32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 14:47:36 +00:00
Richard Osborne
bc5fd67b53
Convert test to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 14:00:05 +00:00
Bruno Cardoso Lopes
4e694c96f1
This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
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nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.
Patch by Sasa Stankovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 02:54:07 +00:00
Bruno Cardoso Lopes
d979686bb4
This patch implements the thread local storage. Implemented are General
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Dynamic, Initial Exec and Local Exec TLS models.
Patch by Sasa Stankovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 02:53:58 +00:00
Rafael Espindola
6e032942cf
Use the dwarf->llvm mapping to print register names in the cfi
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directives.
Fixes PR9826.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-30 20:20:15 +00:00
Jakob Stoklund Olesen
57903357ee
Fix PR10046 by updating LiveVariables kill info when splitting live ranges.
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This only affects targets like Mips where branch instructions may kill virtual
registers. Most other targets branch on flag values, so virtual registers are
not involved.
The problem is that MachineBasicBlock::updateTerminator deletes branches and
inserts new ones while LiveVariables keeps a list of pointers to instructions
that kill virtual registers. That list wasn't properly updated in
MBB::SplitCriticalEdge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-29 20:10:28 +00:00
John McCall
5f8fd54f08
On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
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This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).
Take 2, now with more basic competence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132295 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-29 19:50:32 +00:00
John McCall
7eebab2a82
I didn't mean to commit these residues of a personal project.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-29 19:41:56 +00:00
John McCall
832a9d1a76
On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
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This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132291 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-29 19:39:04 +00:00
Bruno Cardoso Lopes
a0112d0c39
Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
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to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132248 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 04:07:29 +00:00
Eric Christopher
3c14f24c9d
Implement the 'M' output modifier for arm inline asm. This is fairly
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register allocation dependent and will occasionally break. WIP in the
register allocator to model paired/etc registers.
rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 01:40:44 +00:00
Akira Hatanaka
342837d0dc
Define a wrapper node for target constant nodes (tglobaladdr, etc.).
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Need this to prevent emitting illegal conditional move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132240 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 01:07:07 +00:00
Cameron Zwarich
de64aaf6c8
Fix the remaining atomic intrinsics to use the right register classes on Thumb2,
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and add some basic tests for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132235 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 23:54:00 +00:00
Eli Friedman
94657b6f8a
Force a triple to make this test pass on Darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 23:12:48 +00:00
Cameron Zwarich
f5e771db37
Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegClass()
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was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP
is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132225 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 22:26:04 +00:00
Rafael Espindola
5b23b7fe31
Make size computation less brittle.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132222 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 22:05:41 +00:00
Jakob Stoklund Olesen
484a718b55
Make room for register allocation to improve.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132213 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 20:15:06 +00:00
Evan Cheng
4abce0c90b
Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 20:11:27 +00:00
Jakob Stoklund Olesen
6205769741
Delete a test that is no longer relevant.
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According to PR2536, the old spiller had trouble with the IMPLICIT_DEF in this
code:
%reg1028<def> = MOV16rm %reg0, 1, %reg0, <ga:g_5>, Mem:LD(2,2) [g_5 + 0]
%reg1039<def> = IMPLICIT_DEF
%reg1038<def> = INSERT_SUBREG %reg1039, %reg1028, 2
%reg1025<def> = AND32ri %reg1038, 65534, %%EFLAGS<imp-def>
However, today we emit a zero-extending load instead:
%vreg10<def> = MOVZX32rm16 %noreg, 1, %noreg, <ga:@g_5>, %noreg; %mem:LD2[@g_5] GR32:%vreg10
%vreg0<def> = AND32ri %vreg10, 65534, %%EFLAGS<imp-def,dead>; %GR32:%vreg0,%vreg10
This makes the test pointless since it no longer creates the spiller hazard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132210 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 20:02:42 +00:00
Evan Cheng
d3444ff532
Add iOS test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 19:04:21 +00:00
Eli Friedman
45c4c4f257
And fix the test in r132194.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 18:14:28 +00:00
Eli Friedman
a4d487fc1e
Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 18:02:04 +00:00
Devang Patel
b58128e2b2
Select DW_AT_const_value size based on variable size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 16:45:18 +00:00
Cameron Zwarich
f031d0977f
Fix PR10029 - VerifyCoalescing failure on patterns_dfa.c of 445.gobmk.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132181 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 05:04:51 +00:00
Chad Rosier
62660310d9
Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist.
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crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 23:13:19 +00:00
Devang Patel
785badb83e
During branch folding avoid inserting redundant DBG_VALUE machine instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 21:47:59 +00:00
Akira Hatanaka
cf0cd8005c
Add support for C++ exception handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 18:59:03 +00:00
Eli Friedman
9ebfceee05
Fix test on Windows.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132126 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 18:00:32 +00:00
Stuart Hastings
2aa0f23e1c
Reverting 132105: it broke some LLVM-GCC DejaGNU tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 04:09:49 +00:00
Stuart Hastings
aa4e6afc9b
Correctly handle a one-word struct passed byval on x86_64.
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rdar://problem/6920088
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 02:44:56 +00:00
Eli Friedman
76927d7303
Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.
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The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).
rdar://9437928 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 23:49:02 +00:00
Akira Hatanaka
37d22d92df
Define WeakRefDirective.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 23:30:30 +00:00
Eric Christopher
8f89463894
Implement the 'm' modifier. Note that it only works for memory operands.
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Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 20:51:58 +00:00
Akira Hatanaka
9c3d57c45e
Custom-lower FCOPYSIGN nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 19:32:07 +00:00
Cameron Zwarich
106acd4158
Make tTAILJMPr/tTAILJMPrND emit a tBX without a preceding MOV of PC to LR. This
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fixes <rdar://problem/9495913>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 04:45:27 +00:00
Rafael Espindola
fc2bb8c444
Replace the -unwind-tables option with a per function flag. This is more
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LTO friendly as we can now correctly merge files compiled with or without
-fasynchronous-unwind-tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132033 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 03:44:17 +00:00
Akira Hatanaka
053546c31e
Fix lowering of DYNAMIC_STACKALLOC nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 02:20:00 +00:00
Eric Christopher
4db7dec70b
Implement the arm 'L' asm modifier.
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Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 23:27:13 +00:00
Eric Christopher
e1739d598d
Implement the immediate part of the 'B' modifier.
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Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 23:15:43 +00:00
Eric Christopher
0628d38085
Add support for the arm 'y' asm modifier.
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Fixes part of rdar://9444657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132011 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 22:10:34 +00:00
Akira Hatanaka
9ad65aed36
Test case for r132003.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 21:28:18 +00:00
Akira Hatanaka
f29b9c0734
Fix test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 19:37:15 +00:00
Akira Hatanaka
26b47fd05b
Revision 131986 test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131987 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 19:29:37 +00:00
Rafael Espindola
10c3e128ef
Fix the defaults for .eh_frame. We were marking it as writable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 02:50:20 +00:00
Evan Cheng
b5a55d979c
- Teach SelectionDAG::isKnownNeverZero to return true (op x, c) when c is
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non-zero.
- Teach X86 cmov optimization to eliminate the cmov from ctlz, cttz extension
when the source of X86ISD::BSR / X86ISD::BSF is proven to be non-zero.
rdar://9490949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131948 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 01:48:22 +00:00
Akira Hatanaka
f89532f8f6
Add pattern for double-to-integer conversion. Patch by Sasa Stankovic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 22:16:43 +00:00
Dan Gohman
1b58d4536a
When checking for signed multiplication overflow, watch out for INT_MIN and -1.
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This fixes PR9845.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131919 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 21:07:39 +00:00
Akira Hatanaka
69c19f7316
Change StackDirection from StackGrowsUp to StackGrowsDown.
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The following improvements are accomplished as a result of applying this patch:
- Fixed frame objects' offsets (relative to either the virtual frame pointer or
the stack pointer) are set before instruction selection is completed. There is
no need to wait until Prologue/Epilogue Insertion is run to set them.
- Calculation of final offsets of fixed frame objects is straightforward. It is
no longer necessary to assign negative offsets to fixed objects for incoming
arguments in order to distinguish them from the others.
- Since a fixed object has its relative offset set during instruction
selection, there is no need to conservatively set its alignment to 4.
- It is no longer necessary to reorder non-fixed frame objects in
MipsFrameLowering::adjustMipsStackFrame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131915 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 20:16:59 +00:00
Devang Patel
26ffad8c49
Test case for r131908.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131909 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 17:49:29 +00:00
Devang Patel
35b6994608
While replacing all uses of a SDValue with another value, do not forget to transfer SDDbgValue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131907 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 17:35:08 +00:00
Cameron Zwarich
d34d429401
Fix <rdar://problem/9476260> by having tail calls always generate 32-bit branches
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in Darwin Thumb2 code. Tail calls are already disabled on Thumb1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131894 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 01:57:17 +00:00
Renato Golin
1ec11fb8b5
RTABI chapter 4.3.4 specifies __eabi_mem* calls. Specifically, __eabi_memset accepts parameters (ptr, size, value) in a different order than GNU's memset (ptr, value, size), therefore the special lowering in AAPCS mode. Implementation by Evzen Muller.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-22 21:41:23 +00:00
Benjamin Kramer
f55d26e788
Implement mulo x, 2 -> addo x, x in DAGCombiner.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131800 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 18:31:55 +00:00
Benjamin Kramer
a0962766ba
Merge and FileCheckize test cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131799 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 18:31:48 +00:00
Eli Friedman
c088345f13
Add fast-isel support for byval calls on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131764 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 22:21:04 +00:00
Stuart Hastings
0e29ed081b
Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.
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rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 19:04:40 +00:00
Akira Hatanaka
17a1e87751
Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
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saving and restoring them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 18:39:33 +00:00
Chad Rosier
5def9657e4
Fixed regression due to commit 131709, which disables vararg tail call optimizations on Win64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131740 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 17:49:39 +00:00
Benjamin Kramer
eb274e6bdd
Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 15:11:26 +00:00
Cameron Zwarich
21a70bf4a5
Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to preserve
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the phikill flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131717 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 03:54:04 +00:00
Akira Hatanaka
cd0f90f831
Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 02:30:51 +00:00
Chad Rosier
a166089f36
Don't attempt to tail call optimize for Win64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:59:28 +00:00
Evan Cheng
2e6496026f
Revert r131664 and fix it in instcombine instead. rdar://9467055
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:54:37 +00:00
Eli Friedman
dc51575a5f
Add fast-isel support for zeroext and signext ret instructions on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 22:16:13 +00:00
Eric Christopher
2bbecd8f6d
Oddly people want to use the 'r' constraint for fp constants on x86.
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Fixes rdar://9218925
Fixes PR9601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:33:47 +00:00
Eli Friedman
24a69c7be2
Fix up this test to use explicit triples (Win64 passes a different number of arguments in registers).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:13:08 +00:00
Akira Hatanaka
a1a7ba8382
Align i64 arguments to 64 bit boundaries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:29:48 +00:00
Evan Cheng
0efaa5e6a1
crc32 with 64-bit output zeros upper 32-bits. rdar://9467055
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:57:12 +00:00
Stuart Hastings
26847d40db
Move test to Transforms/InstCombine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 05:53:22 +00:00
Tanya Lattner
db28247522
Handle perfect shuffle case that generates a vrev for vectors of floats.
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Add test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131582 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:44:54 +00:00