Commit Graph

2582 Commits

Author SHA1 Message Date
Dan Gohman
4fa2a3f0ef Use isSingleValueType instead of isFirstClassType to
exclude struct and array types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-23 00:34:04 +00:00
Dan Gohman
c84941be0a Port the fix for the select operator from instcombine's
ComputeNumSignBits to SelectionDAG's ComputeNumSignBits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 20:59:51 +00:00
Dan Gohman
1fdfa6aabf Code simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51345 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 20:56:33 +00:00
Evan Cheng
446efddfcd If the result of a BIT_CONVERT is a v1* vector, it doesn't mean its source is a v1* vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51192 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16 17:19:05 +00:00
Duncan Sands
419cafb9fb Silence the compiler warning differently. The
original method caused gcc-4.2 to complain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51186 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16 09:19:16 +00:00
Nate Begeman
b434513a20 Actually scalarize the operand to BIT_CONVERT instead of asking someone to do
something with a v1 type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51160 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 20:40:58 +00:00
Dan Gohman
041e2eb517 IR support for extractvalue and insertvalue instructions. Also, begin
moving toward making structs and arrays first-class types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51157 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 19:50:34 +00:00
Evan Cheng
f0df03134e Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 08:39:06 +00:00
Evan Cheng
97e60d9e8c Use a better idiom to silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51131 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 21:08:07 +00:00
Evan Cheng
3521334467 Really silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51126 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 20:29:30 +00:00
Evan Cheng
b2031145e3 Really silence compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51123 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 20:26:35 +00:00
Evan Cheng
5087124721 Silence some compiler warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51115 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 20:07:51 +00:00
Dan Gohman
d64a78c9ed When bit-twiddling CondCode values for integer comparisons produces
SETOEQ, is it does with (SETEQ & SETULE), map it to SETEQ.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51112 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 18:17:09 +00:00
Dan Gohman
9c78a39907 Whitespace cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51089 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 00:43:10 +00:00
Evan Cheng
77f0b7a50a Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 08:35:03 +00:00
Dan Gohman
844731a7f1 Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 00:00:25 +00:00
Nate Begeman
0d1704b955 Teach Legalize how to scalarize VSETCC
Teach X86 a few more vsetcc patterns.  Custom lowering for unsupported ones is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51009 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 23:09:43 +00:00
Evan Cheng
9bfa03c6fd Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 23:04:07 +00:00
Evan Cheng
ad4196b44a Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 19:56:52 +00:00
Nate Begeman
b43e9c1965 Add support for vicmp/vfcmp codegen, more legalize support coming.
This is necessary to unbreak the build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50988 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 19:40:03 +00:00
Dan Gohman
9ab9ee8209 Fix a missing break in the ISD::FLT_ROUNDS_ handling. Patch by giuma!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50967 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 16:07:15 +00:00
Anton Korobeynikov
0b12ecf6ff Turn StripPointerCast() into a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50836 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-07 22:54:15 +00:00
Dan Gohman
42ac929ed9 Fix a bug in the ComputeMaskedBits logic for multiply.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50793 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-07 00:35:55 +00:00
Anton Korobeynikov
b04adddd50 Make StripPointerCast a common function (should we mak it method of Value instead?)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50775 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 22:52:30 +00:00
Dan Gohman
4a3f6c8882 Make several variable declarations static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 01:53:16 +00:00
Dan Gohman
54eed37131 Instead of enumerating each opcode that isn't handled that
ComputeMaskedBits handles, just use a 'default:'. This avoids
TargetLowering's list getting out of date with SelectionDAG's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50693 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 00:53:29 +00:00
Dan Gohman
23e1df8b8d Correct the value of LowBits in srem and urem handling in
ComputeMaskedBits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 00:51:48 +00:00
Mon P Wang
63307c335a Added addition atomic instrinsics and, or, xor, min, and max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05 19:05:59 +00:00
Dan Gohman
1d9cd50677 Fix a mistake in the computation of leading zeros for udiv.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50591 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02 21:30:02 +00:00
Dan Gohman
7ceda160b3 Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02 00:05:03 +00:00
Dan Gohman
1fa850bdd2 Use push_back(...) instead of resize(1, ...), per review feedback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50561 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02 00:03:54 +00:00
Dan Gohman
cba3b44d25 Fix uninitialized uses of the FPC variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-01 23:40:44 +00:00
Chris Lattner
6bf30ab347 don't randomly miscompile seto/setuo just because we are in
ffastmath mode.  This fixes rdar://5902801, a miscompilation
of gcc.dg/builtins-8.c.

Bill, please pull this into Tak.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50523 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-01 07:26:11 +00:00
Arnold Schwaighofer
30e62c098b Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.

Initial PowerPC tail call implementation:

Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).  
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if 
  caller and callee are fastcc
  call is a tail call (in tail call position, call followed by ret)
  no variable argument lists or byval arguments
  option -tailcallopt is enabled
Supported:
 * non pic tail calls on linux/darwin
 * module-local tail calls on linux(PIC/GOT)/darwin(PIC)
 * inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.

A test checking the argument lowering behaviour on x86-64 was added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30 09:16:33 +00:00
Scott Michel
82747a5484 Fix custom target lowering for zero/any/sign_extend: make sure that
DAG.UpdateNodeOperands() is called before (not after) the call to
TLI.LowerOperation().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30 00:26:38 +00:00
Roman Levenstein
a0201d5204 Use std::set instead of std::priority_queue for the RegReductionPriorityQueue.
This removes the existing bottleneck related to the removal of elements from 
the middle of the queue.

Also fixes a subtle bug in ScheduleDAGRRList::CapturePred:
It was updating the state of the SUnit before removing it. As a result, the
comparison operators were working incorrectly and this SUnit could not be removed 
from the queue properly.

Reviewed by Evan and Dan. Approved by Dan.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50412 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29 09:07:59 +00:00
Chris Lattner
3fb2968f2f make the vector conversion magic handle multiple results.
We now compile test2/test3 to:

_test2:
	## InlineAsm Start
	set %xmm0, %xmm1
	## InlineAsm End
	addps	%xmm1, %xmm0
	ret
_test3:
	## InlineAsm Start
	set %xmm0, %xmm1
	## InlineAsm End
	paddd	%xmm1, %xmm0
	ret

as expected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50389 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29 04:48:56 +00:00
Chris Lattner
41f6259a4b add support for multiple return values in inline asm. This is a step
towards PR2094.  It now compiles the attached .ll file to:

_sad16_sse2:
	movslq	%ecx, %rax
	## InlineAsm Start
	%ecx %rdx %rax %rax %r8d %rdx %rsi
	## InlineAsm End
	## InlineAsm Start
	set %eax
	## InlineAsm End
	ret

which is pretty decent for a 3 output, 4 input asm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50386 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29 04:29:54 +00:00
Evan Cheng
33bf38ad88 Fix a bug in RegsForValue::getCopyToRegs() that causes cyclical scheduling units. If it's creating multiple CopyToReg nodes that are "flagged" together, it should not create a TokenFactor for it's chain outputs:
c1, f1 = CopyToReg                                                                                                                                                                                             
c2, f2 = CopyToReg                                                                                                                                                                                             
c3     = TokenFactor c1, c2                                                                                                                                                                                    
 ...                                                                                                                                                                                                                      
       = user c3, ..., f2

Now that the two CopyToReg's and the user are "flagged" together. They effectively forms a single scheduling unit. The TokenFactor is now both an operand and a successor of the Flagged nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50376 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 22:07:13 +00:00
Dan Gohman
187db7b950 Evan pointed out that folding sext to zext may not be correct
if the zext is not legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50368 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 18:47:17 +00:00
Dan Gohman
ebc3a3a3b2 Delete an unused constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50367 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 18:28:49 +00:00
Dan Gohman
10a6b7ab65 Add a comment to CreateRegForValue that clarifies the handling of
aggregate types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50366 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 18:19:43 +00:00
Dan Gohman
0fe00906c8 Rewrite the comments for RegsForValue and its members, and
reorder some of the members for clarity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50365 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 18:10:39 +00:00
Dan Gohman
b20d4f8d49 Don't call size() on each iteration of the loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50361 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 17:42:03 +00:00
Dan Gohman
1f13c686df Fix the SVOffset values for loads and stores produced by
memcpy/memset expansion. It was a bug for the SVOffset value
to be used in the actual address calculations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 17:15:20 +00:00
Dan Gohman
23e8b71526 Teach InstCombine's ComputeMaskedBits what SelectionDAG's
ComputeMaskedBits knows about cttz, ctlz, and ctpop. Teach
SelectionDAG's ComputeMaskedBits what InstCombine's knows
about SRem. And teach them both some things about high bits
in Mul, UDiv, URem, and Sub. This allows instcombine and
dagcombine to eliminate sign-extension operations in
several new cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 17:02:21 +00:00
Dan Gohman
8f0ad582e8 Teach DAGCombine to convert (sext x) to (zext x) when the
sign-bit of x is known to be zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50357 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 16:58:24 +00:00
Chris Lattner
6833b0601b Another collection of random cleanups. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50341 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 07:16:35 +00:00
Chris Lattner
b606dba13b Remove the SmallVector ctor that converts from a SmallVectorImpl. This
conversion open the door for many nasty implicit conversion issues, and
can be easily solved by initializing with (V.begin(), V.end()) when 
needed.

This patch includes many small cleanups for sdisel also.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50340 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 06:44:42 +00:00
Chris Lattner
8eaff0449c switch RegsForValue::Regs to be a SmallVector to avoid
heap thrash on tiny (usually single-element) vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50335 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 06:02:19 +00:00
Chris Lattner
f899fce0c0 move static function out of anon namespace, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50330 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 23:48:12 +00:00
Chris Lattner
acf8b01fd6 Another step to getting multiple result inline asm to work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 23:44:28 +00:00
Chris Lattner
24e1a9d311 typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50316 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 01:49:46 +00:00
Chris Lattner
5a09690446 Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible.  This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:

void test () {
  asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}

Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.

Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??

Incidentally, this was the todo in 
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll

Please do NOT pull this into Tak.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50315 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 00:37:18 +00:00
Chris Lattner
507ffd2423 isa+cast -> dyn_cast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50314 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 00:16:18 +00:00
Chris Lattner
4376fea663 Move a bunch of inline asm code out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50313 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 00:09:47 +00:00
Chris Lattner
5e764233f3 A few inline asm cleanups:
- Make targetlowering.h fit in 80 cols.
  - Make LowerAsmOperandForConstraint const.
  - Make lowerXConstraint -> LowerXConstraint
  - Make LowerXConstraint return a const char* instead of taking a string byref.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50312 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-26 23:02:14 +00:00
Dan Gohman
23ce502cb7 Remove the code from CodeGenPrepare that moved getresult instructions
to the block that defines their operands. This doesn't work in the
case that the operand is an invoke, because invoke is a terminator
and must be the last instruction in a block.

Replace it with support in SelectionDAGISel for copying struct values
into sequences of virtual registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50279 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25 18:27:55 +00:00
Nate Begeman
6867991d54 Pull the code to perform an INSERT_VECTOR_ELT in memory out into its own
function, and then use it to fix a bug in SplitVectorOp that expected inserts
to always have constant insertion indices.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50273 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25 18:07:40 +00:00
Dan Gohman
67780f108c Use isa instead of dyn_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50181 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-23 20:25:16 +00:00
Dan Gohman
3dc34f682d Add support to codegen for getresult instructions with undef operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50180 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-23 20:21:29 +00:00
Dan Gohman
639cdc210b Fix an out-of-bounds access in -view-sunit-dags in the case of an
empty ScheduleDAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50054 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-21 20:07:30 +00:00
Dale Johannesen
9dd2ce46c5 Check we aren't trying to convert PPC long double.
This fixes the testsuite failure on ppcf128-4.ll.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49994 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-20 18:23:46 +00:00
Chris Lattner
02a260aa11 Switch to using Simplified ConstantFP::get API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49977 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-20 00:41:09 +00:00
Duncan Sands
37bcda3de9 Implement a bit more softfloat support in
LegalizeTypes.  Correct the load logic so
that it actually works, and also teach it
to handle floating point extending loads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49923 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-18 20:56:03 +00:00
Duncan Sands
4cc0456456 Add some more FIXME's for indexed loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49916 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-18 20:27:12 +00:00
Duncan Sands
41edfb8ae1 Provide an explicit list of operands to MakeLibcall,
rather than having it suck them out of a node.  Add
a bunch of new libcalls, and remove dead softfloat
code (dead, because FloatToInt is used not Expand
in this case).  Note that indexed stores probably
aren't handled properly, likewise for loads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49915 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-18 20:25:14 +00:00
Dan Gohman
35b31bea0d Remove the implicit conversion from SDOperandPtr to SDOperand*; this
may fix a build error on Visual Studio.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49876 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-17 23:02:12 +00:00
Dan Gohman
499c1bd358 Correct the SrcValue information in the Expand code for va_copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49839 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-17 02:09:26 +00:00
Roman Levenstein
9cac5259fe Ongoing work on improving the instruction selection infrastructure:
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.

Patch is approved by Dan Gohman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49795 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-16 16:15:27 +00:00
Dan Gohman
5a2d335c4c Fix the new scheduler assertion checks to work when
the scheduler has inserted no-ops. This fixes
the 2006-07-03-schedulers.ll regression on ppc32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49747 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-15 22:40:14 +00:00
Nicolas Geoffray
6ccbbd8990 Change Divided flag to Split, as suggested by Evan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49715 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-15 08:08:50 +00:00
Dan Gohman
80792f3dde Treat EntryToken nodes as "passive" so that they aren't added to the
ScheduleDAG; they don't correspond to any actual instructions so they
don't need to be scheduled.

This fixes a bug where the EntryToken was being scheduled multiple
times in some cases, though it ended up not causing any trouble because 
EntryToken doesn't expand into anything. With this fixed the schedulers
reliably schedule the expected number of units, so we can check this
with an assertion.

This requires a tweak to test/CodeGen/X86/loop-hoist.ll because it
ends up getting scheduled differently in a trivial way, though it was
enough to fool the prcontext+grep that the test does.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49701 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-15 01:22:18 +00:00
Dan Gohman
89bf0a6b05 In -view-sunit-dags, display "special" chain dependencies as cyan
instead of blue to distinguish them from regular dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-14 23:15:07 +00:00
Dan Gohman
b91c89dfb9 Avoid creating MERGE_VALUES nodes for single values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49676 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-14 18:43:25 +00:00
Dan Gohman
29e4bdbf27 Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49666 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-14 17:55:48 +00:00
Nicolas Geoffray
9701c8a18f Fix /test/CodeGen/PowerPC/big-endian-actual-args.ll for linux/ppc32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49652 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-14 17:17:14 +00:00
Duncan Sands
ddc016cc85 Initial libcall support for LegalizeTypes. This is
much simpler than in LegalizeDAG because calls are
not yet expanded into call sequences: that happens
after type legalization has finished.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49634 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-14 06:48:48 +00:00
Duncan Sands
4a6da60787 LegalizeTypes can sometimes have deleted nodes
in its maps.  Add some sanity checks that catch
this kind of thing.  Hopefully these can be
removed one day (once all problems are fixed!)
but for the moment it seems wise to have them in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49612 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-13 16:04:03 +00:00
Nicolas Geoffray
c0cb28fd3a Add a divided flag for the first piece of an argument divided into mulitple parts. Fixes PR1643
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49611 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-13 13:40:22 +00:00
Duncan Sands
460a14e09c Factor some libcall code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49583 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-12 17:14:18 +00:00
Dan Gohman
707e018423 Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-12 04:36:06 +00:00
Gabor Greif
78256a199e detabify
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49524 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-11 09:34:57 +00:00
Dan Gohman
36b5c1338a Rename MemOperand to MachineMemOperand. This was suggested by
review feedback from Chris quite a while ago. No functionality
change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-07 19:35:22 +00:00
Roman Levenstein
dc1adac582 Re-commit of the r48822, where the infinite looping problem discovered
by Dan Gohman is fixed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49330 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-07 10:06:32 +00:00
Torok Edwin
4fea2e982d Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant.
Part of enhancement for PR2191.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49280 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-06 21:23:02 +00:00
Dale Johannesen
a4091d34f3 Make sure both PendingLoads and PendingExports are flushed
before an invoke.  Failure to do this causes references in
the landing pad to variables that were not set.  Fixes
g++.dg/eh/delayslot1.C
g++.dg/eh/fp-regs.C
g++.old-deja/g++.brendan/eh1.C



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49243 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-04 23:48:31 +00:00
Evan Cheng
8a50f1fcf0 Start of a series of patches related to implicit_def.
There is no point in creating a long live range defined by an implicit_def. Scheduler now duplicates implicit_def instruction for each of its uses. Therefore, if an implicit_def node has multiple uses, it will become a number of very short live ranges, rather than a long one. This will make coalescer's job easier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49164 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-03 16:36:07 +00:00
Evan Cheng
6397c64441 Backing out 48222 temporarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49124 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-03 03:13:16 +00:00
Dale Johannesen
1532f3ddd7 Recommitting EH patch; this should answer most of the
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49064 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-02 00:25:04 +00:00
Dale Johannesen
b6d5b14390 Revert 49006 for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49046 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 20:00:57 +00:00
Evan Cheng
9845eb5b03 More soft fp fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49016 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 02:18:22 +00:00
Evan Cheng
db45d1c649 Pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49014 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 02:00:09 +00:00
Evan Cheng
6ad2f930da Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49013 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 01:51:26 +00:00
Evan Cheng
110cf48752 Unbreak ARM / Thumb soft FP support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49012 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-01 01:50:16 +00:00
Dale Johannesen
1544e4713b Emit exception handling info for functions which are
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.

llvm-gcc generates nounwind in the right places; other FEs
will need to do so also.  Given such a FE, -enable-eh should
no longer be needed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31 23:40:23 +00:00
Dan Gohman
b061c4bc44 Fix a DAGCombiner optimization to respect volatile qualification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48994 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-31 20:32:52 +00:00
Chris Lattner
d27c991ceb Fix "Control reaches the end of non-void function" warnings,
patch by David Chisnall.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48963 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-30 18:22:13 +00:00
Evan Cheng
fd5da6c991 Cosmetic changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48947 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-29 18:34:22 +00:00
Chris Lattner
2a88a5c92f ifdef out a dead function. Should this be removed?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48916 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-28 15:36:27 +00:00
Duncan Sands
e10efce225 Rename getAnyLoad to getLoad is suggested by Evan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48914 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-28 09:45:24 +00:00
Duncan Sands
14ea39cf3c Implement LegalizeTypes support for softfloat LOAD.
In order to handle indexed nodes I had to introduce
a new constructor, and since I was there I factorized
the code in the various load constructors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48894 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27 20:23:40 +00:00
Dan Gohman
86e1ebf9bb Avoid creating chain dependencies from CopyToReg nodes to load and store
nodes. This doesn't currently have much impact the generated code, but it
does produce simpler-looking SelectionDAGs, and consequently
simpler-looking ScheduleDAGs, because there are fewer spurious
dependencies.

In particular, CopyValueToVirtualRegister now uses the entry node as the
input chain dependency for new CopyToReg nodes instead of calling getRoot
and depending on the most recent memory reference.

Also, rename UnorderedChains to PendingExports and pull it up from being
a local variable in SelectionDAGISel::BuildSelectionDAG to being a
member variable of SelectionDAGISel, so that it doesn't have to be
passed around to all the places that need it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48893 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27 19:56:19 +00:00
Roman Levenstein
d7d3ea00c0 Fix spelling. Thanks, Duncan! :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48873 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27 09:44:37 +00:00
Roman Levenstein
95d4184e72 Speed-up the SumOfUnscheduledPredsOfSuccs by introducing a new function
called LimitedSumOfUnscheduledPredsOfSuccs. It terminates the computation
after a given treshold is reached. This new function is always faster, but
brings real wins only on bigger test-cases.

The old function SumOfUnscheduledPredsOfSuccs is left in-place for now and therefore a warning about an unused static function is produced.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-27 09:14:57 +00:00
Roman Levenstein
e326332acd Use a linked data structure for the uses lists of an SDNode, just like
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.

The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.

On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48822 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26 12:39:26 +00:00
Roman Levenstein
8dba9afd08 Fixed some spelling errors. Thanks, Duncan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48819 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26 11:23:38 +00:00
Roman Levenstein
e513ba4958 Some improvements related to the computation of isReachable.
This fixes Bugzilla #1835 (http://llvm.org/bugs/show_bug.cgi?id=1835).
This patched is reviewed by Tanya and Dan. Dan tested and approved it.

The reason for the bad performance of the old algorithm is that it is very naive and scans every
time all nodes of the DAG in the worst case.

This patch introduces  a new algorithm based on the paper "Online algorithms
for maintaining the topological order of a directed acyclic graph" by
David J.Pearce and Paul H.J.Kelly. This is the MNR algorithm. It has a
linear time worst-case and performs much better in most situations.

The paper can be found here:
http://fano.ics.uci.edu/cites/Document/Online-algorithms-for-maintaining-the-topological-order-of-a-directed-acyclic-graph.html

The main idea of the new algorithm is to compute the topological ordering of the SNodes in the
DAG and to maintain it even after DAG modifications. The topological ordering allows for very fast 
node reachability checks. 

Tests on very big  input files with tens of thousands of instructions in a BB indicate huge 
speed-ups (up to 10x compilation time improvement) compared to the old version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48817 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-26 09:18:09 +00:00
Dan Gohman
cfbb2f074d A quick nm audit turned up several fixed tables and objects that were
marked read-write. Use const so that they can be allocated in a
read-only segment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48800 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 21:45:14 +00:00
Evan Cheng
26471c48b3 Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48792 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 20:08:07 +00:00
Dan Gohman
cffbd2562a Fix typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-25 17:10:29 +00:00
Evan Cheng
ea10046ebc Remove an unneeded test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48755 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24 23:55:16 +00:00
Dan Gohman
4c931fc6e2 APIntify SelectionDAG's EXTRACT_ELEMENT code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48726 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-24 16:38:05 +00:00
Anton Korobeynikov
c73ede0a9b Another comments fixing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48683 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-22 07:53:40 +00:00
Evan Cheng
08b1173971 Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48673 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-22 01:55:50 +00:00
Dan Gohman
4145bd509d Fix -view-sunit-dags to support cross-rc-copy nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48664 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 22:51:06 +00:00
Duncan Sands
276dcbdc8d Introduce a new node for holding call argument
flags.  This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines.  There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness.  As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48640 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-21 09:14:45 +00:00
Christopher Lamb
b9b0428004 Check even more carefully before applying this DAGCombine transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48580 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20 04:31:39 +00:00
Evan Cheng
260e07ec8c Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48578 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20 02:18:41 +00:00
Chris Lattner
71a2cb25eb detabify llvm, patch by Mike Stump!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48577 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20 01:22:40 +00:00
Christopher Lamb
15cbde3cf6 Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 08:30:06 +00:00
Bill Wendling
2974e49019 Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48510 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 22:29:51 +00:00
Dale Johannesen
cf49819877 Make conversions of i8/i16 to ppcf128 work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48493 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 17:28:38 +00:00
Christopher Lamb
981576c818 Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48491 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 16:46:39 +00:00
Christopher Lamb
c929823525 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-16 03:12:01 +00:00
Evan Cheng
da47e6e0d0 Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15 00:03:38 +00:00
Duncan Sands
23a1d0c161 Do not generate special entries in the dwarf eh
table for nounwind calls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48373 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 21:36:24 +00:00
Duncan Sands
d1ba3338d1 Simplify using getIntPtrConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48355 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 05:23:57 +00:00
Nate Begeman
5922f561c6 Tabs -> spaces
Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48351 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 00:53:31 +00:00
Evan Cheng
db2d773fe6 Livein copy scheduling fixes: do not coalesce physical register copies, correctly determine the safe location to insert the copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 00:14:55 +00:00
Dan Gohman
002e5d0a17 More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 22:13:53 +00:00
Evan Cheng
9e23336d0c Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 22:19:41 +00:00
Duncan Sands
d8742eeb2f Initial soft-float support for LegalizeTypes. I rewrote
the fcopysign expansion from LegalizeDAG to get rid of
what seems to be a bug: the use of sign extension means
that when copying the sign bit from an f32 to an f64,
the upper 32 bits of the f64 (now an i64) are set, not
just the top bit...  I also generalized it to work for
any sized floating point types, and removed the bogosity:
  SDOperand Mask1 = (SrcVT == MVT::f64)
    ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
    : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
  Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
(here SrcNVT is an integer with the same size as SrcVT).
As far as I can see this takes a 1 << 63, converts to
a double, converts that to a floating point constant
then converts that to an integer constant, ending up
with... 1 << 63 as an integer constant!  So I just
generate this integer constant directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48305 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 21:27:04 +00:00
Duncan Sands
87a8615015 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48295 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 20:35:19 +00:00
Duncan Sands
25eb043759 Don't try to extract an i32 from an f64. This
getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure.  In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers.  Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48294 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 20:30:08 +00:00
Evan Cheng
c8e3b147ee Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48279 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 07:02:50 +00:00
Evan Cheng
0cec956d81 Total brain cramp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48274 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 02:05:05 +00:00
Anton Korobeynikov
4d86e2a6b8 Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48257 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 22:38:53 +00:00
Dan Gohman
9736028d84 Use the correct value for InSignBit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48245 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:29:43 +00:00
Dan Gohman
ef5d194aaa Initial codegen support for functions and calls with multiple return values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48244 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 21:11:25 +00:00
Christopher Lamb
1fab4a6bbb Recommitting parts of r48130. These do not appear to cause the observed failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 10:09:17 +00:00
Evan Cheng
676dd7c80b When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 07:19:34 +00:00
Duncan Sands
ac7613a326 Some LegalizeTypes code factorization and minor
enhancements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48215 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 06:41:14 +00:00
Chris Lattner
5d03f21744 compile: double test() {}
into:

_test:
	fldz
	ret

instead of:

_test:
	subl	$12, %esp
	#IMPLICIT_DEF %xmm0
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$12, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48213 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 06:21:08 +00:00
Chris Lattner
c5733ac5d3 variadic instructions don't have operand info for variadic arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48208 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 03:14:42 +00:00
Dan Gohman
034f60ed24 Generalize ExpandIntToFP to handle the case where the operand is legal
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 01:59:03 +00:00
Chris Lattner
b779580100 If a register operand comes from the variadic part of a node, don't
verify the register constraint matches what the instruction expects.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48205 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 00:59:28 +00:00
Dan Gohman
6cf9b8adf4 More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48201 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 00:11:06 +00:00
Dan Gohman
45f36ea448 Correctly clone FlaggedNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48196 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:48:14 +00:00
Dan Gohman
f25275cb3c APInt-ify this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48194 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:38:17 +00:00
Dan Gohman
a2e9485e34 Implement more support for fp-to-i128 and i128-to-fp conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:03:31 +00:00
Dan Gohman
76c605b18e Fix mul expansion to check the correct number of bits for
zero extension when checking if an unsigned multiply is
safe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 20:42:19 +00:00
Evan Cheng
62fcc41d95 Somewhat better solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48170 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:58:22 +00:00
Evan Cheng
d2cde68855 Default ISD::PREFETCH to expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:38:10 +00:00
Evan Cheng
4499e495ea Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:31:26 +00:00
Scott Michel
5b8f82e35b Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 15:42:14 +00:00
Evan Cheng
ff247d2ed4 Doh
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 07:59:01 +00:00
Evan Cheng
f79e60649a Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 07:19:13 +00:00
Christopher Lamb
3feb0170a8 Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 06:12:08 +00:00
Dale Johannesen
b8cafe3427 Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 02:17:22 +00:00
Chris Lattner
4c55c633d9 remove an extraneous (and ugly) default argument, thanks Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48117 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 20:04:36 +00:00
Chris Lattner
4468c1fd1c fp_round's produced by getCopyFromParts should always be exact, because
they are produced by calls (which are known exact) and by cross block copies
which are known to be produced by extends.

This improves:

define double @test2() {
	%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
	ret double %tmp85
}

from:

_test2:
	subl	$20, %esp
	# InlineAsm Start
	fld0
	# InlineAsm End
	fstpl	8(%esp)
	movsd	8(%esp), %xmm0
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$20, %esp
	#FP_REG_KILL
	ret

to:

_test2:
	# InlineAsm Start
	fld0
	# InlineAsm End
	#FP_REG_KILL
	ret

by avoiding a f64 <-> f80 trip



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48108 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 09:38:46 +00:00
Chris Lattner
f30e1cf9b7 teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 09:15:31 +00:00
Chris Lattner
02b6d25a27 Add ScheduleDAG support for copytoreg where the src/dst register are
in different register classes, e.g. copy of ST(0) to RFP*.  This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 08:49:15 +00:00
Chris Lattner
d9c4c450bf fix 80 col violation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48100 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 07:51:01 +00:00
Chris Lattner
d43d85ccc9 extend fp values with FP_EXTEND not FP_ROUND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48097 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 07:47:22 +00:00
Chris Lattner
f9d95c8835 Fix two problems in SelectionDAGLegalize::ExpandBUILD_VECTOR's handling
of BUILD_VECTORS that only have two unique elements:

1. The previous code was nondeterminstic, because it walked a map in
   SDOperand order, which isn't determinstic.
2. The previous code didn't handle the case when one element was undef
   very well.  Now we ensure that the generated shuffle mask has the
   undef vector on the RHS (instead of potentially being on the LHS)
   and that any elements that refer to it are themselves undef.  This
   allows us to compile CodeGen/X86/vec_set-9.ll into:

_test3:
	movd	%rdi, %xmm0
	punpcklqdq	%xmm0, %xmm0
	ret

instead of:

_test3:
	movd	%rdi, %xmm1
	#IMPLICIT_DEF %xmm0
	punpcklqdq	%xmm1, %xmm0
	ret

... saving a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48060 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 00:29:42 +00:00
Chris Lattner
f3ba434781 Teach SD some vector identities, allowing us to compile vec_set-9 into:
_test3:
	movd	%rdi, %xmm1
	#IMPLICIT_DEF %xmm0
	punpcklqdq	%xmm1, %xmm0
	ret

instead of:

_test3:
	#IMPLICIT_DEF %rax
	movd	%rax, %xmm0
	movd	%rdi, %xmm1
	punpcklqdq	%xmm1, %xmm0
	ret

This is still not ideal.  There is no reason to two xmm regs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 23:43:36 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 00:58:38 +00:00
Evan Cheng
eb49c4e008 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47998 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-06 17:42:34 +00:00
Evan Cheng
433f6f62ca Constant fold SIGN_EXTEND_INREG with ashr not lshr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47992 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-06 08:20:51 +00:00
Dale Johannesen
0ea0356dff Clarify that CALLSEQ_START..END may not be nested,
and add some protection against creating such.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47957 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 19:14:03 +00:00
Chris Lattner
ec4a5672f8 Generalize FP constant shrinking optimization to apply to any vt
except ppc long double.  This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47938 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 06:48:13 +00:00
Chris Lattner
aa2acbbbf0 Improve comment, pass in the original VT so that we can shrink a long double constant
all the way to float, not stopping at double.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47937 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 06:46:58 +00:00
Dan Gohman
34bc178e4d Codegen support for i128 UINT_TO_FP. This just fixes a
bug in r47928 (Int64Ty is the correct type for the constant
pool entry here) and removes the asserts, now that the code
is capable of handling i128.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47932 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 02:07:31 +00:00
Evan Cheng
6fd599fa69 Add a target lowering hook to control whether it's worthwhile to compress fp constant.
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 01:30:59 +00:00
Andrew Lenharth
d19189e990 64bit CAS on 32bit x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47929 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 01:15:49 +00:00
Dan Gohman
d91446de7a Codegen support for i128 SINT_TO_FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 01:08:17 +00:00
Roman Levenstein
d86449e774 Some improvements related to the computation of heights, depths of SUnits.
The basic idea is that all these algorithms are computing the longest paths from the root node or to the exit node. Therefore the existing implementation that uses and iterative and potentially
exponential algorithm was changed to a well-known graph algorithm based on dynamic programming. It has a linear run-time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47884 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 11:19:43 +00:00
Evan Cheng
ef12057737 Refactor ExpandConstantFP so it can optimize load from constpool of types larger than f64 into extload from smaller types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47883 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 08:05:30 +00:00
Evan Cheng
917be6814e Rename isOperand() to isOperandOf() (and other similar methods). It always confuses me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-04 00:41:45 +00:00
Dan Gohman
220a823f8d Misc. APInt-ification in the DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47869 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-03 23:51:38 +00:00
Dan Gohman
bb271ff9fe More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47868 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-03 23:35:36 +00:00
Dan Gohman
3370dd70ae Yet more APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47867 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-03 22:37:52 +00:00
Dan Gohman
6c6cd1ccb5 More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47866 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-03 22:22:56 +00:00
Dan Gohman
050f550aeb More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47864 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-03 22:20:46 +00:00
Andrew Lenharth
26ed8697d4 all but CAS working on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47798 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-01 21:52:34 +00:00
Dale Johannesen
3c8b59c546 Add MVT::is128BitVector and is64BitVector. Shrink
unaligned load/store code using them.  Per review
of unaligned load/store vector patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47782 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-01 03:40:57 +00:00
Evan Cheng
84d4a2b4ad Refactor / clean up code; remove td list scheduler special tie breaker (no real benefit).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-01 00:39:47 +00:00
Dan Gohman
6c231501f8 More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-29 01:47:35 +00:00
Dan Gohman
c7773bf90e Use the new convertFromAPInt instead of convertFromZeroExtendedInteger,
which allows more of the surrounding arithmetic to be done with APInt
instead of uint64_t.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47745 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-29 01:44:25 +00:00
Dan Gohman
c6f9a06238 Use the new APInt-enabled form of getConstant instead of converting
an APInt into a uint64_t to call getConstant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47742 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-29 01:41:59 +00:00
Dale Johannesen
28d08fdb9f Interface of getByValTypeAlignment differed between
generic & x86 versions; change generic to follow x86
and improve comments.  Add PPC version (not right
for non-Darwin.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 22:31:51 +00:00
Dale Johannesen
cd9f1747ab Fix an assertion message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47722 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 18:36:51 +00:00
Evan Cheng
643afa55e7 Keep track how many commutes are performed by the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47710 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 07:40:24 +00:00
Chris Lattner
e07415d400 implement expand for ISD::DECLARE by just deleting it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47708 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 05:53:40 +00:00
Evan Cheng
fb8075d03f Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 00:43:03 +00:00
Dale Johannesen
8155d64c2f Handle load/store of misaligned vectors that are the
same size as an int type by doing a bitconvert of
load/store of the int type (same algorithm as floating point).
This makes them work for ppc Altivec.  There was some
code that purported to handle loads of (some) vectors
by splitting them into two smaller vectors, but getExtLoad
rejects subvector loads, so this could never have worked;
the patch removes it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 22:36:00 +00:00
Dan Gohman
18714aeaed Remove the `else', at Evan's insistence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47686 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 19:44:57 +00:00
Duncan Sands
052e976f85 Add a FIXME about the VECTOR_SHUFFLE evil hack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47676 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 17:39:13 +00:00