Eli Friedman
bcae205a4b
More info on this transformation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 23:23:43 +00:00
Eli Friedman
1555473387
Remove some stuff that's already implemented. Also, remove the note about
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merging x >u 5 and x <s 20 because it's impossible to implement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91228 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 21:41:48 +00:00
Evan Cheng
dd99f3a7dc
Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 20:03:14 +00:00
Anton Korobeynikov
2625de35ed
Implement variable-width shifts.
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No testcase yet - it seems we're exposing generic codegen bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91221 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 18:55:37 +00:00
Evan Cheng
04ab19cb14
Add comment about potential partial register stall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91220 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 18:55:26 +00:00
Evan Cheng
15b0d97068
Fix an obvious bug. No test case since LEA16r is not being used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 18:51:56 +00:00
Jim Grosbach
e801dc4a7b
Framework for atomic binary operations. The emitter for the pseudo instructions
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just issues an error for the moment. The front end won't yet generate these
intrinsics for ARM, so this is behind the scenes until complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 01:40:06 +00:00
Anton Korobeynikov
8d1ffbd1ad
Lower setcc branchless, if this is profitable.
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Based on the patch by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 23:01:29 +00:00
Dan Gohman
87862e77bb
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 21:31:27 +00:00
Jim Grosbach
c8f9e4fdc5
memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 20:29:53 +00:00
Anton Korobeynikov
817a46454a
Honour setHasCalls() set from isel.
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This is used in some weird cases like general dynamic TLS model.
This fixes PR5723
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:39:55 +00:00
Johnny Chen
0291d7ed09
Store Register Exclusive should leave the source register Inst{3-0} unspecified.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:37:26 +00:00
Jim Grosbach
66869104dd
Update properties.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91140 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 18:52:41 +00:00
Evan Cheng
656e51454a
Add support to 3-addressify 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 06:01:48 +00:00
Jim Grosbach
5278eb802f
Rough first pass at compare_and_swap atomic builtins for ARM mode. Work in progress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 01:42:04 +00:00
Jim Grosbach
cbd77d2cb1
Add instruction encoding for DMB/DSB
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 18:35:32 +00:00
Jim Grosbach
3728e96a6c
Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91003 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 00:11:09 +00:00
Evan Cheng
c363094e04
Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
...
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>
iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 21:00:30 +00:00
Evan Cheng
7bd6478cd6
Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90925 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 01:53:58 +00:00
Evan Cheng
64fa4a9584
Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90922 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 01:36:00 +00:00
Evan Cheng
d831cda3e7
- Support inline asm 'w' constraint for 128-bit vector types.
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- Also support the 'q' NEON registers asm code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 23:06:22 +00:00
Anton Korobeynikov
9aa1ec87b0
Reduce (cmp 0, and_su (foo, bar)) into (bit foo, bar). This saves extra instruction. Patch inspired by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90819 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 01:03:04 +00:00
Dan Gohman
d84ea47b89
Don't enable the post-RA scheduler on x86 except at -O3. In its
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current form, it is too expensive in compile time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90781 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 19:04:31 +00:00
Anton Korobeynikov
6bfcba7e13
Some pretty-printing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:28:41 +00:00
Anton Korobeynikov
06ccca5f70
Add lowering of returnaddr and frameaddr intrinsics. Shamelessly stolen from x86 :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:28:10 +00:00
Anton Korobeynikov
e662f7a8b2
Initial codegen support for MSP430 ISRs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90739 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:27:53 +00:00
Anton Korobeynikov
b2de1ea29b
Add ability to select hw multiplier mode and select appropriate libcalls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90737 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-07 02:27:08 +00:00
Anton Korobeynikov
7cca606aaa
Dynamic stack realignment use of sp register as source/dest register
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in "bic sp, sp, #15 " leads to unpredicatble behaviour in Thumb2 mode.
Emit the following code instead:
mov r4, sp
bic r4, r4, #15
mov sp, r4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-06 22:39:50 +00:00
Bill Wendling
740266269b
Calling InvalidateEntry during the refinement was breaking the bootstrap.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90656 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 07:59:04 +00:00
Bill Wendling
32bc2362a1
Final cleanups:
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- Privatize a typedef.
- Call the InvalidateEntry when refining a type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90655 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 07:46:49 +00:00
Bill Wendling
688da28687
Inline methods which are called only once.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90640 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 01:46:01 +00:00
Bill Wendling
5681689795
Refactor some code. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90639 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 01:43:33 +00:00
Dan Gohman
864e2efce2
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
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MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 00:44:40 +00:00
David Greene
adbc23cae1
Remove an unneeded include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90625 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 23:55:07 +00:00
David Greene
29dbf50b18
Have hasLoad/StoreFrom/ToStackSlot return the relevant MachineMemOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90608 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 22:38:46 +00:00
Bill Wendling
1500c4f49a
Some code cleanup. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90588 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 21:03:02 +00:00
Jim Grosbach
4dc4a61c0c
remove out of date FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90490 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 21:55:01 +00:00
Chris Lattner
89742c2c3f
expand note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90429 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 07:43:46 +00:00
Chris Lattner
053321731c
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 07:41:54 +00:00
Chris Lattner
56856b1f46
fix a build problem with VC++, PR5664, patch by Alp Toker!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 06:58:32 +00:00
Bob Wilson
324f4f1633
Recognize canonical forms of vector shuffles where the same vector is used for
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both source operands. In the canonical form, the 2nd operand is changed to an
undef and the shuffle mask is adjusted to only reference elements from the 1st
operand. Radar 7434842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 06:40:55 +00:00
Bill Wendling
cb06403145
Revert r90371. It was causing build failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90383 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 01:54:07 +00:00
Bill Wendling
b8e675c3c1
Further improvements: refactoring code that does the same thing into one
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function, converting "dyn_cast" to "cast", asserting the correct things, and
other general cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90371 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 01:15:46 +00:00
Chris Lattner
bf108bdee5
yay for case insensitive file systems (?)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 01:10:05 +00:00
Chris Lattner
35e86af8e5
remove some dead std::ostream using code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:55:04 +00:00
Chris Lattner
7896c9f436
improve portability to avoid conflicting with std::next in c++'0x.
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Patch by Howard Hinnant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:50:42 +00:00
Bill Wendling
dd5eb02304
This initial code is meant to convert TargetData to use an AbstractTypesUser so
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that it doesn't have dangling pointers when abstract types are resolved. This
modifies it somewhat to address comments: making the "StructLayoutMap" an
anonymous structure, calling "removeAbstractTypeUser" when appropriate, and
adding asserts where helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:17:12 +00:00
Jim Grosbach
e27d205d5d
Factor the stack alignment calculations out into a target independent pass.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-02 19:30:24 +00:00
Jim Grosbach
d122874996
Thumb1 exception handling setjmp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 18:10:36 +00:00
Johnny Chen
b731e87649
For VLDM/VSTM (Advanced SIMD), set encoding bits Inst{11-8} to 0b1011.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90243 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 17:37:06 +00:00
Johnny Chen
208d76cad9
For VMOV (immediate), make some of the encoding bits (cmode and op) unspecified.
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For VMOVv*i[16,32], op bit is don't care, and some cmode bits vary depending on
the immediate values.
Ref: Table A7-15 Modified immediate values for Advanced SIMD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 00:02:02 +00:00
Dan Gohman
39a1fab856
Minor whitespace fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90166 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 23:33:53 +00:00
Dan Gohman
22f6526081
Fix a minor inconsistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90165 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 23:33:37 +00:00
Bob Wilson
15217e63bc
Remove isProfitableToDuplicateIndirectBranch target hook. It is profitable
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for all the processors where I have tried it, and even when it might not help
performance, the cost is quite low. The opportunities for duplicating
indirect branches are limited by other factors so code size does not change
much due to tail duplicating indirect branches aggressively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 18:35:03 +00:00
Bob Wilson
afa1df467b
Fix some more ARM unified syntax warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90141 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 17:47:19 +00:00
Mon P Wang
cd6e725f21
Added support to allow clients to custom widen. For X86, custom widen vectors for
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divide/remainder since these operations can trap by unroll them and adding undefs
for the resulting vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 02:42:02 +00:00
Chris Lattner
d4137f40da
update and consolidate the load pre notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-29 02:19:52 +00:00
Chris Lattner
1d159838a3
add a deadargelim note.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90009 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-27 17:12:30 +00:00
Chris Lattner
6d94926a52
This testcase is actually only partially redundant, and requires
...
the FIXME I added yesterday to be implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-27 16:53:57 +00:00
Chris Lattner
20ce7c0ded
this (and probably several others) are now done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89982 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-27 00:35:04 +00:00
Chris Lattner
cc3d0eb483
Teach memdep to phi translate bitcasts. This allows us to compile
...
the example in GCC PR16799 to:
LBB1_2: ## %bb1
movl %eax, %eax
subq %rax, %rdi
movq %rdi, (%rcx)
movl (%rdi), %eax
testl %eax, %eax
je LBB1_2
instead of:
LBB1_2: ## %bb1
movl (%rdi), %ecx
subq %rcx, %rdi
movq %rdi, (%rax)
cmpl $0, (%rdi)
je LBB1_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 23:41:07 +00:00
Chris Lattner
5d5261c819
Teach basicaa that x|c == x+c when the c bits of x are clear. This
...
allows us to compile the example in readme.txt into:
LBB1_1: ## %bb
movl 4(%rdx,%rax), %ecx
movl %ecx, %esi
imull (%rdx,%rax), %esi
imull %esi, %ecx
movl %esi, 8(%rdx,%rax)
imull %ecx, %esi
movl %ecx, 12(%rdx,%rax)
movl %esi, 16(%rdx,%rax)
imull %ecx, %esi
movl %esi, 20(%rdx,%rax)
addq $16, %rax
cmpq $4000, %rax
jne LBB1_1
instead of:
LBB1_1:
movl (%rdx,%rax), %ecx
imull 4(%rdx,%rax), %ecx
movl %ecx, 8(%rdx,%rax)
imull 4(%rdx,%rax), %ecx
movl %ecx, 12(%rdx,%rax)
imull 8(%rdx,%rax), %ecx
movl %ecx, 16(%rdx,%rax)
imull 12(%rdx,%rax), %ecx
movl %ecx, 20(%rdx,%rax)
addq $16, %rax
cmpq $4000, %rax
jne LBB1_1
GCC (4.2) doesn't seem to be able to eliminate the loads in this
testcase either, it generates:
L2:
movl (%rdx), %eax
imull 4(%rdx), %eax
movl %eax, 8(%rdx)
imull 4(%rdx), %eax
movl %eax, 12(%rdx)
imull 8(%rdx), %eax
movl %eax, 16(%rdx)
imull 12(%rdx), %eax
movl %eax, 20(%rdx)
addl $4, %ecx
addq $16, %rdx
cmpl $1002, %ecx
jne L2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 16:26:43 +00:00
Chris Lattner
f6ac4d9dad
teach basicaa that A[i] != A[i+1].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89951 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 16:18:10 +00:00
Chris Lattner
9c6a0dcf0e
update some notes slightly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89913 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-26 01:51:18 +00:00
Viktor Kutuzov
308f6630a3
Rollback changes r89516: Added two SubtargetFeatures::AddFeatures methods, which accept a comma-separated string or already parsed command line parameters as input, and some code re-factoring to use these new methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89893 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 22:44:18 +00:00
Bob Wilson
de9b1dae37
Tail duplicate indirect branches for PowerPC, too.
...
With the testcase for pr3120, the "threaded interpreter" runtime decreases
from 1788 to 1413 with this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89877 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 19:57:14 +00:00
Benjamin Kramer
1c3451fc99
Avoid some possibly unsafe uses of StringRef::data().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89873 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 18:26:09 +00:00
Devang Patel
65dbc909f5
Use StringRef (again) in DebugInfo interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 17:36:49 +00:00
Bob Wilson
4a66e5bfc2
Based on the testcase for pr3120, running on my MacPro with Xeon processors,
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it is definitely profitable to tail duplicate indirect branches for x86.
This is likely to be true to various degrees for all modern x86 processors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89865 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 17:27:53 +00:00
Bruno Cardoso Lopes
d71cebf575
Support PIC loading of constant pool entries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 12:17:58 +00:00
Daniel Dunbar
5f9b9efa17
Sketch structure for X86 disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89850 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 06:53:08 +00:00
Bruno Cardoso Lopes
37fd537544
Use endianess dependent offsets for load/store of doubles when
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using two swc/lwc instead of sdc/ldc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89826 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 01:05:25 +00:00
Dale Johannesen
0106a0aafe
Fix compiler warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89824 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 00:58:21 +00:00
Bruno Cardoso Lopes
5f222b18e3
Only include in the callee saved regs the sub registers to avoid
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unnecessary save/restore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89823 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 00:47:43 +00:00
Bruno Cardoso Lopes
302525b234
Add proper emission of load/store double to stack slots for mips1 targets!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89821 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 00:36:00 +00:00
Devang Patel
7dbc610309
Revert r89803.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89819 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 00:31:13 +00:00
Bob Wilson
f8c4cfb7cc
Refactor target hook for tail duplication as requested by Chris.
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Make tail duplication of indirect branches much more aggressive (for targets
that indicate that it is profitable), based on further experience with
this transformation. I compiled 3 large applications with and without
this more aggressive tail duplication and measured minimal changes in code
size. ("size" on Darwin seems to round the text size up to the nearest
page boundary, so I can only say that any code size increase was less than
one 4k page.) Radar 7421267.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 23:35:49 +00:00
Dale Johannesen
f7801b493e
Do not store R31 into the caller's link area on PPC.
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This violates the ABI (that area is "reserved"), and
while it is safe if all code is generated with current
compilers, there is some very old code around that uses
that slot for something else, and breaks if it is stored
into. Adjust testcases looking for current behavior.
I've verified that the stack frame size is right in all
testcases, whether it changed or not. 7311323.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89811 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 22:59:02 +00:00
Devang Patel
eac79170d2
Enable debug info for ppc-darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89803 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 21:38:54 +00:00
Evan Cheng
d7f0810c93
Enable predication of NEON instructions in Thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89748 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 08:06:15 +00:00
Dale Johannesen
b60d5194f5
Make capitalization of names starting "is" more consistent.
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No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 01:09:07 +00:00
Evan Cheng
9d172d5ee7
Data type suffix must come after predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 01:05:23 +00:00
Anton Korobeynikov
5cdc3a949a
Materialize global addresses via movt/movw pair, this is always better
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than doing the same via constpool:
1. Load from constpool costs 3 cycles on A9, movt/movw pair - just 2.
2. Load from constpool might stall up to 300 cycles due to cache miss.
3. Movt/movw does not use load/store unit.
4. Less constpool entries => better compiler performance.
This is only enabled on ELF systems, since darwin does not have needed
relocations (yet).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 00:44:37 +00:00
Jim Grosbach
6935efcb66
80 column violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89718 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 00:20:27 +00:00
Jeffrey Yasskin
108c838093
* Move stub allocation inside the JITEmitter, instead of exposing a
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way for each TargetJITInfo subclass to allocate its own stubs. This
means stubs aren't as exactly-sized anymore, but it lets us get rid of
TargetJITInfo::emitFunctionStubAtAddr(), which lets ARM and PPC
support the eager JIT, fixing http://llvm.org/PR4816 .
* Rename the JITEmitter's stub creation functions to describe the kind
of stub they create. So far, all of them create lazy-compilation
stubs, but they sometimes get used when far-call stubs are needed.
Fixing http://llvm.org/PR5201 will involve fixing this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 23:35:19 +00:00
Dan Gohman
735afe14ee
Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.
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Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 23:20:51 +00:00
Jeffrey Yasskin
0261d795f8
Allow more than one stub to be being generated at the same time.
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It's probably better in the long run to replace the
indirect-GlobalVariable system. That'll be done after a subsequent
patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89708 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 22:49:00 +00:00
Evan Cheng
f81bf15552
Massive refactoring of NEON instructions. Separate opcode from data size specifier suffix, move \t up stream to instruction format, and fix more 80 column violations.
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This fixes the NEON asm printing so the "predicate" field is printed between the opcode and the data type suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:57:23 +00:00
Jim Grosbach
77b02beb1f
move fconst[sd] to UAL. <rdar://7414913>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89700 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:08:25 +00:00
Johnny Chen
da1aea4d75
Partially revert r84730 by removing N2VDup from ARMInstrFormats.td and modifying
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VDUPLND and VDUPLNQ to derive from N2V instead of N2VDup. VDUPLND and VDUPLNQ
now expect op19_18 and op17_16 as the first two args.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89699 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:00:43 +00:00
Jim Grosbach
15e6ef886d
fold immediate of a + Const into the user as a subtract if it can fit as a negated two-part immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89694 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 20:35:53 +00:00
Johnny Chen
b16ed11cb4
Revert r84572 by removing N3VImm from ARMInstrFormats.td now that we can specify
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{?,?,?,?} as op11_8 for VEXTd and VEXTq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 20:09:13 +00:00
Johnny Chen
7ebd32a1b8
Partially revert r89377 by removing NLdStLN class definition from
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ARMInstrFormats.td and fixing VLD[234]LN* and VST[234]LN* to derive from NLdSt
instead of NLdStLN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89684 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 18:16:16 +00:00
Johnny Chen
131c4a5257
Make it clear that the index bit(s) of Vector Get Lane and Vector Set Lane
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should be left unspecified now that Bob Wilson has fixed pr5470.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89676 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 17:48:17 +00:00
David Goodwin
7776452a18
Minor itinerary fixes for FP instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 17:34:12 +00:00
Jim Grosbach
a37aa54622
Move default FrameReg val to getFrameIndexReference(). Otherwise, debug info can get bogus values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89618 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 20:05:32 +00:00
Jim Grosbach
50f8516d2d
Generate more correct debug info for frame indices.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 02:32:29 +00:00
Anton Korobeynikov
1722f061a3
Minor optimization: when doing eq/ne comparions and RHS is a constant - swap operands, this will allow us to fold imm into comparison.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:14:08 +00:00
Anton Korobeynikov
ef4e604603
Drop unsupported imm operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89573 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:13:54 +00:00
Anton Korobeynikov
3741be39f9
Use 2-byte alignment for functions. 4 bytes are clear overkill here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:13:39 +00:00
Anton Korobeynikov
3c97fc9ae4
Use semicolon as assembler comment string
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 01:12:49 +00:00
Jim Grosbach
21ce2e3c74
Revert 89562. We're being sneakier than I was giving us credit for, and this
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isn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 23:34:09 +00:00
Jim Grosbach
f3b33d0b2a
Darwin requires a frame pointer for all non-leaf functions to support correct
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backtraces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 21:40:08 +00:00
Evan Cheng
ac0869dc8a
Add predicate operand to NEON instructions. Fix lots (but not all) 80 col violations in ARMInstrNEON.td.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 06:21:52 +00:00
Devang Patel
bef8888a91
We are not using DBG_STOPPOINT anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89536 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 02:46:55 +00:00
Viktor Kutuzov
054b52c366
Added two SubtargetFeatures::AddFeatures methods, which accept a comma-separated string or already parsed command line parameters as input, and some code re-factoring to use these new methods.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89516 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 00:00:02 +00:00
Dan Gohman
d9e05cd22a
Fix a thinko that caused spurious @GOTOFFs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:30:32 +00:00
Dan Gohman
71a419631f
Update for new getBlockAddress signature.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89507 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:21:00 +00:00
Dan Gohman
29cbade25a
Target-independent support for TargetFlags on BlockAddress operands,
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and support for blockaddresses in x86-32 PIC mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89506 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 23:18:13 +00:00
Sean Callanan
b9e6b34e1e
Recommitting PALIGNR shift width fixes.
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Thanks to Daniel Dunbar for fixing clang intrinsics:
http://llvm.org/viewvc/llvm-project?view=rev&revision=89499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:28:42 +00:00
Dale Johannesen
5ca124691b
Remove an incorrect overaggressive optimization
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(PPC specific).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:16:40 +00:00
Sean Callanan
1bbf6d1a6f
Reverting PALIGNR fix until I figure out how this
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broke the Clang testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89495 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:09:28 +00:00
Sean Callanan
201dfa7432
Fixed PALIGNR to take 8-bit rotations in all cases.
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Also fixed the corresponding testcase, and the PALIGNR
intrinsic (tested for correctness with llvm-gcc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89491 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 21:40:28 +00:00
Evan Cheng
4aedb61d03
Remat VLDRD from constpool. Clean up some instruction property specifications.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:57:15 +00:00
Jim Grosbach
a9562568e5
The verify() call of CPEIsInRange() isn't right for the assertion check of
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constant pool ranges, as CPEIsInRange() makes conservative assumptions about
the potential alignment changes from branch adjustments. The verification,
on the other hand, runs after those branch adjustments are made, so the
effects on alignment are known and already taken into account. The sanity
check in verify should check the range directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89473 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:37:38 +00:00
Jim Grosbach
de8b1dbf95
Remove verifySizes() since it's not adding much value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89443 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:32:06 +00:00
Evan Cheng
9b82425cb0
Also CSE non-pic load from constant pools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:10:27 +00:00
Evan Cheng
9ef4835bd8
Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 00:54:03 +00:00
Eric Christopher
0dde97156c
Update comment to reflect instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89414 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 00:21:55 +00:00
Jim Grosbach
4d8e90a026
When placing constant islands and adjusting for alignment padding, inline
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assembly can confuse things utterly, as it's assumed that instructions in
inline assembly are 4 bytes wide. For Thumb mode, that's often not true,
so the calculations for when alignment padding will be present get thrown off,
ultimately leading to out of range constant pool entry references. Making
more conservative assumptions that padding may be necessary when inline asm
is present avoids this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89403 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 23:10:28 +00:00
Evan Cheng
07ba906413
Refactor cmov selection code out to a separate function. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89396 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 21:45:22 +00:00
Bill Wendling
fb7634f1c7
Reverting the EH table patches.
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$ svn merge -c -89279 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r89279 into '.':
U lib/CodeGen/AsmPrinter/DwarfException.cpp
U lib/Target/TargetLoweringObjectFile.cpp
$ svn merge -c -89270 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r89270 into '.':
G lib/CodeGen/AsmPrinter/DwarfException.cpp
G lib/Target/TargetLoweringObjectFile.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 19:21:09 +00:00
Johnny Chen
5c376ff9f0
Added NLdStLN which is similar to NLdSt with the exception that op7_4 is not
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fully specified at this level. Subclasses of NLdStLN can specify selective
bit(s) for Inst{7-4}, as is done for VLD[234]LN* and VST[234]LN* inside
ARMInstrNEON.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 19:20:17 +00:00
Jim Grosbach
dec6de92d1
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 18:23:19 +00:00
Dan Gohman
57474fa0f6
Fix a typo in a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 16:35:11 +00:00
Evan Cheng
ed54de40a7
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89337 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 08:16:50 +00:00
Evan Cheng
2ef9c8a43d
More consistent thumb1 asm printing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:57:41 +00:00
Evan Cheng
5b397c93a5
Shrink ldr / str [sp, imm0-1024] to 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:32:27 +00:00
Evan Cheng
a64ce45917
Eliminate more * 4 in Thumb1 asm printing for consistency sake.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89325 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:31:26 +00:00
Bruno Cardoso Lopes
2045c47aff
- Add sugregister logic to handle f64=(f32,f32).
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- Support mips1 like load/store of doubles:
Instead of:
sdc $f0, X($3)
Generate:
swc $f0, X($3)
swc $f1, X+4($3)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89322 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:06:13 +00:00
Bruno Cardoso Lopes
0046de0550
Only use small sections for non linux targets!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89316 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 05:28:18 +00:00
Bill Wendling
01c69374b5
The "ReadOnlyWithRel" enum seems to apply more to what Darwin does with the EH
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exception table than DataRel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 00:09:14 +00:00
Richard Osborne
bea7df56ce
Add XCore support for indirectbr / blockaddress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89273 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 23:20:42 +00:00
Bill Wendling
ec04458551
Attempt #2 :
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Place the EH table in the __TEXT section on MachO. It saves space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89270 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 23:18:46 +00:00
Viktor Kutuzov
e823db8bae
Added getDefaultSubtargetFeatures method to SubtargetFeatures class which returns a correct feature string for given triple.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89236 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 20:20:05 +00:00
David Goodwin
ebb5cb9216
Add ARMv6 itineraries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 18:39:57 +00:00
Bob Wilson
a3003004aa
Fix a few places that were missed when we converted to unified syntax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89214 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 18:10:35 +00:00
Bob Wilson
834b08af8d
Add a target hook to allow changing the tail duplication limit based on the
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contents of the block to be duplicated. Use this for ARM Cortex A8/9 to
be more aggressive tail duplicating indirect branches, since it makes it
much more likely that they will be predicted in the branch target buffer.
Testcase coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89187 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 03:34:27 +00:00
Bill Wendling
5eea342673
The llvm-gcc front-end and the pass manager use two separate TargetData objects.
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This is probably not confined to *just* these two things.
Anyway, the llvm-gcc front-end may look up the structure layout information for
an abstract type. That information will be stored into a table with the FE's
TD. Instruction combine can come along and also ask for information on that
abstract type, but for a separate TD (the one associated with the pass manager).
After the type is refined, the old structure layout information in the pass
manager's TD file is out of date. If a new type is allocated in the same space
as the old-unrefined type, then the structure type information in the pass
manager's TD file will be wrong, but won't know it.
Fix this by making the TD's structure type information an abstract type user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 01:03:56 +00:00
Jim Grosbach
f04777b945
Enable arm jumpt table adjustment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 21:24:11 +00:00
Anton Korobeynikov
bce3dbd9be
Both Darwin as and GNU as violate ARM docs wrt printing of addrmode6
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alignment imm (in the same way). Fix asmprinting for non-darwin platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89137 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 20:04:59 +00:00
Johnny Chen
a9ea9ec194
Set Inst{15-12} (Rd/Rt) to 0b1111 (PC) for BR_JTadd, BR_JTr, and BR_JTm to
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distinguish between them and the more generic instructions (add, mov, and ldr).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 17:17:50 +00:00
Evan Cheng
d15ac2fce3
Re-apply 89011. It's not to be blamed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 09:51:18 +00:00
Evan Cheng
6db07eac95
Revert 89011. Buildbot thinks it might be breaking stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89076 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 09:20:28 +00:00
Jim Grosbach
a0a95a3c1c
When moving a block for table jumps, make sure the prior block terminator
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is analyzable so it can be updated. If it's not, be safe and don't move the
block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 01:21:04 +00:00
Evan Cheng
6cccc30679
MOV64rm should be marked isReMaterializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 00:55:55 +00:00
Evan Cheng
574186f8ad
A few more instructions that should be marked re-materializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 00:23:22 +00:00
Johnny Chen
9d52e8db8a
Set Rm bits of BX_RET to 0b1110 (R14); and set condition code bits of BRIND to
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0b1110 (ALways). This is so that the disassembler decoder can distinguish among
BX_RET, BRIND, and BXr9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89000 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 23:57:56 +00:00
Jeffrey Yasskin
d1ba06bf13
Make X86-64 in the Large model always emit 64-bit calls.
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The large code model is documented at
http://www.x86-64.org/documentation/abi.pdf and says that calls should
assume their target doesn't live within the 32-bit pc-relative offset
that fits in the call instruction.
To do this, we turn off the global-address->target-global-address
conversion in X86TargetLowering::LowerCall(). The first attempt at
this broke the lazy JIT because it can separate the movabs(imm->reg)
from the actual call instruction. The lazy JIT receives the address of
the movabs as a relocation and needs to record the return address from
the call; and then when that call happens, it needs to patch the
movabs with the newly-compiled target. We could thread the call
instruction into the relocation and record the movabs<->call mapping
explicitly, but that seems to require at least as much new
complication in the code generator as this change.
To fix this, we make lazy functions _always_ go through a call
stub. You'd think we'd only have to force lazy calls through a stub on
difficult platforms, but that turns out to break indirect calls
through a function pointer. The right fix for that is to distinguish
between calls and address-of operations on uncompiled functions, but
that's complex enough to leave for someone else to do.
Another attempt at this defined a new CALL64i pseudo-instruction,
which expanded to a 2-instruction sequence in the assembly output and
was special-cased in the X86CodeEmitter's emitInstruction()
function. That broke indirect calls in the same way as above.
This patch also removes a hack forcing Darwin to the small code model.
Without far-call-stubs, the small code model requires things of the
JITMemoryManager that the DefaultJITMemoryManager can't provide.
Thanks to echristo for lots of testing!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 22:41:33 +00:00
Evan Cheng
600c043697
- Check memoperand alignment instead of checking stack alignment. Most load / store folding instructions are not referencing spill stack slots.
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- Mark MOVUPSrm re-materializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88974 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 21:56:03 +00:00