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1037 Commits

Author SHA1 Message Date
Chris Lattner
ed048c067d add a hack to get code with ordered comparisons working. This hack is 
tracked as PR642


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24068 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-28 20:49:47 +00:00
Chris Lattner
6df2507121 add support for branch on ordered/unordered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24067 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-28 20:32:44 +00:00
Chris Lattner
f02a916d82 Do not globalize internal symbols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24064 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-28 18:44:07 +00:00
Chris Lattner
0195910558 a bad case for bitfield insert 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24051 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-28 00:20:45 +00:00
Jim Laskey
2cbc207c76 Typo made worse x 2 - take 2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24018 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-26 18:07:50 +00:00
Chris Lattner
85fd97dc88 Fix an assert compiling MallocBench/gs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24017 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-26 18:01:11 +00:00
Jim Laskey
ff2fcee846 Typo x 2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24016 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-26 17:50:22 +00:00
Jim Laskey
581a8f79bc Give full control of subtarget features over to table generated code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24013 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-26 17:30:34 +00:00
Jim Laskey
f0c2be4d2b Add attribute name and type to SubtargetFeatures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24012 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-26 17:28:23 +00:00
Nate Begeman
5cd61ce1be Add a note about some bitfield stuff we could be doing better. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23994 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 23:50:02 +00:00
Nate Begeman
ae749a9bb5 Correctly Expand or Promote FP_TO_UINT based on the capabilities of the 
machine.  This allows us to generate great code for i32 FP_TO_UINT now on
targets with 64 bit extensions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23993 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 23:48:36 +00:00
Chris Lattner
6e61ca6fa7 autogen undef 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23991 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 21:03:41 +00:00
Chris Lattner
3075a4e94d Allow pseudos to have patterns, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23988 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 20:58:43 +00:00
Chris Lattner
9c73f095bb Autogen fsel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23987 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 20:55:47 +00:00
Chris Lattner
eb255f2b83 Expose the fextend on the DAG instead of doing it in the matcher 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23986 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 20:54:57 +00:00
Chris Lattner
e6115b370a Autogen a few new ppc-specific nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23985 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 20:41:46 +00:00
Chris Lattner
8ecedbe2c3 The dag isel generator generates this now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23984 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 20:36:10 +00:00
Chris Lattner
99ea9da872 Be a bit more paranoid about calling SelectNodeTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23982 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 20:26:41 +00:00
Chris Lattner
3393e80a06 Fix a couple of minor bugs. The first fixes povray, the second fixes things 
if the dag combiner isn't run


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23981 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 19:32:37 +00:00
Jim Laskey
34bd5d5d87 Preparation of supporting scheduling info. Need to find info based on selected 
CPU.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23974 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-25 15:15:28 +00:00
Chris Lattner
2224dcc88c Simplify this, matching changes in the tblgen emitter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23909 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-23 22:34:25 +00:00
Chris Lattner
aa38be17c8 mark this as beta 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23906 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-23 22:23:45 +00:00
Chris Lattner
c8d28890f6 rearrange things a bit so that instructions can use subtarget features in the 
future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23902 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-23 22:08:13 +00:00
Chris Lattner
2e1f823aed improve -help output 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23892 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-23 05:28:51 +00:00
Jim Laskey
5476b9bfce Add g3 back to the mix and reorder to irritate them anal folk. Actually, it's 
to group appropriately and provide cues to maintainers that the lists don't
need to be ordered.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23880 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-22 08:04:24 +00:00
Chris Lattner
4245f1d790 64-bit reg support should not be enabled by default, as support isn't complete. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23878 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 22:15:43 +00:00
Chris Lattner
dabb8291e8 Instead of aborting if not a case we can handle specially, break out and 
let the generic code handle it.  This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.

also, reindent this code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23874 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 21:17:10 +00:00
Jim Laskey
f5fc2cbd6b Plugin new subtarget backend into the build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23870 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 19:05:19 +00:00
Nate Begeman
ae1641c39f Match rotate. This does actually match the rotates in an rc5 cipher, but I 
haven't seen it fire on our testsuite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23863 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 06:36:18 +00:00
Nate Begeman
405e3ecb56 Invert the TargetLowering flag that controls divide by consant expansion. 
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-21 00:02:42 +00:00
Nate Begeman
12a923408c Add some more patterns for i64 on ppc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23842 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 07:51:08 +00:00
Nate Begeman
6957523b9d Move the target constant divide optimization up into the dag combiner, so 
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23835 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-20 02:15:44 +00:00
Jim Laskey
538421411a Added InstrSchedClass to each of the PowerPC Instructions. 
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 19:51:16 +00:00
Nate Begeman
2d5aff761d Write patterns for the various shl and srl patterns that don't involve 
doing something clever.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23824 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 18:42:01 +00:00
Jim Laskey
0de8796e68 Push processor descriptions to the top of target and add command line info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23820 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 13:34:52 +00:00
Chris Lattner
f6cd147471 now that tblgen is smarter, use integers directly. This should help Andrew too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23818 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 04:32:04 +00:00
Chris Lattner
14c09b81ea teach ppc backend these are copies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23813 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 01:50:36 +00:00
Chris Lattner
8be1fa5dc5 Convert these cases to patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23811 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 01:38:02 +00:00
Nate Begeman
8d94832394 Woo, it kinda works. We now generate this atrociously bad, but correct, 
code for long long foo(long long a, long long b) { return a + b; }

_foo:
        or r2, r3, r3
        or r3, r4, r4
        or r4, r5, r5
        or r5, r6, r6
        rldicr r2, r2, 32, 31
        rldicl r3, r3, 0, 32
        rldicr r4, r4, 32, 31
        rldicl r5, r5, 0, 32
        or r2, r3, r2
        or r3, r5, r4
        add r4, r3, r2
        rldicl r2, r4, 32, 32
        or r4, r4, r4
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23809 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 01:12:32 +00:00
Chris Lattner
e5468305a0 apply some tblgen majik to simplify the X register definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23805 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 00:17:55 +00:00
Nate Begeman
da32c9eed6 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This 
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23803 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-19 00:05:37 +00:00
Nate Begeman
4a95945fa5 Add the ability to lower return instructions to TargetLowering. This 
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23802 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 23:23:37 +00:00
Jim Laskey
21f587ca24 Simple edits; remove unimplimented cases and clarify long haul SLU cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23788 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 16:59:23 +00:00
Chris Lattner
841d12d9ac Fix the JIT encoding of LWA, LD, STD, and STDU. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 16:51:22 +00:00
Jim Laskey
076866c50f Checking in first round of scheduling tablegen files. Not tied in as yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23786 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 16:23:40 +00:00
Chris Lattner
3d8df55fed add a case 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23785 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 06:30:51 +00:00
Nate Begeman
9d2b817fcb Do the right thing and enable 64 bit regs under the control of a subtarget 
option.  Currently the only way to enable this is to specify the
64bitregs mattr flag.  It is never enabled by default on any config yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23779 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 00:56:42 +00:00
Nate Begeman
1d9d7427c4 First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is 
purely mechanical.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23778 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-18 00:28:58 +00:00
Nate Begeman
21e463b2bf More PPC32 -> PPC changes, as well as merging some classes that were 
redundant after the change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23759 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-16 05:39:50 +00:00
Chris Lattner
4cb5a1b896 Remove some dead code: the ORI/ORIS cases are autogen'd. This makes 
SelectIntImmediateExpr dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23753 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-15 22:06:18 +00:00
Chris Lattner
de123822e5 prune #includes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23752 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-15 21:58:54 +00:00
Chris Lattner
75c9f67370 These instructions are now autogenerated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23751 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-15 21:44:56 +00:00
Chris Lattner
e0b2e6372f Add a pattern for FSQRTS 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23750 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-15 21:44:15 +00:00
Chris Lattner
651dea74f6 remove dead code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23749 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-15 21:40:12 +00:00
Chris Lattner
d242419e17 remove broken SRA/rlwimi case 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23746 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-15 19:04:48 +00:00
Chris Lattner
16e71f2f70 Rename PPC32*.h to PPC*.h 
This completes the grand PPC file renaming


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23745 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 23:59:06 +00:00
Chris Lattner
b9459b731a Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo 
and PPC32JITInfo classes should be merged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23744 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 23:53:41 +00:00
Chris Lattner
2668959b88 Rename PowerPC*.h to PPC*.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 23:51:18 +00:00
Chris Lattner
26bd0d48a1 Rename PowerPCInstrBuilder.h -> PPC* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23742 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 23:45:43 +00:00
Chris Lattner
ec4b73cb09 Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine 
still should be merged into the PPC32TargetMachine class


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23741 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 23:44:05 +00:00
Chris Lattner
f379997adc Rename PowerPC*.td -> PPC*.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23740 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 23:40:39 +00:00
Chris Lattner
f1ed100bc4 These are dead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23739 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 23:38:51 +00:00
Chris Lattner
4c7b43b43f Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23738 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 23:37:35 +00:00
Chris Lattner
e87bc1f3a8 Like the comment says... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23737 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 22:48:24 +00:00
Chris Lattner
617742b1b8 Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions 
from the .td file that correspond to it


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23736 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 22:44:13 +00:00
Nate Begeman
e0de44adba Remove an unnecsesary file. PPC32 and PPC64 share architected registers. 
We will decide with subtarget support whether we ever use an i64 register
class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23734 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 18:58:46 +00:00
Chris Lattner
3f31d4304c These are now autogenerated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23731 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 06:26:29 +00:00
Chris Lattner
7cb6491a0d Add patterns for FP round/extend 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23727 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 04:55:50 +00:00
Chris Lattner
7b1fe15de0 These definitions have been moved to common code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23681 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 06:01:00 +00:00
Chris Lattner
65a419a104 Disable formation of rlwinm instructions from SRA bases. This fixes 
the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23670 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-09 05:36:17 +00:00
Nate Begeman
7d47a61496 Remove another unused file. Preparing for the great "enable i64 on ppc32" 
merge, and using subtarget info for ptr size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23668 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-08 01:32:34 +00:00
Nate Begeman
02f77d1e83 Remove a file that is no longer used 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23666 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-08 01:21:27 +00:00
Chris Lattner
cf01a70550 When preselecting, favor things that have low depth to select first. This 
is faster and uses less stack space.  This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23664 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-07 22:10:27 +00:00
Chris Lattner
eb5d47d99d Fix a CQ regression from my patch to split F32/F64 into seperate register 
classes on PPC.  We were emitting fmr instructions to do fp extensions, which
weren't getting coallesced.  This fixes Regression/CodeGen/PowerPC/fpcopy.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23654 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-07 05:00:52 +00:00
Chris Lattner
6a16f6a14f Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23650 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 19:07:45 +00:00
Chris Lattner
222adac30a Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23649 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 19:03:35 +00:00
Chris Lattner
2b63e4c5e2 Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23648 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 18:56:10 +00:00
Chris Lattner
bd937b98f4 Add a recursive-iterative hybrid stage to attempt to reduce stack space, this 
helps but not enough.

Start pulling cases out of PPC32DAGToDAGISel::Select.  With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes).  Pulling this first function out gets us down to 8224.  More
to come :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23647 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 18:45:51 +00:00
Chris Lattner
8ca02914e5 Speed up the asm printer a lot by not printing formatted LLVM asm output 
for globals


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23608 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-03 07:08:36 +00:00
Chris Lattner
dff06f4348 add patterns for float binops and fma ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23592 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 07:46:28 +00:00
Chris Lattner
43f07a4bbc another solution to the fsel issue. Instead of having 4 variants, just force 
the comparison to be 64-bits.  This is fine because extensions from float
to double are free.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23589 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 07:07:49 +00:00
Chris Lattner
867940d1b7 fsel can take a different FP type for the comparison and for the result. As such 
split the FSEL family into 4 things instead of just two.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23588 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 06:58:23 +00:00
Chris Lattner
7c0d664c21 fix an f32/f64 type mismatch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23587 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 06:37:13 +00:00
Chris Lattner
ca0a4778a8 Minor tweak to the branch selector. When emitting a two-way branch, and if 
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23582 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-01 23:06:26 +00:00
Chris Lattner
b91956e7f8 like the comment says, enable this 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23581 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-01 23:02:40 +00:00
Chris Lattner
2c1760f636 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23578 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-01 02:51:36 +00:00
Chris Lattner
919c032fa4 Modify the ppc backend to use two register classes for FP: F8RC and F4RC. 
These are used to represent float and double values, and the two regclasses
contain the same physical registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-01 01:35:02 +00:00
Jim Laskey
242f2557cc Should be using flag and not chain. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23572 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 23:43:37 +00:00
Nate Begeman
2b5e66fc6e Remove some now-dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23571 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 21:28:27 +00:00
Chris Lattner
5802be13e0 constant fold these calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23558 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 17:16:59 +00:00
Chris Lattner
b48d2cf5eb pass extra args 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23539 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 01:31:52 +00:00
Chris Lattner
0ffb1a56ff these methods get extra args 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23538 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 01:30:55 +00:00
Chris Lattner
ff201eebea Use the 32-bit version for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23534 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 00:05:05 +00:00
Chris Lattner
67ab118a6d Add a bunch of patterns for F64 FP ops, add some more integer ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23533 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 23:34:24 +00:00
Chris Lattner
237733e933 Remove code for patterns that are autogenerated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23532 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 23:33:31 +00:00
Chris Lattner
c7a37a52cd tblgen autogens this pattern now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23530 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 22:37:24 +00:00
Andrew Lenharth
68fd4866de copy and paste error 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23528 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 21:11:57 +00:00
Chris Lattner
221e53caea now that tblgen is smarter, this pattern is not needed. Also, tblgen 
now inverts commuted versions of ANDC/ORC with the current .td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23527 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 19:29:15 +00:00
Chris Lattner
52897f827e consistency with other cases, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23524 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 17:38:52 +00:00
Chris Lattner
f13befb456 Make the JIT default to the DAG isel instead of the pattern isel, like LLC. 
The Pattern isel has some strange memory corruption issues going on. :(

This should have been converted over anyway, but it got forgotten somehow
when switching to the dag isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23523 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 17:31:03 +00:00
Chris Lattner
d3d2cf52bb Never rely on ReplaceAllUsesWith when selecting, use CodeGenMap instead. 
ReplaceAllUsesWith does not replace scalars SDOperand floating around on
the stack, permitting things to be selected multiple times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23515 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 00:59:32 +00:00
Chris Lattner
79d0e9f3d1 Codegen ADD X, IMM -> addis/addi if needed. 
This implements PowerPC/fold-li.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23514 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 23:07:13 +00:00
Chris Lattner
d8ead9e250 Autogen MUL, move FP cases together 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23512 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 22:53:16 +00:00
Chris Lattner
88add100b3 disentangle FP from INT versions of div/mul 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23511 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 22:50:24 +00:00
Chris Lattner
4a7de219b4 Use the autogenerated matcher for ADD/SUB 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23510 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 22:47:28 +00:00
Chris Lattner
e025574370 add a patter for SUBFIC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23509 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 22:47:06 +00:00
Chris Lattner
0648ccf1e9 Mark int binops as int-only, add FP binops. Mark FADD/FMUL as commutative but 
not associative.  Add [SU]REM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23508 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 22:38:27 +00:00
Chris Lattner
615c2d0920 Add FP versions of the binary operators, keeping the int and fp worlds seperate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23506 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 22:29:58 +00:00
Chris Lattner
a5cac6f6eb Mark associative nodes as associative 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23503 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 20:58:39 +00:00
Chris Lattner
645992f595 Nate pointed out that mulh[us] are commutative as well. Thanks! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23500 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 19:01:44 +00:00
Chris Lattner
6bcf1b7eed expose commutativity information 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23498 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 18:27:58 +00:00
Chris Lattner
393e138f60 All (xor *) cases are autogenerated now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23497 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 18:12:37 +00:00
Chris Lattner
cfc828a3d0 add support for missed eqv tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23496 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 18:10:51 +00:00
Chris Lattner
1bd8b7b06e Implement PowerPC/eqv-andc-orc-nor.ll:EQV3 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23494 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 18:04:52 +00:00
Chris Lattner
91da8623be learn to codegen not as NOR instead of xoris/xori 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23490 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 17:13:15 +00:00
Chris Lattner
d135fa4fd6 These nodes are all autogenerated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23489 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-28 17:07:09 +00:00
Chris Lattner
d145a61f8f Darwin, like many BSD systems, has a setjmp/longjmp which saves the signal mask 
on setjmp calls and restores it on longjmp calls (both of which require syscalls).

This makes the calls REALLY slow.  Use _setjmp/_longjmp instead.  This speeds up
hexxagon from 120.31s to 15.68s: from 5.53x slower than GCC to 28% faster than GCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23482 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-27 22:18:25 +00:00
Chris Lattner
333bd835bd Make sure to clear the CodeGenMap after each basic block is selected to avoid 
cross MBB pollution.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23470 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-27 17:45:33 +00:00
Chris Lattner
5e8d2dc197 Move the post-lsr simplify cfg pass after lowereh, so it can clean up after 
eh lowering as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23459 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-27 00:14:41 +00:00
Chris Lattner
30e21a46f0 minor pattern shuffling 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23458 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-26 22:20:16 +00:00
Chris Lattner
ea874f3306 Teach the dag isel generator how to construct arbitrary immediates. The 
generated isel now tries li then lis, then lis+ori.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23418 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-24 00:41:58 +00:00
Chris Lattner
6a78c2157a Implement hook for ppc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23374 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-17 01:03:26 +00:00
Chris Lattner
4ac85b3e94 disable this for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23366 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-15 21:44:00 +00:00
Chris Lattner
43ef1318c6 give all operands names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23356 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-14 21:10:24 +00:00
Chris Lattner
4345a4a452 Fix some issues exposed by more testing. XORIS had the wrong operands 
specified.  The various *imm operands defined by PPC are really all i32,
even though the actual immediate is restricted to a smaller value in it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23352 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-14 20:53:05 +00:00
Chris Lattner
c36d065dce Fix some bugs noticed by new checking code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23350 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-14 18:18:39 +00:00
Chris Lattner
303b555164 we don't need this proto any longer 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23342 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-13 22:05:21 +00:00
Chris Lattner
af16538511 move the #include for the generated code into the isel class body so we 
can use/define class methods


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23339 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-13 22:03:06 +00:00
Chris Lattner
7b738342f0 Change the arg lowering code to use copyfromreg from vregs associated 
with incoming arguments instead of the pregs themselves.  This fixes
the scheduler from causing problems by moving a copyfromreg for an argument
to after a select_cc node (now it can, and bad things won't happen).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23334 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-13 19:33:40 +00:00
Chris Lattner
31262ce53d Remove some dead vectors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23329 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-13 18:47:49 +00:00
Chris Lattner
e6ec9f20c9 PowerPC cannot truncstore i1 natively 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23304 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-10 00:21:06 +00:00
Chris Lattner
c9fe7508a5 I forgot that we always spill fp values as 64-bits. Implement spill folding 
for FP as well.  This triggers a couple dozen times on 177.mesa (for example).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23299 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-09 21:59:44 +00:00
Chris Lattner
f38df04c3a Fix a problem that Nate noticed, where spill code was not getting coallesced 
with copies, leading to code like this:

       lwz r4, 380(r1)
       or r10, r4, r4    ;; Last use of r4

By teaching the PPC backend how to fold spills into copies, we now get this
code:

       lwz r10, 380(r1)

wow. :)

This reduces a testcase nate sent me from 1505 instructions to 1484.

Note that this could handle FP values but doesn't currently, for reasons
mentioned in the patch


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23298 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-09 21:46:49 +00:00
Chris Lattner
1463019e84 code cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23297 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-09 20:51:08 +00:00
Chris Lattner
043870dd85 Teach the code generator that rlwimi is commutable if the rotate amount 
is zero.  This lets the register allocator elide some copies in some cases.

This implements CodeGen/PowerPC/rlwimi-commute.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23292 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-09 18:17:41 +00:00
Chris Lattner
2eb2517fbe Introduce two new concepts: 
1. Add support for defining Pattern's, which can match expressions when there
   is no instruction that directly implements something.  Instructions usually
   implicitly define patterns.
2. Add support for defining SDNodeXForm's, which are node transformations.
   This seperates the concept of a node xform out from the existing predicate
   support.

Using this new stuff, we add a few instruction patterns, one for testing, and
two for OR/XOR by an arbitrary immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23286 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-09 00:39:56 +00:00
Chris Lattner
b85c64c4d8 whitespace/comment changes, no functionality diffs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23283 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-08 23:17:26 +00:00
Chris Lattner
47f01f1b44 Add a bunch of stuff needed for node type inference. Move 'BLR' down with 
the rest of the instructions, add comment markers to seperate portions of
the file into logical parts


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23277 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-08 19:50:41 +00:00
Chris Lattner
bfde080ce0 add patterns for x?oris? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23268 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-08 17:40:49 +00:00
Chris Lattner
3e63ead49b add patterns to the addi/addis/mulli etc instructions. Define predicates 
for matching signed 16-bit and shifted 16-bit ppc immediates


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23267 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-08 17:33:10 +00:00
Chris Lattner
d1cdc7028c Add patterns for some new instructions, allowing the use of the ineg fragment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23266 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-08 17:01:54 +00:00
Chris Lattner
19c0907ba1 Remove some cases handled by the generated portion of the isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23262 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-07 23:45:15 +00:00
Chris Lattner
c98d823649 On non-apple systems, when using -march=ppc32, do not print: 
'' is not a recognized processor for this target (ignoring processor)

Default to "generic" instead of "" for the default CPU.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23257 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-07 05:45:33 +00:00
Nate Begeman
c09eeec0eb Implement i64<->fp using the fctidz/fcfid instructions on PowerPC when we 
are allowed to generate 64-bit-only PowerPC instructions for 32 bit hosts,
such as the PowerPC 970.

This speeds up 189.lucas from 81.99 to 32.64 seconds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23250 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-06 22:03:27 +00:00
Nate Begeman
92cce90c66 Add note about future optimization noted in the ppc compiler writer's guide 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23245 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-06 15:30:48 +00:00
Nate Begeman
d401dff796 Add accessor for 64bit flag, so that we can tell when it is safe to 
generate the fun in-register fp<->long instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23244 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-06 15:30:12 +00:00
Chris Lattner
e147ceb2fa explicitly specify an operands list for patterns with inputs (e.g. neg) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23240 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-03 01:28:40 +00:00
Chris Lattner
6cd40d5888 include the dag isel fragment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23239 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-03 01:17:22 +00:00
Chris Lattner
bb38b6f8c0 ask for a dag isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23238 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-03 01:15:41 +00:00
Chris Lattner
25dae727f3 Change the isel to not break out of the big giant switch. Instead, the 
switch should never be exited, so its bottom is now unreachable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23234 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-03 00:53:47 +00:00