Chris Lattner
d8fe3b3272
Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load
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must be a pointer. This removes a type check out of the code generated by
tblgen for load matching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:58:42 +00:00
Evan Cheng
ab24ed2a32
Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:48:48 +00:00
Chris Lattner
646f7afb79
Teach the PPC backend about the ctor and dtor list when not using __main and
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linking the entire program into one bc file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24645 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 18:24:29 +00:00
Andrew Lenharth
dd3ccde9ea
it helps if your conditionals are not reversed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24641 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 00:45:42 +00:00
Chris Lattner
62c08dd4a1
Add another important case we miss
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24639 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 07:13:28 +00:00
Evan Cheng
f20da7e1a7
Added support for ComplexPattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 04:28:48 +00:00
Evan Cheng
670fd8f8dd
Added explicit type field to ComplexPattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:15:07 +00:00
Evan Cheng
ec693f77c0
* Added intelligence to X86 LEA addressing mode matching routine so it returns
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false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:01:35 +00:00
Chris Lattner
e80242a948
X86 doesn't support sextinreg for 8-bit things either.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 17:59:14 +00:00
Andrew Lenharth
bbe1225bf4
fix divide and remainder
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24628 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 23:27:39 +00:00
Chris Lattner
85961d5ec1
Silence another annoying GCC warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24627 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:56:18 +00:00
Andrew Lenharth
f88471ded7
more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24625 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:43:30 +00:00
Andrew Lenharth
cfb2815695
OK, this does wonders for broken stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24624 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 20:40:34 +00:00
Chris Lattner
4172b10ca1
Use new PPC-specific nodes to represent shifts which require the 6-bit
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amount handling that PPC provides. These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits. This fixes a miscompilation of crafty with
the new front-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24615 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 02:10:38 +00:00
Andrew Lenharth
eda80a0dec
added instructions with inverted immediates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24614 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06 00:33:53 +00:00
Andrew Lenharth
8a3a5fc9ba
yea, it helps to have your path set right when testing
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24613 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:41:45 +00:00
Andrew Lenharth
5de36f95da
These never trigger, but whatever
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24612 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:19:44 +00:00
Evan Cheng
8d202230b4
Remove unnecessary let hasCtrlDep=1 now it can be inferred.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:09:43 +00:00
Andrew Lenharth
7962065fdb
move this over to the dag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24609 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 20:50:53 +00:00
Andrew Lenharth
b457a93123
fix constant pool loads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24607 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 17:51:02 +00:00
Chris Lattner
3d36a9f6f4
Several things:
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1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly. The port number really
*is* a 16-bit value, but the patterns should only match if the number
is 0-255. Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
i8, not an i16 as they were believed to be before. This previous fib
stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:40:25 +00:00
Chris Lattner
68bfd9c1e8
On some targets (e.g. X86), shift amounts are not the same as the value
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being shifted. Don't assume they are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24598 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:37:26 +00:00
Chris Lattner
b5d01436e3
Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24595 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:29 +00:00
Chris Lattner
bd05982b48
Add some explicit type casts so that tblgen knows the type of the shift
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amount, which is not necessarily the same as the type being shifted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24594 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:34:05 +00:00
Chris Lattner
bead6612a5
The basic fneg cases are already autogen'd
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24592 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:04:38 +00:00
Chris Lattner
937a79dbe3
Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen
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improvements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24591 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 19:01:59 +00:00
Chris Lattner
60a4ab2d5c
Finish moving uncond br over to .td file, remove from .cpp file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24590 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:48:01 +00:00
Chris Lattner
1e48478557
Define BR in the .td file now that Evan made tblgen smarter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24589 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 18:42:54 +00:00
Evan Cheng
d35b8c1adb
Added isel patterns for RET, JMP, and WRITEPORT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:19:43 +00:00
Evan Cheng
f8ac814957
* Added instruction property hasCtrlDep for those which r/w control-flow
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chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24586 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:13:17 +00:00
Chris Lattner
df65de42cf
Fix PR672 another way which should be more robust
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 06:03:50 +00:00
Chris Lattner
a027ba885a
Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
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This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on. Given a clean nightly tester run, we should be able to turn it
on by default!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03 07:15:55 +00:00
Chris Lattner
865874c88a
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-02 00:11:20 +00:00
Chris Lattner
18c778f8be
IA64 doesn't support the LOCATION node, and for some reason the ISelPattern
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stuff isn't using ISelLowering.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24567 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 18:19:53 +00:00
Chris Lattner
05f56a529c
Make sure these get added into the codegenmap when appropriate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24566 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 18:09:22 +00:00
Andrew Lenharth
6251b36d88
major think-o
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24564 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 17:48:51 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Nate Begeman
5dfc55c304
Cosmetic change, better reflects actual values
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24562 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:48:26 +00:00
Chris Lattner
db1cb2b3a1
Fix a regression caused by a patch earlier today
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24561 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 03:50:19 +00:00
Andrew Lenharth
9352622356
Flags where I think I need them, quick, before the nightly tester starts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24560 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 01:53:10 +00:00
Evan Cheng
640f299b44
Proper support for shifts with register shift value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24559 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:43:55 +00:00
Evan Cheng
c121e33e35
Use a getCopyToReg() variant to generate a flaggy CopyToReg node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24558 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:41:50 +00:00
Chris Lattner
d5acfb4153
SelectNodeTo now returns its result, we must pay attention to it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24552 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:04:38 +00:00
Chris Lattner
b19b899181
Pay attn to the node returned by SelectNodeTo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24551 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:02:08 +00:00
Chris Lattner
350d22e14d
SelectNodeTo now returns its result, we must pay attention to it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24550 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:59:19 +00:00
Chris Lattner
71d3d50b4a
SelectNodeTo now returns N. Use it instead of return N directly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24549 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:53:06 +00:00
Chris Lattner
80720a9219
Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24547 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 20:40:54 +00:00
Nate Begeman
85a168a734
Fix a typo in my latest change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24542 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:57:39 +00:00
Nate Begeman
391c5d231a
No longer track value types for asm printer operands, and remove them as
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an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Andrew Lenharth
72d32c222c
remove redundant code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24538 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 17:14:11 +00:00