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5943 Commits

Author SHA1 Message Date
Evan Cheng
f99898453d X86 SSE2 supports v8i16 multiplication 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27644 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 05:10:25 +00:00
Evan Cheng
fc7c17abb5 Update 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27643 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 05:09:45 +00:00
Evan Cheng
49ac1bf1c4 padds{b|w}, paddus{b|w}, psubs{b|w}, psubus{b|w} intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27639 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 00:43:35 +00:00
Evan Cheng
a50a086341 Naming inconsistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27638 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 00:00:23 +00:00
Evan Cheng
d2a6d54f26 SSE / SSE2 conversion intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27637 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 23:42:44 +00:00
Evan Cheng
2c3ae37213 All "integer" logical ops (pand, por, pxor) are now promoted to v2i64. 
Clean up and fix various logical ops issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 21:21:57 +00:00
Chris Lattner
ac225ca051 Add a new way to match vector constants, which make it easier to bang bits of 
different types.

Codegen spltw(0x7FFFFFFF) and spltw(0x80000000) without a constant pool load,
implementing PowerPC/vec_constants.ll:test1.  This compiles:

typedef float vf __attribute__ ((vector_size (16)));
typedef int vi __attribute__ ((vector_size (16)));
void test(vi *P1, vi *P2, vf *P3) {
  *P1 &= (vi){0x80000000,0x80000000,0x80000000,0x80000000};
  *P2 &= (vi){0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF};
  *P3 = vec_abs((vector float)*P3);
}

to:

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        vspltisw v0, -1
        vslw v0, v0, v0
        lvx v1, 0, r3
        vand v1, v1, v0
        stvx v1, 0, r3
        lvx v1, 0, r4
        vandc v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vandc v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr

instead of (with two constant pool entries):

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        li r6, lo16(LCPI1_0)
        lis r7, ha16(LCPI1_0)
        li r8, lo16(LCPI1_1)
        lis r9, ha16(LCPI1_1)
        lvx v0, r7, r6
        lvx v1, 0, r3
        vand v0, v1, v0
        stvx v0, 0, r3
        lvx v0, r9, r8
        lvx v1, 0, r4
        vand v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vand v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr

GCC produces (with 2 cp entries):

_test:
        mfspr r0,256
        stw r0,-4(r1)
        oris r0,r0,0xc00c
        mtspr 256,r0
        lis r2,ha16(LC0)
        lis r9,ha16(LC1)
        la r2,lo16(LC0)(r2)
        lvx v0,0,r3
        lvx v1,0,r5
        la r9,lo16(LC1)(r9)
        lwz r12,-4(r1)
        lvx v12,0,r2
        lvx v13,0,r9
        vand v0,v0,v12
        stvx v0,0,r3
        vspltisw v0,-1
        vslw v12,v0,v0
        vandc v1,v1,v12
        stvx v1,0,r5
        lvx v0,0,r4
        vand v0,v0,v13
        stvx v0,0,r4
        mtspr 256,r12
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27624 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 19:07:14 +00:00
Chris Lattner
e87192a854 Rename get_VSPLI_elt -> get_VSPLTI_elt 
Canonicalize BUILD_VECTOR's that match VSPLTI's into a single type for each
form, eliminating a bunch of Pat patterns in the .td file and allowing us to
CSE stuff more aggressively.  This implements
PowerPC/buildvec_canonicalize.ll:VSPLTI


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27614 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 17:37:20 +00:00
Evan Cheng
91b740da12 Promote v4i32, v8i16, v16i8 load to v2i64 load. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27612 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 17:12:36 +00:00
Chris Lattner
2b1c3258d6 Ensure that zero vectors are always v4i32, which forces them to CSE with 
each other.  This implements CodeGen/PowerPC/vxor-canonicalize.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27609 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 16:53:28 +00:00
Evan Cheng
d03db7a36c Various SSE2 conversion intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27603 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 05:20:24 +00:00
Evan Cheng
397edeff50 Added __builtin_ia32_storelv4si, __builtin_ia32_movqv4si, 
__builtin_ia32_loadlv4si, __builtin_ia32_loaddqu, __builtin_ia32_storedqu.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27599 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 22:28:25 +00:00
Nate Begeman
218629813a Fix SingleSource/UnitTests/Vector/sumarray-dbl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27594 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 19:44:43 +00:00
Nate Begeman
030514cd96 Fix PR727, correctly handling large stack aligments on ppc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27593 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 19:29:21 +00:00
Chris Lattner
95c7570f32 we have a shuffle instr, add an example. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27592 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 18:47:03 +00:00
Evan Cheng
df3c33c57e gcc lower SSE prefetch into generic prefetch intrinsic. Need to add support 
later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27591 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 18:04:57 +00:00
Evan Cheng
135c6a9d83 Misc. intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27590 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 17:35:57 +00:00
Jim Laskey
52fa2449c9 Suppress debug label when not debug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27588 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 08:11:53 +00:00
Evan Cheng
fcf5e21b96 movnt* and maskmovdqu intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27587 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 06:57:30 +00:00
Chris Lattner
bee9836c0f Vector function results go into V2 according to GCC. The darwin ABI doc 
doesn't say where they go :-/


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27579 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 01:38:39 +00:00
Chris Lattner
06c24350a9 Move some return-handling code from lowerarguments to the ISD::RET handling stuff. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27577 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 01:21:43 +00:00
Evan Cheng
d6d1cbd692 Added support for _mm_move_ss and _mm_move_sd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27575 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 00:19:04 +00:00
Jim Laskey
1069fbdd2f Use existing information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27574 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 23:09:19 +00:00
Evan Cheng
3d60df480a Remove some bogus patterns; clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27569 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 22:35:16 +00:00
Chris Lattner
a956db2a63 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27567 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 21:51:03 +00:00
Evan Cheng
c6d5ba6521 Remove an entry that is now done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27565 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 21:42:57 +00:00
Evan Cheng
56e73013c7 Added some missing shuffle patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27564 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 21:42:19 +00:00
Evan Cheng
adf29e4e3f Correct an entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27563 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 21:41:39 +00:00
Evan Cheng
aa9fb8c70e movups / movupd 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27562 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 21:11:06 +00:00
Evan Cheng
f7c378e9ea Conditional move of vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27556 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 07:23:14 +00:00
Evan Cheng
c58a5ee2fd New entries 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27555 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 07:22:03 +00:00
Evan Cheng
a964ccdc3f Use movaps to do VR128 reg-to-reg copies for now. It's shorter and available for SSE1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27554 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 07:21:31 +00:00
Chris Lattner
a1d95e16df properly mark vector selects as expanded to select_cc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27544 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 22:59:15 +00:00
Chris Lattner
710ff32983 Add VRRC select support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27543 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 22:45:08 +00:00
Nate Begeman
957e1674e7 Disable switch lowering for targets based on the selection dag isel, 
letting the code generator handle them directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27539 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 19:46:55 +00:00
Chris Lattner
79d9a88165 Implement PowerPC/CodeGen/vec_splat.ll:spltish to use vsplish instead of a 
constant pool load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27538 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 07:14:26 +00:00
Chris Lattner
140a58f9df Change the interface to the predicate that determines if vsplti* can be used. 
No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27536 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 06:46:53 +00:00
Reid Spencer
4490de0abf Initialize SDOperand values because the gcc 4.0.2 compiler complains about 
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27534 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 05:38:03 +00:00
Evan Cheng
372db540d9 ldmxcsr and stmxcsr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27506 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 00:47:44 +00:00
Evan Cheng
c5cdff2341 Code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27501 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 21:53:05 +00:00
Evan Cheng
664ade71b9 Added patterns for MOVHPSmr and MOVLPSmr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27497 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 21:20:58 +00:00
Evan Cheng
9984eb4bb8 Keep track of an Mac OS X / x86 ABI bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27496 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 21:19:53 +00:00
Jim Laskey
6b92b8e50d Make sure that debug labels are defined within the same section and after the 
entry point of a function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27494 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 20:44:42 +00:00
Jim Laskey
4188699f80 Foundation for call frame information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 16:34:46 +00:00
Evan Cheng
85c0965db1 A MOVPS2SSmr, i.e. _mm_store_ss, encoding bug. 
Also MOVPDI2DIrr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27476 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:53:29 +00:00
Evan Cheng
5ced1d812e - movlp{s|d} and movhp{s|d} support. 
- Normalize shuffle nodes so result vector lower half elements come from the
  first vector, the rest come from the second vector. (Except for the
  exceptions :-).
- Other minor fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27474 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:23:56 +00:00
Evan Cheng
573cb7c506 New entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27473 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:21:24 +00:00
Andrew Lenharth
3e2c745d0d This may be overconservative, but it lets the new cfe compile 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27471 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:18:45 +00:00
Chris Lattner
1c80103016 Add an item 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27470 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:16:19 +00:00
Chris Lattner
90217999bd Make sure to return the result in the right type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27469 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:12:19 +00:00
Chris Lattner
f24380e78e Match vpku[hw]um(x,x). 
Convert vsldoi(x,x) to work the same way other (x,x) cases work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27467 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 22:28:36 +00:00
Chris Lattner
caad163496 Add support for matching vmrg(x,x) patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27463 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 22:02:42 +00:00
Andrew Lenharth
253b9e7750 fix some linking problems with the new gcc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27460 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 21:26:32 +00:00
Chris Lattner
116cc48e30 Pattern match vmrg* instructions, which are now lowered by the CFE into shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27457 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 21:11:54 +00:00
Chris Lattner
58d665c182 remove two done items 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27453 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 19:19:38 +00:00
Chris Lattner
d0608e191f Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to 
lower it and LLVM to have one fewer intrinsic.  This implements
CodeGen/PowerPC/vec_shuffle.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27450 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 18:26:28 +00:00
Chris Lattner
ddb739e5ea Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of into 
vperm with a perm mask lvx'd from the constant pool.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27448 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 17:23:16 +00:00
Evan Cheng
c6cb5bb679 POR encoded as PAND, yikes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27446 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 01:49:20 +00:00
Evan Cheng
8af5ef9c64 An entry about comi / ucomi intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27445 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 23:46:04 +00:00
Evan Cheng
6be2c58c8c Support for comi / ucomi intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27444 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 23:38:46 +00:00
Chris Lattner
d8242b49b2 Add all of the data stream intrinsics and instructions. woo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27442 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 22:27:14 +00:00
Chris Lattner
99bdc654e5 Fix a typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27440 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 20:15:25 +00:00
Chris Lattner
9b42bdd7bc Fix CodeGen/PowerPC/2006-04-05-splat-ish.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27439 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 17:39:25 +00:00
Evan Cheng
1d5a8cca00 Handle canonical form of e.g. 
vector_shuffle v1, v1, <0, 4, 1, 5, 2, 6, 3, 7>

This is turned into
vector_shuffle v1, <undef>, <0, 0, 1, 1, 2, 2, 3, 3>
by dag combiner.

It would match a {p}unpckl on x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27437 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 07:20:06 +00:00
Evan Cheng
865f0606f7 Bogus assert 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27434 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 06:11:20 +00:00
Evan Cheng
278158b487 Fallthrough to expand if a VECTOR_SHUFFLE cannot be custom lowered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27433 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 06:09:26 +00:00
Evan Cheng
c21a053729 Handle v8i16 shuffle that must be broken into a pair of pshufhw / pshuflw. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27427 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 01:47:37 +00:00
Chris Lattner
3827f712da add vsl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27425 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 01:16:22 +00:00
Chris Lattner
0d2cf6b1d1 add vmladduhm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27423 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 00:49:48 +00:00
Chris Lattner
4d9100ddc9 Add m[tf]vscr instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27421 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 00:03:57 +00:00
Chris Lattner
8b4684247a add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27419 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 23:45:11 +00:00
Chris Lattner
72e241cff7 Add missing byte merges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27418 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 23:43:56 +00:00
Chris Lattner
a046d4ac11 Add FP -> Int Conversions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27417 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 23:25:02 +00:00
Chris Lattner
3f0b7ff39f add average intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27416 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 23:14:00 +00:00
Chris Lattner
298b684229 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27414 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 22:43:55 +00:00
Chris Lattner
098e699f21 Fix some broken logic that would cause us to codegen {2147483647,2147483647,2147483647,2147483647} as 'vspltisb v0, -1'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 22:28:35 +00:00
Evan Cheng
ff65e38aaf Added pslldq and psrldq. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27412 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 21:49:39 +00:00
Evan Cheng
8703be4ab6 Minor fixes + naming changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27410 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 19:12:30 +00:00
Evan Cheng
5333b7b8e2 PSHUF* encoding bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27405 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 18:40:36 +00:00
Chris Lattner
7ff7e67458 Ask legalize to promote all vector shuffles to be v16i8 instead of having to 
handle all 4 PPC vector types.   This simplifies the matching code and allows
us to eliminate a bunch of patterns.  This also adds cases we were missing,
such as CodeGen/PowerPC/vec_splat.ll:splat_h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27400 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 17:25:31 +00:00
Evan Cheng
21760460b9 cmpps / cmppd encoding bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27393 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 03:04:07 +00:00
Evan Cheng
6e96740c6c Compact some intrinsic definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27388 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 00:10:53 +00:00
Chris Lattner
684ad7702f Plug in the byte and short splats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27387 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 00:05:13 +00:00
Chris Lattner
b68314480d Revert accidentally committed hunks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27386 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 23:58:04 +00:00
Chris Lattner
01cae0799d Make sure to mark unsupported SCALAR_TO_VECTOR operations as expand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27385 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 23:55:43 +00:00
Evan Cheng
97ac5fadb7 Some SSE1 intrinsics: min, max, sqrt, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27384 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 23:49:17 +00:00
Chris Lattner
0aab36f5b2 revert previous patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27383 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 23:14:49 +00:00
Evan Cheng
20e3ed102b Use movlpd to: store lower f64 extracted from v2f64. 
Use movhpd to: store upper f64 extracted from v2f64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27382 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 22:30:54 +00:00
Chris Lattner
4f91a4c497 Force use of a frame-pointer if there is anything on the stack that is aligned 
more than the OS keeps the stack aligned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27381 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 22:03:29 +00:00
Evan Cheng
11e15b38e9 - More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc. 
- Some bug fixes and naming inconsistency fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27377 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 20:53:28 +00:00
Chris Lattner
630ebaf1f2 Align vectors to the size in bytes, not bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 19:28:50 +00:00
Chris Lattner
c461a51234 Add the full set of min/max instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27372 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 15:58:28 +00:00
Andrew Lenharth
f87e7931fd support x * (c1 + c2) where c1 and c2 are pow2s. special case for c2 == 4 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27370 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 04:19:17 +00:00
Andrew Lenharth
afe3f49815 mul by const conversion sequences. more coming soon 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27368 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 03:18:59 +00:00
Andrew Lenharth
ccd9f98bcb This makes McCat/12-IOtest go 8x faster or so 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27363 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 21:08:39 +00:00
Andrew Lenharth
ed5d1afffb This will be needed soon 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27362 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 20:13:57 +00:00
Chris Lattner
220d2b89d6 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27360 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 07:20:00 +00:00
Chris Lattner
bbe77de450 Inform the dag combiner that the predicate compares only return a low bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27359 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 06:26:07 +00:00
Chris Lattner
02b72556d7 Remove done item 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 05:28:54 +00:00
Chris Lattner
c55bfd0265 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27348 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:59:11 +00:00
Chris Lattner
5295122b0d New note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27337 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 01:47:20 +00:00
Chris Lattner
541f91b17c Custom lower all BUILD_VECTOR's so that we can compile vec_splat_u8(8) into 
"vspltisb v0, 8" instead of a constant pool load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27335 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 00:43:36 +00:00
Chris Lattner
c3837d4917 Implement vnot using VNOR instead of using 'vspltisb v0, -1' and vxor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27331 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 22:41:47 +00:00
Chris Lattner
eaa7c06d86 ADd a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27324 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 04:08:29 +00:00
Chris Lattner
348ba3f9bf Shrinkify some more intrinsic definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27322 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:41:56 +00:00
Evan Cheng
67d3d4c085 An entry about packed type alignments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27321 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:35:14 +00:00
Chris Lattner
6cea814f2c Pull operand asm string into base class, shrinkifying intrinsic definitions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:34:05 +00:00
Evan Cheng
e668bdaa52 TargetData.cpp::getTypeInfo() was returning alignment of element type as the 
alignment of a packed type. This is obviously wrong. Added a workaround that
returns the size of the packed type as its alignment. The correct fix would
be to return a target dependent alignment value provided via TargetLowering
(or some other interface).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27319 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:33:42 +00:00
Chris Lattner
b5c4d17a6c Fix 80 column violations :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27315 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:57:36 +00:00
Evan Cheng
653159f4aa Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed 
INSERT_VECTOR_ELT to insert a 16-bit value in a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27314 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:55:24 +00:00
Evan Cheng
4b1734f70b Added support for SSE3 horizontal ops: haddp{s|d} and hsub{s|d}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27310 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:29:33 +00:00
Chris Lattner
7376a5e129 fix a pasto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:19:06 +00:00
Chris Lattner
a9cb441642 Add vperm support for all datatypes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27307 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 20:00:35 +00:00
Chris Lattner
e3fea5a1c1 Rearrange code a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27306 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:52:36 +00:00
Chris Lattner
32a988a095 Add, sub and shuffle are legal for all vector types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:48:58 +00:00
Evan Cheng
b067a1e7e6 Add support to use pextrw and pinsrw to extract and insert a word element 
from a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27304 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:22:53 +00:00
Evan Cheng
1eda6e7924 Add vector_extract and vector_insert nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27303 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:21:16 +00:00
Chris Lattner
9f7e127133 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27302 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:00:22 +00:00
Chris Lattner
33497cc992 note to self: *save* file, then check it in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27291 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 06:04:53 +00:00
Chris Lattner
4468c22458 Implement an item from the readme, folding vcmp/vcmp. instructions with 
identical instructions into a single instruction.  For example, for:

void test(vector float *x, vector float *y, int *P) {
  int v = vec_any_out(*x, *y);
  *x = (vector float)vec_cmpb(*x, *y);
  *P = v;
}

we now generate:

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v0, v1, v0
        mfcr r4, 2
        stvx v0, 0, r3
        rlwinm r3, r4, 27, 31, 31
        xori r3, r3, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

instead of:

_test:
        mfspr r2, 256
        oris r6, r2, 57344
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v2, v1, v0
        mfcr r4, 2
***     vcmpbfp v0, v1, v0
        rlwinm r4, r4, 27, 31, 31
        stvx v0, 0, r3
        xori r3, r4, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

Testcase here: CodeGen/PowerPC/vcmp-fold.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 06:02:07 +00:00
Chris Lattner
9492151e32 compactify some more instruction definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27288 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 05:38:32 +00:00
Chris Lattner
5f7b01963f Compactify comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27287 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 05:32:57 +00:00
Chris Lattner
a17b1557ad Lower vector compares to VCMP nodes, just like we lower vector comparison 
predicates to VCMPo nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27285 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 05:13:27 +00:00
Chris Lattner
8f5d316ff2 These are done 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27284 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 04:53:21 +00:00
Chris Lattner
36f4b0da9d Mark INSERT_VECTOR_ELT as expand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27276 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:48:55 +00:00
Evan Cheng
33e85ca7b6 Expand all INSERT_VECTOR_ELT (obviously bad) for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:30:39 +00:00
Evan Cheng
fb47a9b1c8 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27272 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:33:57 +00:00
Evan Cheng
ef698ca30d Ok for vector_shuffle mask to contain undef elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27271 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:30:29 +00:00
Chris Lattner
8768bf6ee3 Add the rest of the vmul instructions and the vmulsum* instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27268 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 23:39:06 +00:00
Chris Lattner
3c4f4e9f1b Use a new tblgen feature to significantly shrinkify instruction definitions that 
directly correspond to intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27266 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 23:21:27 +00:00
Chris Lattner
30a6abaef0 Add a bunch of new instructions for intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27265 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 23:07:36 +00:00
Evan Cheng
7d9061e300 Make sure all possible shuffles are matched. 
Use pshufd, pshuhw, and pshulw to shuffle v4f32 if shufps doesn't match.
Use shufps to shuffle v4f32 if pshufd, pshuhw, and pshulw don't match.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27259 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 19:54:57 +00:00
Evan Cheng
1b32f22b0f More logical ops patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27257 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 07:33:32 +00:00
Evan Cheng
0876aa5178 Add support for _mm_cmp{cc}_ss and _mm_cmp{cc}_ps intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27256 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 06:21:22 +00:00
Evan Cheng
c5fb2b14ca Add 128-bit pmovmskb intrinsic support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27255 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 00:33:26 +00:00
Evan Cheng
591f740a40 Change SSE pack operation definitions to fit what the intrinsics expected. 
For example, packsswb actually creates a v16i8 from a pair of v8i16. But since
the intrinsic specification forces the output type to match the operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27254 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 23:53:14 +00:00
Evan Cheng
506d3dfa90 - Added some SSE2 128-bit packed integer ops. 
- Added SSE2 128-bit integer pack with signed saturation ops.
- Added pshufhw and pshuflw ops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27252 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 23:07:14 +00:00
Evan Cheng
691c923e47 Need to special case splat after all. Make the second operand of splat 
vector_shuffle undef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27250 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 19:02:40 +00:00
Evan Cheng
5aa97b200b Floating point logical operation patterns should match bit_convert. Or else 
integer vector logical operations would match andp{s|d} instead of pand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27248 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 18:47:40 +00:00
Evan Cheng
475aecf467 - More shuffle related bug fixes. 
- Whenever possible use ops of the right packed types for vector shuffles /
  splats.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27246 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 03:04:49 +00:00
Evan Cheng
c999c745c0 Another entry about shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27245 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 03:03:46 +00:00
Evan Cheng
4f5633883b - Only use pshufd for v4i32 vector shuffles. 
- Other shuffle related fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 01:30:51 +00:00
Chris Lattner
f3a627262c add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27243 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 00:24:13 +00:00
Evan Cheng
c46349de29 Added aliases to scalar SSE instructions, e.g. addss, to match x86 intrinsics. 
The source operands type are v4sf with upper bits passes through.
Added matching code for these.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 23:51:43 +00:00
Evan Cheng
36b27f3cde Fixing buggy code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27239 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 23:41:33 +00:00
Chris Lattner
d732a2915b add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27227 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 18:56:23 +00:00
Jim Laskey
a99791886d Expose base register for DwarfWriter. Refactor code accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 13:48:33 +00:00
Jim Laskey
2d2a6131da Added missing paren on behalf of Ramana Radhakrishnan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27223 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 10:17:11 +00:00
Evan Cheng
ed4ca7f6c3 Missed X86::isUNPCKHMask 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27222 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 08:27:15 +00:00
Evan Cheng
9bbfd4f68c movlps and movlpd should be modeled as two address code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27221 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 07:01:28 +00:00
Evan Cheng
6a6d354d4c Update 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27220 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 06:55:45 +00:00
Evan Cheng
be296ac5ca Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27219 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 06:53:49 +00:00
Evan Cheng
2064a2b47e * Prefer using operation of matching types. e.g unpcklpd rather than movlhps. 
* Bug fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27218 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 06:50:32 +00:00
Nate Begeman
816cee2216 Fix a couple typos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27216 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 04:18:18 +00:00
Nate Begeman
98e70cc124 Add a few more altivec intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27215 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 04:15:58 +00:00
Evan Cheng
4c4a2e2a0d Added a couple of entries about movhps and movlhps. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27212 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 02:49:12 +00:00
Evan Cheng
000e4dd54b All unpack cases are now being handled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27211 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 02:44:05 +00:00
Evan Cheng
4fcb922c70 - Clean up / consoladate various shuffle masks. 
- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27210 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 02:43:26 +00:00
Chris Lattner
ecc219b8d4 implement a bunch more intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27209 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 02:29:37 +00:00
Chris Lattner
7f20b13518 Use normal lvx for scalar_to_vector instead of lve*x. They do the exact 
same thing and we have a dag node for the former.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27205 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 01:43:22 +00:00
Chris Lattner
48b61a729d Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 00:40:33 +00:00
Evan Cheng
0038e59803 Model unpack lower and interleave as vector_shuffle so we can lower the 
intrinsics as such.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27200 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 00:39:58 +00:00
Jim Laskey
414e682bac Translate llvm target registers to dwarf register numbers properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 20:18:45 +00:00
Chris Lattner
749b758b2e unbreak the build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 16:52:45 +00:00
Chris Lattner
3ee9ffb0e5 Add a bunch of notes from my journey thus far. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27170 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:41:00 +00:00
Chris Lattner
b86bd2cee2 Split out altivec notes into their own README 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27168 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:04:16 +00:00
Evan Cheng
a0b3afbe14 Use pcmpeq to generate vector of all ones. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27167 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:00:16 +00:00
Evan Cheng
999f3b538f Changed isBuildVectorAllOnesInteger to isBuildVectorAllOnes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27166 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 06:59:32 +00:00
Chris Lattner
fb143ce459 Fix the JIT encoding of VSEL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27160 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 03:34:17 +00:00
Chris Lattner
eeaf72af39 Fix the JIT encoding of VSPLTI* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27159 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 03:28:57 +00:00
Nate Begeman
f15485a8d0 SelectionDAGISel can now natively handle Switch instructions, in the same 
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 01:32:24 +00:00
Chris Lattner
bd6be6f52d add vsel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27153 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 22:38:43 +00:00
Nate Begeman
c02e5a8668 Readme note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27152 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 19:19:27 +00:00
Chris Lattner
6d92caddc4 Codegen vector predicate compares. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27151 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 10:06:40 +00:00
Evan Cheng
ffea91e522 Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes / cleanups 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27150 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 09:53:12 +00:00
Evan Cheng
5b6a01b59c Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27149 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 09:52:32 +00:00
Evan Cheng
e506f9ae35 Add immAllZerosV helper 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27148 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 09:51:39 +00:00
Chris Lattner
b8a45c2798 Add all of the altivec comparison instructions. Add patterns for the 
non-predicate altivec compare intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27143 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 04:57:17 +00:00
Chris Lattner
5d72907e00 Add and 8/16-bit adds, add all integer subtracts, add saturating subtract 
intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27142 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 02:39:02 +00:00
Chris Lattner
e7d959c069 implement the vsldoi intrinsic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27139 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 00:41:48 +00:00
Chris Lattner
af9136bc0c fix the pattern for vandc, it's NOT vnand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 23:10:40 +00:00
Chris Lattner
6509ae859a add patterns for VANDC/VNOR, implementing 
CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27135 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 23:05:29 +00:00
Chris Lattner
c985d828bc add a vnot helper node for matching 'not' on vectors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27132 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 23:00:08 +00:00
Chris Lattner
2430a5f0c7 Add some logical operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27127 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 22:16:05 +00:00
Evan Cheng
6e16ee5634 Added missing (any_extend (load ...)) patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27120 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 09:45:48 +00:00
Evan Cheng
c60bd97b94 Build arbitrary vector with more than 2 distinct scalar elements with a 
series of unpack and interleave ops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27119 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 09:37:23 +00:00
Chris Lattner
984f38bf4f implement a bunch of intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27118 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 08:01:02 +00:00
Chris Lattner
b22a04d881 Move all Altivec stuff out into a new PPCInstrAltivec.td file. 
Add a bunch of patterns for different datatypes, e.g. bit_convert, undef and
zero vector support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:51:43 +00:00
Chris Lattner
8d052bc711 Add some basic patterns for other datatypes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27116 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:39:07 +00:00
Chris Lattner
150ffa7842 add all supported formats to the vector register file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27115 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:36:56 +00:00
Chris Lattner
5a2025465b Add support for __builtin_altivec_vnmsubfp /vmaddfp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27112 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:05:55 +00:00
Chris Lattner
420736dc85 #include Intrinsics.h into all dag isels 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:47:10 +00:00
Chris Lattner
9c61dcf1aa Codegen things like: 
<int -1, int -1, int -1, int -1>
and
 <int 65537, int 65537, int 65537, int 65537>

Using things like:
  vspltisb v0, -1
and:
  vspltish v0, 1

instead of using constant pool loads.

This implements CodeGen/PowerPC/vec_splat.ll:splat_imm_i{32|16}.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27106 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:12:06 +00:00
Evan Cheng
ecac9cb959 Added SSE cachebility ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27103 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:03:26 +00:00
Evan Cheng
cc4f047dca Instruction encoding bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27102 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:00:03 +00:00
Chris Lattner
ea93f63964 Add new intrinsic node definitions for tblgen use 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27100 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 02:29:35 +00:00
Evan Cheng
7b1d34bc6c Added 128-bit packed integer subtraction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27096 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 01:33:37 +00:00
Evan Cheng
3246e06f84 Added CVTTPS2PI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 01:31:59 +00:00
Evan Cheng
7dda4052f5 Added CVTSS2SI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27094 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 01:00:18 +00:00
Evan Cheng
bc4832bc64 Support for scalar to vector with zero extension. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27091 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 23:15:12 +00:00
Jim Laskey
ff70fe61ed D'oh - should be even numbered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27088 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 22:48:02 +00:00
Evan Cheng
c653d48022 Added LDMXCSR 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27087 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 22:28:37 +00:00
Chris Lattner
ac53eadc29 plug the intrinsics into the patterns for movmsk* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27083 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:49:18 +00:00
Jim Laskey
47622e3721 Add dwarf register numbering to register data. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27081 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:15:58 +00:00
Jim Laskey
8da17b242f Add support for dwarf register numbering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27080 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:13:21 +00:00
Chris Lattner
057f09bc0b add another note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27077 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 20:04:27 +00:00
Chris Lattner
e6cd96d467 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27076 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 19:59:17 +00:00
Chris Lattner
da10f19d5c Shuffle some includes around 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27073 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:52:35 +00:00
Chris Lattner
da91bdcfb0 expose intrinsic info to the targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27070 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:44:11 +00:00
Chris Lattner
8edd11f33d Fix a bad JIT encoding of VPERM. Why is VPERM D,A,B,C but vfmadd is D,A,C,B ?? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27069 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:24:43 +00:00
Chris Lattner
54e869e18c Like the comment says, prefer to use the implicit add done by [r+r] addressing 
modes than emitting an explicit add and using a base of r0.  This implements
Regression/CodeGen/PowerPC/mem-rr-addr-mode.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27068 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 17:58:06 +00:00
Jim Laskey
98a6979b25 Clean up some commentary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27064 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 10:00:56 +00:00
Chris Lattner
7fbcef7102 Disable the i32->float G5 optimization. It is unsafe, as documented in the 
comment.

This fixes 177.mesa, and McCat/09-vor with the td scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27060 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 07:53:47 +00:00
Chris Lattner
64b3a08bc6 add support for using vxor to build zero vectors. This implements 
Regression/CodeGen/PowerPC/vec_zero.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27059 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 07:48:08 +00:00
Evan Cheng
386031a06f Handle BUILD_VECTOR with all zero elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27056 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 07:29:27 +00:00
Chris Lattner
9d5da1d96c Gabor points out that we can't spell. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27049 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 07:12:19 +00:00
Evan Cheng
5217a5b58c All v2f64 shuffle cases can be handled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27044 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 06:40:32 +00:00
Evan Cheng
2c0dbd01d2 More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27040 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 02:58:06 +00:00
Evan Cheng
b20aaceb52 A new entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27039 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 02:57:03 +00:00
Reid Spencer
cf22612fad Ignore the burg output files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27033 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 02:21:35 +00:00
Evan Cheng
14aed5e66b Handle more shuffle cases with SHUFP* instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27024 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 01:18:28 +00:00
Chris Lattner
716aefcd91 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27000 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 21:28:44 +00:00
Evan Cheng
8fc23cd0e9 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 20:26:04 +00:00
Chris Lattner
dc6af72781 Add PPC vector bit-convert support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26995 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 19:54:27 +00:00
Jim Laskey
f1d78e8335 Add support to locate local variables in frames (early version.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 18:12:57 +00:00
Jim Laskey
99db0442f0 Change interface to DwarfWriter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26991 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 18:09:44 +00:00
Jim Laskey
580418e082 Modify how CBE handles #lines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26990 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 18:08:29 +00:00
Chris Lattner
29b4dd0c9c Fix the encodings of these new instructions, hopefully fixing the JIT 
failures from last night


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26981 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 16:13:50 +00:00
Evan Cheng
24dc1f5975 Following icc's lead: use movdqa to load / store 128-bit integer vectors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26980 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 07:44:07 +00:00
Chris Lattner
bc641b9d8b Eliminate IntrinsicLowering from TargetMachine. 
Make the CBE and V9 backends create their own, since they're the only ones that use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26974 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 05:43:16 +00:00
Chris Lattner
ef98691ca3 remove always-null IntrinsicLowering argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26971 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 05:28:02 +00:00
Evan Cheng
3b047f7bfa Add v4i32 <-> v4f32 bitconvert patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26969 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 02:36:37 +00:00
Evan Cheng
a971f6f967 Add 128-bit integer vector load and add (for testing). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26967 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 01:57:24 +00:00
Nate Begeman
ce9448218a Add support for 8 bit immediates with 16/32 bit cmp instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26966 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 01:29:48 +00:00
Evan Cheng
ca6e8eafd2 Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do 
64-bit vector shuffle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26964 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 22:07:06 +00:00
Evan Cheng
0cea6d2b9c SHUFP* are two address code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26959 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 20:08:18 +00:00
Evan Cheng
a88973f826 Some clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26957 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 19:22:18 +00:00
Evan Cheng
1bffadd7fb - Supposely movlhps is faster / better than unpcklpd. 
- Don't forget pshufd is only available with sse2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26956 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 19:16:21 +00:00
Evan Cheng
0188ecba85 - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support 
splat and PSHUFD cases.
- Clean up shuffle / splat matching code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26954 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 18:59:22 +00:00
Evan Cheng
63d3300da1 - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches 
PSHUFD. We can make permutes entries which point to the undef pointing
  anything we want.
- Change some names to appease Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26951 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 08:01:21 +00:00
Chris Lattner
c04b423f14 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26950 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 07:33:46 +00:00
Evan Cheng
2da953f77a Fix PSHUF* and SHUF* jit code emission problems 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26949 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 07:10:28 +00:00
Chris Lattner
9d86a9dff2 This has been implemented. Tweak it into another note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26944 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 05:33:23 +00:00
Chris Lattner
ecfe55e65b When possible, custom lower 32-bit SINT_TO_FP to this: 
_foo2:
        extsw r2, r3
        std r2, -8(r1)
        lfd f0, -8(r1)
        fcfid f0, f0
        frsp f1, f0
        blr

instead of this:

_foo2:
        lis r2, ha16(LCPI2_0)
        lis r4, 17200
        xoris r3, r3, 32768
        stw r3, -4(r1)
        stw r4, -8(r1)
        lfs f0, lo16(LCPI2_0)(r2)
        lfd f1, -8(r1)
        fsub f0, f1, f0
        frsp f1, f0
        blr

This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s
with llcbeta (16.7% and 38.1% respectively).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26943 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 05:30:33 +00:00
Chris Lattner
e5ba580ab0 Add support for "ri" addressing modes where the immediate is a 14-bit field 
which is shifted left two bits before use.  Instructions like STD use this
addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26942 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 05:26:03 +00:00
Chris Lattner
6df1154644 fix a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26941 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 04:18:34 +00:00
Evan Cheng
b9df0ca67b Some splat and shuffle support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26940 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 02:53:00 +00:00
Evan Cheng
a9f2a717e9 Add a couple more pseudo instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26939 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 02:52:03 +00:00
Chris Lattner
eb8b09f69f Fix the JIT encoding of the VAForm_1 instructions, including vmaddfp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26935 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 01:44:36 +00:00
Evan Cheng
4a7da36546 Didn't mean to check this in. No MMX support yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26933 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 23:04:23 +00:00