borti4938
5922e64f55
registered outputs to HDMI-TX after final mux
2018-03-06 13:08:47 +01:00
borti4938
209130b167
misc updates:
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- integrate mask and border generation more deeply into the post processing chain
- delay RLPF by one PP stage (reduce logic length after large mux)
- synthesise a registers after several adder logics
2018-03-06 13:08:20 +01:00
borti4938
d7ee965d89
add missing IP files
2018-03-06 09:36:38 +01:00
borti4938
670f515141
various post processing pipeline updates:
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- increase number of pipeline stages for scanline generation
- alternative hybrid strength implementation
- add missing file declaration in qsf
2018-03-06 09:36:21 +01:00
borti4938
b10d7f3762
SL Multiplication:
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- Hybrid value based on Y (Y calculated according to YCoCg appr.)
- Use 8bit input as p-factor
2018-03-06 09:34:12 +01:00
borti4938
ba8ad6ce4c
add missing IP files
2018-03-06 09:33:28 +01:00
borti4938
0b51fd7758
- resolve conflicts from merge
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- use hybrid contrast for both sl generation methods: multiplication and linear
2018-03-06 09:32:02 +01:00
borti4938
1a405c1e2e
Merge branch 'scanline_contrast' of https://github.com/paulb-nl/ossc into upstream
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# Conflicts:
# rtl/scanconverter.v
# software/sys_controller/ossc/av_controller.c
2018-03-06 09:30:22 +01:00
paulb-nl
990bc1563e
Add Scanline contrast
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Reduce scanline strength for bright pixels
2018-02-24 21:56:18 +01:00
borti4938
500a22f316
small simplification on reverse lpf implementation
2018-02-22 13:45:19 +01:00
borti4938
5249d313d8
scanlines generation via multiplication
2018-02-22 08:11:26 +01:00
paulb-nl
a39888845a
Add 32 step grayramp to test pattern
2018-01-20 22:08:10 +01:00
marqs
dd4ffde231
update to Quartus 17.1
2017-12-07 21:35:08 +02:00
marqs
a24d6b0e3a
Update latency tester
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* Enable operation with all sources
* Measure strobe length on low-persistence displays
2017-10-28 12:10:54 +03:00
marqs
1bf279b2a7
Initial latency tester implementation
2017-10-22 22:45:29 +03:00
marqs
817012e23e
Fix Line2x RLPF trigger position
2017-10-22 22:32:13 +03:00
marqs
4b21a354b4
Fix and optimize reverse lpf activation
2017-10-12 02:31:19 +03:00
paulb-nl
ac16008076
Add reverse LPF feature
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reverse LPF can be used to mostly reverse the blur on pre 1-CHIP SNES.
For best results use 256x240 optimized mode.
2017-09-27 22:43:26 +02:00
marqs
9d14cc776e
Misc small fixes and improvements
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* Disable 480p scanlines in auto mode
* Remove inoperable 3x/4x processing modes from 1080i list
* Add 640x512 mode to 480p group and limit 480p sampler option to 525-line modes
* Fix occasional pixel repetion issue after HDMI<->DVI TX switch
* Add "Allow upsample2x" option
* Add comments to some unclear sections
2017-08-10 00:06:35 +03:00
marqs
2aee3294e3
Fix HDTV mode parameters
2017-05-30 21:16:03 +03:00
marqs
2577470abe
Clean up TX setup code and add compatibility options
2017-05-29 20:43:24 +03:00
marqs
d98c23c8c1
Update project files to Quartus 17.0.
2017-05-29 19:15:34 +03:00
marqs
4f36278cb7
Sync processing rewritten and some issues fixed
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* add 480i/576i line3x/4x
* clean up RTL and SDC
* update AVI infoframe properly
* add HDMI IT content option
2017-05-18 23:36:37 +03:00
marqs
01b5fe20ee
Sync and masking improvements
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* detect VSM=1 properly
* increase mask brightness
* add L2 optimized modes
* fix internal vsync alignment
2017-05-18 23:36:37 +03:00
marqs
2c934c9dd0
Fix line3x 4:3 mode and VGA interlace detection
2017-02-09 23:14:24 +02:00
marqs
6e043ef577
Improve input mode handling
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* New options and better compatibility for Line5x
* Add support for 960i and 1080i
* Make TVP HPLL2x option user-selectable
2017-02-07 23:04:30 +02:00
marqs
3b19b2843c
Preliminary Line5x implementation
2017-01-29 13:02:12 +02:00
marqs
25489dc303
Improve IR receiver tolerance
2017-01-28 03:37:29 +02:00
marqs
d41c7522a0
Misc updates
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* Fix mask placement and make its brightness adjustable
* Line4x
2017-01-24 00:18:15 +02:00
marqs
434186d64e
Improve lo-res mode processing features
...
* workaround for phase shift issue on optimized modes
* add hscale option for 256x240 opt Line3x mode
* distribute video modes to groups and allow passthru for all modes
2017-01-23 00:56:17 +02:00
marqs
d77c293b70
* Clean up some FPGA code
...
* Wrap sampling phase setting
* Enable hal.enable_lightweight_device_driver_api to reduce CPU code size
2016-12-31 14:18:21 +02:00
marqs
79f215d41e
Minor fixes.
2016-12-27 11:16:08 +02:00
marqs
03bf4c2c9a
Update to Quartus 16.1.
2016-12-13 20:55:10 +02:00
marqs
f55e9a877e
SD SPI implementation finished
2016-10-21 01:19:53 +03:00
marqs
71d60144e8
Timer and SPI added.
2016-10-16 12:53:54 +03:00
marqs
827df7930f
* L3 optimized mode scanlines fixed
...
* Advanced timing tweaker implemented
2016-08-16 22:45:23 +03:00
marqs
a488422089
* Fix scanline rendering issues
...
* Add initial input and SDTV sync glitch filter settings
* Modify input initialization logic
* Fix debug build warnings
2016-08-14 18:57:50 +03:00
marqs
c8b542b917
* 480p/576p line2x
...
* 480i/576i passthrough
* alternating scanlines for interlaced material
2016-07-09 23:12:35 +03:00
marqs
c83653c880
Release 0.69
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* Improved remote control handling code
* Fixed occasional mode change loop when switching to a non-interlace mode utilizing odd-field sync signal
* Fixed randomly missing blue channel at power-on when using DVI output mode
* Added H-PLL coast options
* Finer tuning range for scanline strength and mask
2016-04-15 22:05:53 +03:00
marqs
f502b2e46c
Release 0.67.
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- Code cleanup
- Some project files added
- PAL linetriple added
- FPGA PLL parameters optimized
- Reduced jitter on low video clock sources
2016-03-27 23:09:31 +03:00
marqs
388c464f63
Initial public release (FW 0.64)
2016-02-23 01:03:50 +02:00