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199 Commits 4 Branches 32 Tags 7.4 MiB
a6bdd8cfab
Commit Graph

42 Commits

Author SHA1 Message Date
marqs
a6bdd8cfab free up 1 M9K by modifying altera_jtag_avalon_master 2019-10-03 23:47:59 +03:00
marqs
6266976114 first OSD implementation 2019-10-03 02:03:43 +03:00
marqs
077ce8afdc update fitter seed to more optimal value 2019-09-28 12:16:32 +03:00
marqs
5e0277fb48 add Panasonic hack for improving line count tolerance with line2x 2019-07-01 19:15:57 +03:00
marqs
f0a14679d9 make H. samplerate fine-tuning more intuitive 2019-06-25 00:23:45 +03:00
marqs
125814225f make sampling phase mode-specific 2019-05-08 00:05:16 +03:00
marqs
978ac04a43 add name to profile struct 2018-11-03 18:28:30 +02:00
marqs
76d69d19bf switch to RV32E 2018-10-30 01:31:40 +02:00
paulb-nl
f276cda190 Add support for GBI 360p 2018-10-13 17:33:10 +02:00
marqs
0905620b4d update qsys+bsp build logic and instructions 2018-10-11 00:04:32 +03:00
marqs
7914a2ee83 clean up and update README 2018-10-08 00:37:42 +03:00
marqs
22e49300df fix line2x reverse LPF trigger 2018-04-18 23:14:24 +03:00
marqs
37650ca22b misc improvements 
* add character LCD backlight timeout option
* increase h.mask range
* show accurate (fpga-calculated) timings on infoscreen
 2018-03-28 20:09:40 +03:00
marqs
9ad696dbc3 optimize away one pp stage and unify code formatting 2018-03-12 01:25:23 +02:00
borti4938
a58255b8d1 suggested fitter seed 2018-03-07 10:21:40 +01:00
borti4938
985aeb1a93 use explicite ramstyle for post-processing pipeline to keep registers in logic (as suggested in pull-request #21 comments) 2018-03-07 09:45:27 +01:00
borti4938
0828addc83 Merge branch 'release' of https://github.com/marqs85/ossc into upstream 2018-03-07 08:29:49 +01:00
marqs
0ab31b30b4 simplify timing constraints 2018-03-07 09:21:19 +02:00
borti4938
d89c06b987 some fitter seeds for the current implementation 2018-03-06 14:43:49 +01:00
borti4938
9ba41ec240 Alternative fitter seed for current design 2018-03-06 12:14:30 +01:00
borti4938
10eff56f28 Merge branch 'release' of https://github.com/marqs85/ossc into upstream 2018-03-06 09:41:59 +01:00
borti4938
670f515141 various post processing pipeline updates: 
- increase number of pipeline stages for scanline generation
- alternative hybrid strength implementation
- add missing file declaration in qsf
 2018-03-06 09:36:21 +01:00
borti4938
ba8ad6ce4c add missing IP files 2018-03-06 09:33:28 +01:00
borti4938
0b51fd7758 - resolve conflicts from merge 
- use hybrid contrast for both sl generation methods: multiplication and linear
 2018-03-06 09:32:02 +01:00
borti4938
1a405c1e2e Merge branch 'scanline_contrast' of https://github.com/paulb-nl/ossc into upstream 
# Conflicts:
#	rtl/scanconverter.v
#	software/sys_controller/ossc/av_controller.c
 2018-03-06 09:30:22 +01:00
marqs
bc1b7419f2 pcm1862: add pre-ADC gain setting 2018-03-02 23:11:52 +02:00
paulb-nl
990bc1563e Add Scanline contrast 
Reduce scanline strength for bright pixels
 2018-02-24 21:56:18 +01:00
borti4938
5249d313d8 scanlines generation via multiplication 2018-02-22 08:11:26 +01:00
marqs
dd4ffde231 update to Quartus 17.1 2017-12-07 21:35:08 +02:00
marqs
a24d6b0e3a Update latency tester 
* Enable operation with all sources
* Measure strobe length on low-persistence displays
 2017-10-28 12:10:54 +03:00
marqs
1bf279b2a7 Initial latency tester implementation 2017-10-22 22:45:29 +03:00
marqs
75e072d622 Revert some drive strength adjustments to meet timing requirements 2017-10-13 21:03:48 +03:00
marqs
76623292a9 Use lower FPGA pad drive strength on chip-to-chip connections 2017-10-12 02:32:59 +03:00
paulb-nl
ac16008076 Add reverse LPF feature 
reverse LPF can be used to mostly reverse the blur on pre 1-CHIP SNES.
For best results use 256x240 optimized mode.
 2017-09-27 22:43:26 +02:00
marqs
d98c23c8c1 Update project files to Quartus 17.0. 2017-05-29 19:15:34 +03:00
marqs
4f36278cb7 Sync processing rewritten and some issues fixed 
* add 480i/576i line3x/4x
* clean up RTL and SDC
* update AVI infoframe properly
* add HDMI IT content option
 2017-05-18 23:36:37 +03:00
marqs
2c934c9dd0 Fix line3x 4:3 mode and VGA interlace detection 2017-02-09 23:14:24 +02:00
marqs
6e043ef577 Improve input mode handling 
* New options and better compatibility for Line5x
* Add support for 960i and 1080i
* Make TVP HPLL2x option user-selectable
 2017-02-07 23:04:30 +02:00
marqs
3b19b2843c Preliminary Line5x implementation 2017-01-29 13:02:12 +02:00
marqs
03bf4c2c9a Update to Quartus 16.1. 2016-12-13 20:55:10 +02:00
marqs
2dee0a2eb5 * R/G/B gain/offset controls added 
* misc optimizations
 2016-08-20 15:54:28 +03:00
marqs
388c464f63 Initial public release (FW 0.64) 2016-02-23 01:03:50 +02:00