Thomas Harte
d61f478a39
Basic sketch for state snapshots: an extra field on Target.
...
I think it doesn't make sense for states to own a target as that complicates the concept of Media. Plus they're distinct because it makes sense to have only one per Target. Let's see how this pans out.
2021-04-24 23:17:47 -04:00
Thomas Harte
9cc747b3e2
Resolves potential source of errors: specifying incorrect table size.
...
(Having made exactly this mistake with the ZX Spectrum)
2021-04-24 12:10:28 -04:00
Thomas Harte
37dcf61130
Add timing tests, fix +3 discrepancy.
2021-04-23 22:29:57 -04:00
Thomas Harte
9731fdd33b
Moves horizontal sync on the 48kb.
2021-04-21 19:46:44 -04:00
Thomas Harte
d0c789ff9a
Locks declarative form of contention closer to regular expressions.
2021-04-21 19:37:36 -04:00
Thomas Harte
9baa861742
Simplifies timing calculation expression.
2021-04-21 19:18:07 -04:00
Thomas Harte
9293bcbc88
Exclude the ROM from contention on 48kb and 128kb models.
2021-04-21 18:49:18 -04:00
Thomas Harte
ef01471e17
Ensures the DMA controller remains clocked.
2021-04-20 22:34:13 -04:00
Thomas Harte
db52f13c32
Disambiguates reset_all_keys
.
2021-04-19 21:49:06 -04:00
Thomas Harte
7bac18bd65
Address bus load time is not + 1/2.
2021-04-18 18:41:24 -04:00
Thomas Harte
704737144a
Corrects all interrupt timing for sign and off-by-one errors.
2021-04-18 18:40:44 -04:00
Thomas Harte
e87e851401
Add a redundant but idiomatic initial value.
2021-04-18 11:56:22 -04:00
Thomas Harte
80d4846a27
Respond with 0xff during an interrupt acknowledge.
2021-04-18 11:56:00 -04:00
Thomas Harte
9fd53c9c91
Adds the ZX Spectrum to ::AllMachines.
2021-04-17 23:06:37 -04:00
Thomas Harte
93422f4b1c
Brings timings into line with WoS specs.
2021-04-16 22:40:51 -04:00
Thomas Harte
7fdb1d848b
Corrects Spectrum 128kb partial decoding.
2021-04-16 21:54:52 -04:00
Thomas Harte
d7954a4cb1
Tweaks timing a little.
2021-04-15 21:51:49 -04:00
Thomas Harte
ef636da866
Attempts 48/128kb floating bus behaviour.
2021-04-15 21:19:21 -04:00
Thomas Harte
fa18b06dbf
Correct get_floating_value to be consistent in out-of-bounds behaviour.
2021-04-15 21:13:36 -04:00
Thomas Harte
349b9ce502
Don't post contended accesses other than on the +2a/+3.
...
Those machines have an actual latch for this stuff, the others don't.
2021-04-15 21:13:06 -04:00
Thomas Harte
71cf63bd35
Corrects internal cycle contention.
2021-04-15 19:17:11 -04:00
Thomas Harte
d1bb3aada4
Attempts to complete the in-machine application of contention.
2021-04-15 18:57:34 -04:00
Thomas Harte
b4214c6e08
Blocks off the AY from inputs in 48kb mode.
2021-04-15 18:04:16 -04:00
Thomas Harte
f5c7746493
Extends fast loading support to the just-introduced models.
2021-04-15 17:31:42 -04:00
Thomas Harte
f10ec80153
Gets started on different video timings.
2021-04-14 22:23:27 -04:00
Thomas Harte
0af405aa46
Starts working in the 48kb and 128kb Spectrums.
2021-04-14 21:37:10 -04:00
Thomas Harte
60e8273de2
Tweaks video timing, again.
2021-04-06 21:04:54 -04:00
Thomas Harte
dd28246f9f
Better indicate interrupt timing.
2021-04-06 12:06:13 -04:00
Thomas Harte
094d623485
Updates unit tests.
2021-04-05 21:33:04 -04:00
Thomas Harte
1266bbb224
Makes the TMS a sequence-point-generating JustInTimeActor.
2021-04-05 21:02:37 -04:00
Thomas Harte
fd88071c0a
Remove further detritus.
2021-04-05 17:21:26 -04:00
Thomas Harte
16bfe1a55c
Resolves use-after-return memory error.
2021-04-04 22:45:56 -04:00
Thomas Harte
90c3d6a1e8
Attempts a later interception of tape loading.
2021-04-04 22:39:30 -04:00
Thomas Harte
57b32d9537
Avoid adding additional threading constraints.
2021-04-04 20:48:15 -04:00
Thomas Harte
837b9499d5
Translates Oric video and Disk II into JustInTimeActors.
2021-04-04 20:43:16 -04:00
Thomas Harte
f26bf4b9e4
Splitting here isn't achieving anything.
2021-04-04 19:52:38 -04:00
Thomas Harte
1da51bee6c
14368 and six seem to be the proper numbers, per my comprehension of Patrick Rak.
2021-04-04 19:52:19 -04:00
Thomas Harte
5a66956221
Merge branch 'master' into SpeccyTiming
2021-04-04 19:12:37 -04:00
Thomas Harte
fa79589db8
Minor style improvements.
2021-04-04 18:59:46 -04:00
Thomas Harte
d77ddaf4fa
Switches the Electron to JustInTimeActor video.
...
Also reorders template parameters; I think that specifying a different time base is likely to be more common than using a divider.
2021-04-04 17:33:49 -04:00
Thomas Harte
afb4e6d37d
Merge branch 'master' into JITSleeper
2021-04-04 15:37:19 -04:00
Thomas Harte
158122fbf4
Determine TargetTimeScale
automatically.
2021-04-04 15:37:07 -04:00
Thomas Harte
14663bd06b
I think 3 is what I'm aiming for here.
...
But this probably isn't correct for IO cycles.
2021-04-02 07:36:57 -04:00
Thomas Harte
044ac949ba
Rearrange fields.
2021-04-01 12:44:00 -04:00
Thomas Harte
87317f5673
Improve documentation, pin down read/write times.
2021-04-01 12:38:58 -04:00
Thomas Harte
687c05365e
Flushes before set_last_contended_area_access
.
2021-03-31 22:52:41 -04:00
Thomas Harte
4f80523828
Tweaks contended timing.
2021-03-31 22:51:20 -04:00
Thomas Harte
acdbd88b9e
Merge pull request #896 from TomHarte/FastLoadUponInsert
...
Ensure CPC and Spectrum update fast-tape flag upon media insertion.
2021-03-28 11:44:01 -04:00
Thomas Harte
729edeac6c
Ensure CPC and Spectrum update fast-tape flag upon media insertion.
2021-03-27 18:08:46 -04:00
Thomas Harte
faaa4961ed
Attempts to rely on JustInTimeActor's built-in ClockingHint::Observer.
2021-03-26 23:54:08 -04:00
Thomas Harte
8a11a5832c
Uses GI::AY38910::Utility
far and wide.
2021-03-26 23:19:47 -04:00
Thomas Harte
465ecc4a78
Attempts to implement proper floating bus behaviour.
...
As per http://sky.relative-path.com/zx/floating_bus.html
2021-03-24 20:23:33 -04:00
Thomas Harte
03ef81b07c
Attempts to reduce initial bounce.
2021-03-23 17:12:00 -04:00
Thomas Harte
0ac11fc39e
Add floating bus.
2021-03-23 17:09:42 -04:00
Thomas Harte
3d0503a35e
Adds a genuine Spectrum mapping, tweaks timing.
2021-03-23 16:59:43 -04:00
Thomas Harte
ad8cb52f11
Improves const correctness.
2021-03-23 16:59:26 -04:00
Thomas Harte
496a294c71
Adds clocking observers for the tape and FDC.
2021-03-23 16:38:04 -04:00
Thomas Harte
465c74ab86
Adds the Spectrum side of typing.
...
The character mapper itself needs some Spectrum logic.
2021-03-23 10:44:43 -04:00
Thomas Harte
4e8f82a39c
Adds ZX Spectrum activity indicators.
2021-03-23 10:32:22 -04:00
Thomas Harte
d0776b58cf
Tweaks timing empirically.
2021-03-22 23:20:49 -04:00
Thomas Harte
6da099d7e1
Ensures the enter key is cleared before fast-loading tapes have loaded.
2021-03-22 22:42:10 -04:00
Thomas Harte
60e77785e8
Makes an attempt to provide the necessary hook for floating bus behaviour.
2021-03-22 22:34:28 -04:00
Thomas Harte
19cd6a55d3
Rejigs the way video is counted to orient it around fetch times.
2021-03-22 22:18:38 -04:00
Thomas Harte
08432dd94b
Adds automatic media starts.
2021-03-22 20:12:03 -04:00
Thomas Harte
3c1131a84b
Attempts to implement the +3.
2021-03-22 19:36:05 -04:00
Thomas Harte
c0abdf1b86
Factors out the CPC's simple FDC adaptor.
2021-03-22 19:12:10 -04:00
Thomas Harte
3ef2715eee
Implements the ROM version of fast loading.
2021-03-22 19:04:38 -04:00
Thomas Harte
4a12d7086d
Makes another guess at total colour phase.
2021-03-22 17:24:38 -04:00
Thomas Harte
a6b75b8637
Attempts improvements to video fetch timing. Alas, a lot of guess work here.
2021-03-22 15:59:03 -04:00
Thomas Harte
bdb3bce8d6
Corrects semantics on contended-timing calculation.
2021-03-22 15:48:51 -04:00
Thomas Harte
a26716919c
Switches to an is-in-video test that allows for video memory being paged twice.
...
This is trivially possible even in plain 128kb mode.
2021-03-22 15:46:02 -04:00
Thomas Harte
8dbc7649aa
Adds note-to-self re: FDC.
2021-03-22 09:15:00 -04:00
Thomas Harte
42a9dc7c2b
Minimises video flushing, moves it to the proper time.
2021-03-22 09:02:49 -04:00
Thomas Harte
7965772745
Moves contention delays up to the time of MREQ going active.
2021-03-21 23:04:20 -04:00
Thomas Harte
f37f89a7d3
Merge branch 'master' into ZXSpectrum
2021-03-21 22:44:37 -04:00
Thomas Harte
d987e5a9d7
Merge pull request #887 from TomHarte/ZX80Wait
...
Ensures no signalling to wait by a ZX80, ever.
2021-03-21 22:44:11 -04:00
Thomas Harte
c097ed348a
Ensures no signalling to wait by a ZX80, ever.
2021-03-21 22:38:50 -04:00
Thomas Harte
0f9ab53ea0
Resolves GCC warnings from dangling Apple IIgs work.
2021-03-21 22:36:18 -04:00
Thomas Harte
dd7419282d
Resolves GCC warnings from dangling Apple IIgs work.
2021-03-21 22:25:14 -04:00
Thomas Harte
7562917740
Adds the Spectrum to the macOS New... menu.
2021-03-21 21:50:50 -04:00
Thomas Harte
3925eee575
Attempts more relaxed decoding of AY accesses.
2021-03-21 21:03:35 -04:00
Thomas Harte
6482303063
Reduces code duplication slightly.
2021-03-21 20:34:58 -04:00
Thomas Harte
9ce1dbaebb
Switches to partial decoding for paging registers; permits video address changes after paging is locked.
2021-03-21 20:23:00 -04:00
Thomas Harte
064667c0c3
Corrects asymmetrical flash, ensures consistent burst phase.
2021-03-21 20:22:27 -04:00
Thomas Harte
58be770eaa
Factors out some boilerplate.
...
When I'm confident this is correct, I can fix up the other call sites.
2021-03-21 00:14:48 -04:00
Thomas Harte
1b0f45649e
Improves contended timing.
...
Still not quite on the money, but this was an overt bug.
2021-03-21 00:00:18 -04:00
Thomas Harte
42bfabbe8c
The implication seems to be of a fixed phase swing.
...
I'm enquiring further.
2021-03-20 23:46:13 -04:00
Thomas Harte
07a63d62dd
Adds some quick arithmetic on the clock speed.
2021-03-20 11:19:44 -04:00
Thomas Harte
26911a16e8
Lengthens sync, better to conform to PAL; experiments with fixed-phase colour burst.
...
I need to get hold of real documentation here.
2021-03-20 10:38:21 -04:00
Thomas Harte
cf9a5d595b
Completes piping of audio.
2021-03-19 23:33:46 -04:00
Thomas Harte
7729f1f3d0
Attempts automatic Spectrum tape control.
2021-03-19 22:43:48 -04:00
Thomas Harte
7d59ff6d8f
Builds in a colour burst, producing colour composite.
2021-03-19 22:25:37 -04:00
Thomas Harte
2ee478b4c4
Goes some way towards wiring up Spectrum options.
2021-03-19 22:17:20 -04:00
Thomas Harte
bb0d35e3d0
Minor formatting/layout fixes.
2021-03-19 22:17:03 -04:00
Thomas Harte
a482ce1546
Adds a tape player.
2021-03-19 11:12:50 -04:00
Thomas Harte
a35e1f4fbe
Starts to make formal Spectrum accommodations.
2021-03-19 11:06:09 -04:00
Thomas Harte
2371048ad1
Formally separates keyboard code.
...
With an eye to formalising the Spectrum/ZX81/ZX80 differences.
2021-03-19 10:36:08 -04:00
Thomas Harte
93b9ea67e6
Takes a run at contended timings.
2021-03-19 08:49:56 -04:00
Thomas Harte
f8c9ef2950
Add necessary header for memset.
2021-03-19 00:00:59 -04:00
Thomas Harte
87fac15cc4
This is going to remain purely a template; no .cpp.
2021-03-18 23:51:45 -04:00
Thomas Harte
2d51924a3c
Wires up Spectrum keyboard.
...
The machine now appears to be fully interactive and functional. Timing and media aside, that is.
2021-03-18 23:51:21 -04:00
Thomas Harte
c3d96b30d7
Factors out a little of the ZX81's keyboard logic.
2021-03-18 23:45:57 -04:00
Thomas Harte
44240773ef
Corrects address generation, ink/paper selection.
...
Seemingly to give a correct +2a boot. Time to add a keyboard and find out, I guess.
2021-03-18 23:30:48 -04:00
Thomas Harte
ed587a4db5
Provides a better no-port-here value.
2021-03-18 23:14:39 -04:00
Thomas Harte
020a04006e
Adds flashing, randomises initial RAM contents.
2021-03-18 23:07:51 -04:00
Thomas Harte
622a8abf7f
Takes a stab at pixel output.
2021-03-18 22:57:10 -04:00
Thomas Harte
871bac6c8a
Marks out and approximately centres a pixel region.
2021-03-18 22:41:20 -04:00
Thomas Harte
fe3e8f87e7
Takes a shot at an all-border output.
2021-03-18 22:29:24 -04:00
Thomas Harte
87fc7c02e8
Provides a base pointer for video output.
2021-03-18 22:04:41 -04:00
Thomas Harte
f2620e6afb
Adds a CRT. Not yet clocked.
2021-03-18 21:54:42 -04:00
Thomas Harte
ab2ad70885
Takes a run at interrupts.
2021-03-18 21:29:52 -04:00
Thomas Harte
135134acfd
Adds a shell for video emulation.
2021-03-18 12:47:48 -04:00
Thomas Harte
5664e81d48
It appears the +2a and +3 have a different clock rate.
2021-03-18 12:41:24 -04:00
Thomas Harte
c353923557
This can be constexpr.
2021-03-18 12:40:59 -04:00
Thomas Harte
b830d62850
Adds quick notes on port FE.
2021-03-18 12:32:54 -04:00
Thomas Harte
17f551e89d
Attempts a full audio wiring.
2021-03-18 12:23:54 -04:00
Thomas Harte
4a4da90d56
Implements some of the memory map, and instantiates audio objects.
2021-03-18 12:14:48 -04:00
Thomas Harte
404c1f06e6
Insert missing space.
2021-03-18 10:44:01 -04:00
Thomas Harte
730bfcd1fd
Stumbles towards a memory map.
2021-03-18 10:43:51 -04:00
Thomas Harte
97249b0edd
Slow walks further towards a functioning Spectrum.
2021-03-18 10:18:17 -04:00
Thomas Harte
5a1bda1d82
Performs boilerplate towards a ZX Spectrum class.
2021-03-17 23:38:55 -04:00
Thomas Harte
9bec91c2b9
Correct further namespace references.
2021-03-17 22:56:03 -04:00
Thomas Harte
3d1775d853
Correct namespace.
2021-03-17 22:52:23 -04:00
Thomas Harte
814c057570
Update further path references.
2021-03-17 22:46:25 -04:00
Thomas Harte
b63ca16ce2
Attempts to hatch a Sinclair namespace.
2021-03-17 22:40:29 -04:00
Thomas Harte
cdc19c6990
Adds TODO.
2021-03-15 11:39:15 -04:00
Thomas Harte
1a5dafae00
Slightly neatens.
2021-03-15 11:37:03 -04:00
Thomas Harte
d368dae94a
Adds tape motor LED.
2021-03-12 23:09:51 -05:00
Thomas Harte
7d778bc328
Formally introduces fast tape support as an option.
...
It doesn't feel that fast yet though.
2021-03-12 22:57:02 -05:00
Thomas Harte
7a8317ad81
It seems a full CRC is in play.
2021-03-12 22:45:48 -05:00
Thomas Harte
a32a2f36be
Advances to correctly reading bytes.
...
Something is still amiss though. Maybe I'm supposed to update the checksum?
2021-03-12 19:15:35 -05:00
Thomas Harte
cd215ef521
Stumbles towards supporting fast tape loading.
...
Right now: in a non-optional manner.
2021-03-12 18:42:17 -05:00
Thomas Harte
67408521cd
Makes absolutely sure not to try to use quickboot workaround for Mac 128kb/512kb.
...
Albeit that it should be harmless; it's just seeding RAM.
2021-03-06 22:34:35 -05:00
Thomas Harte
f05260b839
ZX80/1: fix initial key state, wait line when NMI disabled.
2021-03-06 21:59:45 -05:00
Thomas Harte
7b164de6fd
Reenables interrupts.
2021-03-06 18:53:39 -05:00
Thomas Harte
24e68166c6
Minor clean-ups of my temporary cruft.
2021-03-06 17:11:06 -05:00
Thomas Harte
b72474f418
Reduces debugging shout outs a touch.
2021-03-03 20:53:05 -05:00
Thomas Harte
38046d49aa
Increases debugging noise.
2021-03-03 20:52:14 -05:00
Thomas Harte
4601421aa6
This conditional is gone.
2021-03-03 20:52:01 -05:00
Thomas Harte
2f45e07d82
Further consolidates region map, now that shadowing is orthogonal.
2021-02-28 15:22:36 -05:00
Thomas Harte
496b6b5cfc
Introduces a further 128 bits of storage to eliminate the conditional in IsShadowed.
2021-02-28 15:14:32 -05:00
Thomas Harte
8604b1786e
Simplifies banks $02+ to a single region.
2021-02-27 23:34:51 -05:00
Thomas Harte
267e28e012
Adds various bits of debugging detritus.
2021-02-27 22:27:57 -05:00
Thomas Harte
631a8a7421
Adds bitset header.
2021-02-27 22:13:49 -05:00
Thomas Harte
7dcb0553e4
Switches to a target-centric view of shadowing.
2021-02-27 22:13:10 -05:00
Thomas Harte
2a7ea9f57c
Merge branch 'master' into AppleIIgs
2021-02-26 21:31:18 -05:00
Thomas Harte
9781460c41
Thanks to a hint from the MAME guys: finally completes Macintosh 128kb and 512kb emulation (!)
2021-02-26 21:22:35 -05:00
Thomas Harte
55c9d152e9
Slightly smarter: this does branchless shadowing without additional storage.
2021-02-24 18:46:41 -05:00
Thomas Harte
6cf9099ce1
Don't clear the mouse data full flag until both registers have been read.
2021-02-23 21:57:02 -05:00
Thomas Harte
e6dc39f6f0
Makes an attempt at mouse event transmission.
2021-02-19 22:48:15 -05:00
Thomas Harte
28ce675c96
Takes a further stab at ::CommandDataIsValid.
2021-02-19 22:22:14 -05:00
Thomas Harte
3d91b0a31b
Fixes keyboard data return.
...
Input sort of works now! Except that key repeat is way out of control.
2021-02-19 21:55:06 -05:00
Thomas Harte
5d1970d201
Adds a hacky different guess at how register access might work.
2021-02-19 21:46:18 -05:00
Thomas Harte
72d7901c88
Takes a shot at the keyboard data full flag.
...
Just a guess. But likely?
2021-02-19 20:06:12 -05:00
Thomas Harte
60cfec6a65
Amongst ever more cruft, adds a couple of extra asserts.
2021-02-18 22:49:48 -05:00
Thomas Harte
2e9065b34c
Increases number of fixed initial values.
2021-02-18 22:48:53 -05:00
Thomas Harte
e42843cca0
This may temporarily exhaust my wit for asserts.
2021-02-16 22:47:46 -05:00
Thomas Harte
3336a123f8
Asserts even more overtly.
2021-02-16 22:33:28 -05:00
Thomas Harte
28bd620e7f
Adds joystick support to the IIgs.
2021-02-16 19:39:22 -05:00
Thomas Harte
b117df3367
Factors out joystick logic.
2021-02-16 19:17:32 -05:00
Thomas Harte
fa8236741d
Takes a shot at an ADB mouse.
2021-02-15 20:49:16 -05:00
Thomas Harte
e16d5f33d1
Adds service requests. The microcontroller now appears to consume keyboard events.
2021-02-15 20:33:10 -05:00
Thomas Harte
e773b331cd
Implements register 2 listen.
2021-02-15 15:05:46 -05:00
Thomas Harte
99c21925f4
Makes attempt at keyboard mapping.
2021-02-15 15:00:12 -05:00
Thomas Harte
eccf5ca043
Makes first effort to wire up the ADB vertical blank input.
...
However: looking at the disassembly, I'm not sure it really is wired to INTR. So work to do.
2021-02-14 22:20:58 -05:00
Thomas Harte
24af62a3e5
Sets a default handler of 1.
2021-02-14 22:20:07 -05:00
Thomas Harte
52cf15c3e6
Attempts to route out modifier state.
2021-02-14 21:15:31 -05:00
Thomas Harte
a791680e6f
Implements set_status as per advice.
2021-02-14 21:04:20 -05:00
Thomas Harte
6e53b4c507
Corrects centralised ADB decoder.
...
I still think it's appropriate to do this in only a single place, given that using it is optional.
2021-02-14 20:41:05 -05:00
Thomas Harte
52c38e72f6
Starts seeking to automate register 3 handling.
...
Immediate pitfall: byte capture on the bus side isn't working correctly.
2021-02-14 20:37:33 -05:00
Thomas Harte
a51d143c35
Corrects reactive-device transmission logic.
...
Albeit that I'm still not properly responding to register 3 stuff, so the ADB bus needn't believe anything is out there. Also, without VSYNC being piped to the microcontroller it may well just not be polling anyway.
2021-02-14 18:54:22 -05:00
Thomas Harte
17e9305282
Starts adding a keyboard.
2021-02-13 23:16:45 -05:00
Thomas Harte
c284b34003
Resolves inability of ADB microcontroller to read its own ROM (!)
2021-02-13 17:53:40 -05:00
Thomas Harte
2ab3bba695
Attempts GLU register latching, restoring expected startup sequence.
2021-02-13 17:38:42 -05:00
Thomas Harte
2c4dcf8843
Edges towards implementing an ADB device.
2021-02-12 21:50:24 -05:00
Thomas Harte
ea40b2c982
Takes a stab at implementing device response.
2021-02-12 18:56:43 -05:00
Thomas Harte
adfdfa205f
Starts to establish the means by which I'll implement ADB devices.
2021-02-12 18:42:12 -05:00
Thomas Harte
33abdc95aa
Adds a helper for decoding ADB commands.
...
Still very noticeably to do: any sort of standard part for devices to respond to the bus.
2021-02-10 21:39:33 -05:00
Thomas Harte
6ca8aa99fc
Commit SDL and Qt project files; improve commenting.
2021-02-10 21:28:32 -05:00
Thomas Harte
17bac4c8cf
Starts to formalise the ADB bus.
2021-02-10 21:24:31 -05:00
Thomas Harte
46bd20b5e0
Attempts to simplify ADB bit parsing.
...
On-line output still looks reasonable, albeit that the microcontroller suddenly seems to be interested in devices F and 3 rather than 2 and 3.
2021-02-08 22:08:49 -05:00
Thomas Harte
93a80a30d3
With correct divider appears to get reset requests posted.
2021-02-07 23:05:01 -05:00
Thomas Harte
77b1efd176
Sets sensible 'reset' values.
2021-02-07 21:53:57 -05:00
Thomas Harte
acfab1dfb3
Starts to make some effort at timers.
2021-02-06 21:02:44 -05:00
Thomas Harte
6526c645a5
Merge branch 'master' into AppleIIgs
2021-02-02 21:29:38 -05:00
Thomas Harte
1e041f1adf
Flips conditionals to ensure 65802 safety.
2021-02-02 20:52:34 -05:00
Thomas Harte
beb514b231
Adds an additional mapping for copy.
2021-02-02 20:37:15 -05:00
Thomas Harte
f57e897085
Corrects visibility of SCSI output.
2021-02-02 20:24:39 -05:00
Thomas Harte
9f202d4238
Adds SCSI interrupt support.
2021-02-01 17:40:11 -05:00
Thomas Harte
1a40cc048e
Niceties: include AP6 ROM for hard-disk users; show SCSI activity indicator.
2021-01-31 21:41:11 -05:00
Thomas Harte
53514c7fdc
Ensures non-breakage of Qt interface.
2021-01-31 21:28:55 -05:00
Thomas Harte
274b3c7d24
Handles SCSI changes on-demand.
2021-01-31 21:24:54 -05:00
Thomas Harte
906b6ccdb7
This appears to be sufficient for the Electron to _read_ SCSI.
...
So that's step one.
2021-01-31 18:36:29 -05:00
Thomas Harte
8db289e229
Adds some notes-to-self on SCSI and a route to using Acorn's ADFS.
2021-01-31 13:12:59 -05:00
Thomas Harte
2860be7068
Permit a longer pause at startup for Electron commands that start with shift, control or func.
2021-01-31 12:25:22 -05:00
Thomas Harte
b5ecd5f7ef
Merge branch 'master' into AppleIIgs
2021-01-31 11:47:40 -05:00
Thomas Harte
4636d8dfb7
Adds support for installing the AP6 ROM and/or sideways RAM.
2021-01-30 19:38:19 -05:00
Thomas Harte
b8c6d4b153
Rips out my high-level ADB microcontroller protocol implementation.
...
Adds just enough that the main computer validates the ADB controller as present and talking.
2021-01-30 17:53:27 -05:00
Thomas Harte
f50e8b5106
If I'm going to maintain the max_address approach, & is 'correct'.
...
% +1 would be 'more correct', but I think this approach is probably misguided.
2021-01-27 18:31:11 -05:00
Thomas Harte
dcc2fe0990
Improves M50470 entry-point detection, adds test output.
2021-01-26 21:29:17 -05:00
Thomas Harte
56111c75ae
Makes first efforts towards disassembly.
2021-01-26 19:52:30 -05:00
Thomas Harte
fc4bda0047
Experimentally flipping interpretation of the output bit gives something closer to coherent.
2021-01-25 22:02:39 -05:00
Thomas Harte
c8beb59172
Attempts properly to track ADB bus activity.
...
Output is not yet a valid ADB stream. Work to do.
2021-01-25 17:43:22 -05:00
Thomas Harte
8789ffda15
Corrects performer storage, RMW/W confusion, implicit casts, port readback.
2021-01-24 22:30:42 -05:00
Thomas Harte
e8e604dc3c
Attempts to wire up M50470 and GLU.
...
Resulting in an unexpected interest in R15. Bugs to find, I guess.
2021-01-24 18:07:05 -05:00
Thomas Harte
57e0fdfadc
Ensures ADB microcontroller is clocked.
...
And runs at the 'correct' speed (i.e. modulo my instruction-by-instruction implementation).
2021-01-23 22:55:12 -05:00
Thomas Harte
ec0018df79
Routes in the ADB keyboard ROM. This should get as far as parsing.
2021-01-18 16:59:49 -05:00
Thomas Harte
12784a71e2
A stab in the dark: does the IOLC inhibit also affect vector fetches?
2020-12-29 20:53:56 -05:00
Thomas Harte
114d48b076
This register appears to be read/write.
2020-12-11 21:43:34 -05:00
Thomas Harte
6e9d517c26
Minor cleanliness improvement.
2020-12-11 21:43:13 -05:00
Thomas Harte
159924dcc0
More clarity tweaks.
2020-12-10 22:47:11 -05:00
Thomas Harte
5d8f284757
Makes minor style improvements.
2020-12-10 22:11:53 -05:00
Thomas Harte
c978a95463
Increases asserts and adds a test.
...
Thereby discovers and fixes a problem with set_main_paging().
2020-12-10 21:49:23 -05:00
Thomas Harte
dbdea95241
Ensure use_automatic_tape_control_
is always a valid bool.
2020-12-09 20:10:56 -05:00
Thomas Harte
1928c955d9
Ensures safe startup of the Ensoniq.
2020-12-09 19:46:32 -05:00
Thomas Harte
049a78c667
Slightly restricts video flushing test.
2020-12-08 18:47:15 -05:00
Thomas Harte
65ca931e83
Throws in a new assert, against the unimplemented bit 0 of new video.
2020-12-06 20:26:24 -05:00
Thomas Harte
6cb71eb11b
This needs explicitly to be a bool
for the table lookups to work.
2020-12-06 16:43:07 -05:00
Thomas Harte
43251193ee
The actual maximum line length is now 656.
2020-12-06 16:42:43 -05:00
Thomas Harte
55de98fb46
Adds a new statement of intent.
...
Now I need to try to decide whether I like my current all-in-one mapping for shadowing + paging, or whether it's better to split the things. I'm tending towards the latter at least until the functionality works.
2020-12-05 19:09:21 -05:00
Thomas Harte
1422d43c35
Corrects documentation errors and ambiguities.
2020-12-05 19:07:38 -05:00
Thomas Harte
6273ef8ba2
Adds means to force specific ROM 03 self tests.
2020-12-02 20:48:19 -05:00
Thomas Harte
3c6f09a898
Corrects super high-res aspect ratio and placement.
2020-12-02 20:47:26 -05:00
Thomas Harte
24fcb0c24b
Corrects video counter values.
...
The built-in speed test now passes.
2020-12-01 18:35:55 -05:00
Thomas Harte
03e2b6a265
Makes a slightly more rigorous attempt at discerning 1Mhz and 2.8Mhz operation.
2020-12-01 17:46:30 -05:00
Thomas Harte
ee22cf7ca1
Ensures that PAGE2 propagates from the state register to video.
2020-11-30 22:56:19 -05:00
Thomas Harte
187f507532
The soft switch is LCBANK2, not LCBANK1.
...
[This also jimmys the IIgs into always entering its extended self test, for now]
2020-11-30 22:35:51 -05:00
Thomas Harte
6000bd3a5e
Adds a bonus debugging assert. Let's see.
2020-11-30 18:15:02 -05:00
Thomas Harte
87069da3dd
Improves exposition, eliminates a couple of redundant map adjustments.
2020-11-30 18:07:03 -05:00
Thomas Harte
5cb4077576
Switches from modulo to and.
2020-11-30 17:47:57 -05:00
Thomas Harte
e9c7e0b9dd
Provisionally reverses meaning of language card RAM bank select.
2020-11-29 21:57:17 -05:00
Thomas Harte
35aa7612bb
Ensures that auxiliary/language-card soft switches don't trigger my assert.
2020-11-29 21:32:24 -05:00
Thomas Harte
acaa841822
Adds guaranteed trip to ROM for vector pulls.
2020-11-29 21:29:15 -05:00
Thomas Harte
46c1c9b5ee
CLRVBLINT calls it 3.75Hz. Which makes the arithmetic nicer.
2020-11-29 21:25:06 -05:00
Thomas Harte
4bdbca64b2
Takes a shot at the Mega II-style video interrupts.
2020-11-29 21:21:46 -05:00
Thomas Harte
11fe8ab6db
Corrects counter scales, adds a read for $c032.
...
Albeit that I have no idea what that's supposed to read as.
2020-11-29 20:08:59 -05:00
Thomas Harte
a9ce43d244
Takes a shot at the two video counter registers.
2020-11-29 19:57:35 -05:00
Thomas Harte
091bce9350
Merge branch 'master' into AppleIIgs
2020-11-29 00:09:20 -05:00
Thomas Harte
a965c8de9f
Resolves intended reset_all_keys.
2020-11-27 21:53:34 -05:00
Thomas Harte
79ef026b93
Allows machines to declare a preference for logical input.
...
It's only a preference, and the Apple II does prefer it.
2020-11-27 21:00:48 -05:00
Thomas Harte
a4ab5b0b49
Does a better job of ensuring sensible key mappings.
2020-11-27 20:49:38 -05:00
Thomas Harte
310282b7c9
Ensures extra_border_length always has a defined value.
2020-11-27 10:31:04 -05:00
Thomas Harte
af667c718e
Gets a bit more rigorous in remaining missing parts.
2020-11-26 22:36:32 -05:00
Thomas Harte
950f5b1691
Closes the loop on interrupts.
2020-11-26 19:56:42 -05:00
Thomas Harte
cbc0d848ad
Implements most of get_data
.
2020-11-26 17:25:27 -05:00
Thomas Harte
f4d13d1f6f
Takes a run at the bus side of honouring Ensoniq sequence points.
2020-11-26 17:14:46 -05:00
Thomas Harte
6808ad6f5d
Adds a getter for the interrupt line.
2020-11-26 16:44:35 -05:00
Thomas Harte
7a8920ee38
Takes a stab at next_sequence_point.
2020-11-26 16:41:11 -05:00
Thomas Harte
4870506f6e
Implements skip_audio.
2020-11-26 16:24:48 -05:00
Thomas Harte
6f47f9d67c
Corrects placement of address bits.
2020-11-26 16:15:40 -05:00
Thomas Harte
8093f67173
Ensures video interrupts can't be missed by a suitably-timed access.
2020-11-26 16:11:03 -05:00
Thomas Harte
72884f37c3
It's still interrupt-deficient, but fills in additional Ensoniq audio generation.
2020-11-26 16:03:28 -05:00
Thomas Harte
8edb3fcd5f
Attempts to obey accumulator size in determining sample end.
2020-11-26 15:07:29 -05:00
Thomas Harte
fdd102df52
Resolves border colour resets.
2020-11-26 13:13:48 -05:00
Thomas Harte
03a893dc74
Quick refactor: this clearly isn't a VideoBase
, it's the full implementation.
2020-11-26 12:54:20 -05:00
Thomas Harte
56de2512ae
Adds a further safety assert.
2020-11-25 23:34:30 -05:00
Thomas Harte
cdc2311045
Enables fuzzing, adds a definite no-op write.
2020-11-25 23:33:55 -05:00
Thomas Harte
eec27c3406
Reaches for marginally more coherent ADB data.
2020-11-25 17:34:00 -05:00
Thomas Harte
098a22aa95
Avoid out-of-bounds access of double_bytes
.
2020-11-24 09:38:07 -05:00
Thomas Harte
7ede3d2b9e
Corrects collection of palettes other than palette 0.
2020-11-23 21:00:26 -05:00
Thomas Harte
e7160fe3c3
Rounds out the IIgs video hardware, bugs aside.
2020-11-23 20:58:32 -05:00
Thomas Harte
9d61665014
Attempts to add colour double [low/high] resolution output.
2020-11-23 19:05:18 -05:00
Thomas Harte
d2938ad7c8
Eliminate magic constants.
2020-11-23 18:36:44 -05:00
Thomas Harte
46f7ff07f7
Adds support for fill mode.
2020-11-22 21:55:21 -05:00
Thomas Harte
8ace258fbc
Tackles outstanding GCC warnings.
2020-11-22 21:43:56 -05:00
Thomas Harte
a34f294ba8
Pulls out commonalities re: NTSC colour, ensures mixed modes on a line works.
2020-11-22 21:29:40 -05:00
Thomas Harte
cd7d080b7a
Corrects low-resolution mode.
2020-11-22 20:52:42 -05:00
Thomas Harte
b0936b6ef4
Resolves high-resolution output.
...
Yet to optimise, but working.
2020-11-22 19:10:05 -05:00
Thomas Harte
8fae74f93e
Reintroduces delay bit, reverses phase.
...
There are stray columns of errors, but otherwise this is almost correct.
2020-11-22 11:06:14 -05:00
Thomas Harte
fca48e4b66
Makes hasty attempt to shift 'NTSC' in the most natural direction.
2020-11-21 23:39:58 -05:00
Thomas Harte
3b2ea37428
Slightly cleans up.
2020-11-21 22:53:26 -05:00
Thomas Harte
3cba3a5ac0
Corrects card mask test outside of bank $00.
2020-11-21 22:22:27 -05:00
Thomas Harte
4b024c5787
Starts to make some attempt at classic II modes.
2020-11-21 18:07:51 -05:00
Thomas Harte
4a42de4f18
Attempts to add 5.25" drive support to the IIgs.
...
I want to try some classic software.
2020-11-20 21:37:17 -05:00
Thomas Harte
d00e5d23ef
Takes a second shot at the MemoryWrite
constructor complaint.
2020-11-19 22:28:10 -05:00
Thomas Harte
2c9ce116a2
Resolves various GCC-reported issues.
2020-11-19 22:21:20 -05:00
Thomas Harte
3512352c32
Attempt to use the most-significant relevant bits for sample position.
2020-11-19 22:13:09 -05:00
Thomas Harte
4d9372c52f
Also takes a stab at swap mode.
2020-11-19 21:56:49 -05:00
Thomas Harte
1d288b08b6
Attempts the two most basic forms of DOC output.
...
Sans interrupts. Or register reads of any variety.
2020-11-19 21:19:27 -05:00
Thomas Harte
f3c7c11772
Register writes now reach the audio thread.
2020-11-18 21:52:03 -05:00
Thomas Harte
4b9fe805e9
Sets up a queue to push memory writes onto the audio thread.
2020-11-18 21:40:56 -05:00
Thomas Harte
a7051e4e42
Strip this forceinline until I've satisfied myself that it works in declarations.
2020-11-18 21:40:25 -05:00
Thomas Harte
34794223b4
For now, at least, c800–cfff is always built-in ROM.
...
Otherwise I probably need to extend my c3 logic to cover the other built-in cards (?)
2020-11-18 19:49:45 -05:00
Thomas Harte
96cf617ee6
Advances slightly. I think I need a custom queue for RAM writes.
2020-11-18 19:48:53 -05:00
Thomas Harte
69dddf34b9
Adds bonus sanity check.
2020-11-18 19:47:56 -05:00
Thomas Harte
8f4597f742
Hacks in double text.
...
Actually, only one error: it should start half a column earlier. All 'double' output should. TODO.
2020-11-18 19:47:22 -05:00
Thomas Harte
98347cb1c3
Starts in the direction of audio support.
2020-11-18 18:39:11 -05:00
Thomas Harte
62f936128d
It seems possibly there is a distinct IIgs character ROM?
2020-11-16 22:22:26 -05:00
Thomas Harte
bb80e53021
Reduces frequency of video flushes.
2020-11-16 21:55:41 -05:00
Thomas Harte
952891d1b6
Improves commentary.
2020-11-16 21:46:35 -05:00
Thomas Harte
6dfad6a44b
Slightly reduces logging.
...
Hopefully soon I can tear the whole lot out.
2020-11-16 21:46:19 -05:00
Thomas Harte
e4c5bfdd5c
Takes a repeat shot at proper shadowing.
...
I think the Apple IIgs Technical Reference explains how these bits interact, and I just had inhibit_all_pages off all on my own.
2020-11-16 19:54:12 -05:00
Thomas Harte
9a55eb56ea
Attempts to provide saner sequence point behaviour.
2020-11-16 19:00:11 -05:00
Thomas Harte
9206ab5dc3
Adds notes to self; implements get_next_sequence_point for video, allowing per-line interrupts.
2020-11-16 14:42:50 -05:00
Thomas Harte
7e39550fc0
Attempts to make JustInTimeActor sequence-point aware.
...
With the objective of chopping out a lot of future boilerplate.
2020-11-15 21:58:18 -05:00
Thomas Harte
c3f5fbd300
Picks a better framing compromise for classic and new video modes.
2020-11-15 19:14:43 -05:00
Thomas Harte
1db713fec1
Attempts more meaningful super high-res pixel output.
...
With a timing hack as noted.
2020-11-15 18:36:24 -05:00
Thomas Harte
68ba73bee0
Ensures I get some sort of feedback for non-text modes.
2020-11-15 17:16:52 -05:00
Thomas Harte
cdacf280e1
After much extra logging, corrects destination bank for MVN and MVP.
2020-11-15 16:08:29 -05:00
Thomas Harte
1538a02e18
Better explains concern.
2020-11-14 19:27:20 -05:00