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43194 Commits

Author SHA1 Message Date
Jim Grosbach
ce79299f78 MC'ize the '.code 16' and '.thumb_func' ARM directives. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118301 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 22:08:08 +00:00
Owen Anderson
36fa3ea566 Disallow the certain NEON modified-immediate forms when generating vorr or vbic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118300 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 21:57:54 +00:00
Jim Grosbach
8da0a5785c MC'ize simple ARMConstantValue entry emission (with a FIXME). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118295 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 20:34:24 +00:00
Benjamin Kramer
f79856986d Put class into an anonymous namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118294 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 19:56:38 +00:00
Owen Anderson
080c092297 Add codegen and encoding support for the immediate form of vbic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118291 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 19:27:46 +00:00
Jim Grosbach
a55661b6bd Enable MachO writing for ARM/Darwin. Lots of stuff still doesn't work 
(relocations, e.g.), but this will allow simple things to flow through.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118289 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 18:50:35 +00:00
Jim Grosbach
c9d1439051 Allow targets to specify the MachO CPUType/CPUSubtype information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118288 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 18:48:58 +00:00
Jim Grosbach
41ed3ca19d syntaxunified directive is a no-op for MachO writing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118287 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 18:47:32 +00:00
Jim Grosbach
6d87bca865 Add FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118280 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 17:37:13 +00:00
Duncan Sands
69300a2f47 When passing a parameter using the 'byval' mechanism, inline code needs to be used 
to perform the copy, which may be of lots of memory [*].  It would be good if the
fall-back code generated something reasonable, i.e. did the copy in a loop, rather
than vast numbers of loads and stores.  Add a note about this.  Currently target
specific code seems to always kick in so this is more of a theoretical issue rather
than a practical one now that X86 has been fixed.
[*] It's amazing how often people pass mega-byte long arrays by copy...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118275 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 15:20:29 +00:00
Daniel Dunbar
f8254d6473 CrashRecoveryContext: Add RunSafelyOnThread helper function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118272 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-05 07:19:09 +00:00
Duncan Sands
1e92ec6886 When passing a huge parameter using the byval mechanism, a long 
sequence of loads and stores was being generated to perform the
copy on the x86 targets if the parameter was less than 4 byte
aligned, causing llc to use up vast amounts of memory and time.
Use a "rep movs" form instead.  PR7170.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118260 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 21:16:46 +00:00
Benjamin Kramer
42c9b25554 Use arrays instead of constant-sized SmallVectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118257 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 18:45:27 +00:00
Rafael Espindola
7387345016 Add 118023 back, but with proper spelling for .uleb128/.sleb128. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118254 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 18:17:08 +00:00
Rafael Espindola
537ebeaffc Revert previous patch. Some targets don't support uleb and say 
they do :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118250 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 17:04:24 +00:00
Rafael Espindola
40f6514ff0 MCize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118249 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 16:32:18 +00:00
Devang Patel
35fcd6557f Introduce DIBuilder. It is intended to be a front-end friendly interface to emit debuggging information entries in LLVM IR. 
To create debugging information for a pointer, using DIBUilder front-end just needs
	DBuilder.CreatePointerType(Ty, Size);
instead of
	DebugFactory.CreateDerivedType(llvm::dwarf::DW_TAG_pointer_type,
                                       TheCU, "", getOrCreateMainFile(),
                                       0, Size, 0, 0, 0, OCTy);



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118248 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 15:01:38 +00:00
Duncan Sands
1e96bab329 In the calling convention logic, ValVT is always a legal type, 
and as such can be represented by an MVT - the more complicated
EVT is not needed.  Use MVT for ValVT everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118245 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 10:49:57 +00:00
Evan Cheng
416941d50f Fix @llvm.prefetch isel. Selecting between pld / pldw using the first immediate rw. There is currently no intrinsic that matches to pli. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118237 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 05:19:35 +00:00
Daniel Dunbar
ea8e20696e System: Add llvm_execute_on_thread, which does what it says. 
- Primarily useful for running some code with a specified stack size, when
   pthreads are available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118222 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 01:26:25 +00:00
Jim Grosbach
70933266ae Add ARM fixup info for load/store label references. Probably will need a bit of 
tweaking when we start using it for object file emission or JIT, but it's a
start.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118221 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 01:12:30 +00:00
Bill Wendling
2f46f1f59c Add encoding for VSTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118220 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 00:59:42 +00:00
Jakob Stoklund Olesen
8c42f48d02 Disable fancy splitting during spilling unless -extra-spiller-splits is given. 
This way, InlineSpiller does the same amount of splitting as the standard
spiller. Splitting should really be guided by the register allocator, and
doesn't belong in the spiller at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118216 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-04 00:32:32 +00:00
Jim Grosbach
806e80ef42 Teach ARM Target to use the tblgen support for generating an MC'ized 
CodeEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118209 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 23:52:49 +00:00
Owen Anderson
60f4870c22 Covert VORRIMM to be produced via early target-specific DAG combining, rather than legalization. 
This is both the conceptually correct place for it, as well as allowing it to be more aggressive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118204 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 23:15:26 +00:00
Owen Anderson
d966817f3c Add support for code generation of the one register with immediate form of vorr. 
We could be more aggressive about making this work for a larger range of constants,
but this seems like a good start.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118201 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 22:44:51 +00:00
Jim Grosbach
35b2de012d trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118199 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 22:03:20 +00:00
Eric Christopher
d81f17acb4 Just return undef for invalid masks or elts, and since we're doing that, 
just do it earlier too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118195 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 20:44:42 +00:00
Jakob Stoklund Olesen
964bc25e5a Let RegAllocBasic require MachineDominators - they are already available and 
splitting needs them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118194 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 20:39:26 +00:00
Jakob Stoklund Olesen
376dcbd6c2 Tag debug output as regalloc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118193 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 20:39:23 +00:00
Eric Christopher
e5b13cfdd0 Optimize generated code for integer materialization a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118192 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 20:21:17 +00:00
Owen Anderson
7a25825033 Unlike a lot of NEON instructions, vext isn't _actually_ parameterized by element size. Instead, 
all of the different element sizes are pseudo instructions that map down to vext.8 underneath, with
the immediate shifted left to reflect the increased element size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118183 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 18:16:27 +00:00
Bob Wilson
d168cef664 Add codegen patterns for VST1-lane instructions. Radar 8599955. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 16:24:53 +00:00
Bob Wilson
3468c2ee20 Check for extractelement with a variable operand for the element number. 
For NEON we had been assuming this was always an immediate constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118175 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 16:24:50 +00:00
Mikhail Glushenkov
d66f2b74f2 Rename FindExecutable to PrependMainExecutablePath. 
Makes it more clear that it is just a path manipulation function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118174 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 16:14:16 +00:00
Duncan Sands
391f5bce04 Rename PointsToLocalMemory to PointsToLocalOrConstantMemory to make 
the code more self-documenting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118171 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 14:45:05 +00:00
Duncan Sands
cdfad36b40 Simplify uses of MVT and EVT. An MVT can be compared directly 
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118169 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 12:17:33 +00:00
Duncan Sands
1440e8b918 Inside the calling convention logic LocVT is always a simple 
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 11:35:31 +00:00
Eric Christopher
caebdd44f3 If we have an undef mask our Elt will be -1 for our access, handle 
this by using an undef as a pointer.

Fixes rdar://8625016


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118164 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 09:36:40 +00:00
Evan Cheng
dfed19fe2c Fix preload instruction isel. Only v7 supports pli, and only v7 with mp extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118160 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 06:34:55 +00:00
Evan Cheng
bc7deb0f75 Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118152 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 05:14:24 +00:00
Bill Wendling
cdbbec43a8 Put the PC encoding in the correct bit position. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118151 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 04:57:44 +00:00
Eric Christopher
000cf708ef Invert these branches by default, it makes assembly comparisons a little 
easier to read.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118148 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 04:29:11 +00:00
Bill Wendling
92b5a2eb16 The MC code couldn't handle ARM LDR instructions with negative offsets: 
vldr.64 d1, [r0, #-32]

The problem was with how the addressing mode 5 encodes the offsets. This change
makes sure that the way offsets are handled in addressing mode 5 is consistent
throughout the MC code. It involves re-refactoring the "getAddrModeImmOpValue"
method into an "Imm12" and "addressing mode 5" version. But not to worry! The
majority of the duplicated code has been unified.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118144 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 01:49:29 +00:00
Dan Gohman
394d6298bc Fix DAGCombiner to avoid going into an infinite loop when it 
encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff).
This fixes rdar://8606584.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118143 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 01:47:46 +00:00
Jim Grosbach
2915eb4430 Remove unused function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118141 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 01:35:15 +00:00
Jim Grosbach
0a2287b909 Remove the no longer used 'Modifier' optional operand to the ARM 
printOperand() asm printer helper functions. rdar://8425198

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118140 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 01:11:15 +00:00
Jim Grosbach
496e2b2908 Remove unused function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118139 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 01:07:48 +00:00
Jim Grosbach
e6913600c7 Break ARM addrmode4 (load/store multiple base address) into its constituent 
parts. Represent the operation mode as an optional operand instead.
rdar://8614429

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118137 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 01:01:43 +00:00
Evan Cheng
8239daf7c8 Two sets of changes. Sorry they are intermingled. 
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
   "optimize for latency". Call instructions don't have the right latency and
   this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
   not # of micro-ops since multi-latency instructions is completely executed
   even when the predicate is false. Also, some instruction will be "slower"
   when they are predicated due to the register def becoming implicit input.
   rdar://8598427


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 00:45:17 +00:00
Evan Cheng
41957f6eb2 Modify scheduling itineraries to correct instruction latencies (not operand 
latencies) of loads.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118134 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 00:40:22 +00:00
Dan Gohman
303f350f7d Print an error as one big string instead of breaking it up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118130 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 00:24:33 +00:00
Dan Gohman
4e0a9c51b4 Delete unused variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118128 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 00:09:12 +00:00
Dan Gohman
aabb9b67bc Remove several unhelpful checks for isValid from sys::Path. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118127 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-03 00:01:23 +00:00
Eric Christopher
4c914125c4 Make sure we're only storing a single bit here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118126 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 23:59:09 +00:00
Chris Lattner
491561dcac per a suggestion by Frits van Bommel, mark all MBlaze Pseudo 
instructions as isCodeGenOnly in the parent class instead of
sprinkling it throughout the .td files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118125 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 23:57:05 +00:00
Owen Anderson
f431edae5c Revert r118097 to fix buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118121 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 23:47:29 +00:00
Chris Lattner
a1ca91af4e Completely reject instructions that have an operand in their 
ins/outs list that isn't specified by their asmstring.  Previously
the asmmatcher would just force a 0 register into it, which clearly
isn't right.  Mark a bunch of ARM instructions that use this as 
isCodeGenOnly.  Some of them are clearly pseudo instructions (like
t2TBB) others use a weird hasExtraSrcRegAllocReq thing that will
either need to be removed or the asmmatcher will need to be taught
about it (someday).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118119 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 23:40:41 +00:00
Jakob Stoklund Olesen
930f5efac0 Let the -inline-threshold command line argument take precedence over the 
threshold given to createFunctionInliningPass().

Both opt -O3 and clang would silently ignore the -inline-threshold option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118117 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 23:40:26 +00:00
Dan Gohman
ac793822cd Don't try to enforce MAXPATHLEN in sys::Path for Unix. OS's can check 
limits on their own.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118113 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 23:19:55 +00:00
Dan Gohman
9e2e0c39e7 Simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118110 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 23:16:26 +00:00
Dan Gohman
6f6021ecfe Fix a copy+pasto. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118106 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:56:51 +00:00
Dan Gohman
b48a8fddbf Avoid manipulating paths in fixed-sized arrays. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118105 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:55:34 +00:00
Bill Wendling
0800ce7189 Obsessive formatting changes. No functionality impact. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118103 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:53:11 +00:00
Dan Gohman
0803ebe0c8 Simplify this code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118102 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:50:10 +00:00
Bill Wendling
d3a124db4d Omit unused parameter name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118099 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:46:04 +00:00
Bill Wendling
7292e0a656 Simplify the EncodeInstruction method now that a lot of the special case stuff 
is handled with the MC encoder.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118098 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:44:12 +00:00
Owen Anderson
1ba6064437 Since these fields are not exactly equivalent to the encoded field, rename them to something with semantic meaning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118097 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:41:42 +00:00
Dan Gohman
a0f1a2baee Use '\0' instead of 0 for nul character constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118096 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:41:19 +00:00
Bill Wendling
5df0e0a61d Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work 
with immediates up to 16-bits in size. The same logic is applied to other LDR
encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in
VLDR's case). Removing the "12" allows it to be more generic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118094 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:31:46 +00:00
Owen Anderson
a2b50b300e Rename encoder methods to match naming convention. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118093 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:28:01 +00:00
Chris Lattner
d6e623ad15 mark a few codegenonly instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118092 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:26:33 +00:00
Mikhail Glushenkov
bd6e0323b9 appendSuffix: don't append a dot when the suffix is empty. 
Additionally, move the implementation of appendSuffix to Path.cpp: it is
platform-independent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118089 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:18:37 +00:00
Mikhail Glushenkov
ed724fd43a Revert r118057, this is better fixed in appendSuffix itself. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118088 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:18:28 +00:00
Owen Anderson
b20594fce6 Provide correct encodings for the remaining vst variants that we currently generate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118087 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:18:18 +00:00
Dan Gohman
8d4fd965d4 Eliminate some temporary std::strings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118086 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 22:07:47 +00:00
Owen Anderson
e95c946aeb Tentative encodings for the "single element from one lane" variant of vst1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118084 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 21:54:45 +00:00
Owen Anderson
a1a45fd254 Add correct encodings for basic variants for vst3 and vst4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118082 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 21:47:03 +00:00
Rafael Espindola
187ce544b2 Do relaxations with FT_Org fragments. Fixes the FIXME: 
// FIXME: We should compute this sooner, we don't want to recurse here, and
    // we would like to be more functional.

In MCAssembler::ComputeFragmentSize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118080 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 21:38:23 +00:00
Bob Wilson
d0c6bc2204 Add NEON VST1-lane instructions. Partial fix for Radar 8599955. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118069 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 21:18:25 +00:00
Owen Anderson
d2f3794e4d Add correct encodings for the basic variants for vst2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118068 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 21:16:58 +00:00
Owen Anderson
cfebe3a8b1 Add correct encodings for the basic form of vst1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118067 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 21:06:06 +00:00
Dan Gohman
8eeb5ae31d Micro-optimize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118058 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:52:47 +00:00
Dan Gohman
d4589a3f58 Don't append a dot on platforms which don't use exe suffixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118057 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:49:48 +00:00
Mikhail Glushenkov
6674b77ada llvmc: Fix tool finding logic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118056 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:47:41 +00:00
Owen Anderson
d138d7034e Factor out a common encoding class for loads and stores with a lane parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118055 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:47:39 +00:00
Devang Patel
b71bbf9ec1 Fix DIType verifier. The element 3 is DIFile now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118054 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:41:13 +00:00
Owen Anderson
f0ea0f2b15 Add correct encodings for the rest of the vld instructions that we generate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118053 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:40:59 +00:00
Mikhail Glushenkov
c8aef4b2ea GetDLLSuffix: Remove the leading dot from LTDL_SHLIB_EXT. 
This allows using GetDLLSuffix() with appendSuffix().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118051 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:32:59 +00:00
Mikhail Glushenkov
572ec1f3c0 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118050 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:32:52 +00:00
Mikhail Glushenkov
345b344e64 FindExecutable: remove the executability check. 
This makes the behaviour of FindExecutable more consistent across platforms, but
I'm not very happy with the name...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118049 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:32:46 +00:00
Mikhail Glushenkov
9cd5971228 Make FindProgramByName return paths with slashes unmodified on Windows. 
This makes its behaviour more consistent across platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118048 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:32:39 +00:00
Mikhail Glushenkov
0f2ec15b9e 80-col violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118045 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:32:31 +00:00
Mikhail Glushenkov
f5a95ce0d4 Path: Add GetEXESuffix() to complement GetDLLSuffix(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118042 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 20:32:26 +00:00
Andrew Trick
4638852696 Fixes <rdar://problem/8612856>: During postRAsched, the antidependence 
breaker needs to check all definitions of the antidepenent register to
avoid multiple defs of the same new register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118032 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 18:16:45 +00:00
Dale Johannesen
1aabe1b493 Apply patch for use-after-free in InlineAsm constant handling, 
PR 8522 / 8616046.  Test reduction, analysis and patch by Tim Deegan!
(However, review by someone who understands the classes here better
is welcome.  John Krum will return!)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118030 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 17:59:27 +00:00
Jim Grosbach
28b108250d Sort bit assignments. Cosmetic change only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118029 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 17:59:04 +00:00
Devang Patel
c8821046f8 Simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118027 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 17:37:00 +00:00
Jim Grosbach
ab3d00e535 Revert r114340 (improvements in Darwin function prologue/epilogue), as it broke 
assumptions about stack layout. Specifically, LR must be saved next to FP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118026 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 17:35:25 +00:00
Rafael Espindola
3ff57094a7 Add support for expressions in .sleb/.uleb directives. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118023 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 17:22:24 +00:00
Devang Patel
8bc9ef77b7 If value map does not have register for an argument then try to find frame index before giving up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118022 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 17:19:03 +00:00
Devang Patel
a90b305af9 Use frameindex, if available, as a last resort to emit debug info for a parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118020 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 17:01:30 +00:00
Owen Anderson
cf667be17b Add correct NEON encodings for vld2, vld3, and vld4 basic variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117997 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 01:24:55 +00:00
Eric Christopher
4053e63a4b Remove an assert - it's possible to be hit, and we just want to avoid 
handling those cases for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117996 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 01:24:49 +00:00
Eric Christopher
61d69da051 Whitespeace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117995 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 01:22:45 +00:00
Eric Christopher
aaa8df4cad No really, no thumb1 for arm fast isel. Also add an informative comment as 
to what someone would need to do to support thumb1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 01:21:28 +00:00
Jakob Stoklund Olesen
371e82bf51 Don't try to split weird critical edges that really aren't: 
BB#1: derived from LLVM BB %bb.nph28
    Live Ins: %AL
    Predecessors according to CFG: BB#0
	TEST8rr %reg16384<kill>, %reg16384, %EFLAGS<imp-def>; GR8:%reg16384
	JNE_4 <BB#2>, %EFLAGS<imp-use,kill>
	JMP_4 <BB#2>
    Successors according to CFG: BB#2 BB#2

These double CFG edges only ever occur in bugpoint-generated code, so there is
no need to attempt something clever.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117992 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 00:58:37 +00:00
Owen Anderson
e85bd773e6 Attempt to provide correct encodings for a number of other vld1 variants, which we can't test 
since we can neither generate nor parse them at the moment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117988 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 00:24:52 +00:00
Owen Anderson
b552174a8c Add aesthetic break. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117986 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 00:14:00 +00:00
Owen Anderson
d9aa7d30aa Add correct NEON encodings for the "multiple single elements" form of vld. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117984 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-02 00:05:05 +00:00
Jakob Stoklund Olesen
8bcf7603f7 MachineLICM should not claim to be preserving the CFG when it can split critical 
edges on demand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117982 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 23:59:55 +00:00
Jakob Stoklund Olesen
962c71089d Be more precise about verifying missing kill flags. 
It is legal for an instruction to have two operands using the same register,
only one a kill. This is interpreted as a kill.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117981 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 23:59:53 +00:00
Jakob Stoklund Olesen
3d4114c464 When inserting copies during splitting, always use the parent register as the 
source, and let rewrite() clean it up.

This way, kill flags on the inserted copies are fixed as well during rewrite().

We can't just assume that all the copies we insert are going to be kills since
critical edges into loop headers sometimes require both source and dest to be
live out of a block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117980 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 23:59:48 +00:00
Jim Grosbach
9af3d1c0dc Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXME 
for handling the fixup necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117978 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 23:45:50 +00:00
Jim Grosbach
a502423d1e Remove unused function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117977 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 23:40:56 +00:00
Bob Wilson
665814b6be Add support for alignment operands on VLD1-lane instructions. 
This is another part of the fix for Radar 8599955.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117976 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 23:40:51 +00:00
Bill Wendling
cd944a424c Missed reverting this bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117971 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 23:17:54 +00:00
Bill Wendling
160accad6b Minor cleanup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117969 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 23:11:22 +00:00
Chris Lattner
efd8dadb4f rearrange a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117967 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 23:07:52 +00:00
Bob Wilson
b796bbb6de Add NEON VLD1-lane instructions. Partial fix for Radar 8599955. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117964 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 22:04:05 +00:00
Jakob Stoklund Olesen
1c163d2a06 Add kill flag verification. 
At least X86FloatingPoint requires correct kill flags after register allocation,
and targets using register scavenging benefit. Conservative kill flags are not
enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117960 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 21:51:31 +00:00
Jakob Stoklund Olesen
79cb53ce95 Update kill flags while rewriting instructions after splitting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117959 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 21:51:29 +00:00
Bill Wendling
c2bf50245f Move the machine operand MC encoding patterns to the parent classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117956 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 21:17:06 +00:00
Owen Anderson
648b20d5db When folding away a (shl (shr)) pair, we need to check that the bits that will BECOME the low 
bits are zero, not that the current low bits are zero.  Fixes <rdar://problem/8606771>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117953 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 21:08:20 +00:00
Chris Lattner
99f535242c use our fancy new MnemonicAlias mechanism to remove a bunch of hacks 
from X86AsmParser.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117952 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 21:06:34 +00:00
Bill Wendling
40a5eb18b0 When we look at instructions to convert to setting the 's' flag, we need to look 
at more than those which define CPSR. You can have this situation:

(1)  subs  ...
(2)  sub   r6, r5, r4
(3)  movge ...
(4)  cmp   r6, 0
(5)  movge ...

We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:

(1)  sub   r1, r2, r3
(2)  sub   r4, r5, r6
(3)  cmp   r4, ...
(5)  movge ...
(6)  cmp   r1, ...
(7)  movge ...

We cannot convert (1) to "subs" because of the intervening use of CPSR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 20:41:43 +00:00
Jakob Stoklund Olesen
a37d5cf342 Don't assign new registers created during a split to the same stack slot, but 
give them individual stack slots once the are actually spilled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 19:49:57 +00:00
Jakob Stoklund Olesen
e8f0823a68 Add basic LiveStacks verification. 
When an instruction refers to a spill slot with a LiveStacks entry, check that
the spill slot is live at the instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117944 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 19:49:52 +00:00
Bob Wilson
24645a1a6d NEON does not support truncating vector stores. Radar 8598391. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117940 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 18:31:39 +00:00
Jim Grosbach
469ebbe148 Add FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117936 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 18:11:14 +00:00
Jim Grosbach
6797f89815 Add 'IsThumb' predicate to patterns marked as 'IsThumb1Only'. The latter gates 
codegen using the patterns; the latter gates the assembler recognizing the
instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117931 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 17:08:58 +00:00
Rafael Espindola
c70a1d985a Write the line info to .debug_line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117930 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 17:07:14 +00:00
Jim Grosbach
833c93c795 Mark ARM subtarget features that are available for the assembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 16:59:54 +00:00
Jim Grosbach
d4462a5a4f trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117927 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 16:44:21 +00:00
Rafael Espindola
f89671d994 Move EmitInstruction to MCObjectStreamer so that ELF and MachO can share it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117925 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 16:27:31 +00:00
Jim Grosbach
9729d2e998 The T2 extract/pack instructions are only valid in Thumb2 mode. Mark the 
patterns as such

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117923 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 15:59:52 +00:00
Rafael Espindola
cc3acee7b3 Add support for .value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117922 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 15:29:07 +00:00
Rafael Espindola
484291c273 Implement .weakref. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117911 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 14:28:48 +00:00
Bill Wendling
69661191ce Move instruction encoding bits into the parent class and remove the temporary 
*_Encode classes. These instructions are the only ones which use those classes,
so a subclass isn't necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117906 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 06:00:39 +00:00
Bill Wendling
9e7cb3d243 The testcase is now XFAILed. Sorry about the breakage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117904 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 05:50:55 +00:00
Chris Lattner
acc473fcf9 "mov[zs]x (mem), GR16" are not ambiguous: the mem 
must be 8 bits.  Support this memory form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117902 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 05:41:10 +00:00
Chris Lattner
b501d4f673 Implement enough of the missing instalias support to get 
aliases installed and working.  They now work when the
matched pattern and the result instruction have exactly
the same operand list.

This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.

Note that we do not accept instructions like:
  movzx 0(%rsp), %rsi

GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand.  It could be 8/16/32 bits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117901 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 05:34:34 +00:00
Chris Lattner
4164f6bbbf make the asm matcher emitter reject instructions that have comments 
in their asmstring.  Fix the two x86 "NOREX" instructions that have them.
If these comments are important, the instlowering stuff can print them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117897 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 04:44:29 +00:00
Chris Lattner
4d1189f385 reject instructions that contain a \n in their asmstring. Mark 
various X86 and ARM instructions that are bitten by this as isCodeGenOnly,
as they are.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117884 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-01 00:46:16 +00:00
Eric Christopher
b698a56dd4 Revert r117876 for now, it's causing more testsuite failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117879 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 22:42:55 +00:00
Bill Wendling
b3747706fc Disable the peephole optimizer until 186.crafty on armv6 is fixed. This is what 
looks like is happening:

Without the peephole optimizer:
  (1)   sub     r6, r6, #32
        orr     r12, r12, lr, lsl r9
        orr     r2, r2, r3, lsl r10
  (x)   cmp     r6, #0
        ldr     r9, LCPI2_10
        ldr     r10, LCPI2_11
  (2)   sub     r8, r8, #32
  (a)   movge   r12, lr, lsr r6
  (y)   cmp     r8, #0
LPC2_10:
        ldr     lr, [pc, r10]
  (b)   movge   r2, r3, lsr r8

With the peephole optimizer:
        ldr     r9, LCPI2_10
        ldr     r10, LCPI2_11
  (1*)  subs    r6, r6, #32
  (2*)  subs    r8, r8, #32
  (a*)  movge   r12, lr, lsr r6
  (b*)  movge   r2, r3, lsr r8

(1) is used by (x) for the conditional move at (a). (2) is used by (y) for the
conditional move at (b). After the peephole optimizer, these the flags resulting
from (1*) are ignored and only the flags from (2*) are considered for both
conditional moves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117876 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 22:07:12 +00:00
Nicolas Geoffray
7a5a3f75eb Attach a GCModuleInfo to a MachineFunction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117867 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 20:38:38 +00:00
Chris Lattner
150d20e8fc fix the !eq operator in tblgen to return a bit instead of an int. 
Use this to make the X86 and ARM targets set isCodeGenOnly=1 
automatically for their instructions that have Format=Pseudo,
resolving a hack in tblgen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117862 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 19:22:57 +00:00
Chris Lattner
a4a3a5e3c2 two changes: make the asmmatcher generator ignore ARM pseudos properly, 
and make it a hard error for instructions to not have an asm string.
These instructions should be marked isCodeGenOnly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117861 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 19:15:18 +00:00
Chris Lattner
39ee036f40 reapply r117858 with apparent editor malfunction fixed (somehow I 
got a dulicated line).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117860 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 19:10:56 +00:00
Chris Lattner
8b2f0822f3 revert r117858 while I check out a failure I missed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117859 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 19:05:32 +00:00
Chris Lattner
efa53760fe the asm matcher can't handle operands with modifiers (like ${foo:bar}). 
Instead of silently ignoring these instructions, emit a hard error and
force the target author to either refactor the target or mark the 
instruction 'isCodeGenOnly'.

Mark a few instructions in ARM and MBlaze as isCodeGenOnly the are 
doing this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117858 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 18:48:12 +00:00
Chris Lattner
a33b93f7f1 sketch out the planned instruction alias mechanism, add some comments about 
how the push/pop mnemonic aliases are wrong.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117857 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 18:43:46 +00:00
Duncan Sands
4590766580 Factorize the duplicated logic for choosing the right argument 
calling convention out of the fast and normal ISel files, and
into the calling convention TD file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117856 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 13:21:44 +00:00
Duncan Sands
e26032d5b2 Remove CCAssignFnForRet from X86 FastISel in favour of RetCC_X86, 
which has the same logic specified in the CallingConv TD file.
This brings FastISel in line with the standard X86 ISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117855 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 13:02:38 +00:00
Rafael Espindola
7be2c33193 Add support for files with more than 65280 sections. No testcase since 
it would be a bit too big :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117849 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-31 00:16:26 +00:00
Eric Christopher
76d61478df Make sure we have a legal type (and simple) before continuing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117848 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 21:25:26 +00:00
Chris Lattner
0f899c78e1 Resolve a terrible hack in tblgen: instead of hardcoding 
"In32BitMode" and "In64BitMode" into tblgen, allow any
predicate that inherits from AssemblerPredicate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117831 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 19:38:20 +00:00
Chris Lattner
693173feef Implement (and document!) support for MnemonicAlias's to have Requires 
directives, allowing things like this:

def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;

Move the rest of the X86 MnemonicAliases over to the .td file.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117830 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 19:23:13 +00:00
Chris Lattner
a47b265b1a really zap alias. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117824 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 18:23:25 +00:00
Chris Lattner
b3c417845d move fcompi alias to .td file and zap some useless code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117823 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 18:22:53 +00:00
Chris Lattner
6f96b0899b move rep aliases to td file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117822 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 18:17:33 +00:00
Chris Lattner
a17a9a00dc move sal aliases to .td file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117821 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 18:14:54 +00:00
Chris Lattner
1a1ecc9f3c fix an encoding mismatch where "sal %eax, 1" was not using the short encoding 
for shl.  Caught by inspection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117820 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 18:13:10 +00:00
Chris Lattner
8b260a7644 move a bunch more aliases from .cpp -> .td file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117819 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 18:07:17 +00:00
Chris Lattner
8cb441c9e0 move cmov aliases to .td file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117818 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 17:56:50 +00:00
Chris Lattner
b69fc28e92 move setcc and jcc aliases from .cpp to .td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117817 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 17:51:45 +00:00
Chris Lattner
537ca844dd move some code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117816 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 17:38:55 +00:00
Chris Lattner
674c1dcca2 implement (and document!) the first kind of MC assembler alias, which 
just remaps one mnemonic to another.  Convert a few of the X86 aliases
from .cpp to .td code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 17:36:36 +00:00
Duncan Sands
aa66099330 Now that the MallocInst no longer exists, this workaround for 
it claiming not to have side-effects is no longer needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117789 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 16:12:16 +00:00
Jim Grosbach
7644971232 Add FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117787 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 14:54:23 +00:00
Jim Grosbach
604cdf6ea7 Clean up comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117785 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 13:48:28 +00:00
Duncan Sands
ad6f541840 If a function does a volatile load from a global constant, do not 
consider it to be readonly.  In fact, don't even consider it to be
readonly if it does a volatile load from an AllocaInst either (it
is debatable as to whether readonly would be correct or not in this
case; play safe for the moment).  This fixes PR8279.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117783 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 12:59:44 +00:00
Jim Grosbach
4aaf59d8ed Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117782 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 12:59:16 +00:00
Chris Lattner
9a82e70275 stay out of the reserved namespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117773 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 04:57:14 +00:00
Chris Lattner
dba34d874d simplify this code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117771 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 04:35:59 +00:00
Chris Lattner
e5658fa15e split MaybeParseRegister into its two logical uses, eliminating malloc+free traffic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117769 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 04:09:10 +00:00
Jim Grosbach
4b5236c966 Avoid re-evaluating MI.getNumOperands() every iteration of the loop. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117766 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 01:40:16 +00:00
Jakob Stoklund Olesen
e5f4e9fb2b Include MachineBasicBlock numbers in viewCFG() output. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117765 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 01:26:19 +00:00
Jakob Stoklund Olesen
5b4bb218d1 Make sure copies are inserted after any exception handling labels at the top of 
a basic block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117764 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 01:26:16 +00:00
Jakob Stoklund Olesen
92095e7b3f Add SkipPHIsAndLabels from PHIElimination to MachineBasicBlock. It is needed 
elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117763 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 01:26:14 +00:00
Jakob Stoklund Olesen
ab56647e6b Disable more of physical register live intervals verification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117762 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 01:26:11 +00:00
Jakob Stoklund Olesen
7d57753df3 Print out register class of spilled register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117761 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 01:26:09 +00:00
Bob Wilson
f74a429816 Overhaul memory barriers in the ARM backend. Radar 8601999. 
There were a number of issues to fix up here:
* The "device" argument of the llvm.memory.barrier intrinsic should be
used to distinguish the "Full System" domain from the "Inner Shareable"
domain.  It has nothing to do with using DMB vs. DSB instructions.
* The compiler should never need to emit DSB instructions.  Remove the
ARMISD::SYNCBARRIER node and also remove the instruction patterns for DSB.
* Merge the separate DMB/DSB instructions for options only used for the
disassembler with the default DMB/DSB instructions.  Add the default
"full system" option ARM_MB::SY to the ARM_MB::MemBOpt enum.
* Add a separate ARMISD::MEMBARRIER_MCR node for subtargets that implement
a data memory barrier using the MCR instruction.
* Fix up encodings for these instructions (except MCR).
I also updated the tests and added a few new ones to check for DMB options
that were not currently being exercised.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117756 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 00:54:37 +00:00
Jim Grosbach
6b5252db2d Encode the register list operands for ARM mode LDM/STM instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117753 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-30 00:37:59 +00:00
Bill Wendling
52925b60f1 Some instructions end with an "ls" prefix, but it doesn't indicate that they are 
conditional. Check for those instructions explicitly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117747 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 23:50:21 +00:00
Evan Cheng
189c1ec4c1 Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117745 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 23:36:03 +00:00
Jim Grosbach
f38bfd1918 Remove hard tab characters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117742 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 23:23:15 +00:00
Jim Grosbach
c4bc2111a7 80 column fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117741 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 23:21:57 +00:00
Jim Grosbach
d8a11c25fa trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 23:21:03 +00:00
Jim Grosbach
0d2d2e9246 s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operand 
encoder functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117738 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 23:19:55 +00:00
Evan Cheng
e09206d4d7 Fix fpscr <-> GPR latency info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117737 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 23:16:55 +00:00
Rafael Espindola
d179886f05 Be more strict on when we produce an undefined reference. In gas a file with 
just

.type   foo,@object

will produce an undefined reference to foo. On the other hand, a file with
just

.weakref bar, foo

will not. It is somewhat hard to support both in MC since both statements
should create the symbols. It should be possible if we really need to by
adding to the flags, but hopefully that is not necessary.

With this patch we do not produce a undefined reference in any of those cases.
The assembly file needs an actual use for the undefined reference to be
present.

This is in preparation for a patch implementing .weakref.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117735 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 23:09:31 +00:00
Bob Wilson
db1da8ed42 Clean up indentation and other whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117728 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 22:20:45 +00:00
Bob Wilson
09fd64644d Remove trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117727 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 22:20:43 +00:00
Bob Wilson
f0b48f836e Fix 80-column violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117722 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 22:03:07 +00:00
Bob Wilson
822cb58d08 Change instcombine's getShuffleMask to represent undef with negative values. 
This code had previously used 2*N, where N is the mask length, to represent
undef.  That is not safe because the shufflevector operands may have more
than N elements -- they don't have to match the result type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117721 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 22:03:05 +00:00
Bob Wilson
46455096be Remove DAG combiner patch to fold vector splats. Instcombiner does it now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 22:03:02 +00:00
Bob Wilson
4cac5facc3 Make instcombine a little more aggressive in combining vector shuffles. 
Allow splats even if they don't match either of the original shuffles,
possibly due to undef entries in the shuffles masks.  Radar 8597790.
Also fix some 80-column violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117719 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 22:02:50 +00:00
Jim Grosbach
3df518e67e add FIXME 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117718 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 21:56:51 +00:00
Jim Grosbach
8e0a3eb957 Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it in 
the ARMExpandPseudos pass rather than during the asm lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117714 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 21:35:25 +00:00
Eric Christopher
0e6233bfd7 Handle comparison values we already have - this fixes the consumer-typeset 
failure for llvm-gcc on arm fast isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 21:08:19 +00:00
Owen Anderson
0995f20cfd Give up on doing in-line instruction simplification during correlated value propagation. Instruction simplification 
needs to be guaranteed never to be run on an unreachable block.  However, earlier block simplifications may have
changed the CFG to make block that were reachable when we began our iteration unreachable by the time we try to
simplify them. (Note that this also means that our depth-first iterators were potentially being invalidated).

This should not have a large impact on code quality, since later runs of instcombine should pick up these simplifications.
Fixes PR8506.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 21:05:17 +00:00
Jim Grosbach
a3c1629ff5 ARM::MOVi32imm is expanded in ARMExpandPseudoInsts, so there's no need to 
handle it in the asm lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117707 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 20:37:06 +00:00
Jim Grosbach
e317b13a2d Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117703 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 20:21:49 +00:00
Jim Grosbach
f32ecc69e5 ARM encoding information for CLREX, SWP and SWPB. Add comment for sjlj pseudos and a FIXME for TLS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117702 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 20:21:36 +00:00
Dan Gohman
e60dcb5e97 Make ScalarEvolution::forgetLoop forget all contained loops too, because 
they may have ValuesAtScopes map entries referencing their outer loops.
This fixes a user-after-free reported in PR8471.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117698 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 20:16:10 +00:00
Jim Grosbach
86875a2463 ARM mode LDREX*/STREX* binary encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117695 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 19:58:57 +00:00
Jim Grosbach
27e900888e Encoding information for ARM conditional move instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117687 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 19:28:17 +00:00
Jakob Stoklund Olesen
db4eec3d2c Fix sign error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117677 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 18:21:18 +00:00
Evan Cheng
089751535d Avoiding overly aggressive latency scheduling. If the two nodes share an 
operand and one of them has a single use that is a live out copy, favor the
one that is live out. Otherwise it will be difficult to eliminate the copy
if the instruction is a loop induction variable update. e.g.

BB:
sub r1, r3, #1
str r0, [r2, r3]
mov r3, r1
cmp
bne BB

=>

BB:
str r0, [r2, r3]
sub r3, r3, #1
cmp
bne BB

This fixed the recent 256.bzip2 regression.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117675 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 18:09:28 +00:00
Evan Cheng
d7e473c629 - Don't schedule nodes with only MVT::Flag and MVT::Other values for latency. 
- Compute CopyToReg use operand latency correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117674 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 18:07:31 +00:00
Jakob Stoklund Olesen
3ccfce0e35 Don't transfer unused values to the new intervals formed by splitting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117673 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 17:47:49 +00:00
Jim Grosbach
80eb233a3c Handle ARM addrmode5 instructions with an offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117672 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 17:41:25 +00:00
Benjamin Kramer
8a8e26fb18 Silence Release build warnings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117671 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 17:40:05 +00:00
Jakob Stoklund Olesen
6d309059a7 Teach ConnectedVNInfoEqClasses::Classify to deal with unused values. 
We don't want unused values forming their own equivalence classes, so we lump
them all together in one class, and then merge them with the class of the last
used value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 17:37:29 +00:00
Jakob Stoklund Olesen
c94fcb1507 Never propagate the idom value out of a block that defines its own value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 17:37:25 +00:00
John Thompson
44ab89eb37 Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 17:29:13 +00:00
Dan Gohman
3545635a60 Check if ErrMsg is null. This fixes the "not" command. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117666 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 17:20:42 +00:00
Dan Gohman
c463316046 Fix these error messages to be less confusing. These error 
messages primarily indicate errors running the viewer, not
errors with the graph file itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117665 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 17:03:40 +00:00
Dan Gohman
e5f77cda25 Make Program::Wait differentiate execution failure due to the file 
being not found from the file being not executable. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117664 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 16:54:25 +00:00
Jim Grosbach
d8d716fad3 Revert 117660. Apparently it's not as trivial as that... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117663 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 16:50:53 +00:00
Dan Gohman
695e85d477 Make Program::Wait provide an error message string for errors 
executing the child process and abnormal child process termination.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117661 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 16:39:01 +00:00
Jim Grosbach
da54c6dd4f ARM addrmode5 instructions have neither writeback nor post-indexed modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117660 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 16:38:59 +00:00
Jim Grosbach
16c7425cff Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117651 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 14:46:02 +00:00
Benjamin Kramer
61a4d56a03 ARMAsmParser: Plug a memory leak. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 09:43:39 +00:00
Eric Christopher
c223e2b10b Add an unreachable to silence warning - the switch is actually 
fully enumerated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117647 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 09:26:59 +00:00
Bill Wendling
49ad731adf This may be an ARM target, so check for _Unwind_SjLj_Resume. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117643 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 07:46:01 +00:00
Dan Gohman
cd5c123a1d Teach memdep to use pointsToConstantMemory to determine that loads 
from constant memory don't alias any stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117636 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 01:14:04 +00:00
Jakob Stoklund Olesen
eeaae20be0 Fix broken equivalence class calculation. We could probably also use 
EquvivalenceClasses.h except it looks like overkill when elements are continuous
integers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117631 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 00:40:59 +00:00
Jakob Stoklund Olesen
cb367778c0 Print out the connected components in the verifier after complaining about their 
multiplicity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117630 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 00:40:57 +00:00
Jakob Stoklund Olesen
1f46a0ac66 Run a verification pass before any splitting to better distribute blame. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117629 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 00:40:55 +00:00
Chris Lattner
14b93851cc add simple support for addrmode5 operands, allowing 
vldr.64 to work.  I have no idea if this is fully right, but 
it is in the right direction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117626 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-29 00:27:31 +00:00
Devang Patel
4d7f9a00a5 Ignore empty blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117615 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 22:11:59 +00:00
Chris Lattner
e73d4f8ec7 give better error diagnostics, for example: 
t.s:1:14: error: invalid operand for instruction
vldr.64	d17, [r0]   
       	     ^

instead of:

t.s:1:1: error: unrecognized instruction
vldr.64	d17, [r0]   
^



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117611 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 21:41:58 +00:00
Chris Lattner
6274ec48b3 hook up getOpcodeName for ARM so that "llc -show-mc-inst" includes 
the opcode string in the inst dump, e.g.:
	vmov	r2, r3, d17             @ encoding: [0x31,0x2b,0x53,0xec]
                                        @ <MCInst #989 VMOVRRD
                                        @  <MCOperand Reg:68>
                                        @  <MCOperand Reg:69>
                                        @  <MCOperand Reg:19>
                                        @  <MCOperand Imm:14>
                                        @  <MCOperand Reg:0>>

The "VMOVRRD" is new.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117609 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 21:37:33 +00:00
Rafael Espindola
f4b0f3e616 Improvements to .section parsing: 
* If we have a M or a G, reject sections without the type
* Only parse the flag specific arguments if we have M or G
* Parse the corresponding arguments for M and G

We ignore the G arguments and flag for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117608 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 21:33:33 +00:00
Chris Lattner
fa42fad8bf move a method out of line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117605 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 21:28:01 +00:00
Chris Lattner
550276ee5b remove the rest of hte owningptr's, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117603 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 20:52:15 +00:00
Jakob Stoklund Olesen
8c4564287d One day, physical register live ranges will be sensible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117602 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 20:44:22 +00:00
Jakob Stoklund Olesen
e1dde7b05a Replace SplitKit SSA update with an iterative algorithm very similar to the one 
in SSAUpdaterImpl.h

Verifying live intervals revealed that the old method was completely wrong, and
we need an iterative approach to calculating PHI placemant. Fortunately, we have
MachineDominators available, so we don't have to compute that over and over
like SSAUpdaterImpl.h must.

Live-out values are cached between calls to mapValue() and computed in a greedy
way, so most calls will be working with very small block sets.

Thanks to Bob for explaining how this should work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117599 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 20:34:52 +00:00
Jakob Stoklund Olesen
d68f458244 Make MachineDominators available for SplitEditor. We are going to need it for 
proper SSA updating.

This doesn't cause MachineDominators to be recomputed since we are already
requiring MachineLoopInfo which uses dominators as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117598 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 20:34:50 +00:00
Jakob Stoklund Olesen
26b92be922 Add a temporary command line option to verify machine code after each spill or 
split.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117597 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 20:34:47 +00:00
Dan Gohman
24a492683c Revert r117582, which reverted r77396. Searching PATH for a string 
which contains slashes is inconsistent with the meaning of PATH on
Unix-type platforms, and pretty surprising.

If the user has given a specific path to execute and we can't
execute it, we should fail and say why.  (Apparently the new
posix_spawn code doesn't always say why, but that's a separate
issue.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117596 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 20:34:33 +00:00
Rafael Espindola
787c33718d Add support for the .string directive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117592 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 20:02:27 +00:00
Devang Patel
bc2bb9bbd0 Do not work too hard to find type's file info. There is a special field to record file info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 19:50:08 +00:00
Rafael Espindola
1973d43792 Defined weak symbols should have non-zero value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117585 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 19:39:57 +00:00
Mikhail Glushenkov
9f36e7389f llvmc: Make ExecuteProgram() look in the driver directory first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117584 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 19:33:08 +00:00
Mikhail Glushenkov
8a5ff478db Remove an unnecessary check and an unnecessary temporary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117583 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 19:33:04 +00:00
Mikhail Glushenkov
c61c7549a8 Revert r77396. 
Original commit message:

    On "Unix", if Program::FindProgramByName is given a name containing
    slashes, just go with it, regardless of whether it looks like it will
    be executable. This follows the behavior of sh(1) more closely.

It's better when behaviour is consistent between platforms. This change also
makes FindExecutable() behave as expected on unix-likes (before this commit, it
used to always succeed).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117582 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 19:32:58 +00:00
Mikhail Glushenkov
7289d06e48 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117581 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 19:32:53 +00:00
Rafael Espindola
29129728f1 Fix relocations with renamed symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117575 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 19:08:03 +00:00
Benjamin Kramer
57ca3ccd45 Reduce malloc thrashing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117572 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 18:41:23 +00:00
Jim Grosbach
ab682a2090 PLD, PLDW, PLI encodings, plus refactor their use of addrmode2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117571 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 18:34:10 +00:00
Rafael Espindola
f571f9a8fe Aliases defined with .symver should copy the binding of the symbols they alias. 
Move the existing patching for undefined symbols so that all the patching
is done in the same function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117570 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 18:33:03 +00:00
Devang Patel
3cabc9d2c9 Technically DIFile scope should also be handled here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117563 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 17:30:52 +00:00
Chris Lattner
c0ddfaa134 rearrange ParseRegisterList. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117560 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 17:23:41 +00:00
Chris Lattner
3a69756e39 refactor some code to simplify it, eliminating some owningptr's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117559 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 17:20:03 +00:00
Bob Wilson
0f1db1a6c6 Teach the DAG combiner to fold a splat of a splat. Radar 8597790. 
Also do some minor refactoring to reduce indentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117558 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 17:06:14 +00:00
Roman Divacky
f9d1752104 Use the IDVal directly as there's no need to convert to std::string. 
Pointed out by Chris!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117557 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 16:57:58 +00:00
Roman Divacky
50e7a78709 Implement .equ directive as a synonym to .set. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117553 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 16:22:58 +00:00
Duncan Sands
f22b74608e Fix PR8494: when reading invalid bitcode, getTypeByID may return 
a null pointer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117551 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 15:47:26 +00:00
Rafael Espindola
aa8f1f0135 Implement R_X86_64_DTPOFF32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117548 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 15:11:03 +00:00
Rafael Espindola
b4d1721eff Implement TLSLD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117547 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 15:02:40 +00:00
Rafael Espindola
0cf15d61b7 Implement DTPOFF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117546 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 14:48:59 +00:00
Rafael Espindola
a264f72d3f Implement TLSLDM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117544 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 14:37:09 +00:00
Rafael Espindola
a0a2f8734c Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117543 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 14:22:44 +00:00
Mikhail Glushenkov
6d8ac5ac6d Reindent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117538 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 08:25:44 +00:00
Evan Cheng
7e2fe9150f Re-commit 117518 and 117519 now that ARM MC test failures are out of the way. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 06:47:08 +00:00
Evan Cheng
9e08ee5d16 Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117520 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 02:00:25 +00:00
Evan Cheng
0104d9de04 - Assign load / store with shifter op address modes the right itinerary classes. 
- For now, loads of [r, r] addressing mode is the same as the
  [r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should
  identify the former case and reduce the output latency by 1.
- Also identify [r, r << 2] case. This special form of shifter addressing mode
  is "free".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117519 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 01:49:06 +00:00
Evan Cheng
7c88cdcc3b Fix a major bug in operand latency computation. The use index must be adjusted 
by the number of defs first for it to match the instruction itinerary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117518 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 01:46:29 +00:00
Dale Johannesen
e49406fd63 Fix pastos in handling of AVX cvttsd2si, PR8491. 
Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117514 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 00:35:54 +00:00
Owen Anderson
cfd0e1f3ae Add correct NEON encodings for vtbl and vtbx. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 00:18:46 +00:00
Owen Anderson
3eff4af42d Add correct NEON encodings for vext, vtrn, vuzp, and vzip. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117512 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:56:39 +00:00
Bob Wilson
1fa9d301a8 Fix compiler warnings about signed/unsigned comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117511 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:49:00 +00:00
Dale Johannesen
f514f52790 Teach InstCombine not to use Add and Neg on FP. PR 8490. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117510 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:45:18 +00:00
Evan Cheng
f40deed62f Shifter ops are not always free. Do not fold them (especially to form 
complex load / store addressing mode) when they have higher cost and
when they have more than one use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117509 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:41:30 +00:00
Evan Cheng
de5fa932b9 Putting r117193 back except for the compile time cost. Rather than assuming fallthroughs uses all registers, just gather the union of all successor liveins. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:17:17 +00:00
Jim Grosbach
7e3383c007 Refactor ARM STR/STRB instruction patterns into STR{B}i12 and STR{B}rs, like 
the LDR instructions have. This makes the literal/register forms of the
instructions explicit and allows us to assign scheduling itineraries
appropriately. rdar://8477752

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117505 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 23:12:14 +00:00
Owen Anderson
498ec20703 Provide correct encodings for NEON vcvt, which has its own special immediate encoding 
for specifying fractional bits for fixed point conversions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 22:49:00 +00:00
Jim Grosbach
6b15639e26 Trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:39:08 +00:00
Owen Anderson
d2fbdb7f5c Provide correct encodings for the get_lane and set_lane variants of vmov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117495 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:28:09 +00:00
Rafael Espindola
3cede2d0b2 Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117494 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 21:23:52 +00:00
Kevin Enderby
529b1a4398 Added the x86 instruction ud2b (2nd official undefined instruction). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:46:49 +00:00
Jim Grosbach
ccf72caa92 JIT imm12 encoding for constant pool entry references. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117483 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:39:40 +00:00
Bob Wilson
f20700ca77 SelectionDAG shuffle nodes do not allow operands with different numbers of 
elements than the result vector type.  So, when an instruction like:

%8 = shufflevector <2 x float> %4, <2 x float> %7, <4 x i32> <i32 1, i32 0, i32 3, i32 2>

is translated to a DAG, each operand is changed to a concat_vectors node that appends 2 undef elements.  That is:

shuffle [a,b], [c,d] is changed to:
shuffle [a,b,u,u], [c,d,u,u]

That's probably the right thing for x86 but for NEON, we'd much rather have:

shuffle [a,b,c,d], undef

Teach the DAG combiner how to do that transformation for ARM.  Radar 8597007.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117482 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:38:28 +00:00
Rafael Espindola
bc82d8b84f Implement R_X86_64_GOTTPOFF, R_X86_64_TLSGD and R_X86_64_TPOFF32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117481 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 20:28:07 +00:00
Jim Grosbach
f31430f6ec ARM JIT fix for LDRi12 and company. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117478 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:55:59 +00:00
Benjamin Kramer
07ee63283c Replace pointer arithmetic with StringRef::substr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117477 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:53:52 +00:00
Owen Anderson
f587a9352a Provide correct NEON encodings for vdup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117475 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 19:25:54 +00:00
Michael J. Spencer
6dad10ed66 x86-Win32: Switch ftol2 calling convention from stdcall to C. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117474 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:52:38 +00:00
Michael J. Spencer
3931b54a5f COFF: Add IMAGE_SCN_MEM_READ to text sections. 
There are currently 100 references to COFF::IMAGE_SCN in 6 files
and 11 different functions. Section to attribute mapping really
needs to happen in one place to avoid problems like this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:52:29 +00:00
Michael J. Spencer
579d7a3dcc Fix whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:52:20 +00:00
Rafael Espindola
4fa3478fc2 Set default type and flags for .init and .fini. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 18:45:20 +00:00
Rafael Espindola
83ff4d2b0d Produce an error for an invalid use of .symver. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117462 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:56:18 +00:00
Jim Grosbach
093177d5cd The new LDR* instruction patterns should handle the necessary encoding of 
operands in the TableGen'erated bits, so we don't need to do the additional
magic explicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117461 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:52:51 +00:00
Owen Anderson
0745c389d9 Add correct NEON encodings for vsli and vsri. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117459 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:40:08 +00:00
Owen Anderson
dd31ed67e6 Add correct NEON encodings for vsra and vrsra. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117458 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 17:29:29 +00:00
Jim Grosbach
063efbf569 The immediate operands of an LDRi12 instruction doesn't need the addrmode2 
encoding tricks. Handle the 'imm doesn't fit in the insn' case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-27 16:50:31 +00:00