Owen Anderson
5096503184
Fix tests for corrected MSR encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 21:53:19 +00:00
Jim Grosbach
6b09c77b7a
ARM VLD1/VST1 (one register, no writeback) assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 15:04:25 +00:00
Jim Grosbach
760b46ce18
Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142582 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 14:57:47 +00:00
Jim Grosbach
d0b614754e
ARM VTBX (one register) assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20 14:48:50 +00:00
Rafael Espindola
12ae52767f
Fix parsing of a line with only a # in it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 18:48:52 +00:00
Craig Topper
717cdb0df8
Rename PEXTR to PEXT. Add intrinsics for BMI instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142480 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19 07:48:35 +00:00
Jim Grosbach
2933e4b2e6
Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 21:09:01 +00:00
Jim Grosbach
39dc2af7f9
Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142421 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 21:08:16 +00:00
Jim Grosbach
0487e459e0
Enable more encoded immediate tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 20:20:51 +00:00
Jim Grosbach
ca8d1842cf
More vmov lane testcases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 20:19:48 +00:00
Jim Grosbach
aead579017
ARM vmla/vmls assembly parsing for the lane index operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 20:14:56 +00:00
Jim Grosbach
687656c630
ARM vmov assembly parsing for the lane index operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 20:10:47 +00:00
Jim Grosbach
9120088979
ARM vmla/vmls assembly parsing for the lane index operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:27:07 +00:00
Owen Anderson
e8692ed5a6
Another failing encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:23:03 +00:00
Jim Grosbach
82fa5fc709
Fix NEON mul encoding tests. Wrong file contents previously.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:14:55 +00:00
Jim Grosbach
0a0374018f
ARM vqdmulh assembly parsing for the lane index operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142386 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:12:09 +00:00
Jim Grosbach
37a3ed21c4
Remove duplicate test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:05:50 +00:00
Jim Grosbach
9e7df4ad5b
Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142382 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:05:16 +00:00
Jim Grosbach
970f787a7e
ARM vmul assembly parsing for the lane index operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:01:52 +00:00
Jim Grosbach
ec11d2a1b8
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 18:01:09 +00:00
Owen Anderson
aff187a19a
Add a few more testcases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142379 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:57:31 +00:00
Owen Anderson
de1ff7f552
Add several FIXME cases for ARM encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142377 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:50:22 +00:00
Jim Grosbach
5e3e811bf6
Tests for 142365.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:23:34 +00:00
Jim Grosbach
4442824614
Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:22:53 +00:00
Jim Grosbach
f2f5bc60f6
ARM assembly parsing and encoding for VMOV.i64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 16:18:11 +00:00
Jim Grosbach
6248a546f2
ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 00:22:00 +00:00
Jim Grosbach
7c81013c45
Enable a few more NEON immediate tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 23:50:19 +00:00
Jim Grosbach
ea46110f57
ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142303 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 23:09:09 +00:00
Nick Lewycky
44d798d976
Add support for a new extension to the .file directive:
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.file filenumber "directory" "filename"
This removes one join+split of the directory+filename in MC internals. Because
bitcode files have independent fields for directory and filenames in debug info,
this patch may change the .o files written by existing .bc files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 23:05:28 +00:00
Jim Grosbach
0e387b2877
ARM NEON "vmov.i8" immediate assembly parsing and encoding.
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NEON immediates are "interesting". Start of the work to handle parsing them
in an 'as' compatible manner. Getting the matcher to play nicely with
these and the floating point immediates from VFP is an extra fun wrinkle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-17 22:26:03 +00:00
Craig Topper
ee62e4f6d1
Add X86 PEXTR and PDEP instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142141 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16 16:50:08 +00:00
Craig Topper
b53fa8bf19
Add X86 BZHI instruction as well as BMI2 feature detection.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142122 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16 07:55:05 +00:00
Craig Topper
dc479c4a89
Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMREAD, and VMWRITE to remove hack from X86RecognizableInstr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142117 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16 07:05:40 +00:00
Chris Lattner
d8b7aa2613
Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang does. Enhance
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the X86 asmparser to produce ranges in the one case that was annoying me, for example:
test.s:10:15: error: invalid operand for instruction
movl 0(%rax), 0(%edx)
^~~~~~~
It should be straight-forward to enhance filecheck, tblgen, and/or the .ll parser to use
ranges where appropriate if someone is interested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16 04:47:35 +00:00
Craig Topper
17730847d5
Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-16 03:51:13 +00:00
Craig Topper
566f233ba6
Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work because these are the first VEX encoded instructions to use the reg field as an opcode extension.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15 20:46:47 +00:00
Owen Anderson
008c838434
Update test for disabling of code/data marker labels in ELF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14 21:12:55 +00:00
Craig Topper
54a11176f6
Add X86 ANDN instruction. Including instruction selection.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14 07:06:56 +00:00
Craig Topper
909652f687
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141939 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14 03:21:46 +00:00
Bill Wendling
1203fe7fc8
Revert r141854 because it was causing failures:
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http://lab.llvm.org:8011/builders/llvm-x86_64-linux/builds/101
--- Reverse-merging r141854 into '.':
U test/MC/Disassembler/X86/x86-32.txt
U test/MC/Disassembler/X86/simple-tests.txt
D test/CodeGen/X86/bmi.ll
U lib/Target/X86/X86InstrInfo.td
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86.td
U lib/Target/X86/X86Subtarget.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141857 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 07:48:07 +00:00
Craig Topper
8ab1d1e900
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141854 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 07:09:14 +00:00
Kevin Enderby
acbaecd4c8
Finish supporting cpp #file/line comments in assembler for error messages. So
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for cpp pre-processed assembly we give correct filename and line numbers when
reporting errors in assembly files when using clang and -integrated-as on .s
files. rdar://8998895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141814 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 21:38:39 +00:00
Jim Grosbach
c66e7afcf2
Thumb2 assembly parsing and encoding for LDC/STC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 20:54:17 +00:00
Jim Grosbach
9f45754750
ARM encoding tests for STC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141787 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 17:36:13 +00:00
Jim Grosbach
9b8f2a0b36
ARM parsing and encoding for the <option> form of LDC/STC instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141786 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 17:34:41 +00:00
Jim Grosbach
2bd0118472
ARM assembly parsing and encoding for LDC{2}{L}/STC{2}{L} instructions.
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Fill out the rest of the encoding information, update to properly mark
the LDC/STC instructions as predicable while the LDC2/STC2 instructions are
not, and adjust the parser accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141721 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 21:55:36 +00:00
Jim Grosbach
fbab2206cf
Update test for r141704.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141705 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 20:18:50 +00:00
Nick Lewycky
b1b8f5f7cd
Apparently, sometimes llvm-nm doesn't put the undefined symbol at the top. Take
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that into account and test for no U's showing up in the middle, which is what
we really wanted to test for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 06:58:11 +00:00
Craig Topper
37f2167f15
Add X86 LZCNT instruction. Including instruction selection support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141651 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 06:44:02 +00:00
Craig Topper
29480fd798
Fix disassembling of popcntw. Also remove some code that says it accounts for 64BIT_REXW_XD not existing, but it does exist.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 04:34:23 +00:00
Nick Lewycky
7aabcb1fc0
Also create a shndx even if there are no symbols. This lets us test
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.symtab_shndx reading and writing together, and finally we have a testcase for
r141440.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-11 03:54:50 +00:00
Jakob Stoklund Olesen
a0ed0c0fcd
Insert dummy ED table entries for pseudo-instructions.
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The table is indexed by opcode, so simply removing pseudo-instructions
creates a wrong mapping from opcode to table entry.
Add a test case for xorps which has a very high opcode that exposes this
problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141562 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:30:16 +00:00
Craig Topper
da394041c4
Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141505 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-09 07:31:39 +00:00
Jim Grosbach
051fee0312
Enable ARM mode VDUP(scalar) tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:57:03 +00:00
Jim Grosbach
460a90540b
ARM NEON assembly parsing and encoding for VDUP(scalar).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141446 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 23:56:00 +00:00
Craig Topper
75fe5f3bab
Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 07:02:24 +00:00
Craig Topper
1b526a98e3
Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 05:53:50 +00:00
Craig Topper
25f6dfd108
Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-07 05:35:38 +00:00
Jim Grosbach
bee5d2fac8
Tidy up tests. Un-XFAIL file and mark individual tests as FIXME instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 22:04:05 +00:00
Jim Grosbach
7abb795635
Fix and clean up tests. Un-XFAIL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 21:32:50 +00:00
Jim Grosbach
d6f85098e1
Fix and clean up tests. Un-XFAIL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 21:28:30 +00:00
Craig Topper
7ea16b01fa
Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This was done by creating a new register group that excludes AX registers. Fixes PR10345. Also added aliases for flipping the order of the operands of xchg <reg>, %eax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141274 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-06 06:44:41 +00:00
Owen Anderson
2dbb46a0a0
Support a valid, but not very useful, encoding of CPSIE where none of the AIF bits are set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-05 17:16:40 +00:00
Owen Anderson
2fec6c5ff1
Teach the MC to output code/data region marker labels in MachO and ELF modes. These are used by disassemblers to provide better disassembly, particularly on targets like ARM Thumb that like to intermingle data in the TEXT segment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 23:26:17 +00:00
Jim Grosbach
0ebefdf834
Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 21:43:51 +00:00
Jim Grosbach
fdf6bb41a4
Un-XFAIL file. Comment out individual failing instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141117 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 21:16:42 +00:00
Jim Grosbach
20f8eb2fc1
Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:52:57 +00:00
Jim Grosbach
e5c933848a
Un-XFAIL file. Fix incorrect CHECK lines. General format cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141114 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:50:05 +00:00
Jim Grosbach
dc6c93531d
Un-XFAIL file. Fix incorrect CHECK line. General format cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:46:49 +00:00
Jim Grosbach
100902c6da
Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:42:35 +00:00
Jim Grosbach
0c0cf47ed5
Un-XFAIL file. Fix incorrect CHECK line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 20:42:09 +00:00
Jim Grosbach
62ea269b9a
Un-XFAIL the file. Disable only the individual tests that aren't working yet.
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2011-10-04 20:34:11 +00:00
Jim Grosbach
a02dfe7a6b
Un-XFAIL the file. Disable only the individual tests that aren't working yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 18:43:15 +00:00
Jim Grosbach
36db6fbe57
Tidy up. Formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04 17:49:45 +00:00
Craig Topper
6744a17dcf
Add support in the disassembler for ignoring the L-bit on certain VEX instructions. Mark instructions that have this behavior. Fixes PR10676.
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2011-10-04 06:30:42 +00:00
Jim Grosbach
3207e6c6b7
Tidy up. These tests are covered in the .s file tests now.
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2011-10-03 23:40:13 +00:00
Jim Grosbach
9d39036f62
ARM assembly parsing and encoding for VMOV immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 23:38:36 +00:00
Jim Grosbach
68259145d9
ARM parsing/encoding for VCMP/VCMPE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141038 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 22:30:24 +00:00
Jim Grosbach
5cd5ac6ad4
ARM assembly parsing and encoding for VMRS/FMSTAT.
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2011-10-03 21:12:43 +00:00
Jim Grosbach
f8bf43ec99
Update test for 141010.
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2011-10-03 20:58:08 +00:00
Jim Grosbach
c82c101147
Tidy up a bit. Formatting.
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2011-10-03 17:59:31 +00:00
Craig Topper
581fe82c84
Add support for MOVBE and RDRAND instructions for the assembler and disassembler. Includes feature flag checking, but no instrinsic support. Fixes PR10832, PR11026 and PR11027.
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2011-10-03 17:28:23 +00:00
Craig Topper
04c5be9f12
Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode.
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2011-10-03 08:14:29 +00:00
Craig Topper
04b0b34b3a
Test updates that were supposed to go with r140993.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140994 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 07:53:59 +00:00
Craig Topper
82f131a017
Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-02 21:08:12 +00:00
Craig Topper
146c6d77f0
Special case disassembler handling of REX.B prefix on NOP instruction to decode as XCHG R8D, EAX instead. Fixes PR10344.
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2011-10-02 16:56:09 +00:00
Craig Topper
846a2dcada
Fix disassembling of INVEPT and INVVPID to take operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140955 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-01 21:20:14 +00:00
Craig Topper
e1b4a1a07e
Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702.
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2011-10-01 19:54:56 +00:00
James Molloy
acad68da50
Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit.
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Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.
Add decoder and disassembler tests.
Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.
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2011-09-28 14:21:38 +00:00
Jim Grosbach
25ddc2bf7e
ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w.
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Add inst alias to handle these assembly forms. Add tests, too.
rdar://10178799
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2011-09-27 22:18:54 +00:00
Owen Anderson
21733e8f80
Fix an incorrect decoder test.
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2011-09-26 23:08:34 +00:00
Owen Anderson
256e10f964
Remove incorrect testcases.
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2011-09-26 22:13:55 +00:00
Craig Topper
100d86ada5
Fix VEX decoding in i386 mode. Fixes PR11008.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 05:12:43 +00:00
Owen Anderson
4d2a00147d
Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset of #-0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140426 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 22:25:02 +00:00
Owen Anderson
1f24002ed4
Fix incorrect disassembly test.
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2011-09-23 22:05:54 +00:00
Owen Anderson
0781c1f700
Post-index loads/stores in still need to print the post-indexed immediate, even if it's zero, to distinguish them from non-post-indexed instructions.
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2011-09-23 21:26:40 +00:00
Owen Anderson
31d485ec9a
Reapply r140412 (Thumb2 reg-reg loads cannot target SP or PC), with invalid testcases updated.
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2011-09-23 21:07:25 +00:00
Craig Topper
4da632e6e0
Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700.
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2011-09-23 06:57:25 +00:00
Craig Topper
adf01b3f18
Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960
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2011-09-22 07:01:50 +00:00
Owen Anderson
6126870193
Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140284 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 23:53:44 +00:00
Owen Anderson
e136872970
Print out immediate offset versions of PC-relative load/store instructions as [pc, #123 ] rather than simply #123 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 23:44:46 +00:00
Bruno Cardoso Lopes
448d986858
The wrong relocation was being emitted for several SSSE3 instructions.
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This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen
declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 21:39:21 +00:00
Owen Anderson
9d1a3dea15
Port over more Thumb2 encoding tests to decoding tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140152 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 17:44:48 +00:00
Jim Grosbach
50172e77bc
Nuke obsolete test file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 01:03:51 +00:00
Jim Grosbach
ac9c2aa8e1
Thumb2 assembly parsing and encoding for WFE/WFI/YIELD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140126 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 00:48:56 +00:00
Jim Grosbach
50f1c37123
Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 00:46:54 +00:00
Jim Grosbach
400b624e02
Thumb2 assembly parsing and encoding for USUB8/USUB16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140120 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 00:31:57 +00:00
Jim Grosbach
6053cd956f
Thumb2 assembly parsing and encoding for USAX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140119 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 00:30:45 +00:00
Jim Grosbach
653419fff0
Thumb2 assembly parsing and encoding for USAT16.
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2011-09-20 00:28:25 +00:00
Jim Grosbach
a7e5b01fe1
Thumb2 assembly parsing and encoding for USAT.
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2011-09-20 00:27:36 +00:00
Jim Grosbach
ae13ba7740
Tidy up.
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2011-09-20 00:24:37 +00:00
Jim Grosbach
ad7d744456
Thumb2 assembly parsing and encoding for UQSAD8/USADA8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 00:23:51 +00:00
Jim Grosbach
73e019eb12
Thumb2 assembly parsing and encoding for UQSUB16/UQSUB8.
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2011-09-20 00:20:44 +00:00
Jim Grosbach
ab3bf97fe0
Thumb2 assembly parsing and encoding for UQASX/UQSAX.
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2011-09-20 00:18:52 +00:00
Jim Grosbach
d7e2785ea8
Thumb2 assembly parsing and encoding for UQADD16/UQADD8.
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2011-09-20 00:15:03 +00:00
Bruno Cardoso Lopes
d91c6e058b
Fix PR10949. Fix the encoding of VMOVPQIto64rr.
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2011-09-19 23:36:59 +00:00
Jim Grosbach
9c6712721c
Tidy up a bit.
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2011-09-19 23:34:18 +00:00
Jim Grosbach
d5d0e81a4b
Thumb2 assembly parsing and encoding for UMAAL/UMLAL/UMULL.
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2011-09-19 23:31:02 +00:00
Jim Grosbach
9546de68aa
Thumb2 assembly parsing and encoding for UHSUB16/UHSUB8.
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2011-09-19 23:15:36 +00:00
Jim Grosbach
6729c48b94
Thumb2 assembly parsing and encoding for UHASX/UHSAX.
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2011-09-19 23:13:25 +00:00
Jim Grosbach
2c1ef5bac8
Thumb2 assembly parsing and encoding for UHADD16/UHADD8.
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2011-09-19 23:08:24 +00:00
Jim Grosbach
6451cbf79f
Thumb2 assembly parsing and encoding for UBFX.
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2011-09-19 23:06:38 +00:00
Jim Grosbach
4032eaf98c
Thumb2 assembly parsing and encoding for UASX.
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2011-09-19 23:05:22 +00:00
Jim Grosbach
11f23c1a72
Fix copy/past-o. Gotta remember that 'modify' step...
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2011-09-19 22:53:00 +00:00
Jim Grosbach
661daa481e
Thumb2 assembly parsing and encoding for UADD16/UADD8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19 22:52:27 +00:00
Jim Grosbach
aa70695ef0
Thumb2 assembly parsing and encoding for TST.
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2011-09-19 22:46:06 +00:00
Jim Grosbach
7f739bee26
Thumb2 assembly parsing and encoding for TBB/TBH.
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2011-09-19 22:21:13 +00:00
Jim Grosbach
1494c496e2
Thumb2 assembly parsing and encoding for TEQ.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19 21:41:21 +00:00
Jim Grosbach
30b8b970e3
Remove FIXME. TBB/TBH are Thumb mode only instructions.
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2011-09-19 20:30:29 +00:00
Jim Grosbach
326efe5891
Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19 20:29:33 +00:00
Owen Anderson
ecd1c55790
Handle STRT (and friends) like LDRT (and friends) for decoding purposes. Port over additional encoding tests to decoding tests.
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2011-09-19 18:07:10 +00:00
Jim Grosbach
8a8d28b039
Thumb2 assembly parsing and encoding for SXTAB/SXTAB16/SXTAH.
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2011-09-19 17:56:37 +00:00
Jim Grosbach
9883acd2a6
Thumb2 assembly parsing and encoding for SVC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140025 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19 17:40:35 +00:00
Jim Grosbach
7649b0b8c7
Thumb2 assembly parsing and encoding for SUB(register).
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2011-09-19 17:37:48 +00:00
Stepan Dyatkovskiy
76034c5f54
Added regression test for bug #10869 .
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2011-09-19 07:48:08 +00:00
Owen Anderson
be290af0d8
Add a testcase for another corner-case decoding.
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2011-09-16 23:15:29 +00:00
Jim Grosbach
f67e8554bf
Thumb2 assembly parsing and encoding for SUB(immediate).
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2011-09-16 22:58:42 +00:00
Owen Anderson
89db0f690c
Fix disassembly of Thumb2 BFI instructions with bit range of [0, 32).
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2011-09-16 22:29:48 +00:00
Jim Grosbach
47313df81c
Thumb2 assembly parsing and encoding for STRT.
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2011-09-16 22:27:12 +00:00
Jim Grosbach
18ceae2a70
Thumb2 assembly parsing and encoding for LDRHT/STRHT.
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2011-09-16 22:26:01 +00:00
Jim Grosbach
4a1d200c2f
Thumb2 assembly parsing and encoding for STREX/STREXB/STREXH/STREXD.
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2011-09-16 22:22:07 +00:00
Jim Grosbach
e45451eea9
Thumb2 assembly parsing and encoding for STRD.
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2011-09-16 22:19:38 +00:00
Jim Grosbach
75d7428275
Simplify comment. There's no Thumb LDRD(register) encoding. That's ARM only.
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2011-09-16 22:18:42 +00:00
Owen Anderson
8a28bdcbcc
Add fixed bits to correctly distinguish Thumb2 SSAT/SSAT16's.
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2011-09-16 22:17:02 +00:00
Jim Grosbach
e041af7e0e
Thumb2 assembly parsing and encoding for STRBT.
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2011-09-16 22:15:51 +00:00
Jim Grosbach
c71ed786c3
Thumb2 assembly parsing and encoding for STRH.
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2011-09-16 22:12:19 +00:00
Jim Grosbach
59c5076094
Remove test of undocumented format.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139955 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 22:09:58 +00:00
Jim Grosbach
76ca6d9bcd
Thumb2 assembly parsing and encoding for STRB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 22:09:19 +00:00
Jim Grosbach
2e7a94137b
Shuffle a few more thumb2 tests to match the comment headings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 22:01:18 +00:00
Jim Grosbach
5320b40d9e
Thumb2 tests for STR(literal), STR(register) and STR pre/post indexed immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 21:59:13 +00:00
Jim Grosbach
0bb7c6e8d6
Shuffle a few tests around.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139950 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 21:57:10 +00:00
Owen Anderson
705b48ff86
Fix disassembly of Thumb2 LDRSH with a #-0 offset.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 21:08:33 +00:00
Jim Grosbach
642caea2c6
Thumb2 assembly parsing and encoding for STR(immediate).
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Add aliases for STRB/STRH while there. Tests forthcoming for those.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139942 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 21:06:12 +00:00
Jim Grosbach
36343d85cd
Thumb2 assembly parsing and encoding for STMDB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139940 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 20:58:38 +00:00
Jim Grosbach
8213c96655
Thumb2 assembly parsing and encoding for STMIA.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139938 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 20:50:13 +00:00
Jim Grosbach
3335029b1f
Thumb2 assembly parsing and encoding for SSUB16/SSUB8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139931 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:52:36 +00:00
Jim Grosbach
50bd470d85
Thumb2 assembly parsing and encoding for SSAX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139929 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:37:10 +00:00
Jim Grosbach
9f4ddb3efa
Thumb2 assembly parsing and encoding for SSAT16.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:33:22 +00:00
Jim Grosbach
b105b997a4
Thumb2 assembly parsing and encoding for SSAT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139926 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:32:30 +00:00
Jim Grosbach
05ec8f7ac9
Thumb2 assembly parsing and encoding for SRS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139925 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:25:22 +00:00
Jim Grosbach
dea8412784
Thumb2 assembly parsing and encoding for SMMUSD/SMUSDX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139923 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:08:48 +00:00
Jim Grosbach
41ca75bed0
Thumb2 assembly parsing and encoding for SMMULWB/SMULWT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:07:18 +00:00
Jim Grosbach
3443ed525a
Thumb2 assembly parsing and encoding for SMMULL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139921 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:05:48 +00:00
Jim Grosbach
3c4c879695
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139919 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:03:00 +00:00
Jim Grosbach
d727148c21
Thumb2 assembly parsing and encoding for SMULBB/SMULBT/SMULTB/SMULTT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139918 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 18:02:36 +00:00
Jim Grosbach
c9592cbad5
Thumb2 assembly parsing and encoding for SMMUAD'dib.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139917 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 17:58:21 +00:00
Jim Grosbach
f3578a8497
Thumb2 assembly parsing and encoding for SMMUL/SMMULR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139916 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 17:56:06 +00:00
Owen Anderson
a610d619ce
Port over more Thumb2 assembly tests to disassembly tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139915 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 17:56:04 +00:00
Owen Anderson
1070278efa
Port over more Thumb2 assembly tests to disassembly tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139912 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 17:22:48 +00:00
Jim Grosbach
cb574bb71e
Thumb2 assembly parsing and encoding for SMMLS/SMMLSR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139911 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 17:16:55 +00:00
Jim Grosbach
3b61d23297
Thumb2 assembly parsing and encoding for SMMLA/SMMLAR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139910 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 17:15:18 +00:00
Jim Grosbach
7ff2472b82
Thumb2 assembly parsing and encoding for SMLSLD/SMLSLDX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139909 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 17:10:44 +00:00
Jim Grosbach
920ad2b681
Thumb2 assembly parsing and encoding for SMLSD/SMLSDX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139908 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 17:08:45 +00:00
Jim Grosbach
f566ca7418
Thumb2 assembly parsing and encoding for SMLAWB/SMLAWT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139907 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 17:03:01 +00:00
Jim Grosbach
231948f860
Thumb2 assembly parsing and encoding for SMLALD/SMLALDX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139906 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 16:58:03 +00:00
Jim Grosbach
4f2999b296
Thumb2 assembly parsing and encoding for SMLALBB/SMLALBT/SMLALTB/SMLALTT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139905 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 16:53:25 +00:00
Jim Grosbach
837fc5e9d5
Thumb2 assembly parsing and encoding for SMLAL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139902 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 16:38:00 +00:00
Jim Grosbach
e74711b8b0
Thumb2 assembly parsing and encoding for SMLAD/SMLADX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 00:09:37 +00:00
Jim Grosbach
246ae02bce
Thumb2 assembly parsing and encoding for SMLABB/SMLABT/SMLATB/SMLATT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139881 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16 00:00:23 +00:00
Jim Grosbach
f08084ba4b
Thumb2 assembly parsing and encoding for SHSUB16/SHSUB8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139880 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 23:58:56 +00:00
Jim Grosbach
5a6370ff99
Thumb2 assembly parsing and encoding for SHADD16/SHADD8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139871 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 22:36:10 +00:00
Jim Grosbach
c075d45364
Thumb2 assembly parsing and encoding for SHASX/SHSAX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139870 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 22:34:29 +00:00
Jim Grosbach
d16160f18a
Thumb2 assembly parsing and encoding for SEV.W.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139866 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 22:24:20 +00:00
Jim Grosbach
56019a32bd
Thumb2 assembly parsing and encoding for SEL.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 22:01:09 +00:00
Jim Grosbach
7ecedac8b7
Thumb2 assembly parsing and encoding for SBFX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 21:58:42 +00:00
Jim Grosbach
356c759908
Add some missing 'CHECK' lines and tidy up others.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139849 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 21:17:38 +00:00
Jim Grosbach
fd8b851908
Thumb2 assembly parsing and encoding for SBC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139844 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 21:04:10 +00:00
Jim Grosbach
e4e4a93e9e
Thumb2 assembly parsing and encoding for SASX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139843 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 21:01:23 +00:00
Jim Grosbach
ed15ab1aad
Thumb2 assembly parsing and encoding for SADD16/SADD8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139841 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 20:57:39 +00:00
Jim Grosbach
191d33fd6d
Thumb2 assembly parsing and encoding for RSB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139839 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 20:54:14 +00:00
Jim Grosbach
aba8015cc3
Thumb2 assembly parsing and encoding for RRX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139831 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 19:52:43 +00:00
Jim Grosbach
5260be1f2d
Thumb2 assembly parsing and encoding for ROR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 19:50:04 +00:00
Jim Grosbach
689b86ed2e
Thumb2 assembly parsing and encoding for REV16/REVSH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139828 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 19:46:13 +00:00
Jim Grosbach
1b69a128d6
Thumb2 assembly parsing and encoding for REV.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139813 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 18:13:30 +00:00
Jim Grosbach
4bab3c7710
Thumb2 assembly parsing and encoding for RBIT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 18:07:14 +00:00
Jim Grosbach
3e3a9c7964
Thumb2 assembly parsing and encoding for signed saturating arithmetic insns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 18:06:15 +00:00
Jim Grosbach
07d7f3d387
Re-order test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139795 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-15 16:04:13 +00:00
Jim Grosbach
f18544d1e5
Thumb2 assembly parsing and encoding for PLI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139757 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-14 23:29:05 +00:00
Jim Grosbach
f83e297cd1
Thumb2 assembly parsing and encoding for PLD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139756 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-14 23:26:12 +00:00
Jim Grosbach
0b69247b10
Thumb2 assembly parsing and encoding for PKH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139754 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-14 23:16:41 +00:00