Dan Gohman
a00ef1122c
Update this test for a trivial register allocation difference.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94989 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 19:00:32 +00:00
Evan Cheng
0a4fd46d9e
Undo r94946 now all the tests are passing again.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-01 02:13:39 +00:00
Evan Cheng
843bd699f6
Avoid recursive sibcall's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-31 06:44:49 +00:00
Anton Korobeynikov
90cfc130d6
Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.
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Even if they are suported by the core, they can be disabled
(this is just a configuration bit inside some register).
Allow unaligned memops on darwin and conservatively disallow them otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 14:08:12 +00:00
Evan Cheng
a6bff982c1
Allow more tailcall optimization: calls with inputs that are all passed in registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94873 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 01:22:00 +00:00
Evan Cheng
7096ae48c9
Catch more trivial tail call opportunities: no inputs and output types match.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-29 06:45:59 +00:00
Chris Lattner
a34103f6fa
convert the last 3 targets to use EmitFunctionBody() now that
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it has before/end body hooks.
lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp | 49 ++-----------
lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp | 87 ++++++------------------
lib/Target/XCore/AsmPrinter/XCoreAsmPrinter.cpp | 56 +++------------
test/CodeGen/XCore/ashr.ll | 2
4 files changed, 48 insertions(+), 146 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 06:22:43 +00:00
Evan Cheng
5fef8bc1cb
Fix a bug introduced by r94490 where it created a X86ISD::CMP whose output type is different from its inputs.
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This fixes PR6146.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:57:22 +00:00
Chris Lattner
d49fe1b6bc
Give AsmPrinter the most common expected implementation of
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runOnMachineFunction, and switch PPC to use EmitFunctionBody.
The two ppc asmprinters now don't heave to define
runOnMachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:28:58 +00:00
Chris Lattner
10e7c60c04
emit a 0 byte instead of a noop if a function is empty on darwin.
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"0" is nice and target independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:06:32 +00:00
Chandler Carruth
6f03433516
Quick fix to a test that is currently failing on every Linux build bot. No idea
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if this is the "correct" fix, but it seems a strict improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94675 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27 10:36:15 +00:00
Evan Cheng
b17124553d
Perform trivial tail call optimization for callees with "C" ABI. These are done
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even when -tailcallopt is not specified and it does not require changing ABI.
First case is the most trivial one. Perform tail call optimization when both
the caller and callee do not return values and when the callee does not take
any input arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94664 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-27 06:25:16 +00:00
Chris Lattner
c618c8aff4
emit jump table an alias ".set" directives through MCStreamer as
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assignments.
.set x, a-b
is the same as:
x = a-b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 21:53:08 +00:00
Rafael Espindola
2e2563bf8e
Emit .comm alignment in bytes but .align in powers of 2 for ARM ELF.
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Original patch by Sandeep Patel and updated by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94582 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 20:21:43 +00:00
Chris Lattner
6a315c358c
eliminate MCAsmInfo::NeedsSet: we now just use .set on any platform
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that has it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 20:20:43 +00:00
Evan Cheng
8c7ecaf524
Implement cond ? -1 : 0 with sbb.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94490 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 02:00:44 +00:00
Rafael Espindola
0173b74c55
Update test for darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 15:32:10 +00:00
Chris Lattner
5c78034bc8
we removed support for darwin8 tools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94414 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 07:43:40 +00:00
Rafael Espindola
f166ed7324
Fix PR6134.
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We are not emitting alignments on Darwin for "bar". Not sure what is the
correct way to do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94400 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 02:27:39 +00:00
Daniel Dunbar
34b6ea6cef
Attempt to unbreak test on Linux. Chris, please check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 00:54:13 +00:00
Chris Lattner
4e4af5978c
just remove this test, it is not reduced, is not clear what its testing for and
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it is dying due to fragility in the asmprinter .s comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-24 19:23:09 +00:00
Mon P Wang
6fb474bd3c
It seems better to scalarize vectors of size 1 instead of widening them.
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Add support to widen SETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-24 00:24:43 +00:00
Mon P Wang
eb38ebf15c
Improved widening loads by adding support for wider loads if
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the alignment allows. Fixed a bug where we didn't use a
vector load/store for PR5626.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-24 00:05:03 +00:00
Chris Lattner
52492ac0d0
Change constantexpr global variable initializers to convert the constants
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to MCExpr then emit them through MCStreamer with EmitValue. I think all
global variable initializers are now going through mcstreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 06:17:14 +00:00
Eric Christopher
e9625cf698
Don't lower splat vector load to relative to the esp if the
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stack may be misaligned.
Update test accordingly.
Patch by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 06:02:43 +00:00
Chris Lattner
63df4a4fec
stop testing for invalid output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 05:45:28 +00:00
Chris Lattner
05f845314a
emit .ascii and .asciz through MCStreamer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 04:54:10 +00:00
Chris Lattner
4fe5d72765
remove this test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 03:11:10 +00:00
Evan Cheng
796263464d
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94272 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 01:21:27 +00:00
Evan Cheng
4d03ca0702
Fix tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94271 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 01:19:28 +00:00
Chris Lattner
7e02e52e9a
make this less constrained, we want blank lines between globals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94201 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-22 19:51:08 +00:00
Dan Gohman
7979b72feb
Revert LoopStrengthReduce.cpp to pre-r94061 for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94123 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-22 00:46:49 +00:00
Chris Lattner
2116a4ee55
testcase for r94095
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94096 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-21 20:01:04 +00:00
Dan Gohman
a10756ee65
Re-implement the main strength-reduction portion of LoopStrengthReduction.
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This new version is much more aggressive about doing "full" reduction in
cases where it reduces register pressure, and also more aggressive about
rewriting induction variables to count down (or up) to zero when doing so
reduces register pressure.
It currently uses fairly simplistic algorithms for finding reuse
opportunities, but it introduces a new framework allows it to combine
multiple strategies at once to form hybrid solutions, instead of doing
all full-reduction or all base+index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94061 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-21 02:09:26 +00:00
Chris Lattner
213168ba46
emit basic block labels with mcstreamer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93993 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-20 07:24:05 +00:00
Chris Lattner
043c4e5c1d
emit integer and fp zeros as (e.g.) .byte 0 instead of .space 1,
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for tidiness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-20 07:19:19 +00:00
Chris Lattner
2dd245c469
signficant cleanups to EmitGlobalConstant (including streamerization
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of int initializers), change some methods to be static functions,
use raw_ostream::write_hex instead of a smallstring dance with
APValue::toStringUnsigned(S, 16).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-20 07:11:32 +00:00
Dan Gohman
cd9e155755
Fold (add x, shl(0 - y, n)) -> sub(x, shl(y, n)), to simplify some code
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that SCEVExpander can produce when running on behalf of LSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 23:30:49 +00:00
Dan Gohman
2b98bd23cb
Make SCEVAddRecExpr's getType return a pointer type when the add
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has a pointer member. This helps reduce unnecessary bitcasting
and uglygeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 22:53:50 +00:00
Dan Gohman
8e1aa8edec
Add nounwinds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 21:51:51 +00:00
Jakob Stoklund Olesen
35f0febcb6
Remove predicates when changing an add into an unpredicable mov.
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Since the mov is executed unconditionally, make sure that the add didn't have
any predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93909 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 21:08:28 +00:00
Evan Cheng
590d16be6f
Do not extend extension results beyond the use of a PHI instruction at the start of a use block. A PHI use is expected to kill its source values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93895 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 19:45:51 +00:00
Chris Lattner
41aa25a433
don't let asm-verbose break the check-next lines in these tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 06:39:54 +00:00
Chris Lattner
74bfe21b50
Now that we have everything nicely factored (e.g. asmprinter is not
...
doing global variable classification anymore) and hookized, sink almost
all target targets global variable emission code into AsmPrinter and out
of each target.
Some notes:
1. PIC16 does completely custom and crazy stuff, so it is not changed.
2. XCore has some custom handling for extra directives. I'll look at it next.
3. This switches linux/ppc to use .globl instead of .global. If .globl is
actually wrong, let me know and I'll fix it.
4. This makes linux/ppc get a lot of random cases right which were obviously
wrong before, it is probably now a bit healthier.
5. Blackfin will probably start getting .comm and other things that it didn't
before. If this is undesirable, it should explicitly opt out of these
things by clearing the relevant fields of MCAsmInfo.
This leads to a nice diffstat:
14 files changed, 127 insertions(+), 830 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 05:38:33 +00:00
Chris Lattner
c7fbe90389
fix a significant difference between llvm and gcc on ELF systems:
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GCC would put weak zero initialized mutable data in the .bss section,
we would put it into a crasy '.gnu.linkonce.b.test,"aw",@nobits'
section. Fixing this will allow simplifications next up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93844 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 03:06:01 +00:00
Chris Lattner
129e1872c2
there is no need to emit a .section above .comm on linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93842 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 02:46:56 +00:00
Evan Cheng
f06c28aac4
Test case for r93758.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93824 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 00:35:20 +00:00
Evan Cheng
1ad0e8b576
Canonicalize -1 - x to ~x.
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Instcombine does this but apparently there are situations where this pattern will escape the optimizer and / or created by isel. Here is a case that's seen in JavaScriptCore:
%t1 = sub i32 0, %a
%t2 = add i32 %t1, -1
The dag combiner pattern: ((c1-A)+c2) -> (c1+c2)-A
will fold it to -1 - %a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-18 21:38:44 +00:00
Chris Lattner
a7c65e03c4
reduce this test and convert to filecheck, hopefully the linux buildbot
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will tell me something more useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-17 19:09:12 +00:00
Bob Wilson
3a4a832223
The Neon "vtst" instruction takes a suffix that is the element size alone --
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adding an "i" to the suffix, indicating that the elements are integers, is
accepted but not part of the standard syntax. This helps us pass a few more
of the Neon tests from gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-17 06:35:17 +00:00
Kenneth Uildriks
93ae407ec3
When checking for sret-demotion, it needs to use legal types. When using the return value of an sret-demoted call, it needs to use possibly illegal types that match the declared Type of the callee.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93667 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-16 23:37:33 +00:00
Chris Lattner
a4a1b38dda
this teestcase takes a long time to crash, remove it. If someone cares about this, they should file a bug, it's not doing any good as an xfail.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93604 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-16 00:53:22 +00:00
Bob Wilson
516ab96de3
Run the pre-register allocation tail duplication pass by default. Remove
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the -pre-regalloc-taildup command-line option, and add a new
-disable-early-taildup option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-16 00:29:50 +00:00
David Greene
ee9c595885
Fix PR6019. A load has more than one use if it feeds a bitconvert that
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has more than one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93576 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15 23:23:41 +00:00
Jim Grosbach
2be065a0e8
add testcase for r93564
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93567 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15 22:27:37 +00:00
Anton Korobeynikov
12c71a53b5
Reenable tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15 21:19:26 +00:00
Anton Korobeynikov
8396a17bc3
Temporary disable tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-15 02:09:27 +00:00
Anton Korobeynikov
74a265686d
Add variable-width shifts for MSP430
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93468 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-14 22:09:38 +00:00
Dan Gohman
ff00a55517
Fix a codegen abort seen in 483.xalancbmk.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93417 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-14 03:08:49 +00:00
Chris Lattner
dd8e09ad76
this test requires SSE, thanks to jyasskin for pointing this out.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 21:51:41 +00:00
Evan Cheng
eb18812f75
Commit some changes I had managed to lose last night while refactoring the code. Avoid change use of PHI instructions because it's not legal to insert any instructions before them.
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This fixes PR6027.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93335 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 19:16:39 +00:00
Evan Cheng
81d22d87de
Re-enable extension optimization pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 08:45:40 +00:00
Chris Lattner
2f8cc26be4
remove uses of deprecated functions, this generates slightly
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different BlockAddress labels, but nothing semantically important.
Add a FIXME that BlockAddress codegen is broken if the LLVM BB has
an empty name (e.g. strip was run).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 07:30:49 +00:00
Evan Cheng
262a96edb4
Disable opt-ext pass to unbreak the build for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 01:51:43 +00:00
Jeffrey Yasskin
3aba5b1d60
Try to fix the ARM and PPC buildbots. The -mattr=vector-unaligned-mem
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flag doesn't exist there, and this is an x86 test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 00:31:43 +00:00
Evan Cheng
7da9ecf967
Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
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For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93278 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 00:30:23 +00:00
Evan Cheng
d9d3a894b3
Add nounwind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93244 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-12 18:29:23 +00:00
Duncan Sands
796248fdb1
Revert commit 93204, since it causes the assembler to barf
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on x86-64 linux with messages like this:
Error: Incorrect register `%r14' used with `l' suffix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93242 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-12 17:46:16 +00:00
Dan Gohman
ad4f7a6882
Make several tests less fragile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93230 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-12 04:52:47 +00:00
Dan Gohman
f1b4d26e67
Reapply the MOV64r0 patch, with a fix: MOV64r0 clobbers EFLAGS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93229 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-12 04:42:54 +00:00
Evan Cheng
b85071c736
Add manual ISD::OR fastisel selection routines. TableGen is no longer autogen them after 93152 and 93191.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 22:59:27 +00:00
Evan Cheng
199c4240fe
Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93191 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 22:03:29 +00:00
Chris Lattner
c31b0fc31f
reduce this to a sensible testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:58:19 +00:00
David Greene
67df1a1d64
Shorten up this testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:50:35 +00:00
Evan Cheng
05920b8146
Revert 93158. It's breaking quite a few x86_64 tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93185 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:13:41 +00:00
Jakob Stoklund Olesen
dd437ba15e
Avoid adding PHI arguments for a predecessor that has gone away when a BRCOND was constant folded.
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This fixes PR5980.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 21:02:33 +00:00
Dan Gohman
e5dacc55ad
Use a 32-bit and with implicit zero-extension instead of a 64-bit and if it
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has an immediate with at least 32 bits of leading zeros, to avoid needing to
materialize that immediate in a register first.
FileCheckize, tidy, and extend a testcase to cover this case.
This fixes rdar://7527390.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93160 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:58:34 +00:00
Dan Gohman
71c25b7d7b
Re-instate MOV64r0 and MOV16r0, with adjustments to work with the
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new AsmPrinter. This is perhaps less elegant than describing them
in terms of MOV32r0 and subreg operations, but it allows the
current register to rematerialize them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:37:57 +00:00
Dan Gohman
3e8e4fd40c
Generalize this check to avoid depending on a specific register assignment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93157 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:24:27 +00:00
Dan Gohman
3bf224ba1d
Make this test less trivial, to avoid spurious failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93156 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:23:56 +00:00
Evan Cheng
4b0345be30
Select an OR with immediate as an ADD if the input bits are known zero. This allow the instruction to be 3address-fied if needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93152 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 17:03:47 +00:00
David Greene
95eb2eeea6
Implement a feature (-vector-unaligned-mem) to allow targets to
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ignore alignment requirements for SIMD memory operands. This
is useful on architectures like the AMD 10h that do not trap on
unaligned references if a status bit is twiddled at startup time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-11 16:29:42 +00:00
Jeffrey Yasskin
a77169dbeb
Fix http://llvm.org/PR5729 : x86-64 tail calls were putting their targets into
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R11, and then asserting that the target was in R9. Since R9 isn't reserved for
the target anymore, and is used as an argument, this patch changes the
assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93065 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-09 18:56:43 +00:00
Dan Gohman
d199636039
Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode
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really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.
Also, fix some more issues with legalization of vector casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-09 02:13:55 +00:00
Evan Cheng
306b4cafc1
Fix a critical bug in 64-bit atomic operation lowering for 32-bit. The results of the cmpxchg8b instructions are being thrown away when it branches back to the top of the checking loop. This means the loop always compares against the old value and this can result in a dead lock.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-08 23:41:50 +00:00
Evan Cheng
6f279e0bda
ReplaceAllUsesOfValueWith may delete other nodes that the one being replaced. Do not delete dead nodes again.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92988 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-08 02:36:12 +00:00
Chris Lattner
bd1fccfad5
Fix rdar://7517201, a regression introduced by r92849.
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When folding a and(any_ext(load)) both the any_ext and the
load have to have only a single use.
This removes the anyext-uses.ll testcase which started failing
because it is unreduced and unclear what it is testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 21:59:23 +00:00
Evan Cheng
347a9cb507
APInt'fy TargetLowering::SimplifySetCC to fix PR5963.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92943 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 20:58:44 +00:00
Evan Cheng
17751dac3e
Fix a minor regression from my dag combiner changes. One more place which needs to look pass truncates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92885 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 00:54:06 +00:00
Jakob Stoklund Olesen
d1862037f0
Add comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-07 00:51:04 +00:00
Jakob Stoklund Olesen
30ac0467ce
Add Target hook to duplicate machine instructions.
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Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92873 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06 23:47:07 +00:00
Evan Cheng
d40d03e1bd
Teach dag combine to fold the following transformation more aggressively:
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(OP (trunc x), (trunc y)) -> (trunc (OP x, y))
Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.
This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06 19:38:29 +00:00
Dan Gohman
d7d1a29003
Move this test from test/Transforms/IndVarSimplify to
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test/CodeGen/X86, as doesn't use -indvars, and it does use
llc -march=x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92799 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 22:52:54 +00:00
Bill Wendling
9f7c5c0dca
Don't assign the shift the same type as the variable being shifted. This could
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result in illegal types for the SHL operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92797 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 22:39:10 +00:00
Dan Gohman
aceba31b7a
Delete useless trailing semicolons.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 17:55:26 +00:00
Dan Gohman
c12e979790
Make this test more portable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 21:23:34 +00:00
Dan Gohman
b75e8642a6
Add some tests and update an existing test to reflect recent
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x86 isel peeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 20:53:54 +00:00
Anton Korobeynikov
39784e158a
Fix invalid chain folding for memory variant of sdiv / udiv
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-04 10:31:54 +00:00
Chris Lattner
d0592d3be6
fix PR5930, allowing the asmprinter to emit difference between
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two labels as a truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92455 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-03 18:33:18 +00:00
Chris Lattner
2ef90d782e
add PR#
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-03 18:10:58 +00:00
Chris Lattner
5099b31f98
differences between two blockaddress's don't cause a
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global variable initializer to require relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-03 18:09:40 +00:00
Chris Lattner
09987f73f6
allow this to work on linux hosts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-02 00:22:15 +00:00
Chris Lattner
133ce871df
Teach codegen to handle:
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(X != null) | (Y != null) --> (X|Y) != 0
(X == null) & (Y == null) --> (X|Y) == 0
so that instcombine can stop doing this for pointers. This is part of PR3351,
which is a case where instcombine doing this for pointers (inserting ptrtoint)
is pessimizing code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92406 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-02 00:00:03 +00:00
Chris Lattner
aac00392c3
rename file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-01 23:55:04 +00:00
Chris Lattner
f031e8ad01
Teach codegen to lower llvm.powi to an efficient (but not optimal)
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multiply sequence when the power is a constant integer. Before, our
codegen for std::pow(.., int) always turned into a libcall, which was
really inefficient.
This should also make many gfortran programs happier I'd imagine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92388 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-01 03:32:16 +00:00
Chris Lattner
0fba8cf9ff
Make this more likely to generate a libcall.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92387 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-01 03:26:51 +00:00
Sanjiv Gupta
223497e1ef
Extern declaration for unordered.f32 libcall was not being emitted. Fixed that.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92242 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-29 03:24:34 +00:00
Sanjiv Gupta
917283a418
Fixed llc crash for zext (i1 -> i8) loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 04:53:24 +00:00
Chris Lattner
04b091a782
handle equality memcmp of 8 bytes on x86-64 with two unaligned loads and a
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compare. On other targets we end up with a call to memcmp because we don't
want 16 individual byte loads. We should be able to use movups as well, but
we're failing to select the generated icmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92107 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-24 01:07:17 +00:00
Chris Lattner
8047d9a6be
move an optimization for memcmp out of simplifylibcalls and into
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SDISel. This optimization was causing simplifylibcalls to
introduce type-unsafe nastiness. This is the first step, I'll be
expanding the memcmp optimizations shortly, covering things that
we really really wouldn't want simplifylibcalls to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92098 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-24 00:37:38 +00:00
Sanjiv Gupta
76d2f9a4db
Reapply 91904.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 11:19:09 +00:00
Sanjiv Gupta
e433d5e1f4
deleting empty file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91994 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 10:35:24 +00:00
Sanjiv Gupta
6d48855a56
Reverting back 91904.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91993 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 09:46:01 +00:00
Dale Johannesen
9949933d6e
Use more sensible type for flags in asms. PR 5570.
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Patch by Sylve`re Teissier (sorry, ASCII only).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 07:32:51 +00:00
Eric Christopher
d060b2576a
Update objectsize intrinsic and associated dependencies. Fix
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lowering code and update testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 02:51:48 +00:00
Anton Korobeynikov
a1508f9514
Add testcase for PR5703
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91931 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 22:37:23 +00:00
Evan Cheng
b1f4981333
Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91910 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 17:47:23 +00:00
Sanjiv Gupta
66500208a5
While converting one of the operands to a memory operand, we need to check if it is Legal and does not result into a cyclic dep.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91904 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 14:25:37 +00:00
Sanjiv Gupta
bcfd12a234
Emit direction operand in binary insns that stores in memory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91777 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 13:52:01 +00:00
Sanjiv Gupta
3f5d7642ce
Test cases for changes done in 91768.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91773 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 11:38:14 +00:00
Evan Cheng
9ab2b98ba5
Increase opportunities to optimize (brcond (srl (and c1), c2)).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91717 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 21:31:31 +00:00
Evan Cheng
400073d546
On recent Intel u-arch's, folding loads into some unary SSE instructions can
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be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.
movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0
instead of
cvtss2sd (%rdi), %xmm0
An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 07:40:29 +00:00
Dan Gohman
f838e2366a
Tidy up this testcase and add test for tailcall optimization
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with unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91650 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:05:06 +00:00
Bob Wilson
5afffaed5c
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
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The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types. Radar 7457110.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:03:29 +00:00
Dan Gohman
f042396b0f
Remove "tail" keywords. These calls are not intended to be tail calls.
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This protects this test from depending on codegen not performing the
tail call optimization by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91648 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:02:18 +00:00
Jakob Stoklund Olesen
f8ad5bcdb5
Add test case for the phi reuse patch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91642 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 00:11:44 +00:00
Sean Callanan
108934c65d
Instruction fixes, added instructions, and AsmString changes in the
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X86 instruction tables.
Also (while I was at it) cleaned up the X86 tables, removing tabs and
80-line violations.
This patch was reviewed by Chris Lattner, but please let me know if
there are any problems.
* X86*.td
Removed tabs and fixed 80-line violations
* X86Instr64bit.td
(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
Added
(CALL, CMOV) Added qualifiers
(JMP) Added PC-relative jump instruction
(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
that it is 64-bit only (ambiguous since it has no
REX prefix)
(MOV) Added rr form going the other way, which is encoded
differently
(MOV) Changed immediates to offsets, which is more correct;
also fixed MOV64o64a to have to a 64-bit offset
(MOV) Fixed qualifiers
(MOV) Added debug-register and condition-register moves
(MOVZX) Added more forms
(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
(as with MOV) are encoded differently
(ROL) Made REX.W required
(BT) Uncommented mr form for disassembly only
(CVT__2__) Added several missing non-intrinsic forms
(LXADD, XCHG) Reordered operands to make more sense for
MRMSrcMem
(XCHG) Added register-to-register forms
(XADD, CMPXCHG, XCHG) Added non-locked forms
* X86InstrSSE.td
(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
Added
* X86InstrFPStack.td
(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X,
FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM,
FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
FXRSTOR)
Added
(FCOM, FCOMP) Added qualifiers
(FSTENV, FSAVE, FSTSW) Fixed opcode names
(FNSTSW) Added implicit register operand
* X86InstrInfo.td
(opaque512mem) Added for FXSAVE/FXRSTOR
(offset8, offset16, offset32, offset64) Added for MOV
(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
VMWRITE, VMXOFF, VMXON) Added
(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
JGE, JLE, JG, JCXZ) Added 32-bit forms
(MOV) Changed some immediate forms to offset forms
(MOV) Added reversed reg-reg forms, which are encoded
differently
(MOV) Added debug-register and condition-register moves
(CMOV) Added qualifiers
(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
(BT) Uncommented memory-register forms for disassembler
(MOVSX, MOVZX) Added forms
(XCHG, LXADD) Made operand order make sense for MRMSrcMem
(XCHG) Added register-register forms
(XADD, CMPXCHG) Added unlocked forms
* X86InstrMMX.td
(MMX_MOVD, MMV_MOVQ) Added forms
* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
change
* X86RegisterInfo.td: Added debug and condition register sets
* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
* peep-test-3.ll: Fixed testcase to reflect test qualifier
* cmov.ll: Fixed testcase to reflect cmov qualifier
* loop-blocks.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
qualifier
* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
* tail-opts.ll: Fixed testcase to reflect call qualifiers
* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
* widen_load-1.ll: Fixed testcase to reflect call qualifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91638 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 00:01:26 +00:00
Evan Cheng
4c2b001f13
Revert this dag combine change:
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Fold (zext (and x, cst)) -> (and (zext x), cst)
DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-17 00:40:05 +00:00
Nick Lewycky
0588bcef8d
Make this test pass on Linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 07:35:25 +00:00
Evan Cheng
2e489c4f9d
Re-enable 91381 with fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91489 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 00:53:11 +00:00
Dale Johannesen
fc49bd2447
Do better with physical reg operands (typically, from inline asm)
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in local register allocator. If a reg-reg copy has a phys reg
input and a virt reg output, and this is the last use of the phys
reg, assign the phys reg to the virt reg. If a reg-reg copy has
a phys reg output and we need to reload its spilled input, reload
it directly into the phys reg than passing it through another reg.
Following 76208, there is sometimes no dependency between the def of
a phys reg and its use; this creates a window where that phys reg
can be used for spilling (this is true in linear scan also). This
is bad and needs to be fixed a better way, although 76208 works too
well in practice to be reverted. However, there should normally be
no spilling within inline asm blocks. The patch here goes a long way
towards making this actually be true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 00:29:41 +00:00
Kenneth Uildriks
76df3f398c
For fastcc on x86, let ECX be used as a return register after EAX and EDX
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91410 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 03:27:52 +00:00
Evan Cheng
d7760a4905
Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91405 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 03:07:11 +00:00
Evan Cheng
9818c043d2
Make 91378 more conservative.
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1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest.
2. If the shift is a left shift, make sure the original shift cannot shift out bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91399 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 03:00:32 +00:00
Evan Cheng
ad9c0a3d8b
Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:53:42 +00:00
Evan Cheng
8acb3100de
Fold (zext (and x, cst)) -> (and (zext x), cst).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91380 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:52:11 +00:00
Evan Cheng
99b653c36f
Propagate zest through logical shift.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:41:36 +00:00
Dan Gohman
2e141d744e
Fix integer cast code to handle vector types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 23:40:38 +00:00
Evan Cheng
dd99f3a7dc
Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 20:03:14 +00:00
Anton Korobeynikov
8d1ffbd1ad
Lower setcc branchless, if this is profitable.
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Based on the patch by Brian Lucas!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 23:01:29 +00:00
Dan Gohman
87862e77bb
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 21:31:27 +00:00
Dan Gohman
192db0027c
Change this to the correct PR number.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91148 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 20:09:21 +00:00
Dan Gohman
a4f9cc4e55
Fix the result type of SELECT nodes lowered from Select instructions with
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aggregate return values. This fixes PR5754.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91145 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:50:50 +00:00
Anton Korobeynikov
817a46454a
Honour setHasCalls() set from isel.
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This is used in some weird cases like general dynamic TLS model.
This fixes PR5723
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:39:55 +00:00
Evan Cheng
50d070561e
Tests for 91103 and 91104.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91105 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 06:02:21 +00:00
Evan Cheng
6fd78ec8a2
It's not safe to coalesce a move where src and dst registers have different subregister indices. e.g.:
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%reg16404:1<def> = MOV8rr %reg16412:2<kill>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 20:59:45 +00:00
Evan Cheng
ce72f3fbdf
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 22:24:42 +00:00
Evan Cheng
c363094e04
Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g.
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vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>
iff ptr is 16-byte aligned (or can be made into 16-byte aligned).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 21:00:30 +00:00
Evan Cheng
7bd6478cd6
Teach InferPtrAlignment to infer GV+cst alignment and use it to simplify x86 isl lowering code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90925 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-09 01:53:58 +00:00
Evan Cheng
d831cda3e7
- Support inline asm 'w' constraint for 128-bit vector types.
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- Also support the 'q' NEON registers asm code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 23:06:22 +00:00