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151 Commits 4 Branches 32 Tags 7.4 MiB
Commit Graph

38 Commits

Author SHA1 Message Date
marqs 4676cbd2f0 integrate zero-riscy 2018-10-06 13:19:12 +03:00
marqs 22e49300df fix line2x reverse LPF trigger 2018-04-18 23:14:24 +03:00
marqs 37650ca22b misc improvements 
* add character LCD backlight timeout option
* increase h.mask range
* show accurate (fpga-calculated) timings on infoscreen
 2018-03-28 20:09:40 +03:00
marqs 9ad696dbc3 optimize away one pp stage and unify code formatting 2018-03-12 01:25:23 +02:00
paulb-nl 990bc1563e Add Scanline contrast 
Reduce scanline strength for bright pixels
 2018-02-24 21:56:18 +01:00
marqs bee64c6fbc allow profile link (to each logical input) via a menu option 2017-12-11 00:51:50 +02:00
marqs a24d6b0e3a Update latency tester 
* Enable operation with all sources
* Measure strobe length on low-persistence displays
 2017-10-28 12:10:54 +03:00
marqs 1bf279b2a7 Initial latency tester implementation 2017-10-22 22:45:29 +03:00
marqs 4b21a354b4 Fix and optimize reverse lpf activation 2017-10-12 02:31:19 +03:00
paulb-nl ac16008076 Add reverse LPF feature 
reverse LPF can be used to mostly reverse the blur on pre 1-CHIP SNES.
For best results use 256x240 optimized mode.
 2017-09-27 22:43:26 +02:00
marqs 9d14cc776e Misc small fixes and improvements 
* Disable 480p scanlines in auto mode
* Remove inoperable 3x/4x processing modes from 1080i list
* Add 640x512 mode to 480p group and limit 480p sampler option to 525-line modes
* Fix occasional pixel repetion issue after HDMI<->DVI TX switch
* Add "Allow upsample2x" option
* Add comments to some unclear sections
 2017-08-10 00:06:35 +03:00
marqs 2cd36cdd37 Fix PCM1862 input selection. 2017-06-12 01:00:34 +03:00
marqs cabc04b3b0 Add support for v1.6 pcb with PCM1862. 2017-06-05 00:02:01 +03:00
marqs 2aee3294e3 Fix HDTV mode parameters 2017-05-30 21:16:03 +03:00
marqs 2577470abe Clean up TX setup code and add compatibility options 2017-05-29 20:43:24 +03:00
marqs 4f36278cb7 Sync processing rewritten and some issues fixed 
* add 480i/576i line3x/4x
* clean up RTL and SDC
* update AVI infoframe properly
* add HDMI IT content option
 2017-05-18 23:36:37 +03:00
marqs 2c934c9dd0 Fix line3x 4:3 mode and VGA interlace detection 2017-02-09 23:14:24 +02:00
marqs 6e043ef577 Improve input mode handling 
* New options and better compatibility for Line5x
* Add support for 960i and 1080i
* Make TVP HPLL2x option user-selectable
 2017-02-07 23:04:30 +02:00
marqs 3b19b2843c Preliminary Line5x implementation 2017-01-29 13:02:12 +02:00
marqs d41c7522a0 Misc updates 
* Fix mask placement and make its brightness adjustable
* Line4x
 2017-01-24 00:18:15 +02:00
marqs 434186d64e Improve lo-res mode processing features 
* workaround for phase shift issue on optimized modes
* add hscale option for 256x240 opt Line3x mode
* distribute video modes to groups and allow passthru for all modes
 2017-01-23 00:56:17 +02:00
marqs d77c293b70 * Clean up some FPGA code 
* Wrap sampling phase setting
* Enable hal.enable_lightweight_device_driver_api to reduce CPU code size
 2016-12-31 14:18:21 +02:00
marqs a4faf2c1ab Add alternative build targets. 2016-11-12 23:54:01 +02:00
marqs fac88b348e Merge borti4938's diy-audio code and fix audio format. 2016-11-08 20:53:58 +02:00
marqs d548d53272 Add dedicated SPI mode option to i2c_opencores. 2016-11-05 15:39:36 +02:00
marqs 611c8763c2 Improve SD card IO. 2016-10-27 01:08:23 +03:00
marqs f55e9a877e SD SPI implementation finished 2016-10-21 01:19:53 +03:00
marqs 9f086828ac Release 0.73 
* Fixed adv. timing tweaker using previous values when updating parameters
* Added "Hsync tolerance" option to fix detection of certain Neo-Geo models
 2016-09-05 20:49:41 +03:00
marqs 9f7a30bea9 fix clamp and ALC position 2016-08-23 00:52:46 +03:00
marqs 2dee0a2eb5 * R/G/B gain/offset controls added 
* misc optimizations
 2016-08-20 15:54:28 +03:00
marqs 827df7930f * L3 optimized mode scanlines fixed 
* Advanced timing tweaker implemented
 2016-08-16 22:45:23 +03:00
marqs a488422089 * Fix scanline rendering issues 
* Add initial input and SDTV sync glitch filter settings
* Modify input initialization logic
* Fix debug build warnings
 2016-08-14 18:57:50 +03:00
marqs c8b542b917 * 480p/576p line2x 
* 480i/576i passthrough
* alternating scanlines for interlaced material
 2016-07-09 23:12:35 +03:00
marqs a2e10637bd Fix random input detection issue. 2016-06-22 23:22:59 +03:00
marqs 4548bf0b8c Reset sync processing when disabling output 2016-05-25 01:06:48 +03:00
marqs c83653c880 Release 0.69 
* Improved remote control handling code
* Fixed occasional mode change loop when switching to a non-interlace mode utilizing odd-field sync signal
* Fixed randomly missing blue channel at power-on when using DVI output mode
* Added H-PLL coast options
* Finer tuning range for scanline strength and mask
 2016-04-15 22:05:53 +03:00
marqs f502b2e46c Release 0.67. 
- Code cleanup
- Some project files added
- PAL linetriple added
- FPGA PLL parameters optimized
- Reduced jitter on low video clock sources
 2016-03-27 23:09:31 +03:00
marqs 388c464f63 Initial public release (FW 0.64) 2016-02-23 01:03:50 +02:00