Florian Reitz
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93cd52b99c
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Fix in VQ44 pinning
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2019-06-02 19:35:28 +02:00 |
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Florian Reitz
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ffa94345b5
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Asserts for simulation
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2019-03-17 15:59:43 +01:00 |
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Florian Reitz
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3ccd8ec999
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VHDL for VQFP and PLCC packages
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2019-03-17 15:29:29 +01:00 |
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Florian Reitz
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781d283c3c
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Flasher project added
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2019-03-03 10:22:06 +01:00 |
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Florian Reitz
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02d9e608e1
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Program enable added and verified
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2019-03-03 10:21:02 +01:00 |
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Florian Reitz
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91d54ddd9c
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AddressDecoder verified in simulation
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2019-03-03 10:20:50 +01:00 |
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Florian Reitz
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70c0c118fc
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Expected results added to AddressDecoder simulation
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2019-03-03 10:20:46 +01:00 |
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Florian Reitz
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7a0480f05e
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LED removed from AddressDecoder
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2019-03-03 10:20:40 +01:00 |
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Florian Reitz
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b50b1037fd
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NWE signal added, not tested
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2019-03-03 10:20:33 +01:00 |
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freitz85
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505fe10434
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SDHC flag added to CPLD
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2017-11-25 19:42:33 +01:00 |
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freitz85
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9aa65960c4
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SPI Mode 3
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2017-11-01 16:50:56 +01:00 |
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freitz85
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cf98c54e77
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Linear addressing from Cn00
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2017-10-23 22:42:27 +02:00 |
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freitz85
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c5945ff0ec
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New address decoding
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2017-10-16 22:53:41 +02:00 |
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freitz85
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b37df65a45
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Test for old AddressDecoder
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2017-10-16 22:01:41 +02:00 |
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freitz85
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70def47cf2
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More VDHL tests added
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2017-10-15 20:58:33 +02:00 |
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freitz85
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723406657e
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Fixes according to IIgs Tech Note #68
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2017-10-13 23:04:38 +02:00 |
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freitz85
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eeb0b14725
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AddressDecoder testbench
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2017-10-12 20:37:37 +02:00 |
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freitz85
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819904bea2
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Spi simulation working
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2017-10-10 23:37:21 +02:00 |
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freitz85
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cc9d9d21db
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Rename files
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2017-10-10 22:57:47 +02:00 |
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freitz85
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7e2414c1bf
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AddressDecoder in VHDL
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2017-10-10 22:36:48 +02:00 |
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freitz85
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74c6b83b4e
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Synthesis guards for debug signals
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2017-10-10 21:58:22 +02:00 |
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freitz85
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2e4ebd9ac0
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Test bench worst and best case timings
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2017-10-10 21:22:18 +02:00 |
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freitz85
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8a6e7e647e
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Test bench
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2017-10-10 02:53:21 +02:00 |
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freitz85
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797993500e
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Test bench added
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2017-10-10 01:35:18 +02:00 |
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freitz85
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c03bc37834
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Test bench
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2017-10-10 00:41:31 +02:00 |
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freitz85
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caa40196d7
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Removed BUFG constraint warnings
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2017-10-09 23:35:52 +02:00 |
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freitz85
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b888590d11
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Top level in VHDL
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2017-10-09 22:35:47 +02:00 |
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freitz85
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84cfbdde92
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test with clocked input buffers
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2017-10-08 21:48:07 +02:00 |
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Florian Reitz
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d0a9254893
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several fixes tried
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2017-10-05 22:57:38 +02:00 |
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freitz85
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9c3b1c33ff
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Reset inited on card remove
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2017-09-10 14:07:23 +02:00 |
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freitz85
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04e26f32da
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Update to ISE 14.7
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2017-09-10 13:41:13 +02:00 |
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Florian Reitz
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2a06e1ba5d
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Support for second partition, card detect and write protect added
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2017-09-09 20:34:24 +02:00 |
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freitz85
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7425ad32fc
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formatting
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2017-09-03 14:51:09 +02:00 |
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freitz85
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63313fd7fa
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inited flag is removed when card is ejected
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2017-08-31 01:07:34 +02:00 |
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freitz85
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19632c05dc
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inited signal added to cpld
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2017-08-27 12:21:26 +02:00 |
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freitz85
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596e7c3f1f
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Pin changes
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2017-07-09 13:28:18 +02:00 |
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freitz85
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21acf3ac24
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signal rename and pinning
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2017-07-05 23:28:27 +02:00 |
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freitz85
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162ce22536
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Address decoding corrected
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2017-07-05 22:13:41 +02:00 |
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freitz85
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c4d43389c4
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File rename
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2017-07-05 19:41:29 +02:00 |
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freitz85
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cb9891374f
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removed unnecessary Xilinx files
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2017-07-05 19:32:25 +02:00 |
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freitz85
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ef10d991fe
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Merge branch 'master' of https://github.com/freitz85/AppleIISd
# Conflicts:
# _ngo/netlist.lst
# spi6502b.bld
# spi6502b.ngc
# spi6502b.ngd
# spi6502b.ngr
# spi6502b.prj
# spi6502b.syr
# spi6502b_pad.csv
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2017-07-05 19:23:46 +02:00 |
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freitz85
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30a026b18a
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folder structure added
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2017-07-05 19:08:54 +02:00 |