Apple-2-HW
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AppleIISd
mirror of https://github.com/freitz85/AppleIISd.git
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  • 0f92b7cf03 Source updated for CC65 Florian Reitz 2017-11-25 23:23:25 +0100
  • 505fe10434 SDHC flag added to CPLD freitz85 2017-11-25 19:42:33 +0100
  • 6517f86ce3 Load block 0 and 1 on boot Florian Reitz 2017-11-20 19:13:16 +0100
  • 9aa65960c4 SPI Mode 3 freitz85 2017-11-01 16:50:56 +0100
  • e9bd383d2e Save and restore ZP locations Florian Reitz 2017-11-01 16:22:35 +0100
  • cf98c54e77 Linear addressing from Cn00 freitz85 2017-10-23 22:42:27 +0200
  • b0df142692 Linear addressing from C700, test code added to ram V0.7 Florian Reitz 2017-10-22 20:50:14 +0200
  • 9e674fe0c6 Hex file for new address mapping Florian Reitz 2017-10-17 00:06:33 +0200
  • c5945ff0ec New address decoding freitz85 2017-10-16 22:53:41 +0200
  • b37df65a45 Test for old AddressDecoder freitz85 2017-10-16 20:21:09 +0200
  • f2314f838d IRQ Pin removed, A11 added Unknown 2017-10-16 21:42:57 +0200
  • 70def47cf2 More VDHL tests added freitz85 2017-10-15 20:58:33 +0200
  • f20a1d529d Test routine added Florian Reitz 2017-10-15 16:48:13 +0200
  • 723406657e Fixes according to IIgs Tech Note #68 freitz85 2017-10-13 23:04:38 +0200
  • eeb0b14725 AddressDecoder testbench freitz85 2017-10-11 00:53:20 +0200
  • 819904bea2 Spi simulation working freitz85 2017-10-10 23:37:21 +0200
  • cc9d9d21db Rename files freitz85 2017-10-10 22:55:21 +0200
  • 7e2414c1bf AddressDecoder in VHDL freitz85 2017-10-10 22:32:24 +0200
  • 74c6b83b4e Synthesis guards for debug signals freitz85 2017-10-10 21:58:22 +0200
  • 2e4ebd9ac0 Test bench worst and best case timings freitz85 2017-10-10 21:22:18 +0200
  • 8a6e7e647e Test bench freitz85 2017-10-10 02:53:21 +0200
  • 797993500e Test bench added freitz85 2017-10-10 01:35:18 +0200
  • c03bc37834 Test bench freitz85 2017-10-10 00:41:31 +0200
  • caa40196d7 Removed BUFG constraint warnings freitz85 2017-10-09 23:35:52 +0200
  • b888590d11 Top level in VHDL freitz85 2017-10-09 22:35:47 +0200
  • c41ff87f8f Merge remote-tracking branch 'origin/devel' into devel freitz85 2017-10-09 22:30:03 +0200
  • 4f3dca7cc9 Timing diagram added Unknown 2017-10-09 08:49:22 +0200
  • 84cfbdde92 test with clocked input buffers freitz85 2017-10-08 21:48:07 +0200
  • ff074dc995 Merge remote-tracking branch 'origin/devel' into devel Florian Reitz 2017-10-05 23:12:47 +0200
  • 763a99022c Merge branch 'master' into devel Florian Reitz 2017-10-05 23:05:31 +0200
  • 75b50c96ce Check for init failure V0.6 Florian Reitz 2017-10-03 17:46:50 +0200
  • d0a9254893 several fixes tried Florian Reitz 2017-10-05 22:57:38 +0200
  • a15abda39b PLCC44 Socket Pinout Unknown 2017-10-05 19:30:21 +0200
  • c438775789 Check for init failure Florian Reitz 2017-10-03 17:46:50 +0200
  • 9c3b1c33ff Reset inited on card remove freitz85 2017-09-10 14:07:23 +0200
  • 04e26f32da Update to ISE 14.7 freitz85 2017-09-10 13:41:13 +0200
  • 2a06e1ba5d Support for second partition, card detect and write protect added Florian Reitz 2017-09-09 20:34:24 +0200
  • b845ad2cc9 Merge remote-tracking branch 'origin/master' Florian Reitz 2017-09-05 20:03:46 +0200
  • 8b8e22c796 misc datasheets added freitz85 2017-09-05 18:09:19 +0200
  • 7425ad32fc formatting freitz85 2017-09-03 14:51:09 +0200
  • 63313fd7fa inited flag is removed when card is ejected freitz85 2017-08-31 01:07:34 +0200
  • 30f6b89f2b inited flag in fpga Florian Reitz 2017-08-27 15:02:58 +0200
  • 19632c05dc inited signal added to cpld freitz85 2017-08-27 12:21:26 +0200
  • f3751b90fb 7MHz clock used, read/write improved Florian Reitz 2017-08-27 00:37:54 +0200
  • 6e37a8c482 Code updated for Merlin32 V0.5 Florian Reitz 2017-08-26 13:07:42 +0200
  • f9f042748d Update README.md Florian Reitz 2017-08-26 12:50:55 +0200
  • 795142ba20 Images added freitz85 2017-08-26 11:46:29 +0200
  • 5f9e6809b8 Schematic as PDF and BOM freitz85 2017-08-24 17:39:23 +0200
  • 0a231537c5 Update README.md freitz85 2017-08-23 19:37:40 +0200
  • c49f8279b6 Create README.md freitz85 2017-08-22 19:35:53 +0200
  • 12a480b11d Add files via upload freitz85 2017-08-21 22:26:14 +0200
  • 3edc480c74 Fix for crc after read command Unknown 2017-08-13 13:46:00 +0200
  • 92f8061ea8 Fix for line ending Unknown 2017-08-13 13:34:15 +0200
  • ff87291902 several fixes, not completely booting Unknown 2017-08-12 17:56:49 +0200
  • fcf4e95c10 Small changes on board freitz85 2017-08-11 23:34:41 +0200
  • 7d67a7b4d5 Several fixes, binary and srec files added Unknown 2017-08-11 22:59:02 +0200
  • de4edffe30 Update .gitattributes freitz85 2017-08-02 19:50:12 +0200
  • e4d48edfbd Create .gitattributes freitz85 2017-08-02 19:48:45 +0200
  • f7c7c88e65 - Gerber files freitz85 2017-07-18 10:50:51 +0200
  • 7391fa7cbc Fixed bug in Write Block freitz85 2017-07-16 23:29:09 +0200
  • 624bd4e9a7 Debug flags added, block and command sequences moved to subroutine freitz85 2017-07-16 15:36:47 +0200
  • 240b301bad Source and Listing updated to ROM location freitz85 2017-07-15 18:32:17 +0200
  • c185b53681 R and C changed to SMD freitz85 2017-07-12 22:23:15 +0200
  • 4d7a7bcec0 Datasheets added freitz85 2017-07-11 09:54:20 +0200
  • dd4ecb5a7f test freitz85 2017-07-10 12:11:24 +0200
  • 475a41b5de Merlin 8 source added freitz85 2017-07-09 13:40:47 +0200
  • 596e7c3f1f Pin changes freitz85 2017-07-09 13:28:18 +0200
  • d498ee4a58 Pin changes, libraries added freitz85 2017-07-09 13:25:20 +0200
  • 21117e8847 !CE on GND freitz85 2017-07-05 23:55:13 +0200
  • 21acf3ac24 signal rename and pinning freitz85 2017-07-05 23:28:27 +0200
  • f851a50f65 Pinning changed freitz85 2017-07-05 22:17:58 +0200
  • 162ce22536 Address decoding corrected freitz85 2017-07-05 22:13:41 +0200
  • a4ee5d055a file rename freitz85 2017-07-05 20:07:55 +0200
  • 933ba500c2 .gitignore freitz85 2017-07-05 19:46:39 +0200
  • 94c57bb52e ignored Xilinx files freitz85 2017-07-05 19:45:53 +0200
  • c4d43389c4 File rename freitz85 2017-07-05 19:41:29 +0200
  • cb9891374f removed unnecessary Xilinx files freitz85 2017-07-05 19:32:25 +0200
  • ef10d991fe Merge branch 'master' of https://github.com/freitz85/AppleIISd freitz85 2017-07-05 19:23:46 +0200
  • f685f98029 address decoder added freitz85 2017-07-05 19:22:02 +0200
  • 30a026b18a folder structure added freitz85 2017-07-05 19:08:54 +0200
  • 50d903c980 additional misos and int removed freitz85 2017-05-06 18:14:04 +0200
  • 125f6d91e1 files added freitz85 2017-05-06 17:31:51 +0200
  • b69c5f194a Initial commit freitz85 2016-10-19 14:48:44 +0200