Commit Graph

101 Commits

Author SHA1 Message Date
Chris Lattner
b9169ceb23 Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25212 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 07:49:38 +00:00
Chris Lattner
1b8af84a84 Unbreak ret void :-/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25210 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 07:15:43 +00:00
Chris Lattner
bda559e115 Write this pattern in canonical form, allowing more patterns to match.
This implements Regression/CodeGen/SparcV8/xnor.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25209 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 07:14:01 +00:00
Evan Cheng
6da8d99f70 New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
hasInFlag, hasOutFlag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 18:28:21 +00:00
Evan Cheng
2b4ea795a2 Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-26 09:11:45 +00:00
Evan Cheng
171049d10f * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 22:14:32 +00:00
Chris Lattner
3cb7187d5f fix the int<->fp instructions, which apparently take a single float register
to represent the int part (because it's always 32-bits)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24976 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 05:00:16 +00:00
Chris Lattner
a01c0ccb63 clean up .td file by using evan's new FLAG thing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24967 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 21:18:39 +00:00
Chris Lattner
bcfdec73d1 Correct bool truncstore operand order
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24855 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 02:06:50 +00:00
Chris Lattner
e2d97f8399 add the other bool zextload as well
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24854 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 01:44:58 +00:00
Chris Lattner
a1251f24b5 implement zextload bool
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24853 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 01:43:04 +00:00
Chris Lattner
96d5bb79d4 Fix syntax for indirect calls. This fixes Olden/mst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24850 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 01:22:53 +00:00
Chris Lattner
97561fc2eb apparently rdy isn't actually a psuedo instruction. Use rd %y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24848 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 00:53:02 +00:00
Chris Lattner
beecfd2b2d add fneg/fabs support for doubles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24847 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 00:50:12 +00:00
Chris Lattner
f53d0bfbfd add bool truncstores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24845 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 00:19:21 +00:00
Chris Lattner
7a48e5018b Configure the asmwriter to allow constant pools to be printed correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24841 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 23:35:05 +00:00
Chris Lattner
b04c5c8eb2 add support for integer extloads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24840 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 23:18:37 +00:00
Chris Lattner
20ad53ffd7 Add support for undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24839 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 23:10:57 +00:00
Chris Lattner
dab05f0e19 Change return lowering so that we can autogen the matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24832 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 21:03:04 +00:00
Chris Lattner
2db3ff66f1 Implement Calls for V8. This would be completely autogenerated except for
a small bug in tblgen.  When that is fixed, we can remove the ISD::Call case
in Select.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24830 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 15:55:15 +00:00
Chris Lattner
eee99bd459 Push ops list, asm string, and pattern all the way up to InstV8. Move the
InstV8 class to the InstrFormats file where it belongs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24824 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 08:21:00 +00:00
Chris Lattner
3308449afc Give V8 select_cc, in the spirit of the PPC backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24823 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 08:13:54 +00:00
Chris Lattner
98f853698c remove some unused instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24822 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 07:15:17 +00:00
Chris Lattner
8fa54dc702 Add frameindex support
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24818 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 06:59:57 +00:00
Chris Lattner
76acc872b3 Add constant pool support, including folding into addresses.
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24813 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:37:35 +00:00
Chris Lattner
e357246c6b Add initial support for global variables, and fix a bug in addr mode selection
where we didn't select the operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 02:10:39 +00:00
Chris Lattner
04dd673aea Claiming that branch targets are registers is not very wholesome. Change them
to be basic blocks.  Also, add uncond branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24810 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:46:58 +00:00
Chris Lattner
456b9400dc Add unordered comparisons
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24809 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:41:39 +00:00
Chris Lattner
5b2dfc7cc1 Add patterns to the rest of the int condbranches and some of the fp branches
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24808 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:38:19 +00:00
Chris Lattner
4d55aca87a Add initial conditional branch support. This doesn't actually work yet due
to a bug in the scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24807 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 01:20:35 +00:00
Chris Lattner
38abcb500f Eliminate CMPri, which is a synonym for SUBCCri
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:52:08 +00:00
Chris Lattner
294974bd57 add fneg,fabs,fsqrt instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24803 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:20:27 +00:00
Chris Lattner
b4d5172af9 Add patterns for fround/fextend and the funny fsmuld instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24802 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:14:30 +00:00
Chris Lattner
10c6aed73c Add FP +,-,*,/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24801 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:10:46 +00:00
Chris Lattner
558bfe0cf5 Give patterns to F3_3 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24800 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 23:05:35 +00:00
Chris Lattner
37949f5c2b Add patterns for multiply, simplify Y register handling stuff, add RDY instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24796 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 22:22:53 +00:00
Chris Lattner
9034b883a4 Make the addressing modes smarter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24795 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:25:27 +00:00
Chris Lattner
87a63f812c remove some unused instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24794 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:13:50 +00:00
Chris Lattner
2cfdbb2716 add andn/orn/xorn patterns. This allows us to compile this:
long %test(ubyte, short, long %X, long %Y) {
  %A = xor long %X, -1
  %B = and long %Y, %A
  ret long %B
}

to this:

test:
        save -96, %sp, %sp
        andn %i4, %i2, %i0
        andn %i5, %i3, %i1
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        xor %i2, -1, %l0
        xor %i3, -1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

The simpleisel emits:  :(

test:
        save -96, %sp, %sp
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l1
        xor %i2, %l0, %l0
        xor %i3, %l1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24793 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 21:05:49 +00:00
Chris Lattner
53ec2035eb add patterns for FP stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24790 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:47:16 +00:00
Chris Lattner
d55e1ca5ef Add [reg+reg] integer stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24789 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:44:36 +00:00
Chris Lattner
d30a630636 Add store patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24788 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:42:55 +00:00
Chris Lattner
b575baf57d add fp load patterns, switch rest of loads and stores to use addrmodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24786 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:32:47 +00:00
Chris Lattner
1963783fab Add integer load[r+r] forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24785 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:26:45 +00:00
Chris Lattner
84e2abf116 Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24783 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:18:24 +00:00
Chris Lattner
bc83fd9672 Add basic addressing mode support and one load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24782 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 20:04:49 +00:00
Chris Lattner
b71f9f8488 Use a combination of sethi and or to build arbitrary immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24780 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:41:43 +00:00
Chris Lattner
57dd3bc460 Use sethi to build large immediates with zeros at the bottom
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24779 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:37:00 +00:00
Chris Lattner
d2cd46676c Add shift and small immediate support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 19:07:57 +00:00
Chris Lattner
f83cee6ac1 Add some basic reg-reg instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24777 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 18:53:33 +00:00