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7423 Commits

Author SHA1 Message Date
Dan Gohman
126b56659c Add a testcase for PR2831. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76527 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 01:02:18 +00:00
Dan Gohman
19211b47cc Add a testcase for PR4569, which is now fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76526 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 00:50:52 +00:00
Evan Cheng
af9e7a7c20 Fix ARM isle code that optimize multiply by constants which are power-of-2 +/- 1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76520 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 00:31:12 +00:00
Evan Cheng
c95be59371 Cross RC coalescing is now on by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76519 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 00:22:59 +00:00
Dan Gohman
746f3b1a9b The upper argument of ConstantRange is exclusive, not inclusive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76492 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 22:34:18 +00:00
David Greene
76081c4ef7 Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes 
next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76486 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 22:02:59 +00:00
Evan Cheng
87faa1fc67 Forgot this test earlier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76485 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 21:46:42 +00:00
Dan Gohman
1224c38698 Assembly and Bitcode support for unsigned/signed overflow flags and 
exact sdiv flags.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76475 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 21:19:07 +00:00
Evan Cheng
33d0474bf5 Use TII->findCommutedOpIndices to find the commute operands (rather than guessing). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76472 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 21:16:08 +00:00
Kevin Enderby
5026ae4514 Removed the DumpSymbolsandMacros and LoadSymbolsandMacros MCStreamer API as 
the parsing of the .dump and .load should be done in the assembly parser and
not have any need for an MCStreamer API.  Changed the code for now so these
just produce an error saying these specific directives are not yet implemented
since they are likely no longer used and may never need to be implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76462 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 20:25:37 +00:00
Evan Cheng
753480ad20 Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 19:47:55 +00:00
Dan Gohman
f241174421 Revert the addition of hasNoPointerOverflow to GEPOperator. 
Getelementptrs that are defined to wrap are virtually useless to
optimization, and getelementptrs that are undefined on any kind
of overflow are too restrictive -- it's difficult to ensure that
all intermediate addresses are within bounds. I'm going to take
a different approach.

Remove a few optimizations that depended on this flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76437 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 17:43:30 +00:00
Evan Cheng
6aadc4d4dd xfail for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76423 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 15:33:09 +00:00
Chris Lattner
401e10c4fb implement a new magic global "llvm.compiler.used" which is like llvm.used, but 
doesn't cause ".no_dead_strip" to be emitted on darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76399 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 06:14:25 +00:00
Evan Cheng
ba8dc03935 Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76398 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-20 06:10:07 +00:00
Daniel Dunbar
cc171839ad This test should be run with -m32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-19 22:44:03 +00:00
Jakob Stoklund Olesen
45d34fe358 Fix http://llvm.org/bugs/show_bug.cgi?id=4583 
Inline asm instructions may have additional <imp-def,kill> register operands.
These operands are not marked with a flag like the normal asm operands, so we
must not assert that there is a flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76373 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-19 19:09:59 +00:00
Eli Friedman
2451a64687 Canonicalize bitcasts between types like <1 x i64> and i64 to 
insertelement/extractelement.

I'm not entirely sure this is precisely what we want to do: should we 
prefer bitcast(insertelement) or insertelement(bitcast)?  Similarly. should we 
prefer extractelement(bitcast) or bitcast(extractelement)?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76345 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-18 23:06:53 +00:00
Eli Friedman
76e7ba893f Back out 76300; apparently the preference is to canonicalize the other 
way (bitcast -> insert/extractelement).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76325 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-18 19:04:16 +00:00
Eli Friedman
8be17397c0 Add combine: X sdiv (1 << Y) -> X udiv (1 << Y) when X doesn't have the 
sign bit set.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76304 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-18 09:53:21 +00:00
Eli Friedman
fc21f8ff14 Canonicalize insert/extractelement from single-element vectors into 
bitcasts.

It would also be possible to canonicalize the other way; does anyone 
have a preference?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76300 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-18 09:07:47 +00:00
Eli Friedman
62bb413435 Fix simplifylibcalls memset recognition to work on 64-bit platforms 
where int is 32 bits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76293 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-18 08:34:51 +00:00
Evan Cheng
438d9900c0 Catch more coalescing opportunities. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76282 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-18 04:52:23 +00:00
Evan Cheng
5248468473 Enable cross register class coalescing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76281 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-18 02:10:10 +00:00
Evan Cheng
59959cd966 Fix pr4552. Stack slot coloring with register must take care not to generate illegal ams. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76258 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-17 22:42:51 +00:00
Daniel Dunbar
b4b53e5c13 llvm-mc: Add -triple, and start fetching the target asm printer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76257 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-17 22:38:58 +00:00
Evan Cheng
47e9fab158 Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76248 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-17 22:13:25 +00:00
Chris Lattner
a9af7e626c rename test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76197 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-17 18:05:55 +00:00
Duncan Sands
cbc6da628a Testcase for PR4214. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76174 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-17 11:44:20 +00:00
Eli Friedman
a64eb92fe3 Make promotion in operation legalization for SETCC work correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76153 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-17 05:16:04 +00:00
Anton Korobeynikov
b8e9ac834a Emit cross regclass register moves for thumb2. 
Minor code duplication cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76124 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 23:26:06 +00:00
Dale Johannesen
423ccfe51d Assume an inline asm might be a call, so we get 
stack alignment right when it is.  This is not
ideal but conservatively correct.  Adjust a test
to compensate for changed stack offset value.
gcc.apple/asm-block-57.c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76120 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 22:34:45 +00:00
David Greene
3ac1ab835c Emit line numbers in asm comments when available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76117 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 22:24:20 +00:00
Jakob Stoklund Olesen
57e599a46b Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands. 
The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76101 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 20:58:34 +00:00
Evan Cheng
5f15992b77 Changed my mind. We now allow remat of instructions whose defs have subreg indices. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76100 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 20:15:00 +00:00
Chris Lattner
dfce360306 this should be xfailed on darwin. Darwin doesn't use the libstdc++ in the llvm-gcc distro, it uses the system version. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76095 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 18:45:51 +00:00
Evan Cheng
2b48ab947c With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76094 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 18:44:05 +00:00
Dan Gohman
850f791abc Fill in some holes in ScalarEvolution's loop iteration condition 
analysis. This allows indvars to emit a simpler loop trip count
expression.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 17:34:36 +00:00
Anton Korobeynikov
ebfe2b2722 Make xfail proper 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76065 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:53:47 +00:00
Anton Korobeynikov
c975180624 Temporary disable 16 bit bswap 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76063 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:35:57 +00:00
Anton Korobeynikov
6ff3f2c710 Add bswap patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76061 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:34:52 +00:00
Anton Korobeynikov
54681eca69 Fix logic inversion for RI-mode address selection 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:31:14 +00:00
Anton Korobeynikov
9419a0d13d Unbreak the test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76051 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:30:49 +00:00
Anton Korobeynikov
bb8a04806d Expand 32-bit bitconverts via memory 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76050 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:30:29 +00:00
Anton Korobeynikov
f2fd8ea1c9 Fix incomin arg stack frame offset in case we need to generate stack frame 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76049 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:29:57 +00:00
Anton Korobeynikov
5dd38de2c2 Revert the commit, it just hides the real bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76045 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:28:26 +00:00
Anton Korobeynikov
75eef89ddb Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76035 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:24:41 +00:00
Anton Korobeynikov
8bd0db7615 Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76011 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:18:17 +00:00
Anton Korobeynikov
6fe326c713 Implement 'large' PIC model 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76006 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:16:05 +00:00
Anton Korobeynikov
48e8b3cc58 Implement shifts properly (hopefilly - finally!) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76005 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:15:24 +00:00
Anton Korobeynikov
0a42d2b437 Properly handle divides. As a bonus - implement memory versions of them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76003 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:14:33 +00:00
Anton Korobeynikov
014d4639d8 32 bit shifts have only 12 bit displacements 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76000 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:13:24 +00:00
Anton Korobeynikov
1ed1e3ecd4 Consolidate reg-imm / reg-reg-imm address mode selection logic in one place. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75990 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:10:17 +00:00
Anton Korobeynikov
720e3b00b8 Add support for 12 bit displacements 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:09:35 +00:00
Anton Korobeynikov
980d5503c3 Emit proper lowering of load from arg stack slot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:08:42 +00:00
Anton Korobeynikov
c772c4408e Implement dynamic allocas 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75985 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:08:15 +00:00
Anton Korobeynikov
c16cdc5de7 Add jump tables 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75984 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:07:50 +00:00
Anton Korobeynikov
759205d1ac Add rotates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75981 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:06:49 +00:00
Anton Korobeynikov
cfca8b1f62 Add patterns for integer negate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75980 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:06:27 +00:00
Anton Korobeynikov
8c993e1632 Provide proper patterns for and with imm instructions. Tune the tests accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75979 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:06:00 +00:00
Anton Korobeynikov
25af73303f Add 32 bit and reg-imm and disable invalid patterns for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:05:32 +00:00
Anton Korobeynikov
747052c1a5 Add z9 and z10 target processors. Mark z10-only instructions as such. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75977 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 14:05:00 +00:00
Anton Korobeynikov
22836d1b31 Proper lower 'small' results 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75962 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:58:24 +00:00
Anton Korobeynikov
eb68f1c661 Completel forgot about unconditional branches 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75961 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:57:52 +00:00
Anton Korobeynikov
bad769f11a Lower addresses of globals 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75960 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:57:27 +00:00
Anton Korobeynikov
ed1a6d4cad Test (incomplete) for easy muls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75959 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:57:03 +00:00
Anton Korobeynikov
8d1837d9be Provide "wide" muls and divs/rems 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75958 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:56:42 +00:00
Anton Korobeynikov
ecf22d5bdc Tests for cmp / br_cc / select_cc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75949 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:53:15 +00:00
Anton Korobeynikov
ef5decab53 Emit callee-saved regs spills / restores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75943 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:51:12 +00:00
Anton Korobeynikov
ba249e41f3 Some preliminary call lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75941 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:50:21 +00:00
Anton Korobeynikov
3c98c616c5 Prologue / epilogue emission 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75940 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:49:49 +00:00
Anton Korobeynikov
51f613fb2b Add simple frame index elimination 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75939 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:49:25 +00:00
Anton Korobeynikov
81c0325cdf Provide proper test :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75938 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:48:59 +00:00
Anton Korobeynikov
711d5b68e0 Add address computation stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75935 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:47:59 +00:00
Anton Korobeynikov
c8301d17a8 Add mem-imm stores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75933 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:47:14 +00:00
Anton Korobeynikov
961bb6f430 Add stores and truncstores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75931 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:45:00 +00:00
Anton Korobeynikov
dc28955b3f Add patterns for various extloads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75930 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:44:30 +00:00
Anton Korobeynikov
9e4816e09f Add shifts and reg-imm address matching 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75927 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:43:18 +00:00
Anton Korobeynikov
a51752cbea Add bunch of 32-bit patterns... Uffff :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75926 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:42:31 +00:00
Rafael Espindola
3f2122bea8 Add tests for fixes I committed earlier to the C++ FE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75924 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:35:42 +00:00
Anton Korobeynikov
da308c9a67 Add bunch of reg-imm movs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75921 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:34:50 +00:00
Anton Korobeynikov
89edcd0927 Provide masked reg-imm 'or' and 'and' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:33:57 +00:00
Anton Korobeynikov
c79629536a Fix test running lines 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75918 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:33:21 +00:00
Anton Korobeynikov
e6220fb230 Add reg-reg and pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75917 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:32:49 +00:00
Anton Korobeynikov
bdc9081693 Add sub reg-reg pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75916 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:32:16 +00:00
Anton Korobeynikov
b573f99ab7 Add xor reg-reg pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75915 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:31:28 +00:00
Anton Korobeynikov
26ba0b1ec5 Add or reg-reg pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75914 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:30:53 +00:00
Anton Korobeynikov
0676d2887a Add add reg-reg and reg-imm patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75913 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:30:15 +00:00
Anton Korobeynikov
1cc9dc7267 Add simple reg-reg and reg-imm moves 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75912 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:29:38 +00:00
Anton Korobeynikov
87a24e3ee4 Minimal lowering for formal_arguments / ret 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75911 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:28:59 +00:00
Anton Korobeynikov
b24f97dd74 Add testsuite dir for systemz stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75910 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 13:28:22 +00:00
Richard Osborne
db9e697725 Combine an unaligned store of unaligned load into a memmove. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75908 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 12:50:48 +00:00
Richard Osborne
ccb7e96ef0 Expand unaligned 32 bit loads from an address which is a constant 
offset from a 32 bit aligned base as follows:

  ldw low, base[offset >> 2]
  ldw high, base[(offset >> 2) + 1]
  shr low_shifted, low, (offset & 0x3) * 8
  shl high_shifted, high, 32 - (offset & 0x3) * 8
  or result, low_shifted, high_shifted

Expand 32 bit loads / stores with 16 bit alignment into two 16 bit
loads / stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75902 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 10:42:35 +00:00
Richard Osborne
7f47ce9662 Custom lower unaligned 32 bit stores and loads into libcalls. This is 
a big code size win since before they were expanding to upto 16
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75901 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 10:21:18 +00:00
Evan Cheng
378445303b Let callers decide the sub-register index on the def operand of rematerialized instructions. 
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 09:20:10 +00:00
Chris Lattner
8e25e2d801 implement .include in the lexer/parser instead of passing it into the streamer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75896 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-16 06:14:39 +00:00
Eli Friedman
0c77db32dd Switch invars away from using isTrapping when it really shouldn't be 
using it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75852 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 22:48:29 +00:00
Eli Friedman
fd2934f190 Don't restrict the set of instructions where we try to constant-fold the 
operands; it's possible to end up with a constant-foldable operand to 
most instructions, even those which can't trap.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75845 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 22:13:34 +00:00
Evan Cheng
a499effd3b ShortenDeadCopySrcLiveRange needs to be more conservative in multi-kill situations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75838 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 21:39:50 +00:00
Dale Johannesen
cf20031f60 Fix test so it works on systems where wchar_t != int. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75827 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-15 20:40:53 +00:00