Commit Graph

403 Commits

Author SHA1 Message Date
Dan Gohman
0f8b53f19d Fix a bunch of Doxygen syntax issues. Escape special characters,
and put @file directives on their own comment line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65920 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-03 02:55:14 +00:00
Rafael Espindola
9a58023c6c Refactor TLS code and add some tests. The tests and expected results are:
pic |  declaration | linkage  | visibility |

!pic |  declaration | external | default    | tls1.ll     tls2.ll     | local exec
 pic |  declaration | external | default    | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default    | tls3.ll     tls4.ll     | initial exec
 pic | !declaration | external | default    | tls3-pic.ll tls4-pic.ll | general dynamic

!pic |  declaration | external | hidden     | tls7.ll     tls8.ll     | local exec
 pic |  declaration | external | hidden     | X                       | local dynamic
!pic | !declaration | external | hidden     | tls9.ll     tls10.ll    | local exec
 pic | !declaration | external | hidden     | X                       | local dynamic

!pic |  declaration | internal | default    | tls5.ll     tls6.ll     | local exec
 pic |  declaration | internal | default    | X                       | local dynamic

The ones marked with an X have not been implemented since local dynamic is not implemented.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65632 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-27 13:37:18 +00:00
Dan Gohman
1fdbc1dd4e Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing
ScheduleDAG's TLI member to use const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-07 16:15:20 +00:00
Dale Johannesen
0f502f6f44 Add some DL propagation to places that didn't
have it yet.  More coming.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63673 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 22:26:09 +00:00
Dale Johannesen
ff97d4fe81 Propagation in TargetLowering. Includes passing a DL
into SimplifySetCC which gets called elsewhere.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63583 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 00:47:48 +00:00
Dale Johannesen
f8a0a763d5 Fix build on case-sensitive filesystems (i.e. everybody else)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63448 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 23:20:42 +00:00
Dale Johannesen
7d2ad624fa Make LowerCallTo and LowerArguments take a DebugLoc
argument.  Adjust all callers and overloaded versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-30 23:10:59 +00:00
Dan Gohman
e5af2d3a22 Make x86's BT instruction matching more thorough, and add some
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-29 01:59:02 +00:00
Dan Gohman
f560ffae1f Make isOperationLegal do what its name suggests, and introduce a
new isOperationLegalOrCustom, which does what isOperationLegal
previously did.

Update a bunch of callers to use isOperationLegalOrCustom
instead of isOperationLegal. In some case it wasn't obvious
which behavior is desired; when in doubt I changed then to
isOperationLegalOrCustom as that preserves their previous
behavior.

This is for the second half of PR3376.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 17:46:25 +00:00
Duncan Sands
9fbc7e2e7a Cleanup whitespace and comments, and tweak some
prototypes, in operand type legalization.  No
functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62680 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 09:00:29 +00:00
Sanjiv Gupta
bb326bbe88 Allow targets to legalize operations (with illegal operands) that produces multiple values. For example, a load with an illegal operand (a load produces two values, a value and chain).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62663 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 04:48:39 +00:00
Dan Gohman
c13cf130c4 Make getWidenVectorType const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62265 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 17:34:08 +00:00
Dan Gohman
73e0914848 Const-qualify getPreIndexedAddressParts and friends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62259 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 16:29:45 +00:00
Devang Patel
83489bb770 Use DebugInfo interface to lower dbg_* intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62127 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 00:35:13 +00:00
Duncan Sands
676b9dfe2f Add a note about passing MVT::Other to getSetCCResultType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61756 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 21:33:06 +00:00
Dan Gohman
50b84f44e4 Add <climits>, to get the definition of CHAR_BIT. This should fix
build errors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 19:47:30 +00:00
Dan Gohman
11df7e5157 TargetLowering.h #includes SelectionDAGNodes.h, so it doesn't need its
own OpActionsCapacity magic number; it can just use ISD::BUILTIN_OP_END,
as long as it takes care to round up when needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 19:40:39 +00:00
Dan Gohman
d68a07650c Tidy up #includes, deleting a bunch of unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 17:59:02 +00:00
Duncan Sands
5480c0469e Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType.  In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-01 15:52:00 +00:00
Dan Gohman
0b1d4a798d Clean up the atomic opcodes in SelectionDAG.
This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.

This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 21:37:04 +00:00
Mon P Wang
87c8a8f304 Added support for vector widening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61209 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 20:03:17 +00:00
Bill Wendling
74c3765291 Add sub/mul overflow intrinsics. This currently doesn't have a
target-independent way of determining overflow on multiplication. It's very
tricky. Patch by Zoltan Varga!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60800 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09 22:08:41 +00:00
Dan Gohman
5fb580efd6 Fix the name of ISD::TokenFactor in a comment. Thanks Gabor!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60736 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09 02:18:52 +00:00
Dan Gohman
fb4b58c9aa Clarify a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60685 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08 04:54:58 +00:00
Duncan Sands
1607f05cb7 Change the interface to the type legalization method
ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-01 11:39:25 +00:00
Duncan Sands
25cf2275ff If the type legalizer actually legalized anything
(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types.  I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59960 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-24 14:53:14 +00:00
Duncan Sands
03228089d5 Rename SetCCResultContents to BooleanContents. In
practice these booleans are mostly produced by SetCC,
however the concept is more general.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-23 15:47:28 +00:00
Dale Johannesen
330169fa3e Extend InlineAsm::C_Register to allow multiple specific registers
(actually, code already all worked, only the comment
changed).  Use this to implement 'A' constraint on x86.
Fixes PR 1779.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59266 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-13 21:52:36 +00:00
Mon P Wang
3efcd4a65c Added interface to allow clients to create a MemIntrinsicNode for
target intrinsics that touches memory


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58548 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-01 20:24:53 +00:00
Mon P Wang
0c39719bfc Add initial support for vector widening. Logic is set to widen for X86.
One will only see an effect if legalizetype is not active.  Will move
support to LegalizeType soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30 08:01:45 +00:00
Duncan Sands
9a2c1d3c46 Teach getTypeToTransformTo to return something
sensible for vectors being scalarized.  Note
that this method can't return anything very
sensible when splitting non-power-of-two vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57839 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-20 16:24:25 +00:00
Dan Gohman
6520e20e4f Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)

This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.

This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.

Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.

The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 02:06:02 +00:00
Chris Lattner
6bdcda3d3e Keep track of *which* input constraint matches an output
constraint.  Reject asms where an output has multiple
input constraints tied to it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 16:47:46 +00:00
Chris Lattner
58f15c482a add an assert so that PR2356 explodes instead of running off an
array.  Improve some minor comments, refactor some helpers in
AsmOperandInfo.  No functionality change for valid code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57686 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17 16:21:11 +00:00
Evan Cheng
7f04268176 - Add target lowering hooks that specify which setcc conditions are illegal,
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15 02:05:31 +00:00
Dan Gohman
dd5b58ad7b FastISel support for exception-handling constructs.
- Move the EH landing-pad code and adjust it so that it works
   with FastISel as well as with SDISel.
 - Add FastISel support for @llvm.eh.exception and
   @llvm.eh.selector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 23:54:11 +00:00
Evan Cheng
0329466b6b Rename LoadX to LoadExt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14 21:26:46 +00:00
Bill Wendling
6158d8492c Implement the -fno-builtin option in the front-end, not in the back-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56900 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-01 00:59:58 +00:00
Bill Wendling
6f287b22d2 Add the new `-no-builtin' flag. This flag is meant to mimic the GCC
`-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero"
instead of "__bzero" on Darwin10+. This arguably violates the meaning of this
flag, but is currently sufficient. The meaning of this flag should become more
specific over time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56885 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-30 21:22:07 +00:00
Dale Johannesen
86098bd6a6 Add "inreg" field to CallSDNode (doesn't increase
its size).  Adjust various lowering functions to
pass this info through from CallInst.  Use it to
implement sseregparm returns on X86.  Remove
X86_ssecall calling convention.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56677 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26 19:31:26 +00:00
Evan Cheng
da43bcf624 Properly handle 'm' inline asm constraints. If a GV is being selected for the addressing mode, it requires the same logic for PIC relative addressing, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24 00:05:32 +00:00
Dan Gohman
d57dd5f4e6 Arrange for FastISel code to have access to the MachineModuleInfo
object. This will be needed to support debug info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23 21:53:34 +00:00
Dan Gohman
095cc29f32 Define CallSDNode, an SDNode subclass for use with ISD::CALL.
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.

And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.

CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:54:27 +00:00
Dan Gohman
0586d91bb3 Add X86FastISel support for static allocas, and refences
to static allocas. As part of this change, refactor the
address mode code for laods and stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56066 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 20:11:02 +00:00
Dan Gohman
3df24e667f Create HandlePHINodesInSuccessorBlocksFast, a version of
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 23:12:08 +00:00
Gabor Greif
92362680c1 fix some 80-col violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55565 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 10:09:02 +00:00
Gabor Greif
ba36cb5242 erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:40:38 +00:00
Dale Johannesen
e00a8a2a2e Split the ATOMIC NodeType's to include the size, e.g.
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.

This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad.  This is the alternative.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55457 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 02:44:49 +00:00
Dan Gohman
bb466331e7 Simplify FastISel's constructor argument list, make the FastISel
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 21:05:57 +00:00
Dan Gohman
d4641a254c Add a TargetLowering hook for creating a FastISel object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55009 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 21:26:29 +00:00
Dan Gohman
475871a144 Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27 21:46:04 +00:00
Duncan Sands
126d90770b Rather than having a different custom legalization
hook for each way in which a result type can be
legalized (promotion, expansion, softening etc),
just use one: ReplaceNodeResults, which returns
a node with exactly the same result types as the
node passed to it, but presumably with a bunch of
custom code behind the scenes.  No change if the
new LegalizeTypes infrastructure is not turned on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53137 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-04 11:47:58 +00:00
Dan Gohman
87060f55f2 Update comments to new-style syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52925 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 21:00:56 +00:00
Dan Gohman
9665c2ae79 Reorder the fields in TargetLowering to require less padding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52919 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 20:36:26 +00:00
Dan Gohman
3d3c3e0cfa Change bools to 1-bit bitfields to shrink ArgListEntry slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52918 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 20:33:57 +00:00
Dan Gohman
a44b674a42 Replace some std::vectors that showed up in heap profiling with
SmallVectors. Change the signature of TargetLowering::LowerArguments
to avoid returning a vector by value, and update the two targets
which still use this directly, Sparc and IA64, accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52917 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 20:31:15 +00:00
Duncan Sands
d4b9c17fb7 Disable some DAG combiner optimizations that may be
wrong for volatile loads and stores.  In fact this
is almost all of them!  There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access.  These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used.  Consider
loading an i32 but only using the lower 8 bits.  It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes.  It
is also unwise to make a load/store wider.  For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects.  (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware.  (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several.  For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores).  In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic.  My policy here is
to say that the number of processor operations for
an illegal operation is undefined.  So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok.  It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal!  That is because
operations are marked legal by default, regardless of
whether the type is legal or not.  In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation.  However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal.  So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before.  This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52254 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-13 19:07:40 +00:00
Duncan Sands
4c54067f67 If queried as to whether an operation is legal
for a particular MVT, return false if the type
is illegal rather than barfing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52229 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-12 09:01:30 +00:00
Duncan Sands
8e4eb09b1e Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits.  Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08 20:54:56 +00:00
Duncan Sands
83ec4b6711 Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06 12:08:01 +00:00
Evan Cheng
0ef8de30fa Fix typos and comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51165 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 22:13:02 +00:00
Evan Cheng
f0df03134e Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 08:39:06 +00:00
Evan Cheng
9bfa03c6fd Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 23:04:07 +00:00
Evan Cheng
f86f211ec2 Forgot this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50993 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 20:08:05 +00:00
Evan Cheng
c6c6a3e2b3 Make OpActionsCapacity multiple of 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50917 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-09 21:50:23 +00:00
Mon P Wang
63307c335a Added addition atomic instrinsics and, or, xor, min, and max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05 19:05:59 +00:00
Arnold Schwaighofer
30e62c098b Tail call optimization improvements:
Move platform independent code (lowering of possibly overwritten
arguments, check for tail call optimization eligibility) from
target X86ISelectionLowering.cpp to TargetLowering.h and
SelectionDAGISel.cpp.

Initial PowerPC tail call implementation:

Support ppc32 implemented and tested (passes my tests and
test-suite llvm-test).  
Support ppc64 implemented and half tested (passes my tests).
On ppc tail call optimization is performed if 
  caller and callee are fastcc
  call is a tail call (in tail call position, call followed by ret)
  no variable argument lists or byval arguments
  option -tailcallopt is enabled
Supported:
 * non pic tail calls on linux/darwin
 * module-local tail calls on linux(PIC/GOT)/darwin(PIC)
 * inter-module tail calls on darwin(PIC)
If constraints are not met a normal call will be emitted.

A test checking the argument lowering behaviour on x86-64 was added.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50477 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30 09:16:33 +00:00
Chris Lattner
5a09690446 Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible.  This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:

void test () {
  asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}

Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.

Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??

Incidentally, this was the todo in 
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll

Please do NOT pull this into Tak.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50315 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 00:37:18 +00:00
Chris Lattner
4376fea663 Move a bunch of inline asm code out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50313 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 00:09:47 +00:00
Chris Lattner
5e764233f3 A few inline asm cleanups:
- Make targetlowering.h fit in 80 cols.
  - Make LowerAsmOperandForConstraint const.
  - Make lowerXConstraint -> LowerXConstraint
  - Make LowerXConstraint return a const char* instead of taking a string byref.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50312 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-26 23:02:14 +00:00
Dan Gohman
29e4bdbf27 Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49666 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-14 17:55:48 +00:00
Dan Gohman
ec1f1a8bd2 Clean up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49661 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-14 17:45:20 +00:00
Dan Gohman
707e018423 Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-12 04:36:06 +00:00
Dan Gohman
7d8143f0ef Make isVectorClearMaskLegal's operand list const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49446 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-09 20:09:42 +00:00
Chris Lattner
d27c991ceb Fix "Control reaches the end of non-void function" warnings,
patch by David Chisnall.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48963 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-30 18:22:13 +00:00
Scott Michel
5b8f82e35b Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 15:42:14 +00:00
Evan Cheng
6fd599fa69 Add a target lowering hook to control whether it's worthwhile to compress fp constant.
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47931 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-05 01:30:59 +00:00
Dale Johannesen
28d08fdb9f Interface of getByValTypeAlignment differed between
generic & x86 versions; change generic to follow x86
and improve comments.  Add PPC version (not right
for non-Darwin.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 22:31:51 +00:00
Evan Cheng
fb8075d03f Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-28 00:43:03 +00:00
Dan Gohman
7b8d4a9eef Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt.
Change several cases in SimplifyDemandedMask that don't ever do any
simplifying to reuse the logic in ComputeMaskedBits instead of
duplicating it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47648 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-27 00:25:32 +00:00
Evan Cheng
5c80760fdf Refactor inline asm constraint matching code out of SDIsel into TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47587 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-26 02:33:44 +00:00
Dale Johannesen
08e78b18b8 Pass alignment on ByVal parameters, from FE, all
the way through.  It is now used for codegen.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-22 17:49:45 +00:00
Andrew Lenharth
ab0b949e0e Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47430 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-21 06:45:13 +00:00
Duncan Sands
00fee65fd2 In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended.  It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned".  Currently
isSExt is set when signed, and nothing is
set otherwise.  This should be right for all
calls to standard library routines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-14 17:28:50 +00:00
Dan Gohman
977a76fbb6 Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 22:28:48 +00:00
Dan Gohman
fd29e0eb06 Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47039 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 00:35:47 +00:00
Duncan Sands
04feb51886 Add arbitrary integer support to getRegisterType and
getNumRegisters.  This is needed for calling functions
with apint parameters or return values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46956 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-11 11:09:23 +00:00
Duncan Sands
0753fc1850 Add a isBigEndian method to complement isLittleEndian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46954 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-11 10:37:04 +00:00
Evan Cheng
ff9b373e8f Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert
instruction at the end.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-30 18:18:23 +00:00
Dale Johannesen
ba2a0b960e Handle 'X' constraint in asm's better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46485 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-29 02:21:21 +00:00
Duncan Sands
a095db13bf Add more assertions to catch accesses outside of
arrays.  Also, as a convenience, don't barf, just
return false, if someone calls isTruncStoreLegal
or isLoadXLegal with an extended type for the in
memory type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46352 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-25 10:20:53 +00:00
Evan Cheng
2928650262 Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare contains SSE vector(s). For x86-64, it's max of 8 or alignment of the type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46286 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-23 23:17:41 +00:00
Chris Lattner
561e8c80f5 remove magic numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46162 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-18 17:13:03 +00:00
Chris Lattner
ddf89566a9 This commit changes:
1. Legalize now always promotes truncstore of i1 to i8. 
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
   X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
   safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
	fldt	20(%esp)
	fldt	4(%esp)
	faddp	%st(1)
	movl	36(%esp), %eax
	fstps	(%eax)
	ret

instead of:

_foo:
	subl	$4, %esp
	fldt	24(%esp)
	fldt	8(%esp)
	faddp	%st(1)
	fstps	(%esp)
	movl	40(%esp), %eax
	movss	(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$4, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17 19:59:44 +00:00
Chris Lattner
7ed47a1335 Don't attribute in file headers anymore. See llvmdev for the
discussion of this change.  Boy are my fingers tired. ;-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45411 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 19:59:42 +00:00
Chris Lattner
b16f55f3c8 Tell TargetLoweringOpt whether it is running before
or after legalize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45321 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-22 20:56:36 +00:00
Chris Lattner
27a6c7380f Several changes:
1) Change the interface to TargetLowering::ExpandOperationResult to 
   take and return entire NODES that need a result expanded, not just
   the value.  This allows us to handle things like READCYCLECOUNTER,
   which returns two values.
2) Implement (extremely limited) support in LegalizeDAG::ExpandOp for MERGE_VALUES.
3) Reimplement custom lowering in LegalizeDAGTypes in terms of the new
   ExpandOperationResult.  This makes the result simpler and fully 
   general.
4) Implement (fully general) expand support for MERGE_VALUES in LegalizeDAGTypes.
5) Implement ExpandOperationResult support for ARM f64->i64 bitconvert and ARM
   i64 shifts, allowing them to work with LegalizeDAGTypes.
6) Implement ExpandOperationResult support for X86 READCYCLECOUNTER and FP_TO_SINT,
   allowing them to work with LegalizeDAGTypes.

LegalizeDAGTypes now passes several more X86 codegen tests when enabled and when
type legalization in LegalizeDAG is ifdef'd out.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44300 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-24 07:07:01 +00:00
Evan Cheng
cc41586b9d Much improved pic jumptable codegen:
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 01:32:10 +00:00
Hartmut Kaiser
a1dc96edd2 Fixed compilation errors on VC++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43836 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-07 19:33:31 +00:00
Rafael Espindola
f1ba1cad38 Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
Thanks for the suggestions Bill :-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 23:12:20 +00:00
Evan Cheng
3c3ddb3a85 Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43465 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 19:58:20 +00:00
Evan Cheng
2bd122c4d9 Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free.
e.g.
Turns this loop:
LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
        movw    %dx, %si
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %edi
        movw    %si, (%edi)
        movl    L_Y$non_lazy_ptr, %edi
        movw    %dx, (%edi)
		addw    $4, %dx
		incw    %si
		incl    %ecx
		cmpl    %eax, %ecx
		jne     LBB1_2  # bb
	
into

LBB1_1: # entry.bb_crit_edge
        xorl    %ecx, %ecx
        xorw    %dx, %dx
LBB1_2: # bb
        movl    L_X$non_lazy_ptr, %esi
        movw    %cx, (%esi)
        movl    L_Y$non_lazy_ptr, %esi
        movw    %dx, (%esi)
        addw    $4, %dx
		incl    %ecx
        cmpl    %eax, %ecx
        jne     LBB1_2  # bb


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43375 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-26 01:56:11 +00:00
Chris Lattner
1c4d492b94 rename ExpandOperation to ExpandOperationResult, as suggested
by Duncan


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43177 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 15:28:47 +00:00
Chris Lattner
f58dac3169 add a new target hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43165 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 03:31:45 +00:00
Duncan Sands
f411b83c8c Return Expand from getOperationAction for all extended
types.  This is needed for SIGN_EXTEND_INREG at least.
It is not clear if this is correct for other operations.
On the other hand, for the various load/store actions
it seems to correct to return the type action, as is
currently done.
Also, it seems that SelectionDAG::getValueType can be
called for extended value types; introduce a map for
holding these, since we don't really want to extend
the vector to be 2^32 pointers long!
Generalize DAGTypeLegalizer::PromoteResult_TRUNCATE
and DAGTypeLegalizer::PromoteResult_INT_EXTEND to handle
the various funky possibilities that apints introduce,
for example that you can promote to a type that needs
to be expanded.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43071 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-17 13:49:58 +00:00
Duncan Sands
af47b11b95 Initial infrastructure for arbitrary precision integer
codegen support.  This should have no effect on codegen
for other types.  Debatable bits: (1) the use (abuse?)
of a set in SDNode::getValueTypeList; (2) the length of
getTypeToTransformTo, which maybe should be refactored
with a non-inline part for extended value types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43030 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-16 09:56:48 +00:00
Chris Lattner
1622768794 Fix 80 col violation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42976 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-15 05:30:27 +00:00
Arnold Schwaighofer
48abc5cf6b Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:30:57 +00:00
Arnold Schwaighofer
c85e1716f0 Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 19:40:01 +00:00
Dale Johannesen
f1fc3a8fa6 Fix PR 1681. When X86 target uses +sse -sse2,
keep f32 in SSE registers and f64 in x87.  This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42246 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-23 14:52:20 +00:00
Owen Anderson
718cb665ca Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 04:06:50 +00:00
Dale Johannesen
f04afdbb48 Change LegalFPImmediates to use APFloat.
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41587 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 00:23:21 +00:00
Dan Gohman
81975f6dfd Add explicit keywords and remove spurious trailing semicolons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-27 14:50:10 +00:00
Chris Lattner
48884cd80b rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
changing the interface to allow for future changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-25 00:47:38 +00:00
Rafael Espindola
21485be444 Partial implementation of calling functions with byval arguments:
*) The needed information is propagated to the DAG
 *) The X86-64 backend detects it and aborts


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41179 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-20 15:18:24 +00:00
Dale Johannesen
ab081c7195 Update per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40965 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 17:27:48 +00:00
Dale Johannesen
5411a3937f long double 9 of N. This finishes up the X86-32 bits
(constants are still not handled).  Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-09 01:04:01 +00:00
Dan Gohman
c2bbfc18e9 More explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40673 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01 15:32:29 +00:00
Duncan Sands
36397f5034 Support for trampolines, except for X86 codegen which is
still under discussion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27 12:58:54 +00:00
Dan Gohman
b6f5b00c3b Add new TargetLowering code to provide the final register type that an
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.

Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37781 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-28 23:29:44 +00:00
Dan Gohman
6595cb3000 Rename ("shrinkify") MVT::isExtendedValueType to MVT::isExtendedVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 16:08:04 +00:00
Dan Gohman
4d2a0f5bd6 Replace ?: with if statements, for clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37735 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 16:19:08 +00:00
Dan Gohman
71d7794856 Simplify the expression for TargetLowering::isTypeLegal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37732 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 15:16:27 +00:00
Dan Gohman
7f32156bb9 Generalize MVT::ValueType and associated functions to be able to represent
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.

This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 16:23:39 +00:00
Dan Gohman
ea859be53c Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 14:59:07 +00:00
Dan Gohman
b9f1019696 Rename TargetLowering::getNumElements and friends to
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37687 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-21 14:42:22 +00:00
Evan Cheng
59aefd15e5 Target specific ifcvt code duplication limit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37384 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 08:25:24 +00:00
Evan Cheng
f48ae4630b Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37191 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-18 00:00:30 +00:00
Evan Cheng
d60483ef99 Add target hook to specify block size limit for if-conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37134 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-16 23:45:53 +00:00
Chris Lattner
4c27344bfd add a default parameter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36529 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-28 05:42:38 +00:00
Anton Korobeynikov
bed2946a96 Removed tabs everywhere except autogenerated & external files. Add make
target for tabs checking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-16 18:10:23 +00:00
Chris Lattner
2b95fd67da remove dead target hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35847 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 23:34:08 +00:00
Chris Lattner
b445d0cbb9 remove some dead target hooks, subsumed by isLegalAddressingMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 22:27:04 +00:00
Chris Lattner
050d541d08 add a default ctor for AddrMode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35832 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09 21:18:34 +00:00
Chris Lattner
d2f340b746 switch TL::getValueType to use MVT::getValueType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35527 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31 04:05:24 +00:00
Chris Lattner
1436bb657d add one addressing mode description hook to rule them all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35520 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30 23:14:50 +00:00
Evan Cheng
caaf69107e Remove isLegalAddressImmediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28 01:53:55 +00:00
Chris Lattner
4234f57fa0 switch TargetLowering::getConstraintType to take the entire constraint,
not just the first letter.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25 02:14:49 +00:00
Dale Johannesen
fa4bce2b76 repair x86 performance, dejagnu problems from previous change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 21:51:52 +00:00
Dale Johannesen
8e59e163db do not share old induction variables when this would result in invalid
instructions (that would have to be split later)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 21:54:54 +00:00
Evan Cheng
14245a9d62 Added isLegalAddressExpression hook to test if the given expression can be
folded into target addressing mode for the given type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:42:32 +00:00
Evan Cheng
4603b402eb More flexible TargetLowering LSR hooks for testing whether an immediate is
a legal target address immediate or scale.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35071 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:26:27 +00:00
Anton Korobeynikov
d0b82b301d Refactoring of formal parameter flags. Enable properly use of
zext/sext/aext stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-07 16:25:09 +00:00
Jim Laskey
2bc210d99f Simplify lowering and selection of exception ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34491 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-22 15:37:19 +00:00
Reid Spencer
ac9dcb94dd For PR1195:
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34300 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-15 03:39:18 +00:00
Reid Spencer
9d6565a5b1 For PR1195:
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34293 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-15 02:26:10 +00:00
Evan Cheng
fa1eb27b76 Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34065 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-08 22:13:59 +00:00
Anton Korobeynikov
b25fe82671 Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33752 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 08:39:52 +00:00
Evan Cheng
d385fd62cb Allow the target to override the ISD::CondCode that's to be used to test the
result of the comparison libcall against zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33701 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-31 09:29:11 +00:00
Nate Begeman
bcc5f36765 Finish off bug 680, allowing targets to custom lower frame and return
address nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29 22:58:52 +00:00
Anton Korobeynikov
b10308e440 Propagate changes from my local tree. This patch includes:
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-28 13:31:35 +00:00
Reid Spencer
c254b1d666 Don't #include DerivedTypes.h in this header. Make adjustments to
compensate. Move a function out of line to TargetLowering.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-12 23:21:42 +00:00
Evan Cheng
495600120e - Move RTLIB::Libcall enum to a separate file.
- Code clean up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33148 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-12 22:49:32 +00:00
Evan Cheng
9f7f49caa4 Silence a bogus compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33145 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-12 22:30:07 +00:00
Reid Spencer
a54b7cbd45 For PR1064:
Implement the arbitrary bit-width integer feature. The feature allows
integers of any bitwidth (up to 64) to be defined instead of just 1, 8,
16, 32, and 64 bit integers.

This change does several things:
1. Introduces a new Derived Type, IntegerType, to represent the number of
   bits in an integer. The Type classes SubclassData field is used to
   store the number of bits. This allows 2^23 bits in an integer type.
2. Removes the five integer Type::TypeID values for the 1, 8, 16, 32 and
   64-bit integers. These are replaced with just IntegerType which is not
   a primitive any more.
3. Adjust the rest of LLVM to account for this change.

Note that while this incremental change lays the foundation for arbitrary
bit-width integers, LLVM has not yet been converted to actually deal with
them in any significant way. Most optimization passes, for example, will
still only deal with the byte-width integer types.  Future increments
will rectify this situation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33113 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-12 07:05:14 +00:00
Evan Cheng
56966225d1 Store default libgcc routine names and allow them to be redefined by target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33105 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-12 02:11:51 +00:00
Reid Spencer
4fe16d607d Rename BoolTy as Int1Ty. Patch by Sheng Zhou.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33076 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-11 18:21:29 +00:00
Evan Cheng
257464a072 - Remove isSetCCExpensive() etc. These are no longer used.
- Add isSelectExpensive() etc. It's used to tell codegen that select is expensive for a given target, avoid using it if possible. Currently it's only
used to expand FCOPYSIGN.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32939 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-05 23:31:08 +00:00
Reid Spencer
2ba767f44a For PR950:
Change integer type names for signless integer types


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32777 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-31 05:23:18 +00:00
Evan Cheng
975651ab98 Add getTypeToExpandTo() which recursively walks TransformToType to determine
the intrinsic type to expand to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32558 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-13 20:52:00 +00:00
Evan Cheng
6586adfc1a Update comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32532 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-13 06:12:35 +00:00
Evan Cheng
b9d89c9ffb Update comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32531 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-13 06:09:03 +00:00
Anton Korobeynikov
d27a258d2d Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-10 23:12:42 +00:00
Evan Cheng
5ff839fbab Add a mechanism to specify whether a target supports a particular indexed load / store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31597 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 18:56:43 +00:00
Evan Cheng
144d8f09e1 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 17:55:04 +00:00
Evan Cheng
d258efaf6e getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-09 04:29:46 +00:00
Evan Cheng
a7bb6498fe Added target hook for post-indexed memory ops transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31499 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-07 09:04:16 +00:00
Evan Cheng
1a854be352 Rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31413 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 07:21:16 +00:00
Evan Cheng
24d9cf025d Added a target specific hook to check whether / how a node can be transformed
into a pair of base / offset nodes for pre-indexed load / store ops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31407 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 03:04:06 +00:00
Chris Lattner
a74b4a3ddc generalize this api
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31365 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02 01:39:10 +00:00
Chris Lattner
dba1aeedd8 Change the prototype for TargetLowering::isOperandValidForConstraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 19:40:43 +00:00
Evan Cheng
8b2794aeff Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
Evan Cheng
24446e253a Merging ISD::LOAD and ISD::LOADX. Added LoadSDNode to represent load nodes.
Chain and address ptr remains as operands. SrcValue, extending mode, extending
VT (or rather loaded VT before extension) are now instance variables of
LoadSDNode.

Introduce load / store addressing modes to represent pre- and post-indexed
load and store. Also added an additional operand offset that is only used in
post-indexed mode (i.e. base ptr += offset after load/store).

Added alignment info (not yet used) and isVolatile fields.


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2006-10-09 20:55:20 +00:00
Chris Lattner
428e75eaef Add support for targets to declare that they use a GOT
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2006-10-06 22:46:34 +00:00
Evan Cheng
c548428c5d Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.


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2006-10-04 00:56:09 +00:00
Duraid Madina
2a0013f59f add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example


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2006-09-04 06:21:35 +00:00
Andrew Lenharth
232c910b8a Start on my todo list
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2006-06-12 16:07:18 +00:00
Reid Spencer
19b7e0e0ca For PR786:
Minor tweaks in public headers and a few .cpp files so that LLVM can build
successfully with -pedantic and projects using LLVM with -pedantic don't
get warnings from LLVM. There's still more -pedantic warnings to fix.


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2006-05-24 19:21:13 +00:00
Evan Cheng
7e399c14ab Another typo. Pointed out by Nate Begeman.
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2006-05-17 18:22:14 +00:00
Evan Cheng
5beaacc189 Fix a mis-leading comment.
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2006-05-17 18:08:20 +00:00
Chris Lattner
6cacaee724 There is now a default impl of this method
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2006-05-16 22:52:11 +00:00
Andrew Lenharth
dae9cbe8d4 Move this code to a common place
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2006-05-16 17:42:15 +00:00
Chris Lattner
a0d513ba75 Add some new methods for computing sign bit information.
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2006-05-06 09:26:22 +00:00
Owen Anderson
a69571c799 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.


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2006-05-03 01:29:57 +00:00
Evan Cheng
c313c66a88 Added a virtual method isVectorClearMaskLegal to TLI. It is similar to
isShuffleMaskLegal, used to determine if it makes sense to turn a
"vector clear" (e.g. pand V, <0, -1, 0, -1> to a shuffle of the vector and
a zero vector.


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2006-04-20 08:54:13 +00:00
Chris Lattner
b878151b1e Provide a default impl of LowerArguments
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2006-04-12 16:21:12 +00:00
Chris Lattner
c45420ddd2 Move isShuffleLegal from TLI to Legalize.
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2006-04-04 17:21:22 +00:00
Chris Lattner
e6bfffbae2 Allow targets to have fine grained control over which types various ops get
promoted to, if they desire.


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2006-04-04 00:25:10 +00:00
Chris Lattner
79227e2906 Modify the TargetLowering::getPackedTypeBreakdown method to also return the
unpromoted element type.


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2006-03-31 00:46:36 +00:00
Chris Lattner
00cc494595 Add a method useful for decimating vectors.
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2006-03-31 00:28:23 +00:00
Evan Cheng
ca6e8eafd2 Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do
64-bit vector shuffle.


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2006-03-22 22:07:06 +00:00
Chris Lattner
dc26e32ec7 Add some helper methods
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2006-03-20 00:55:52 +00:00
Evan Cheng
714554d707 Added a way for TargetLowering to specify what values can be used as the
scale component of the target addressing mode.


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2006-03-16 21:47:42 +00:00
Evan Cheng
30b37b5f29 Add LSR hooks.
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2006-03-13 23:18:16 +00:00
Chris Lattner
1566d18fe2 custom lowered nodes are legal too
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2006-03-05 23:49:19 +00:00
Evan Cheng
33143dce15 Number of NodeTypes now exceeds 128.
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2006-03-03 06:58:59 +00:00
Chris Lattner
00ffed0468 Add interfaces for targets to provide target-specific dag combiner optimizations.
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2006-03-01 04:52:55 +00:00
Evan Cheng
bf57e1f456 Missing a cast previously.
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2006-03-01 00:58:54 +00:00
Chris Lattner
5ee3e14127 Add C_Memory operand type
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2006-02-24 01:10:14 +00:00
Chris Lattner
410354fe0c Make the LLVM headers "-ansi -pedantic -Wno-long-long" clean.
Patch by Martin Partel!


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2006-02-22 16:23:43 +00:00