Johnny Chen
12360917ef
Fixed a couple of places for Thumb MOV where encoding bits are underspecified.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93349 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 21:00:26 +00:00
Jakob Stoklund Olesen
15913c999e
Fix pasto
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 19:54:39 +00:00
Chris Lattner
09533a404c
upgrade and MC'ize a few uses of makeNameProper.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 08:08:33 +00:00
Chris Lattner
4813035b72
change Mangler::makeNameProper to return its result in a SmallVector
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instead of returning it in an std::string. Based on this change:
1. Change TargetLoweringObjectFileCOFF::getCOFFSection to take a StringRef
2. Change a bunch of targets to call makeNameProper with a smallstring,
making several of them *much* more efficient.
3. Rewrite Mangler::makeNameProper to not build names and then prepend
prefixes, not use temporary std::strings, and to avoid other crimes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93298 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 06:38:18 +00:00
Jakob Stoklund Olesen
c5b7ef1519
Remove the JustSP single-register regclass.
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It was only being used by instructions with the t_addrmode_sp addressing mode,
and that is pattern matched in a way that guarantees SP is used. There is
never any register allocation done from this class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93280 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 00:43:06 +00:00
Johnny Chen
d248ffb7d5
Minor change, change the order of two "let Inst{...}" stmts within multiclass
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T2I_bin_ii12rs definition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-08 17:41:33 +00:00
Jim Grosbach
9631864688
80 column violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92876 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06 23:54:42 +00:00
Jakob Stoklund Olesen
30ac0467ce
Add Target hook to duplicate machine instructions.
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Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92873 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06 23:47:07 +00:00
Jim Grosbach
ce3e769c15
Addressing mode 6 (load/store) instructions can't encode an immediate offset
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for stack references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92871 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-06 23:45:18 +00:00
Johnny Chen
8314299161
Undo r92785, it caused test failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92796 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 22:37:28 +00:00
Johnny Chen
83f1136cfd
Add Rt2 to the asm format string for 32-bit Thumb load/store register dual
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instructions. Thumb does not have the restriction that t2 = t+1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92785 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 21:51:46 +00:00
Dan Gohman
eeb3a00b84
Change SelectCode's argument from SDValue to SDNode *, to make it more
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clear what information these functions are actually using.
This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 01:24:18 +00:00
Benjamin Kramer
e55b15fa47
Add missing include (for inline PATypeHolder::get).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92222 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 12:27:56 +00:00
Bill Wendling
9bf50f45e7
Remove dead variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92193 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 01:57:39 +00:00
Bill Wendling
079b6f5ee5
Add an "ATTRIBUTE_UNUSED" macro (and use it). It's for variables which are
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mainly used in debugging and/or assert situations. It should make the compiler
and the static analyzer stop nagging us about them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92181 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28 01:20:29 +00:00
Jakob Stoklund Olesen
1dbc38f52e
Move kill flags when the same register occurs more than once in a sequence.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92058 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:34:03 +00:00
Jakob Stoklund Olesen
158a2263bd
Handle undef operands properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:28:42 +00:00
Jakob Stoklund Olesen
6528966eae
Make insert position available to MergeOpsUpdate.
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Rearrange arguments.
No functional changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:28:37 +00:00
Jakob Stoklund Olesen
3063aed8d2
Perform kill flag calculations in new method. No functional changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:28:31 +00:00
Jakob Stoklund Olesen
f8e33e513f
Move repeated code to a new method. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-23 21:28:23 +00:00
Jakob Stoklund Olesen
24b34f8f3e
Add a SPR register class to the ARM target.
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Certain Thumb instructions require only SP (e.g. tSTRspi).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91944 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 23:54:44 +00:00
Jakob Stoklund Olesen
e9912dc553
Use proper move instructions. Make the verifier happy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91914 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 18:49:55 +00:00
Bill Wendling
3ea3c24619
Add more plumbing. This time in the LowerArguments and "get" functions which
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return partial registers. This affected the back-end lowering code some.
Also patch up some places I missed before in the "get" functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-22 02:10:19 +00:00
Evan Cheng
102ebf16b6
Delete the instruction just before the function terminates for consistency sake.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91836 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-21 19:53:39 +00:00
Douglas Gregor
cabdd7425d
Fix a bunch of little errors that Clang complains about when its being pedantic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 07:05:23 +00:00
Rafael Espindola
fda60d35c2
Fix libstdc++ build on ARM linux and part of PR5770.
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MI was not being used but it was also not being deleted, so it was kept in the garbage list. The memory itself was freed once the function code gen was done.
Once in a while the codegen of another function would create an instruction on the same address. Adding it to the garbage group would work once, but when another pointer was added it would cause an assert as "Cache" was about to be pushed to Ts.
For a patch that make us detect problems like this earlier, take a look at
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20091214/092758.html
With that patch we assert as soon and the new instruction is added to the garbage set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91691 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 16:59:39 +00:00
Bob Wilson
5afffaed5c
Handle ARM inline asm "w" constraints with 64-bit ("d") registers.
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The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types. Radar 7457110.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-18 01:03:29 +00:00
Johnny Chen
caedfbc6ae
Renamed "tCMNZ" to "tCMNz" to be consistent with other similar namings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 23:36:52 +00:00
John McCall
6eeccd4aa4
Silence a clang warning about the deprecated (but perfectly reasonable in
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context) increment-of-bool idiom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91564 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 20:31:50 +00:00
Jim Grosbach
587b072f23
Mark STREX* as earlyclobber for the success result register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 19:44:06 +00:00
Johnny Chen
bbc71b2904
Add encoding bits for some Thumb instructions. Plus explicitly set the top two
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bytes of Inst to 0x0000 for the benefit of the Thumb decoder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 02:32:54 +00:00
John McCall
bd13cb911c
Every anonymous namespace is different. Caught by clang++.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91481 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 00:15:28 +00:00
Jeffrey Yasskin
32d7e6ebde
Change indirect-globals to use a dedicated allocIndirectGV. This lets us
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remove start/finishGVStub and the BufferState helper class from the
MachineCodeEmitter interface. It has the side-effect of not setting the
indirect global writable and then executable on ARM, but that shouldn't be
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91464 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 22:42:46 +00:00
Johnny Chen
d68e119c0f
Added encoding bits for the Thumb ISA. Initial checkin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 17:24:14 +00:00
Jim Grosbach
c67b556b5b
nand atomic requires opposite operand ordering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91371 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-15 00:12:35 +00:00
Johnny Chen
ec689151f2
Add encoding bits "let Inst{11-4} = 0b00000000;" to BR_JTr to disambiguate
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between BR_JTr and STREXD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91339 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 21:51:34 +00:00
Jim Grosbach
80dd125e17
v6 sync insn copy/paste error
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91333 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 21:33:32 +00:00
Jim Grosbach
7c03dbd8ed
Add ARMv6 memory and sync barrier instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 21:24:16 +00:00
Johnny Chen
c474796438
Fixed encoding bits typo of ldrexd/strexd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91327 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 21:01:46 +00:00
Jim Grosbach
a36c8f2c2e
Thumb2 atomic operations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91321 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 20:14:59 +00:00
Jim Grosbach
a623f5a58d
correct selection requirements for thumb2 vs. arm versions of the barrier intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91313 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 19:24:11 +00:00
Jim Grosbach
c219e4dd59
add Thumb2 atomic and memory barrier instruction definitions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91310 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 18:56:47 +00:00
Jim Grosbach
015d3b5704
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91307 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 18:36:32 +00:00
Jim Grosbach
f6b2862e81
ARM memory barrier instructions are not predicable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91305 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 18:31:20 +00:00
Jim Grosbach
d7d72d66b7
add ldrexd/strexd instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91284 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 17:02:55 +00:00
Jim Grosbach
c3c2354ec9
atomic binary operations up to 32-bits wide.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91260 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-14 04:22:04 +00:00
Jim Grosbach
e801dc4a7b
Framework for atomic binary operations. The emitter for the pseudo instructions
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just issues an error for the moment. The front end won't yet generate these
intrinsics for ARM, so this is behind the scenes until complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-12 01:40:06 +00:00
Jim Grosbach
c8f9e4fdc5
memory barrier instructions by definition have side effects. This prevents the post-RA scheduler from moving them around.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 20:29:53 +00:00
Johnny Chen
0291d7ed09
Store Register Exclusive should leave the source register Inst{3-0} unspecified.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 19:37:26 +00:00
Jim Grosbach
66869104dd
Update properties.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91140 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 18:52:41 +00:00
Jim Grosbach
5278eb802f
Rough first pass at compare_and_swap atomic builtins for ARM mode. Work in progress.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11 01:42:04 +00:00
Jim Grosbach
cbd77d2cb1
Add instruction encoding for DMB/DSB
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91053 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 18:35:32 +00:00
Jim Grosbach
3728e96a6c
Add memory barrier intrinsic support for ARM. Moving towards adding the atomic operations intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91003 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-10 00:11:09 +00:00
Evan Cheng
d831cda3e7
- Support inline asm 'w' constraint for 128-bit vector types.
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- Also support the 'q' NEON registers asm code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90894 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-08 23:06:22 +00:00
Anton Korobeynikov
7cca606aaa
Dynamic stack realignment use of sp register as source/dest register
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in "bic sp, sp, #15 " leads to unpredicatble behaviour in Thumb2 mode.
Emit the following code instead:
mov r4, sp
bic r4, r4, #15
mov sp, r4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90724 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-06 22:39:50 +00:00
Dan Gohman
864e2efce2
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
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MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-05 00:44:40 +00:00
Jim Grosbach
4dc4a61c0c
remove out of date FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90490 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 21:55:01 +00:00
Chris Lattner
56856b1f46
fix a build problem with VC++, PR5664, patch by Alp Toker!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90419 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 06:58:32 +00:00
Bob Wilson
324f4f1633
Recognize canonical forms of vector shuffles where the same vector is used for
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both source operands. In the canonical form, the 2nd operand is changed to an
undef and the shuffle mask is adjusted to only reference elements from the 1st
operand. Radar 7434842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 06:40:55 +00:00
Chris Lattner
7896c9f436
improve portability to avoid conflicting with std::next in c++'0x.
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Patch by Howard Hinnant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03 00:50:42 +00:00
Jim Grosbach
e27d205d5d
Factor the stack alignment calculations out into a target independent pass.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-02 19:30:24 +00:00
Jim Grosbach
d122874996
Thumb1 exception handling setjmp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 18:10:36 +00:00
Johnny Chen
b731e87649
For VLDM/VSTM (Advanced SIMD), set encoding bits Inst{11-8} to 0b1011.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90243 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 17:37:06 +00:00
Johnny Chen
208d76cad9
For VMOV (immediate), make some of the encoding bits (cmode and op) unspecified.
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For VMOVv*i[16,32], op bit is don't care, and some cmode bits vary depending on
the immediate values.
Ref: Table A7-15 Modified immediate values for Advanced SIMD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90173 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-01 00:02:02 +00:00
Bob Wilson
15217e63bc
Remove isProfitableToDuplicateIndirectBranch target hook. It is profitable
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for all the processors where I have tried it, and even when it might not help
performance, the cost is quite low. The opportunities for duplicating
indirect branches are limited by other factors so code size does not change
much due to tail duplicating indirect branches aggressively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 18:35:03 +00:00
Bob Wilson
afa1df467b
Fix some more ARM unified syntax warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90141 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-30 17:47:19 +00:00
Bob Wilson
f8c4cfb7cc
Refactor target hook for tail duplication as requested by Chris.
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Make tail duplication of indirect branches much more aggressive (for targets
that indicate that it is profitable), based on further experience with
this transformation. I compiled 3 large applications with and without
this more aggressive tail duplication and measured minimal changes in code
size. ("size" on Darwin seems to round the text size up to the nearest
page boundary, so I can only say that any code size increase was less than
one 4k page.) Radar 7421267.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89814 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 23:35:49 +00:00
Evan Cheng
d7f0810c93
Enable predication of NEON instructions in Thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89748 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 08:06:15 +00:00
Evan Cheng
9d172d5ee7
Data type suffix must come after predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 01:05:23 +00:00
Anton Korobeynikov
5cdc3a949a
Materialize global addresses via movt/movw pair, this is always better
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than doing the same via constpool:
1. Load from constpool costs 3 cycles on A9, movt/movw pair - just 2.
2. Load from constpool might stall up to 300 cycles due to cache miss.
3. Movt/movw does not use load/store unit.
4. Less constpool entries => better compiler performance.
This is only enabled on ELF systems, since darwin does not have needed
relocations (yet).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 00:44:37 +00:00
Jim Grosbach
6935efcb66
80 column violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89718 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 00:20:27 +00:00
Jeffrey Yasskin
108c838093
* Move stub allocation inside the JITEmitter, instead of exposing a
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way for each TargetJITInfo subclass to allocate its own stubs. This
means stubs aren't as exactly-sized anymore, but it lets us get rid of
TargetJITInfo::emitFunctionStubAtAddr(), which lets ARM and PPC
support the eager JIT, fixing http://llvm.org/PR4816 .
* Rename the JITEmitter's stub creation functions to describe the kind
of stub they create. So far, all of them create lazy-compilation
stubs, but they sometimes get used when far-call stubs are needed.
Fixing http://llvm.org/PR5201 will involve fixing this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 23:35:19 +00:00
Dan Gohman
735afe14ee
Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.
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Note that "hasDotLocAndDotFile"-style debug info was already broken;
people wanting this functionality should implement it in the
AsmPrinter/DwarfWriter code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89711 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 23:20:51 +00:00
Jeffrey Yasskin
0261d795f8
Allow more than one stub to be being generated at the same time.
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It's probably better in the long run to replace the
indirect-GlobalVariable system. That'll be done after a subsequent
patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89708 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 22:49:00 +00:00
Evan Cheng
f81bf15552
Massive refactoring of NEON instructions. Separate opcode from data size specifier suffix, move \t up stream to instruction format, and fix more 80 column violations.
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This fixes the NEON asm printing so the "predicate" field is printed between the opcode and the data type suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:57:23 +00:00
Jim Grosbach
77b02beb1f
move fconst[sd] to UAL. <rdar://7414913>
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89700 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:08:25 +00:00
Johnny Chen
da1aea4d75
Partially revert r84730 by removing N2VDup from ARMInstrFormats.td and modifying
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VDUPLND and VDUPLNQ to derive from N2V instead of N2VDup. VDUPLND and VDUPLNQ
now expect op19_18 and op17_16 as the first two args.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89699 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 21:00:43 +00:00
Jim Grosbach
15e6ef886d
fold immediate of a + Const into the user as a subtract if it can fit as a negated two-part immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89694 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 20:35:53 +00:00
Johnny Chen
b16ed11cb4
Revert r84572 by removing N3VImm from ARMInstrFormats.td now that we can specify
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{?,?,?,?} as op11_8 for VEXTd and VEXTq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 20:09:13 +00:00
Johnny Chen
7ebd32a1b8
Partially revert r89377 by removing NLdStLN class definition from
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ARMInstrFormats.td and fixing VLD[234]LN* and VST[234]LN* to derive from NLdSt
instead of NLdStLN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89684 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 18:16:16 +00:00
Johnny Chen
131c4a5257
Make it clear that the index bit(s) of Vector Get Lane and Vector Set Lane
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should be left unspecified now that Bob Wilson has fixed pr5470.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89676 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 17:48:17 +00:00
David Goodwin
7776452a18
Minor itinerary fixes for FP instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89672 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-23 17:34:12 +00:00
Jim Grosbach
a37aa54622
Move default FrameReg val to getFrameIndexReference(). Otherwise, debug info can get bogus values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89618 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 20:05:32 +00:00
Jim Grosbach
50f8516d2d
Generate more correct debug info for frame indices.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 02:32:29 +00:00
Jim Grosbach
21ce2e3c74
Revert 89562. We're being sneakier than I was giving us credit for, and this
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isn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89568 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 23:34:09 +00:00
Jim Grosbach
f3b33d0b2a
Darwin requires a frame pointer for all non-leaf functions to support correct
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backtraces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 21:40:08 +00:00
Evan Cheng
ac0869dc8a
Add predicate operand to NEON instructions. Fix lots (but not all) 80 col violations in ARMInstrNEON.td.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 06:21:52 +00:00
Devang Patel
bef8888a91
We are not using DBG_STOPPOINT anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89536 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 02:46:55 +00:00
Evan Cheng
4aedb61d03
Remat VLDRD from constpool. Clean up some instruction property specifications.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89478 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:57:15 +00:00
Jim Grosbach
a9562568e5
The verify() call of CPEIsInRange() isn't right for the assertion check of
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constant pool ranges, as CPEIsInRange() makes conservative assumptions about
the potential alignment changes from branch adjustments. The verification,
on the other hand, runs after those branch adjustments are made, so the
effects on alignment are known and already taken into account. The sanity
check in verify should check the range directly instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89473 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 19:37:38 +00:00
Jim Grosbach
de8b1dbf95
Remove verifySizes() since it's not adding much value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89443 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:32:06 +00:00
Evan Cheng
9b82425cb0
Also CSE non-pic load from constant pools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 02:10:27 +00:00
Evan Cheng
9ef4835bd8
Fix codegen of conditional move of immediates. We were not making use of the immediate forms of cmov instructions at all.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 00:54:03 +00:00
Eric Christopher
0dde97156c
Update comment to reflect instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89414 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 00:21:55 +00:00
Jim Grosbach
4d8e90a026
When placing constant islands and adjusting for alignment padding, inline
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assembly can confuse things utterly, as it's assumed that instructions in
inline assembly are 4 bytes wide. For Thumb mode, that's often not true,
so the calculations for when alignment padding will be present get thrown off,
ultimately leading to out of range constant pool entry references. Making
more conservative assumptions that padding may be necessary when inline asm
is present avoids this situation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89403 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 23:10:28 +00:00
Evan Cheng
07ba906413
Refactor cmov selection code out to a separate function. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89396 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 21:45:22 +00:00
Johnny Chen
5c376ff9f0
Added NLdStLN which is similar to NLdSt with the exception that op7_4 is not
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fully specified at this level. Subclasses of NLdStLN can specify selective
bit(s) for Inst{7-4}, as is done for VLD[234]LN* and VST[234]LN* inside
ARMInstrNEON.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 19:20:17 +00:00
Jim Grosbach
dec6de92d1
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89369 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 18:23:19 +00:00
Evan Cheng
ed54de40a7
80 col violation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89337 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 08:16:50 +00:00
Evan Cheng
2ef9c8a43d
More consistent thumb1 asm printing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:57:41 +00:00
Evan Cheng
5b397c93a5
Shrink ldr / str [sp, imm0-1024] to 16-bit instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:32:27 +00:00
Evan Cheng
a64ce45917
Eliminate more * 4 in Thumb1 asm printing for consistency sake.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89325 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-19 06:31:26 +00:00
David Goodwin
ebb5cb9216
Add ARMv6 itineraries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 18:39:57 +00:00
Bob Wilson
a3003004aa
Fix a few places that were missed when we converted to unified syntax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89214 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 18:10:35 +00:00
Bob Wilson
834b08af8d
Add a target hook to allow changing the tail duplication limit based on the
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contents of the block to be duplicated. Use this for ARM Cortex A8/9 to
be more aggressive tail duplicating indirect branches, since it makes it
much more likely that they will be predicted in the branch target buffer.
Testcase coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89187 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18 03:34:27 +00:00
Jim Grosbach
f04777b945
Enable arm jumpt table adjustment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 21:24:11 +00:00
Anton Korobeynikov
bce3dbd9be
Both Darwin as and GNU as violate ARM docs wrt printing of addrmode6
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alignment imm (in the same way). Fix asmprinting for non-darwin platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89137 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 20:04:59 +00:00
Johnny Chen
a9ea9ec194
Set Inst{15-12} (Rd/Rt) to 0b1111 (PC) for BR_JTadd, BR_JTr, and BR_JTm to
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distinguish between them and the more generic instructions (add, mov, and ldr).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89108 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 17:17:50 +00:00
Jim Grosbach
a0a95a3c1c
When moving a block for table jumps, make sure the prior block terminator
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is analyzable so it can be updated. If it's not, be safe and don't move the
block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-17 01:21:04 +00:00
Johnny Chen
9d52e8db8a
Set Rm bits of BX_RET to 0b1110 (R14); and set condition code bits of BRIND to
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0b1110 (ALways). This is so that the disassembler decoder can distinguish among
BX_RET, BRIND, and BXr9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89000 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 23:57:56 +00:00
Jim Grosbach
7bde297133
Make the pass class name more explicit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 21:13:22 +00:00
Jim Grosbach
074fb0252d
make pass name a bit more clear
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88961 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 21:03:58 +00:00
Jim Grosbach
08cbda56b6
Simplify thumb2 jump table adjustments. Remove unnecessary calculation and
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usage of block sizes and offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88935 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 18:58:52 +00:00
Jim Grosbach
9249efe4c7
clarify comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88933 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 18:55:47 +00:00
Jim Grosbach
b2e86bb142
back off for a bit. tracking down weirdness
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 17:17:48 +00:00
Jim Grosbach
ca215e7804
Analyze has to be before checking the condition, obviously. Properly construct an iterator for prior.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 17:10:56 +00:00
Jim Grosbach
a44321776e
Detect need for autoalignment of the stack earlier to catch spills more
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conservatively. eliminateFrameIndex() machinery adjust to handle addr mode
6 (vld1/vst1) used for spills. Fix tests to expect aligned Q-reg spilling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-15 21:45:34 +00:00
Jim Grosbach
6cb6788b79
set the def of the VLD1q64 properly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88873 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-15 21:05:07 +00:00
Jim Grosbach
9c477f54f3
cleanup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 21:33:37 +00:00
Jim Grosbach
00a6a1f022
Cleanup flow, and only update the jump table we're analyzing when replacing a destination MBB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88805 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 20:10:18 +00:00
Evan Cheng
d57cdd5683
- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.
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- If destination is a physical register and it has a subreg index, use the
sub-register instead.
This fixes PR5423.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 02:55:43 +00:00
Evan Cheng
0cd22dd738
When expanding t2STRDi8 r, r to two stores, add kill markers correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14 01:50:00 +00:00
David Greene
1924aabf99
Move DebugInfo checks into EmitComments and remove them from
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target-specific AsmPrinters. Not all comments need DebugInfo.
Re-enable the line numbers comment test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 21:34:57 +00:00
David Goodwin
87d21b92fc
Allow target to specify regclass for which antideps will only be broken along the critical path.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 19:52:48 +00:00
Jim Grosbach
c1a07be185
Block renumbering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 01:19:24 +00:00
Jim Grosbach
f4cbc0e421
use lower case for readability
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 01:17:22 +00:00
David Greene
b9c2fd964e
Make the MachineFunction argument of getFrameRegister const.
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This also fixes a build error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87027 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 21:00:03 +00:00
David Greene
3f2bf85d14
Add a bool flag to StackObjects telling whether they reference spill
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slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 20:49:22 +00:00
Jim Grosbach
80697d1b26
Update TB[BH] layout optimization. Add support for moving the target block
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to directly follow the jump table. Move the layout changes to prior to any
constant island handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86999 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 17:25:07 +00:00
Evan Cheng
b9d2c03d20
Use table to separate opcode from operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 07:16:34 +00:00
Evan Cheng
06b53c0d51
isLegalICmpImmediate should take a signed integer; code clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 07:13:11 +00:00
Jim Grosbach
01dec0e545
Revert 86857. It's causing consumer-typeset to fail, and there's a better way to do it forthcoming anyway.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86945 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12 03:28:35 +00:00
Evan Cheng
77e4751011
Add TargetLowering::isLegalICmpImmediate. It tells LSR what immediate can be folded into target icmp instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86858 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 19:05:52 +00:00
Jim Grosbach
f4997e87e3
Do jump table adjustment before constant island allocation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86857 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 19:04:24 +00:00
Jim Grosbach
1fc7d715aa
The TBB and TBH instructions for Thumb2 are really handy for jump tables, but
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can only branch forward. To best take advantage of them, we'd like to adjust
the basic blocks around a bit when reasonable. This patch puts basics in place
to do that, with a super-simple algorithm for backwards jump table targets that
creates a new branch after the jump table which branches backwards. Real
heuristics for reordering blocks or other modifications rather than inserting
branches will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86791 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 02:47:19 +00:00
Evan Cheng
4b6bbe1e9c
Change Thumb1 address mode printing, instead of
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[r0, #2 * 4]
Now
[r0, #8 ]
This makes Thumb2 assembly more uniform and frankly the scale doesn't add much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 19:48:13 +00:00
Evan Cheng
1e13c797e5
Add a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 19:44:56 +00:00
David Goodwin
c2e8a7e8d2
Fixed to address code review. No functional changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 00:48:55 +00:00
David Goodwin
0855dee564
Allow targets to specify register classes whose member registers should not be renamed to break anti-dependencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86628 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 00:15:47 +00:00
Jim Grosbach
803b48a155
Now that the default is 'enabled,' a separate command line option for ARM is
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not necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86621 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 23:11:45 +00:00
Jim Grosbach
92eb919e80
Enable dynamic stack realignment by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86604 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 22:32:40 +00:00
Jim Grosbach
ad353c74ad
Set dynamic stack realignment to real values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86602 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 22:32:03 +00:00
Jim Grosbach
43cca695a8
Work around assembler not recognizing #0.0 form immediate for vmcp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86548 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 15:27:51 +00:00
Jim Grosbach
e5165490b7
Use Unified Assembly Syntax for the ARM backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 00:11:35 +00:00
Jim Grosbach
31bc849123
Use aligned load/store instructions for spilling Q registers when we know the stack slot is 128 bit aligned
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 00:27:19 +00:00
Evan Cheng
fdc834046e
Refactor code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 00:15:23 +00:00
Jim Grosbach
31c24bf5b3
80-column cleanup of file header comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86408 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 22:00:39 +00:00
Jim Grosbach
8a5ec86a3d
Support alignment specifier for NEON vld/vst instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 21:25:39 +00:00
Evan Cheng
bf992817f2
t2ldrpci_pic can be used for blockaddress as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86400 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 19:40:04 +00:00
Chris Lattner
59a9178fbe
indicate what the native integer types for the target are.
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Please verify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86397 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 19:07:32 +00:00
Anton Korobeynikov
e8ea011cc7
It turns out that the testcase in question uncovered subreg-handling bug.
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Add assert in asmprinter to catch such cases and xfail the tests.
PR is to be filled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 15:20:32 +00:00
Jeffrey Yasskin
2d274412ed
Make the need-stub variables accurate and consistent. In the case of
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MachineRelocations, "stub" always refers to a far-call stub or a
load-a-faraway-global stub, so this patch adds "Far" to the term. (Other stubs
are used for lazy compilation and dlsym address replacement.) The variable was
also inconsistent between the positive and negative sense, and the positive
sense ("NeedStub") was more demanding than is accurate (since a nearby-enough
function can be called directly even if the platform often requires a stub).
Since the negative sense causes double-negatives, I switched to
"MayNeedFarStub" globally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 08:51:52 +00:00
Evan Cheng
d457e6e9a5
Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 04:04:34 +00:00
Evan Cheng
78e5c1140a
- Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
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except it doesn't care if the definitions' virtual registers differ. This is
used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
Since pc relative constantpool entries are always different, this requires it
it check if the values can actually the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:52:02 +00:00
Ted Kremenek
b6aae88ac0
Update CMake file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86325 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:26:59 +00:00
Johnny Chen
0430152a11
My previous patch (r84124) for setting the encoding bits 4 and 7 of DPSoRegFrm
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was wrong and too aggressive in the sense that DPSoRegFrm includes both constant
shifts (with Inst{4} = 0) and register controlled shifts (with Inst{4} = 1 and
Inst{7} = 0). The 'rr' fragment of the multiclass definitions actually means
register/register with no shift, see A8-11.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86319 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 00:54:36 +00:00
Jim Grosbach
bd79fc8ef2
80-columns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86310 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 00:13:30 +00:00
Evan Cheng
b9803a8fa6
- Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative
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load of a GV from constantpool and then add pc. It allows the code sequence to
be rematerializable so it would be hoisted by machine licm.
- Add a late pass to break these pseudo instructions into a number of real
instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm
to this pass. This is done before post regalloc scheduling to allow the
scheduler to proper schedule these instructions. It also allow them to be
if-converted and shrunk by later passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86304 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:52:48 +00:00
Anton Korobeynikov
fc2cba8362
Honour subreg machine operands during asmprinting
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86303 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:45:15 +00:00
Bob Wilson
54c78ef2fe
Print VMOV (immediate) operands as hexadecimal values. Apple's assembler
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will not accept negative values for these. LLVM's default operand printing
sign extends values, so that valid unsigned values appear as negative
immediates. Print all VMOV immediate operands as hex values to resolve this.
Radar 7372576.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86301 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:33:28 +00:00
Evan Cheng
e7e0d62efd
Remove ARMPCLabelIndex from ARMISelLowering. Use ARMFunctionInfo::createConstPoolEntryUId() instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 22:24:13 +00:00
Daniel Dunbar
2928c83b01
Pass StringRef by value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86251 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 10:58:06 +00:00
Dan Gohman
40c57860da
Factor out the printing of the leading tab into printInlineAsm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86199 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 00:04:54 +00:00
Dan Gohman
73bb251cd7
Remove uninteresting and confusing debug output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86149 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 18:47:09 +00:00
Jim Grosbach
4371cda7f8
Grammar.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86068 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 23:20:40 +00:00
Jim Grosbach
db1751a922
Now that the memory leak from McCat/08-main has been fixed (86056), re-enable
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aggressive testing of dynamic stack alignment.
Note that this is off by default, and enabled for LLCBETA nightly results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86064 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 23:11:07 +00:00
Jim Grosbach
6db06a0866
If a function has no stack frame at all, dynamic realignment isn't necessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 22:41:51 +00:00
Jim Grosbach
c5848f4ced
dynamic stack realignment necessitates scanning the floating point callee-
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saved instructions even if no stack adjustment for those saves is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 22:41:00 +00:00
Jakob Stoklund Olesen
ad68264f59
Print out an informative comment for KILL instructions.
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The KILL pseudo-instruction may survive to the asm printer pass, just like the IMPLICIT_DEF. Print the KILL as a comment instead of just leaving a blank line in the output.
With -asm-verbose=0, a blank line is printed, like IMPLICIT?DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86041 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 19:24:37 +00:00
Evan Cheng
b9f51cbe98
The .n suffix must go after the predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 07:38:48 +00:00
Evan Cheng
7883fa942f
Use ldr.n to workaround a darwin assembler bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 00:00:39 +00:00
Evan Cheng
5a1cd36019
Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So it should be 22 bytes instead of 20 bytes long.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85965 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 23:13:34 +00:00
Evan Cheng
b23b2015eb
fconsts / fconstd immediate should be proceeded with #.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 21:59:33 +00:00
Anton Korobeynikov
747409a290
Move subtarget check upper for NEON reg-reg fixup pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85914 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 18:46:11 +00:00
Evan Cheng
f6c0bffa8d
Trim unnecessary include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85878 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 07:08:08 +00:00
Bob Wilson
af14e663ac
For Thumb indirect branches, use "mov pc, reg" which does not switch
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between ARM/Thumb modes and does not require the low bit of the target
address to be set for Thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85874 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 06:29:56 +00:00
Evan Cheng
ba908640b3
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:52:54 +00:00
Evan Cheng
b4db6a46e0
Clean up copyRegToReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85870 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:51:39 +00:00
Evan Cheng
3f4e47be0a
Add QPR_8 as a superreg class of SPR_8 and DPR_8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85869 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:50:57 +00:00
Ted Kremenek
92dbd0b320
Update CMake file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85861 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 04:14:12 +00:00
Anton Korobeynikov
7aaf94bb0d
Turn neon reg-reg moves fixup code into separate pass. This should reduce the compile time.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85850 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 01:04:26 +00:00
Anton Korobeynikov
ab453e0641
Revert r85049, it is causing PR5367
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:24:48 +00:00
Bob Wilson
b62d257cf5
Revert previous change to a comment. The BlockAddresses go in the
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constant pool so they don't get wrapped separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85844 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:02:05 +00:00
Bob Wilson
907eebd5a6
Put BlockAddresses into ARM constant pools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85824 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 20:59:23 +00:00
Kevin Enderby
60131c0d0b
Fix ARMAsmParser::ParseMemoryOffsetReg() where the parameter OffsetRegNum should
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have been passed as a reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85823 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 20:14:39 +00:00
David Goodwin
2f54a2fd85
Fix schedule model for BFC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85809 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 17:28:36 +00:00
Bob Wilson
31ba10b743
Hyphenate some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 17:10:37 +00:00
Bob Wilson
28989a8ddc
Add support for BlockAddress values in ARM constant pools.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85806 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 16:59:06 +00:00
Bob Wilson
69e8445ced
Prune unnecessary include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85805 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 16:58:31 +00:00
Evan Cheng
d3e18fad7e
These are done / no longer care.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85798 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 07:58:25 +00:00
Evan Cheng
e3b88fc01e
Add an entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85797 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 07:51:19 +00:00
Evan Cheng
7baae87d8f
Unbreak ARMBaseRegisterInfo::copyRegToReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 04:44:55 +00:00
Anton Korobeynikov
2ae0eec1c0
Handle splats of undefs properly. This includes the testcase for PR5364 as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:12:06 +00:00
Anton Korobeynikov
3a639a07ea
Do not infer the target type for COPY_TO_REGCLASS from dest regclass, this won't work if it can contain several types. Require explicit result type for the node for now. This fixes PR5364.
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PS: It seems that blackfin usage of copy_to_regclass is completely bogus!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85766 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:11:39 +00:00
Anton Korobeynikov
2e1da9fea4
64-bit FP loads & stores operate on both NEON and VFP pipelines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:11:06 +00:00
Anton Korobeynikov
f95215f551
Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls, when we used to mix vfp and neon code (the former were used for reg-reg moves)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:10:38 +00:00
Evan Cheng
e3ce8aab0a
Fix a couple more places where we are creating ld / st instructions without memoperands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85746 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 22:04:35 +00:00
Evan Cheng
48d8afab73
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 21:12:51 +00:00
Evan Cheng
de17fb6e4d
Use cbz and cbnz instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 23:46:45 +00:00
Jim Grosbach
8cd0a8cb82
vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using
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them for scalar floating point operations for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:57:36 +00:00