Commit Graph

2308 Commits

Author SHA1 Message Date
Brian Gaeke
235d3b7b52 Integrate the rest of my random sparcv9 scribblings into this file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13204 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-27 22:04:03 +00:00
Chris Lattner
6ffe551f65 Changes to fix up the inst_iterator to pass to boost iterator checks. This
patch was graciously contributed by Vladimir Prus.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13185 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-27 15:13:33 +00:00
Brian Gaeke
3ca4fccac5 Fix file header comments and include guards -- many files have been moved or
renamed since they were last spiffed up, or they just never had proper comments
in the first place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13148 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-25 07:04:49 +00:00
Brian Gaeke
27beae85a0 Add a getRegisterInfo() accessor just like on the X86 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13147 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-25 06:32:28 +00:00
Brian Gaeke
c991586b92 Regularize file header comment and include guard.
Include SparcV9RegisterInfo.h.
Add a getRegisterInfo() accessor and SparcV9RegisterInfo instance, just like
on the X86 target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13146 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-25 06:32:16 +00:00
Brian Gaeke
2363b4ef5b Add MRegisterInfo subclass for the SparcV9 target (containing only stub
functions for now). This automatically turns on the printing of machine
registers using their own real names, instead of goofy things like %mreg(42),
and allows us to migrate code incrementally to the new interface as we see fit.

The register file description it uses is hand-written, so that the register
numbers will match the ones that the SparcV9 target already uses.
Perhaps someday we'll tablegen it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13145 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-25 06:32:05 +00:00
Brian Gaeke
dd6d822fa6 Fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13136 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-23 21:45:02 +00:00
Brian Gaeke
18f9f66369 Merge TargetRegInfo.h into SparcV9RegInfo.h, which is its only subclass.
This prepares us to be able to de-virtualize and de-abstract it, and
take the register allocator bits out and move them into the register allocator
proper...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13127 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-23 18:15:48 +00:00
Brian Gaeke
3b2e5e619e Include SparcV9RegInfo.h instead of TargetRegInfo.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13126 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-23 18:15:47 +00:00
Brian Gaeke
35450d2aaa Include SparcV9RegInfo.h instead of TargetRegInfo.h. This serves as a bit of
documentation that this module needs to be made independent of the
register file description of the current target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13125 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-23 18:15:46 +00:00
Brian Gaeke
4d529bc07b Get rid of the old byte-at-a-time emission code used when the Sparc JIT was
being tested on X86, as per Chris's request.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13124 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-23 18:10:38 +00:00
Brian Gaeke
b61fc83ecb Use emitWordAt() to emit forward-branch fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13120 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-23 17:11:16 +00:00
Brian Gaeke
62c6f879ae Emit SPARC machine code a word at a time instead of a byte at a time.
Use emitWordAt() to emit forward-branch fixups.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13119 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-23 17:11:15 +00:00
Brian Gaeke
6896a7dd43 Make SparcV9RegInfo::getRegType() return the right answer for registers
of IntCC, FloatCC, and Special types.

Make SparcV9RegInfo::getRegClassIDOfRegType() return the right answer
if you ask for the class corresponding to SpecialRegType.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13095 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-21 17:53:58 +00:00
Brian Gaeke
3f083d5de6 Make it legal to ask for the type of a specialreg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13078 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-20 20:12:57 +00:00
Brian Gaeke
0eb61037f7 Make it legal to request a load or store of %fsr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13073 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-19 19:12:12 +00:00
Brian Gaeke
94178e9fca Regularize include guards and remove some excess whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13071 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-19 18:53:44 +00:00
Brian Gaeke
03b562aecb Tighten up SparcV9FloatCCRegClass::getRegName()'s assertion - if you ask it for
the name of %fsr (as the comment in SparcV9RegClassInfo.h used to suggest)
you would walk off the end of the FloatCCRegName array.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13070 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-19 18:53:43 +00:00
Brian Gaeke
854db8a29a Regularize include guards, remove some excess whitespace and fix some comments.
Remove the extra %fsr register from SparcV9FloatCCRegClass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13069 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-19 18:53:42 +00:00
Brian Gaeke
b75a316758 Give SparcV9CodeEmitter a head-of-file comment and a PassName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12967 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-15 20:23:13 +00:00
John Criswell
53b54be5fc Remove code to adjust the iterator for llvm.readio and llvm.writeio.
The iterator is pointing at the next instruction which should not disappear
when doing the load/store replacement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12954 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-14 21:27:56 +00:00
Brian Gaeke
8121fcd260 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12953 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-14 21:21:56 +00:00
Chris Lattner
098e945fbd This is the real fix for Codegen/X86/2004-04-13-FPCMOV-Crash.llx which works
even when the "optimization" I added before is turned off.  It generates this
extremely pointless code:

test:
        fld QWORD PTR [%ESP + 4]
        mov %AL, 0
        test %AL, %AL
        fcmove %ST(0), %ST(0)
        ret

Good thing the optimizer will have removed this before code generation
anyway.  :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12939 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-14 02:42:32 +00:00
John Criswell
e5a4c15da6 Added support for the llvm.readio and llvm.writeio intrinsics.
On x86, memory operations occur in-order, so these are just lowered into
volatile loads and stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12936 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 22:13:14 +00:00
Chris Lattner
82c5a9990f Implement a small optimization, which papers over the problem in
X86/2004-04-13-FPCMOV-Crash.llx

A more robust fix is to follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12935 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 21:56:09 +00:00
Brian Gaeke
ef8e48aae0 I don't think we have to have 4 extra allocated (but unused) bytes on the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12905 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 18:28:37 +00:00
Brian Gaeke
3d11e8a6d3 I started working on casts, but I don't have anything compilable yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12903 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 18:27:46 +00:00
Chris Lattner
87e18deabc Emit the immediate form of in/out when possible.
Fix several bugs in the intrinsics:
  1. Make sure to copy the input registers before the instructions that use them
  2. Make sure to copy the value returned by 'in' out of EAX into the register
     it is supposed to be in.

This fixes assertions when using in/out and linear scan.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12896 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 17:20:37 +00:00
Chris Lattner
440bbc257e Add immediate forms of in/out. Use let to shorten lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12895 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 17:19:31 +00:00
Chris Lattner
e47f4ff9f6 Add support for new instruction type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12894 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 17:18:51 +00:00
Chris Lattner
266538350a Add support for the printImplicitDefsBefore flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12893 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-13 17:18:39 +00:00
Brian Gaeke
5f0b51547c We don't need to insert TargetData into the PassManager here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12874 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 21:46:31 +00:00
Chris Lattner
133dbb1285 Fix issues that the local allocator has dealing with instructions that implicitly use ST(0)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12855 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 03:02:48 +00:00
Chris Lattner
284b496aae No really, fix printing for LLC. I gotta get a way for CVS to whine at me if
I have unsaved emacs buffers, geeze...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12854 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:52:04 +00:00
Chris Lattner
2fc83a5ba6 Correct printing for LLC and the encoding for the JIT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12853 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:50:04 +00:00
Chris Lattner
8d2822e7f1 Use the fucomi[p] instructions to perform floating point comparisons instead
of the fucom[p][p] instructions.  This allows us to code generate this function

bool %test(double %X, double %Y) {
        %C = setlt double %Y, %X
        ret bool %C
}

... into:

test:
        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [%ESP + 12]
        fucomip %ST(1)
        fstp %ST(0)
        setb %AL
        movsx %EAX, %AL
        ret

where before we generated:

test:
        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [%ESP + 12]
        fucompp
**      fnstsw
**      sahf
        setb %AL
        movsx %EAX, %AL
        ret

The two marked instructions (which are the ones eliminated) are very bad,
because they serialize execution of the processor.  These instructions are
available on the PPRO and later, but since we already use cmov's we aren't
losing any portability.

I retained the old code for the day when we decide we want to support back
to the 386.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12852 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:43:36 +00:00
Chris Lattner
c040bca4b9 Add support for the FUCOMIr instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12851 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:39:15 +00:00
Chris Lattner
a1b5e160ed Add two new instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12850 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 01:38:55 +00:00
Chris Lattner
9938286325 Fix a bug in my load/cast folding patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12849 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 00:23:04 +00:00
Chris Lattner
13c07feb20 Adjust some comments, fix a bug in my previous patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12848 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-12 00:12:04 +00:00
Chris Lattner
feac3e18aa On X86, casting an integer to floating point requires going through memory.
If the source of the cast is a load, we can just use the source memory location,
without having to create a temporary stack slot entry.

Before we code generated this:

double %int(int* %P) {
        %V = load int* %P
        %V2 = cast int %V to double
        ret double %V2
}

into:

int:
        sub %ESP, 4
        mov %EAX, DWORD PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%EAX]
        mov DWORD PTR [%ESP], %EAX
        fild DWORD PTR [%ESP]
        add %ESP, 4
        ret

Now we produce this:

int:
        mov %EAX, DWORD PTR [%ESP + 4]
        fild DWORD PTR [%EAX]
        ret

... which is nicer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12846 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 23:21:26 +00:00
Chris Lattner
95157f7638 Implement folding of loads into floating point operations. This implements:
test/Regression/CodeGen/X86/fp_load_fold.llx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12844 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 22:05:45 +00:00
Chris Lattner
6621ed94cc Unify all of the code for floating point +,-,*,/ into one function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12842 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 21:23:56 +00:00
Chris Lattner
8ebf1c35a1 This implements folding of constant operands into floating point operations
for mul and div.

Instead of generating this:

test_divr:
        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [.CPItest_divr_0]
        fdivrp %ST(1)
        ret

We now generate this:

test_divr:
        fld QWORD PTR [%ESP + 4]
        fdivr QWORD PTR [.CPItest_divr_0]
        ret

This code desperately needs refactoring, which will come in the next
patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12841 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 21:09:14 +00:00
Chris Lattner
462fa82270 Restructure the mul/div/rem handling code to follow the pattern the other
instructions use.  This doesn't change any functionality except that long
constant expressions of these operations will now magically start working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12840 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 20:56:28 +00:00
Chris Lattner
48b0c97e20 Codegen FP adds and subtracts with a constant more efficiently, generating:
fld QWORD PTR [%ESP + 4]
        fadd QWORD PTR [.CPItest_add_0]

instead of:

        fld QWORD PTR [%ESP + 4]
        fld QWORD PTR [.CPItest_add_0]
        faddp %ST(1)

I also intend to do this for mul & div, but it appears that I have to
refactor a bit of code before I can do so.

This is tested by: test/Regression/CodeGen/X86/fp_constant_op.llx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12839 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 20:26:20 +00:00
Chris Lattner
490e86fed5 Add some new instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12838 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 20:24:15 +00:00
Chris Lattner
4cf15e7a3b Relax assertion to make this function work with a broader class of instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12836 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 20:21:06 +00:00
Chris Lattner
427aeb476f Two changes:
1. If an incoming argument is dead, don't load it from the stack
  2. Do not code gen noop copies at all (ie, cast int -> uint), not even to
     a move.  This should reduce register pressure for allocators that are
     unable to coallesce away these copies in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12835 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-11 19:21:59 +00:00
Chris Lattner
85aa7097c2 Silence a spurious warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12815 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-10 18:32:01 +00:00
John Criswell
6d804f408a Reversed the order of the llvm.writeport() operands so that the value
is listed first and the address is listed second.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12795 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-09 19:09:14 +00:00
John Criswell
aee0cf3fca Changed assertions to error messages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12787 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-09 15:10:15 +00:00
John Criswell
ca6ea0f137 Changes recommended by Chris:
InstSelectSimple.cpp:
  Change the checks for proper I/O port address size into an exit() instead
  of an assertion.  Assertions aren't used in Release builds, and handling
  this error should be graceful (not that this counts as graceful, but it's
  more graceful).

  Modified the generation of the IN/OUT instructions to have 0 arguments.
X86InstrInfo.td:
  Added the OpSize attribute to the 16 bit IN and OUT instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12786 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-08 22:39:13 +00:00
John Criswell
4ffff9e2fa Added the llvm.readport and llvm.writeport intrinsics for x86. These do
I/O port instructions on x86.  The specific code sequence is tailored to
the parameters and return value of the intrinsic call.
Added the ability for implicit defintions to be printed in the Instruction
Printer.
Added the ability for RawFrm instruction to print implict uses and
defintions with correct comma output.  This required adjustment to some
methods so that a leading comma would or would not be printed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12782 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-08 20:31:47 +00:00
Brian Gaeke
8089822a8c Don't include InstrSelectionSupport.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12766 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 20:55:32 +00:00
Brian Gaeke
1523aac530 Move ChooseRegOrImmed() prototype here, from InstrSelectionSupport.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12765 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 20:38:57 +00:00
Brian Gaeke
92976137df Don't include InstrSelectionSupport.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12764 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 20:38:56 +00:00
Brian Gaeke
58fe7695b9 Fix insertion of SelectInsts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12760 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 18:31:47 +00:00
Brian Gaeke
8005ed3bd7 Don't print [%reg + 0], just print [%reg]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12759 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 17:33:56 +00:00
Brian Gaeke
f3334ebbe3 First version of code to handle loads. Stub function for handling stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12758 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 17:29:37 +00:00
Brian Gaeke
562cb16381 Support loading arguments from %I0...%I5 into virtual registers in
function prologues, and fix an off-by-one in visitCallInst that was
putting call args into the wrong registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12757 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 17:04:09 +00:00
Brian Gaeke
d54c38b2f4 It's setting up the call args right now, but on the callee side, it's
trying to get incoming args off the stack, instead of the %i0...%i6 regs,
which is wrong.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12756 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 16:41:22 +00:00
Chris Lattner
4d0cda4d5c This is a start on handling setcc instructions. As the comment notes, we
have no good way of handling this until the code generator is improved.
We should probably just emit V9 instructions in the meantime.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12745 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 05:04:51 +00:00
Chris Lattner
6179047661 andd subcc instructions which is used to create the 'cmp' pseudo instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12744 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 05:04:01 +00:00
Chris Lattner
0d538bbec2 Avoid emitting an extra copy on each 32-bit operation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12743 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:36:53 +00:00
Brian Gaeke
88ddd4a07d Make generation of stack-slot loads and copies less ugly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12742 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:29:14 +00:00
Brian Gaeke
fa4bb09cf0 Fix bug in printing loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12741 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:29:03 +00:00
Chris Lattner
4be7ca5721 Add support for shift instructions, wrap some long lines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12740 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:27:16 +00:00
Chris Lattner
a562efce35 Fix encoding of existing shift instructions, add rr shifts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12739 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:26:57 +00:00
Chris Lattner
22ede709f6 Add a bunch more instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12737 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:06:46 +00:00
Chris Lattner
f97b31e9cf Merge my changes with brians
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12736 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:05:49 +00:00
Brian Gaeke
0f51cc1759 Add in some things I forgot, which Chris helpfully reminded me of...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12735 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:05:12 +00:00
Brian Gaeke
59e04e4889 Add support for the "Y" register, used by MUL & DIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12734 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:01:11 +00:00
Brian Gaeke
e88c9dc860 Add UDIV, SDIV, and a few variants of WR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12733 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:01:00 +00:00
Brian Gaeke
2d4fa8faac Preliminary support for getting 64-bit integer constants into registers.
Preliminary support for division. It's gross because you have to initialize
the "Y" register, which is the top 32 bits of the thing you're dividing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12732 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-07 04:00:49 +00:00
Brian Gaeke
ff8282604a Prune unnecessary #includes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12731 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 23:25:07 +00:00
Brian Gaeke
20117102c2 Simple delay slot filler pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12730 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 23:21:45 +00:00
Brian Gaeke
86a8790826 Add references to delay slot filler pass.
Fill in addPassesToJITCompile method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12729 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 23:21:24 +00:00
Brian Gaeke
3a8ad62d4f First attempt at handling frame index elimination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12728 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 22:10:22 +00:00
Brian Gaeke
1c38175d6b First attempt at special-casing printing of [%reg + offset] for
ld/st instructions - doesn't seem to work yet, but I think it's
just a typo or something somewhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12727 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 22:10:11 +00:00
Brian Gaeke
856e4fc59e Delete reference to "the Mach-O Runtime ABI".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12726 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 22:09:59 +00:00
Brian Gaeke
ea8494bb89 Deal with call return values.
Don't put NOPs in delay slots at all. We'll have a fix-up pass later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12725 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 22:09:23 +00:00
Jakub Staszak
8ac0009979 file based off InstSelectSimple.cpp, slowly being replaced by generated code from the really simple X86 instruction selector tablegen backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12715 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 19:35:17 +00:00
Jakub Staszak
0a8fd30c1b Tablgen files for really simple instruction selector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12714 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 19:34:00 +00:00
Chris Lattner
7b92de1e7d Fix PR313: [x86] JIT miscompiles unsigned short to floating point
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12711 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 19:29:36 +00:00
Chris Lattner
43ab3a8f45 Fix incorrect encoding of some ADC and SBB instuctions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12710 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 19:20:32 +00:00
Chris Lattner
48c937e5c9 Fix a minor bug in previous checking
Enable folding of long seteq/setne comparisons into branches and select instructions
Implement unfolded long relational comparisons against a constants a bit more efficiently

Folding comparisons changes code that looks like this:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %ECX, %EAX
        or %ECX, %EDX
        sete %CL
        test %CL, %CL
        je .LBB2 # PC rel: F

into code that looks like this:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %ECX, %EAX
        or %ECX, %EDX
        jne .LBB2 # PC rel: F

This speeds up 186.crafty by 6% with llc-ls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12702 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 17:34:50 +00:00
Chris Lattner
e80e637793 Improve codegen of long == and != comparisons against constants. Before,
comparing a long against zero got us this:

        sub %ESP, 8
        mov DWORD PTR [%ESP + 4], %ESI
        mov DWORD PTR [%ESP], %EDI
        mov %EAX, DWORD PTR [%ESP + 12]
        mov %EDX, DWORD PTR [%ESP + 16]
        mov %ECX, 0
        mov %ESI, 0
        mov %EDI, %EAX
        xor %EDI, %ECX
        mov %ECX, %EDX
        xor %ECX, %ESI
        or %EDI, %ECX
        sete %CL
        test %CL, %CL
        je .LBB2 # PC rel: F

Now it gets us this:

        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %ECX, %EAX
        or %ECX, %EDX
        sete %CL
        test %CL, %CL
        je .LBB2 # PC rel: F


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12696 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 16:02:27 +00:00
Chris Lattner
6ab06d5d19 Handle various other important cases of multiplying a long constant immediate. For
example, multiplying X*(1 + (1LL << 32)) now produces:

test:
        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %EAX, %ECX
        add %EDX, %ECX
        ret

[[[Note to Alkis: why isn't linear scan generating this code??  This might be a
 problem with your intervals being too conservative:

test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        add %EDX, %EAX
        ret

end note]]]

Whereas GCC produces this:

T:
        sub     %esp, 12
        mov     %edx, DWORD PTR [%esp+16]
        mov     DWORD PTR [%esp+8], %edi
        mov     %ecx, DWORD PTR [%esp+20]
        xor     %edi, %edi
        mov     DWORD PTR [%esp], %ebx
        mov     %ebx, %edi
        mov     %eax, %edx
        mov     DWORD PTR [%esp+4], %esi
        add     %ebx, %edx
        mov     %edi, DWORD PTR [%esp+8]
        lea     %edx, [%ecx+%ebx]
        mov     %esi, DWORD PTR [%esp+4]
        mov     %ebx, DWORD PTR [%esp]
        add     %esp, 12
        ret

I'm not sure example what GCC is smoking here, but it looks like it has just
confused itself with a bunch of stack slots or something.  The intel compiler
is better, but still not good:

T:
        movl      4(%esp), %edx                                 #2.11
        movl      8(%esp), %eax                                 #2.11
        lea       (%eax,%edx), %ecx                             #3.12
        movl      $1, %eax                                      #3.12
        mull      %edx                                          #3.12
        addl      %ecx, %edx                                    #3.12
        ret                                                     #3.12


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12693 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 04:55:43 +00:00
Chris Lattner
028adc422d Efficiently handle a long multiplication by a constant. For this testcase:
long %test(long %X) {
        %Y = mul long %X, 123
        ret long %Y
}

we used to generate:

test:
        sub %ESP, 12
        mov DWORD PTR [%ESP + 8], %ESI
        mov DWORD PTR [%ESP + 4], %EDI
        mov DWORD PTR [%ESP], %EBX
        mov %ECX, DWORD PTR [%ESP + 16]
        mov %ESI, DWORD PTR [%ESP + 20]
        mov %EDI, 123
        mov %EBX, 0
        mov %EAX, %ECX
        mul %EDI
        imul %ESI, %EDI
        add %ESI, %EDX
        imul %ECX, %EBX
        add %ESI, %ECX
        mov %EDX, %ESI
        mov %EBX, DWORD PTR [%ESP]
        mov %EDI, DWORD PTR [%ESP + 4]
        mov %ESI, DWORD PTR [%ESP + 8]
        add %ESP, 12
        ret

Now we emit:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, 123
        mul %EDX
        imul %ECX, %ECX, 123
        add %ECX, %EDX
        mov %EDX, %ECX
        ret

Which, incidently, is substantially nicer than what GCC manages:
T:
        sub     %esp, 8
        mov     %eax, 123
        mov     DWORD PTR [%esp], %ebx
        mov     %ebx, DWORD PTR [%esp+16]
        mov     DWORD PTR [%esp+4], %esi
        mov     %esi, DWORD PTR [%esp+12]
        imul    %ecx, %ebx, 123
        mov     %ebx, DWORD PTR [%esp]
        mul     %esi
        mov     %esi, DWORD PTR [%esp+4]
        add     %esp, 8
        lea     %edx, [%ecx+%edx]
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12692 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 04:29:36 +00:00
Chris Lattner
722070e0ba Improve code generation of long shifts by 32.
On this testcase:

long %test(long %X) {
        %Y = shr long %X, ubyte 32
        ret long %Y
}

instead of:
t:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%ESP + 8]
        sar %EAX, 0
        mov %EDX, 0
        ret


we now emit:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%ESP + 8]
        mov %EDX, 0
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12688 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 03:42:38 +00:00
Chris Lattner
0652167bea Bugfixes: inc/dec don't set the carry flag!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12687 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 03:36:57 +00:00
Chris Lattner
92900a65a3 Improve code for passing constant longs as arguments to function calls.
For example, on this instruction:

        call void %test(long 1234)

Instead of this:
        mov %EAX, 1234
        mov %ECX, 0
        mov DWORD PTR [%ESP], %EAX
        mov DWORD PTR [%ESP + 4], %ECX
        call test

We now emit this:
        mov DWORD PTR [%ESP], 1234
        mov DWORD PTR [%ESP + 4], 0
        call test


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12686 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 03:23:00 +00:00
Chris Lattner
33f7fa317b Emit more efficient 64-bit operations when the RHS is a constant, and one
of the words of the constant is zeros.  For example:
  Y = and long X, 1234

now generates:
  Yl = and Xl, 1234
  Yh = 0

instead of:
  Yl = and Xl, 1234
  Yh = and Xh, 0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12685 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 03:15:53 +00:00
Chris Lattner
7ba92306db Fix typeo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12684 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 02:13:25 +00:00
Chris Lattner
ab1d0e0963 Add support for simple immediate handling to long instruction selection.
This allows us to handle code like 'add long %X, 123456789012' more efficiently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12683 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 02:11:49 +00:00
Chris Lattner
ee98389808 The sbb instructions really ARE sbb's, not adc's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12682 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 02:02:11 +00:00
Chris Lattner
edd5e4957a Implement negation of longs efficiently. For this testcase:
long %test(long %X) {
        %Y = sub long 0, %X
        ret long %Y
}

We used to generate:

test:
        sub %ESP, 4
        mov DWORD PTR [%ESP], %ESI
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %ESI, DWORD PTR [%ESP + 12]
        mov %EAX, 0
        mov %EDX, 0
        sub %EAX, %ECX
        sbb %EDX, %ESI
        mov %ESI, DWORD PTR [%ESP]
        add %ESP, 4
        ret

Now we generate:

test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        neg %EAX
        adc %EDX, 0
        neg %EDX
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12681 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 01:48:06 +00:00
Chris Lattner
502e36c3c9 Minor tweak to avoid an extra reg-reg copy that the register allocator has to eliminate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12680 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 01:25:33 +00:00
Chris Lattner
29bf0623e5 Two changes:
* In promote32, if we can just promote a constant value, do so instead of
    promoting a constant dynamically.
  * In visitReturn inst, actually USE the promote32 argument that takes a
    Value*

The end result of this is that we now generate this:

test:
        mov %EAX, 0
        ret

instead of...

test:
        mov %AX, 0
        movzx %EAX, %AX
        ret

for:

ushort %test() {
        ret ushort 0
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12679 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-06 01:21:00 +00:00
Chris Lattner
28977af72a Support getelementptr instructions which use uint's to index into structure
types and can have arbitrary 32- and 64-bit integer types indexing into
sequential types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12653 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-05 01:30:19 +00:00
Chris Lattner
97220b7338 In the perhaps not-to-distant future, we might support gep instructions that
have non-long indices for sequential types.  In order to avoid trying to figure
out how the v9 backend works, we'll just hack it in the preselection pass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12647 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-04 20:44:05 +00:00
Brian Gaeke
6c5526e56e Add support for many of the MRegisterInfo callbacks.
Eliminating call-frame pseudo instrs and frame indices are still stubs.
Flesh out the emitPrologue method based on better ABI knowledge.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12632 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 20:53:37 +00:00
Brian Gaeke
8542e08d15 Add load, store, and NOP instructions.
Fix up comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12631 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 20:53:37 +00:00
Brian Gaeke
a778ca555a Add support for printing pc-relative displacements of functions (as used in
the CALL instruction).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12630 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 20:53:35 +00:00
Brian Gaeke
f7e44ef8d5 Add support for call instructions (0-ary only for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12629 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 20:53:33 +00:00
Alkis Evlogimenos
bee8a094af Clean up code a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12615 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 18:11:32 +00:00
Brian Gaeke
79ee87b1bb Only strip symbols if emitting bytecode to the assembly file.
Move lowerselect pass to come after preselection.  Move machine
code construction and stack slots pass to come right before instruction
selection. This is to help fix perlbmk.

Update comments.

Make the sequence of passes in addPassesToJITCompile look more like
the sequence of passes in addPassesToEmitAssembly, including support
for -print-machineinstrs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12614 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 17:52:40 +00:00
Brian Gaeke
142e22a5f4 Add support for constant select expressions. Clarify the assertion failure msg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12613 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 17:52:29 +00:00
Alkis Evlogimenos
1a66731da8 Fix type in comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12611 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 16:02:50 +00:00
Alkis Evlogimenos
13ce339442 Fix type in instruction builder instantiation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12610 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 15:51:03 +00:00
Alkis Evlogimenos
8b28b6d187 Add more ADC and SBB variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12607 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-02 07:11:10 +00:00
Chris Lattner
6683dbf32e Add support for select constant expressions to the CBE, fixing SIOD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12589 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-01 05:28:26 +00:00
Chris Lattner
0526f01fec Simplify code by using the more powerful BuildMI forms.
Implement a small optimization.  In test/Regression/CodeGen/X86/select.ll,
we now generate this for foldSel3:

foldSel3:
        mov %AL, BYTE PTR [%ESP + 4]
        fld DWORD PTR [%ESP + 8]
        fld DWORD PTR [%ESP + 12]
        mov %EAX, DWORD PTR [%ESP + 16]
        mov %ECX, DWORD PTR [%ESP + 20]
        cmp %EAX, %ECX
        fxch %ST(1)
        fcmovae %ST(0), %ST(1)
***     fstp %ST(1)
        ret

Instead of:

foldSel3:
        mov %AL, BYTE PTR [%ESP + 4]
        fld DWORD PTR [%ESP + 8]
        fld DWORD PTR [%ESP + 12]
        mov %EAX, DWORD PTR [%ESP + 16]
        mov %ECX, DWORD PTR [%ESP + 20]
        cmp %EAX, %ECX
        fxch %ST(1)
        fcmovae %ST(0), %ST(1)
***     fxch %ST(1)
***     fstp %ST(0)
        ret

In practice, this only effects code size: performance should be basically
unaffected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12588 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-01 04:06:09 +00:00
Chris Lattner
f1ac50ec53 Wrap at 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12587 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-01 04:03:27 +00:00
Chris Lattner
68626c2b30 Generate slightly smaller code, "test R, R" instead of "cmp R, 0"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12579 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:22:36 +00:00
Chris Lattner
08bde1870a The X86 backend no longer needs the select lowering pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12578 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:03:46 +00:00
Chris Lattner
352eb48f8e Codegen FP select instructions into X86 conditional moves. Annoyingly enough
the X86 does not support a full set of fp cmove instructions, so we can't always
fold the condition into the select.  :(  Yuck.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12577 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:03:35 +00:00
Chris Lattner
c1bab32bc5 Add support for floating point conditional move instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12576 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:02:36 +00:00
Chris Lattner
30b2f72e7c Add support for FP cmoves
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12575 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:02:21 +00:00
Chris Lattner
1c54a85447 Add FP conditional move instructions, which annoyingly have special properties
that require the asmwriter to be extended (printing implicit uses before the
explicit operands)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12574 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 22:02:13 +00:00
Chris Lattner
b4186e0ccd MBB::remove should not modify the iterator passed in
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12572 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 21:59:59 +00:00
Brian Gaeke
368c5da198 Factor out getStaticStackSize from InsertPrologCode(), so that I can more
easily steal it for a separate use in the reoptimizer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12568 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-31 20:58:37 +00:00
Chris Lattner
307ecbaddb Fold comparisons into select instructions, making much better code and
using our broad selection of movcc instructions.  :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12560 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 22:39:09 +00:00
Chris Lattner
87d3bb5dfa Implement spill code folding for all of the conditional move instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12554 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 21:29:47 +00:00
Chris Lattner
12d96a0b4d Add direct support for integer select instructions, though we still don't support
folding compares into the select yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12553 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 21:22:00 +00:00
Chris Lattner
a5cdab7101 Fix some serious bugs in the cmov descriptions, which didn't cause a problem because
we never generated them

Make indentation a bit more consistent


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12549 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 20:18:02 +00:00
Chris Lattner
6f2ab04e91 Fix a fairly major performance problem. If a PHI node had a constant as
an incoming value from a block, the selector would evaluate the constant
at the TOP of the block instead of at the end of the block.  This made the
live range for the constant span the entire block, increasing register
pressure needlessly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12542 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 19:10:12 +00:00
Chris Lattner
5abd61f6d9 Add the select lowering pass to get initial support for select instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12541 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-30 18:41:59 +00:00
Brian Gaeke
eb8863db90 Don't warn about a null live range if the Value is a ConstantIntegral.
Otherwise, if you're in debugging mode, you get warnings for (apparently)
every immediate constant in the function during reg. allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12538 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-29 21:58:41 +00:00
Chris Lattner
6b835360f1 Fix PR299: [Sparc] Code generator asserts on alloc of zero size type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12504 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-19 04:21:43 +00:00
Chris Lattner
ab18020cbd Malloc doesn't kill a load. This patch need not go into 1.2 though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12500 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-18 17:01:26 +00:00
Chris Lattner
85c84e759e Fix a really nasty bug that was breaking ijpeg in LLC mode. We were incorrectly
folding load instructions into other instructions across free instruction
boundaries.  Perhaps this will also fix the other strange failures?


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12494 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-18 06:29:54 +00:00
Brian Gaeke
54cc3c2135 The .type directive on Solaris uses the # character instead of @.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12454 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-16 22:52:04 +00:00
Brian Gaeke
6d339f9000 Fix bug in zero-extending of shorts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12453 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-16 22:45:42 +00:00
Brian Gaeke
032f80fbf1 Add UMULrr and SMULrr instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12452 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-16 22:37:13 +00:00
Brian Gaeke
79db7405f7 Use ! for comment char; it works in both Solaris as and GAS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12451 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-16 22:37:12 +00:00
Brian Gaeke
f57e364f65 Make getClass more robust by adding cLong.
Add handling for Mul instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12450 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-16 22:37:11 +00:00
Alkis Evlogimenos
63dd4ff809 Add LAHF instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12424 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-15 17:20:14 +00:00
Alkis Evlogimenos
a1a7148c4d Another API change to MRegisterInfo::foldMemoryOperand. Instead of a
MachineBasicBlock::iterator take a MachineInstr*.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12392 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-14 20:14:27 +00:00
Alkis Evlogimenos
39354c99a1 Change MRegisterInfo::foldMemoryOperand to return the folded
instruction to make the API more flexible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12386 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-14 07:19:51 +00:00
Chris Lattner
5634b9f5e7 It helps if I save the file. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12357 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-13 00:24:52 +00:00
Chris Lattner
317201d773 Rename the intrinsic enum values for llvm.va_* from Intrinsic::va_* to
Intrinsic::va*.  This avoid conflicting with macros in the stdlib.h file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12356 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-13 00:24:00 +00:00
Brian Gaeke
215fb76865 Make -print-machineinstrs show us the code both before and after reg. alloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12344 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-12 21:19:08 +00:00
Alkis Evlogimenos
a3f66842b2 Add support for a wider range of CMOV instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12336 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-12 17:59:56 +00:00
Chris Lattner
9f24a077bd ADd support for select instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12316 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-12 05:52:14 +00:00
Misha Brukman
b8bda13140 Move implementations of functions here, which avoids #including <cstdlib> in the
header file and all those who #include it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12297 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-11 23:52:43 +00:00
Brian Gaeke
c760d647c6 Get rid of the abort in PhyRegAlloc::finishSavingState().
Make an explicit call to it from runOnFunction() if we know we're supposed to
write into the global. This is lame (esp. the const_cast), but it solves
the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12291 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-11 19:46:30 +00:00
Brian Gaeke
c46f8a4f42 Give pass a name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12290 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-11 19:23:15 +00:00
Misha Brukman
db760d00c3 Fix compilation on Sparc: assert(0) => abort()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12289 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-11 19:08:24 +00:00