Evan Cheng
1e0eab122b
Mark Darwin call instructions as using "r7" to prevent the frame-register
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assignment instructions from being moved below / above calls.
rdar://8690640
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120339 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:43:27 +00:00
Jim Grosbach
a0bb253119
Nuke dead isCodeGenOnly annotation and extraneous comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120338 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:40:58 +00:00
Jim Grosbach
fbf0cb18cb
tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120335 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:38:48 +00:00
Bill Wendling
9b0e92ca5b
Thumb encodings for conditional moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:37:46 +00:00
Jim Grosbach
5ca66696e7
Pseudo-ize Thumb2 jump tables with explicit MC lowering to the raw
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instructions. This simplifies instruction printing and disassembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:37:40 +00:00
Bill Wendling
a46a493c02
Refactor some of the "disassembly-only" instructions into a base class. This
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reduces some code duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120326 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 22:15:03 +00:00
Eric Christopher
7bb5996e47
Update fastisel for the changes in r120272.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120324 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 21:56:23 +00:00
Jim Grosbach
d092a87ba3
Rename t2 TBB and TBH instructions to reference that they encode the jump table
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data. Next up, pseudo-izing them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120320 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 21:28:32 +00:00
Owen Anderson
5404c2b36e
Improving the factoring of several instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 20:38:48 +00:00
Bob Wilson
86c6d80a7a
Add support for NEON VLD3-dup instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:35:29 +00:00
Bob Wilson
2fcda63763
Fix copy-and-paste errors in VLD2-dup scheduling itineraries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120311 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:35:23 +00:00
Jim Grosbach
f1aa47dc1a
ARM Pseudo-ize tBR_JTr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:32:47 +00:00
Owen Anderson
00a035f74f
Thumb2 encodings for MSR and MRS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:29:15 +00:00
Owen Anderson
d18a9c9b9d
Thumb2 encodings for system instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 19:22:08 +00:00
Owen Anderson
05bf595122
Thumb2 encodings for branches and IT blocks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:54:38 +00:00
Jim Grosbach
11fbff8085
The ARM BR_JT* pseudos don't need to use the printer jtblock_operand node to
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get the pretty-printer. That's handled explicityly by the MC lowering now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120305 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:53:24 +00:00
Michael J. Spencer
3cc52ea33c
I swear I did a make clean and make before committing all this...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120304 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:47:54 +00:00
Jim Grosbach
2dc7768d73
Switch ARM BR_JTm and BR_JTr instructions to be MC-expanded pseudos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:37:44 +00:00
Michael J. Spencer
1f6efa3996
Merge System into Support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120298 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:16:10 +00:00
Kalle Raiskila
9363f739cd
Handle lshr for i128 correctly on SPU also when
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shiftamount > 7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 14:44:28 +00:00
Kalle Raiskila
c2ebfd454c
Enable PostRA scheduling for SPU.
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This speeds up selected test cases with up to
5% - no slowdowns observed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 10:30:25 +00:00
Kalle Raiskila
b00f24b13c
Allow machine LICM to do its job on SPU.
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-return a sensible value for register pressure
-add pattern to 'ila' instrucion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120285 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 10:08:09 +00:00
Kalle Raiskila
11edd0cedc
Add missing i128 case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120284 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 09:36:26 +00:00
Bill Wendling
2f17bf2a44
Add more Thumb encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 01:07:48 +00:00
Bill Wendling
5cbbf68e35
More Thumb encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120278 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 01:00:43 +00:00
Bill Wendling
d19ac0c75a
Add Thumb encodings for REV instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120277 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 00:42:50 +00:00
Bill Wendling
849f2e381e
Add more Thumb encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120272 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 00:18:15 +00:00
Rafael Espindola
ec0b428398
Make EmitIntValue non virtual.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120271 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 23:22:44 +00:00
Rafael Espindola
d652dbe720
Move lowering of TLS_addr32 and TLS_addr64 to X86MCInstLower.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120263 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 21:16:39 +00:00
Chris Lattner
d8f717911d
fix PR8686, accepting a 'b' suffix at the end of all the setcc
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instructions. I choose to handle this with an asmparser hack,
though it could be handled by changing all the instruction definitions
to allow be "setneb" instead of "setne". The asm parser hack is
better in this case, because we want the disassembler to produce
setne, not setneb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120260 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 20:23:50 +00:00
Nicolas Geoffray
7509ccda93
When emitting a single function with cppgen=function, you don't want to emit
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initializers of global variables used in the function.
Also make sure to emit the operands of a constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120253 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 18:00:53 +00:00
Rafael Espindola
a484f2c405
Move the PTXMCAsmStreamer class to the .cpp file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 14:48:34 +00:00
Rafael Espindola
e04ed7e45f
Define generic 1, 2 and 4 byte pc relative relocations. They are common
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and at least the 4 byte one will be needed to implement the .cfi_* directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120240 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 14:17:56 +00:00
Bob Wilson
b1dfa7a8e0
Add support for NEON VLD2-dup instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120236 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 06:51:26 +00:00
Bob Wilson
f3d2f9d4be
Another minor refactoring for VLD1DUP instructions.
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The op11_8 field is the same for all of them so put it in the instruction
classes instead of specifying it separately for each instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120234 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 06:51:15 +00:00
Bob Wilson
364a72a8e5
Add entry in getTargetNodeName() for ARMISD::VBICIMM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-28 06:51:11 +00:00
Anton Korobeynikov
94c5ae0875
Move more PEI-related hooks to TFI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120229 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 23:05:25 +00:00
Anton Korobeynikov
cd775ceff0
Move callee-saved regs spills / reloads to TFI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120228 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 23:05:03 +00:00
Rafael Espindola
5bf7c534cf
Lower TLS_addr32 and TLS_addr64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120225 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 20:43:02 +00:00
Rafael Espindola
bfd2d26159
Implement the data16 prefix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 20:29:45 +00:00
Bob Wilson
bce55776af
Refactor. Set alignment bit in VLD1-dup instruction classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 07:12:02 +00:00
Bob Wilson
2a0e97431e
Add NEON VLD1-dup instructions (load 1 element to all lanes).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 06:35:16 +00:00
Bob Wilson
8d41294664
Fix incorrect scheduling itineraries for NEON vld1/vst1 instructions.
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I added these instructions recently but I have no idea where these "1"
values in the NextCycles field came from. As far as I can tell now,
these instruction stages are clearly intended to overlap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 06:35:09 +00:00
Daniel Dunbar
36d76a8dbc
MC/Mach-O: Switch to using MachOFormat.h.
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- I'm leaving MachO.h, because I believe it has external consumers, but I would really like to eliminate it (we have stylistic disagreements with one another).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-27 04:38:36 +00:00
Rafael Espindola
fd46797d0d
Remove the unused TheTarget member.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-26 04:24:21 +00:00
Rafael Espindola
2ace1b68ac
Use multiple 0x66 prefixes so that all nops up to 15 bytes are a single instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-25 17:14:16 +00:00
Benjamin Kramer
c62feda741
Namespacify.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120146 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-25 16:42:51 +00:00
Wesley Peck
42e75a3cf1
Updating MBlaze .mask and .frame directives to match GCC's output and fixing regression introduced in 120095 by checking MCStreamer::hasRawTextSupport.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120097 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 16:32:35 +00:00
Wesley Peck
82dc040d06
1. Fixing error where basic block labels were not being printed out when they need to be for the MBlaze backend because AsmPrinter::isBlockOnlyReachableByFallthrough does not take into account delay slots.
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2. Re-adding .mask and .frame directives in printed assembly.
3. Adding .ent and .end directives in printed assembly.
4. Minor cleanups to MBlaze backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120095 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 15:39:32 +00:00
Kalle Raiskila
7de8101668
Use i8 as SETCC result type for i1 in SPU.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120092 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 12:59:16 +00:00
Kalle Raiskila
702a4046a9
Allow for 'fcmp ogt' in SPU.
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Fix by Visa Putkinen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-24 11:42:17 +00:00
Benjamin Kramer
c21a821e9f
The srem -> urem transform is not safe for any divisor that's not a power of two.
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E.g. -5 % 5 is 0 with srem and 1 with urem.
Also addresses Frits van Bommel's comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120049 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 20:33:57 +00:00
Jason W Kim
13534672de
Move the ARM reloc constants to Support/ELF.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120035 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 19:40:36 +00:00
Bob Wilson
626613d5e8
Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations.
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We need to check if the individual vector elements are sign/zero-extended
values. For now this only handles constants values. Radar 8687140.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 19:38:38 +00:00
Benjamin Kramer
b70ebd2aa3
InstCombine: Reduce "X shift (A srem B)" to "X shift (A urem B)" iff B is positive.
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This allows to transform the rem in "1 << ((int)x % 8);" to an and.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 18:52:42 +00:00
Kalle Raiskila
0cc5b1f60e
Division by pow-of-2 is not cheap on SPU, do it with
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shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 13:27:59 +00:00
Rafael Espindola
beb6898df8
Implement the rex64 prefix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 11:23:24 +00:00
Rafael Espindola
d93ceeb125
Produce a relocation for pcrel absolute values. Based on a patch by David Meyer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120006 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 07:20:12 +00:00
Wesley Peck
bf17cfa3f9
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 03:31:01 +00:00
Rafael Espindola
d80f8d08ce
Remove duplicated constants. Thanks to Jason for noticing it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 21:49:05 +00:00
Benjamin Kramer
93f8455d73
InstCombine: Implement X - A*-B -> X + A*B.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 20:31:27 +00:00
Evan Cheng
ab5c703fdb
Fix epilogue codegen to avoid leaving the stack pointer in an invalid
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state. Previously Thumb2 would restore sp from fp like this:
mov sp, r7
sub, sp, #4
If an interrupt is taken after the 'mov' but before the 'sub', callee-saved
registers might be clobbered by the interrupt handler. Instead, try
restoring directly from sp:
add sp, #4
Or, if necessary (with VLA, etc.) use a scratch register to compute sp and
then restore it:
sub.w r4, r7, #8
mov sp, r7
rdar://8465407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 18:12:04 +00:00
Kalle Raiskila
d87e571e62
Fix a bug with extractelement on SPU.
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In the attached testcase, the element was
never extracted (missing rotate).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119973 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 16:28:26 +00:00
Benjamin Kramer
ce750f0332
Implement the "if (X == 6 || X == 4)" -> "if ((X|2) == 6)" optimization.
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This currently only catches the most basic case, a two-case switch, but can be
extended later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:45:38 +00:00
Duncan Sands
3d93893895
Fix a compiler warning about Kind being used uninitialized
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when assertions are disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:38:00 +00:00
Eric Christopher
9d89311df8
Pseudos default to 4byte size, let the instruction size field notice
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that branch tables are special.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 23:38:19 +00:00
Wesley Peck
4b04713423
Implement ELF object file writing support for the MBlaze backend. Its not perfect yet, but it works for many tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 22:06:28 +00:00
Wesley Peck
46a928b864
Implement branch analysis in the MBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 21:53:36 +00:00
Wesley Peck
6e749f31c6
Make it a little bit more explicit that the MBlaze backend only supports upto
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32-bit immediate values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 21:39:46 +00:00
Wesley Peck
5437ba48ce
Fix an error in the MBlaze delay slot filler where instructions that already
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fill a delay slot are moved to fill a different delay slot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 21:36:12 +00:00
Chris Lattner
8bc1e45295
apparently tailcalls are better on darwin/x86-64 than on linux?
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 18:59:20 +00:00
Bill Wendling
dcf0a47b76
More Thumb encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 11:49:36 +00:00
Bill Wendling
af2b573614
Add encoding for ARM "trap" instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 11:05:29 +00:00
Bill Wendling
9717fa9f29
The "trap" instruction is one of this which doesn't have a condition code. Hack
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the code to not add a "condition code" if it's trap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119937 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 10:56:05 +00:00
Bill Wendling
7d0affdf02
- Give "trap" the correct encoding, at least according to Darwin's assembler.
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- Add comments saying where the encodings for other instructions came from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 10:55:23 +00:00
Chris Lattner
cbf5d74e6a
implement PR8524, apparently mainline gas accepts movq as an alias for movd
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when transfering between i64 gprs and mmx regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119931 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 08:18:57 +00:00
Chris Lattner
3e41106de4
add some random notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119925 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 07:05:31 +00:00
Owen Anderson
aa54524a44
Use by-name rather than by-order operand matching for some NEON encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:47:06 +00:00
Chris Lattner
75d8f599e7
optimize:
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void a(int x) { if (((1<<x)&8)==0) b(); }
into "x != 3", which occurs over 100 times in 403.gcc but in no
other program in llvm-test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119922 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:44:42 +00:00
Chris Lattner
79a980ad85
tail calls on x86 are implemented.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119920 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:10:27 +00:00
Jim Grosbach
0eb49c57f0
BR_JTadd is ARM-only, so use the proper pseudo class to get the predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119918 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 01:26:01 +00:00
Bill Wendling
5cc88a205d
A few more thumb instruction MC encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119913 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:52:33 +00:00
Eric Christopher
827656dab4
Rewrite address handling to use a structure with all the possible address
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mode variables. Handle frame indexes in load/store and allocas again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:38:27 +00:00
Eric Christopher
13df1a0bac
STRH only needs the additional operand, not t2STRH. Also invert conditional
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to match the one from the load emitter above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:01:38 +00:00
Anton Korobeynikov
0dbe54e844
Make this compile on case-sensitive file systemsw
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119905 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 16:14:57 +00:00
Anton Korobeynikov
82f58740c7
Move some more hooks to TargetFrameInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 15:59:32 +00:00
Duncan Sands
59d2dad59e
On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics,
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so don't claim they are. They are allocated using DAG.getNode, so attempts
to access MemSDNode fields results in reading off the end of the allocated
memory. This fixes crashes with "llc -debug" due to debug code trying to
print MemSDNode fields for these barrier nodes (since the crashes are not
deterministic, use valgrind to see this). Add some nasty checking to try
to catch this kind of thing in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 11:25:00 +00:00
Bill Wendling
a09cc2b429
Add more Thumb add instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 01:18:47 +00:00
Bill Wendling
95a6d1759d
Add Thumb encodings for some add instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119882 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 01:00:29 +00:00
Bill Wendling
6179c31e07
Add more encodings for Thumb instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119881 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 00:53:35 +00:00
Bill Wendling
20272a7c5a
Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the same
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value that the one in ARMMCCodeEmitter.cpp does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119878 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 00:26:37 +00:00
Jim Grosbach
078e239f69
Fix ARM LDR* post-indexed operand encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:14:43 +00:00
Bill Wendling
1228038ed9
Encodings for the compare instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119868 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:14:32 +00:00
Owen Anderson
b16926940e
The Vm and Vn register fields must be the same for a register-register vmov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:12:43 +00:00
Evan Cheng
ff96b63d6f
Fix a cut-n-paste-error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:01:16 +00:00
Jim Grosbach
7b6ab402fe
Operand names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119864 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:43:08 +00:00
Jim Grosbach
a30a51b16a
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119863 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:42:55 +00:00
Eric Christopher
b371658083
Don't need to save piecemeal now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:39:56 +00:00
Eric Christopher
2d630d7bc9
Update comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:37:58 +00:00
Bill Wendling
0ae28e4447
Add encodings for some of the thumb ADD instructions. Tests will come once the
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asm parser can handle them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:37:33 +00:00
Eric Christopher
88de86b550
Update comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:36:41 +00:00
Jim Grosbach
efaeb41aec
Clarify operand names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:36:02 +00:00
Eric Christopher
0d58122e12
Refactor address mode handling into a single struct (ala x86), this
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should give allow a wider range of addressing modes.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119856 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:30:02 +00:00
Jim Grosbach
6571101cb7
Fix encoding for ARM MLS instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119855 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:22:37 +00:00
Jim Grosbach
2aeb6121a1
Add ARM encoding information for STRD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119852 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:14:31 +00:00
Jim Grosbach
a1b4175b8e
Shuffle things around a bit to keep like things together. Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:06:57 +00:00
Bill Wendling
ba46dc06e6
Revert accidental commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119850 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:06:18 +00:00
Bill Wendling
a898166d38
Change long binary encodings to use hex instead. It's more readable. Also
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initialize missing bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:02:18 +00:00
Jim Grosbach
953557f445
Factor out operand encoding bits for ARM addressing mode 2 store instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119846 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:35:06 +00:00
Jim Grosbach
e2d54af47f
Delete another dead class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119844 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:16:08 +00:00
Jim Grosbach
fc0cb4b906
whitespace tweak.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:14:37 +00:00
Jim Grosbach
9ef65cbbc6
Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119841 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:14:02 +00:00
Jim Grosbach
9558b4cdc4
Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119840 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:07:51 +00:00
Jim Grosbach
9cb15b5be5
Add ARM binary encoding information for the rest of the indexed loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119821 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 19:41:26 +00:00
Jim Grosbach
0c2283a910
Remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 18:18:37 +00:00
Jim Grosbach
f1ce7cc1d1
ARM LDRD binary encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 18:16:46 +00:00
Jim Grosbach
3ea4daaf50
Remove hard tabs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119810 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 18:01:37 +00:00
Jim Grosbach
7a08864860
Remove trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 17:11:02 +00:00
Benjamin Kramer
7920d96964
Avoid release build warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 16:36:02 +00:00
Owen Anderson
8b8640a964
Fix decoding ambiguities of stdrex and ldrex.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119801 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 13:11:50 +00:00
Evan Cheng
1f190c8bdf
These instructions are thumb2 only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119793 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 06:28:11 +00:00
Evan Cheng
e8e67e13d4
Fix an obvious oversight.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 06:15:10 +00:00
Rafael Espindola
195a0ce484
Change some methods in MCDwarf.cpp to be able to handle an arbitrary
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MCStreamer instead of just MCObjectStreamer. Address changes cannot
be as efficient as we have to use DW_LNE_set_addres, but at least
most of the logic is shared.
This will be used so that, with CodeGen still using EmitDwarfLocDirective,
llvm-gcc is able to produce debug_line sections without needing an
assembler that supports .loc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119777 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 02:26:16 +00:00
Bill Wendling
602890dd8e
Add MC encodings for some Thumb instructions. Test for a few of them. The "bx
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lr" instruction cannot be tested just yet. It requires matching a "condition
code", but adding one of those makes things go south quickly...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 01:33:10 +00:00
Bill Wendling
cb21d1c9fd
Use array_pod_sort because the list is contiguous.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:38:19 +00:00
Owen Anderson
91a7c59134
Provide Thumb2 encodings for strex and ldrex.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119768 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:28:38 +00:00
Jim Grosbach
817c1a6ddd
Minor cleanups to a few llvm_unreachable() calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:27:09 +00:00
Bill Wendling
d1fadd8c5d
An 'unreachable' shouldn't have a '0 &&' prefix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119762 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:05:15 +00:00
Bill Wendling
50d0f58944
Add support for parsing the writeback ("!") token.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:43:05 +00:00
Jason W Kim
837caa9313
Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the .o path now works for ARM.
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Note: lo16AllZero remains in ARMInstrInfo.td - It can be factored out when Thumb movt is repaired.
Existing tests cover this update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119760 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:37:15 +00:00
Owen Anderson
71c11825bf
Fix encodings for pkhbt, and fix some tests where I accidentally tested ARM mode instead of Thumb2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119755 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:29:56 +00:00
Anton Korobeynikov
d9e3385ced
Move getInitialFrameState() to TargetFrameInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119754 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:25:52 +00:00
Jim Grosbach
75b7b879c0
ARM Encoding information for UXTAH and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:24:22 +00:00
Tanya Lattner
9684a7c128
Fix bug in DAGCombiner for ARM that was trying to do a ShiftCombine on illegal types (vector should be split first).
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Added test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119749 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 22:06:46 +00:00
Bill Wendling
24d22d2764
Don't allocate the SmallVector of Registers. It gets messy figuring out who
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should delete what when the object gets copied around. It's also making valgrind
upset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:50:54 +00:00
Owen Anderson
8ee9779658
Provide Thumb2 encodings for mov's that come from MOVCC SDNodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:46:31 +00:00
Jim Grosbach
c884aff5f4
Add ARM encoding information for LDRH post-increment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119743 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:43:37 +00:00
Anton Korobeynikov
d0c3817669
Move hasFP() and few related hooks to TargetFrameInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:19:35 +00:00
Bob Wilson
d5448bb6e8
Split up ARM LowerShift function.
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This function was being called from two different places for completely
unrelated reasons. During type legalization, it was called to expand 64-bit
shift operations. During operation legalization, it was called to handle
Neon vector shifts. The vector shift code was not written to check for
illegal types, since it was assumed to be only called after type legalization.
Fixed this by splitting off the 64-bit shift expansion into a separate
function. I don't have a particular testcase for this; I just noticed it
by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119738 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:16:28 +00:00
Owen Anderson
612fb5b9a6
More Thumb2 encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:15:19 +00:00
Owen Anderson
821752e2e6
Fill out the set of Thumb2 multiplication operator encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119733 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 20:32:18 +00:00
Bill Wendling
707120047e
Missed the _RET versions of LDMIA.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119726 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 19:44:29 +00:00
Eric Christopher
8b3ca6216d
Rewrite stack callee saved spills and restores to use push/pop instructions.
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Remove movePastCSLoadStoreOps and associated code for simple pointer
increments. Update routines that depended upon other opcodes for save/restore.
Adjust all testcases accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119725 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 19:40:05 +00:00
Jim Grosbach
056ab107ff
ARMPseudoInst instructions should default to being considered a single 4-byte
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instruction. Any that may be expanded otherwise by MC lowering should
override this value. rdar://8683274
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119713 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 18:01:40 +00:00
Chris Lattner
c146c4d47a
trivial QoI improvement. On this invalid input:
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sahf movl 344(%rdi),%r14d
we used to produce:
t.s:2:1: error: unexpected token in argument list
^
we now produce:
t.s:1:11: error: unexpected token in argument list
sahf movl 344(%rdi),%r14d
^
rdar://8581401
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119676 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 02:53:02 +00:00
Rafael Espindola
5c0556341e
Change CodeGen to use .loc directives. This produces a lot more readable output
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and testing is easier. A good example is the unknown-location.ll test that
now can just look for ".loc 1 0 0". We also don't use a DW_LNE_set_address for
every address change anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119613 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 02:04:25 +00:00
Evan Cheng
5c71c7a137
Silence compiler warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119610 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:43:23 +00:00
Jim Grosbach
1251e1a8df
Remove trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119608 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:39:50 +00:00
Jim Grosbach
99594eb1de
ARM PseudoInst instructions don't need or use an assembler string. Get rid of
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the operand to the pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119607 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:38:26 +00:00
Evan Cheng
1b4886dd00
Code clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119604 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:28:51 +00:00
Jim Grosbach
c6961f140a
Add FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119603 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:20:48 +00:00
Jim Grosbach
53694265a9
Refactor the ARM PICADD and PICLDR* instructions to really be pseudos and not
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just pretend to be.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119602 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:15:56 +00:00
Owen Anderson
35141a9ba3
Try again at providing Thumb2 encodings for basic multiplication operators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119601 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:08:42 +00:00
Jim Grosbach
160f8f0e67
Refactor a few ARM load instructions to better parameterize things and re-use
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common encoding information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119598 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 00:46:58 +00:00
Owen Anderson
424216453f
Revert r119593 while I figure out my testing disagrees with the buildbot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 00:42:51 +00:00
Owen Anderson
18333616cd
Provide correct Thumb2 encodings for basic multiplication operators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119593 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 00:19:10 +00:00
Jim Grosbach
85eb54cf0c
Clean up LEApcrel instuction(s) a bit. It's not really a Pseudo, so don't mark
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it as such. Add some encoding information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 23:33:14 +00:00
Owen Anderson
2f7aed39a3
Second attempt at correct encodings for Thumb2 bitfield instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119575 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 22:16:31 +00:00
Jim Grosbach
0129be281e
Fix comment typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119573 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:57:51 +00:00
Bob Wilson
05646099a0
Change ARMGlobalMerge to keep BSS globals in separate pools.
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This completes the fixes for Radar 8673120.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119566 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:25:39 +00:00
Bob Wilson
619a372617
Fix ARMGlobalMerge pass to check if globals are entirely within range.
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It is generally not sufficient to check if the starting offset is in range
of the maximum offset that can be efficiently used for the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119565 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:25:36 +00:00
Bob Wilson
72831dc905
Change the symbol for merged globals from "merged" to "_MergedGlobals".
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This makes it more clear that the symbol is an internal, compiler-generated
name and gives a little more description about its contents.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:25:33 +00:00
Bob Wilson
edf046716c
Fix the ARMGlobalMerge pass to look at variable sizes instead of pointer sizes.
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It was mistakenly looking at the pointer type when checking for the size of
global variables. This is a partial fix for Radar 8673120.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:25:27 +00:00
Jim Grosbach
f8dabac604
Make the ARM BR_JTadd instruction an explicit pseudo and lower it properly
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in the MC lowering process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119559 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:05:55 +00:00
Evan Cheng
6b19491468
Avoid isel movcc of large immediates when the large immediate is available in a register. These immediates aren't free.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119558 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:56:30 +00:00
Owen Anderson
5aba9f694f
Revert r119551, which broke buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:48:51 +00:00
Owen Anderson
23465a06f4
Provide Thumb2 encodings for bitfield instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119551 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:35:29 +00:00
Evan Cheng
c4af4638df
Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,
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and xor. The 32-bit move immediates can be hoisted out of loops by machine
LICM but the isel hacks were preventing them.
Instead, let peephole optimization pass recognize registers that are defined by
immediates and the ARM target hook will fold the immediates in.
Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ
instructions if there are multiple uses. This happens when the 'and' is live
out, machine sink would have sinked the computation and that ends up pessimizing
code. The peephole pass would recognize situations where the 'and' can be
toggled to define CPSR and eliminate the comparison anyway.
2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking
important optimizations.
rdar://8663787, rdar://8241368
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119548 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:13:28 +00:00
Rafael Espindola
f2dc4aa562
make isVirtualSection a virtual method on MCSection. Chris' suggestion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:03:54 +00:00
Owen Anderson
46c478e802
More miscellaneous Thumb2 encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119546 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 19:57:38 +00:00
Bill Wendling
df8d94da01
Add missing opcodes now that this function's used in more than one place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119539 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 19:16:20 +00:00
Jim Grosbach
89e14c7579
More ARM encoding bits. LDRH now encodes properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 18:11:11 +00:00
Evan Cheng
baa45f7298
Revert r119109 for now. It's breaking 176.gcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 09:31:04 +00:00
Che-Liang Chiou
3f409f7fef
Add simple arithmetics and %type directive for PTX
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 08:08:49 +00:00
Evan Cheng
3642e64c11
Simplify code that toggle optional operand to ARM::CPSR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119484 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 08:06:50 +00:00
Chris Lattner
b75c651e22
tidy up
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 05:41:32 +00:00
Bill Wendling
2567eec423
The machine instruction no longer encodes the submode as a separate operand. We
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should get the submode from the load/store multiple instruction's opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 05:31:09 +00:00
Bill Wendling
0f63075613
Proper encoding for VLDM and VSTM instructions. The register lists for these
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instructions have to distinguish between lists of single- and double-precision
registers in order for the ASM matcher to do a proper job. In all other
respects, a list of single- or double-precision registers are the same as a list
of GPR registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 04:32:08 +00:00
Bill Wendling
6bc105a7b9
Add binary emission stuff for VLDM/VSTM. This reuses the
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"getRegisterListOpValue" logic. If the registers are double or single precision,
the value returned is suitable for VLDM/VSTM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 00:45:23 +00:00
Bill Wendling
3380f6a4d0
Use the correct variable names so that the encodings will be correct.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119403 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 23:44:49 +00:00
Dan Gohman
742bf87efa
Reapply r118917. With pseudo-instruction expansion moved to
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a different pass, the complicated interaction between cmov expansion
and fast isel is no longer a concern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119400 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 22:43:23 +00:00
Oscar Fuentes
975176e5c6
Fix assembling X86CompilationCallback_Win64.asm on VS 10.
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Patch by Louis Zhuang!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 22:07:47 +00:00
Rafael Espindola
af6b580875
Add .loc methods to the streamer.
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Next: Add support for the !HasDotLocAndDotFile case to the MCAsmStreamer
and then switch codegen to use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 21:20:32 +00:00
Jim Grosbach
7911916cf7
ARM conditional mov encoding fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119354 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 18:13:42 +00:00
Bill Wendling
1eeb2806cb
L_bit doesn't work here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119325 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 02:20:22 +00:00
Bill Wendling
7b71878d9f
- Remove dead patterns.
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- Add encodings to the *LDMIA_RET instrs. Probably not needed...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 02:08:45 +00:00
Bill Wendling
73c57e149c
vldm and vstm are mnemonics for vldmia and vstmia resp.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119321 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 02:00:24 +00:00
Chris Lattner
b8efa6b475
Fix a bug I introduced in the ppc refactoring, which caused long
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branches to be emitted as:
bne cr0, 2
instead of:
bne cr0, $+8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119317 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 01:45:05 +00:00
Bill Wendling
73fe34a3ee
Encode the multi-load/store instructions with their respective modes ('ia',
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'db', 'ib', 'da') instead of having that mode as a separate field in the
instruction. It's more convenient for the asm parser and much more readable for
humans.
<rdar://problem/8654088>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 01:16:36 +00:00
Chris Lattner
0382a4c98e
add copy of comment to the code that will survive the mcjit'ization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119308 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 00:57:32 +00:00
Chris Lattner
b69cdfa6f3
relax an assertion a bit, allowing the GPR argument of
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these instructions to be encoded with getMachineOpValue.
This unbreaks ExecutionEngine/2003-01-04-ArgumentBug.ll
when running on a G5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 00:55:51 +00:00
Owen Anderson
c56dcbf641
Add Thumb2 encodings for mov and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 00:29:56 +00:00
Rafael Espindola
7339fb5dae
Change the 11 byte nop to be a single instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 23:10:30 +00:00
Chris Lattner
bc4434135f
fix a pasto that massively broke the ppc jit while the buildbots happened
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to be broken for other reasons
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119283 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 22:50:50 +00:00
Owen Anderson
da663f7b51
Attempt to provide encodings for some miscellaneous Thumb2 encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 21:30:39 +00:00
Evan Cheng
eb96a2f6c0
Code clean up. The peephole pass should be the one updating the instruction
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iterator, not TII->OptimizeCompareInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 21:20:45 +00:00
Owen Anderson
2c4c45deb6
Provide Thumb2 encodings for sxtb and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119185 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 21:12:05 +00:00
Eric Christopher
76dda7ec1d
Recommit this change and remove the failing part of the test - it didn't
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pass in the first place and was masked by earlier failures not warning
and aborting the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 21:11:06 +00:00
Jim Grosbach
99f53d13ef
ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B counterparts) binary encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119180 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 20:47:07 +00:00
Owen Anderson
bb6315d1e4
Add Thumb2 encodings for comparison and shift operators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 19:58:36 +00:00
Owen Anderson
a99e778ed8
Add correct Thumb2 encodings for mvn and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 18:45:17 +00:00
Jim Grosbach
11bbeecdf1
Add FIXMEs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 18:36:48 +00:00
Jim Grosbach
17e967eac2
Nuke redundant encoding bit set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119164 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 18:17:24 +00:00
Kalle Raiskila
38e0c9ba57
Improve code layout, mostly indentation.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119142 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 10:12:32 +00:00
Chris Lattner
b46443a686
Wire up primitive support in the assembler backend for writing .o files
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directly on the mac. This is very early, doesn't support relocations and
has a terrible hack to avoid .machine from being printed, but despite
that it generates an bitwise-identical-to-cctools .o file for stuff like
this:
define i32 @test() nounwind { ret i32 42 }
I don't plan to continue pushing this forward, but if anyone else was
interested in doing it, it should be really straight-forward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119136 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 08:49:58 +00:00
Chris Lattner
b7035d0442
split out an encoder for memri operands, allowing a relocation to be plopped
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into the immediate field. This allows us to encode stuff like this:
lbz r3, lo16(__ZL4init)(r4) ; globalopt.cpp:5
; encoding: [0x88,0x64,A,A]
; fixup A - offset: 0, value: lo16(__ZL4init), kind: fixup_ppc_lo16
stw r3, lo16(__ZL1s)(r5) ; globalopt.cpp:6
; encoding: [0x90,0x65,A,A]
; fixup A - offset: 0, value: lo16(__ZL1s), kind: fixup_ppc_lo16
With this, we should have a completely function MCCodeEmitter for PPC, wewt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119134 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 08:22:03 +00:00
Chris Lattner
17e2c18835
add support for encoding the lo14 forms used for a few PPC64 addressing
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modes. For example, we now get:
ld r3, lo16(_G)(r3) ; encoding: [0xe8,0x63,A,0bAAAAAA00]
; fixup A - offset: 0, value: lo16(_G), kind: fixup_ppc_lo14
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 08:02:41 +00:00
Chris Lattner
f3b6e06679
fix a regression with the new instprinter: we lost the ability to
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print DBG_VALUE instructions. This should unbreak the llvm-gcc-powerpc-darwin9
buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119132 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 07:52:06 +00:00
Chris Lattner
85cf7d737d
implement the start of support for lo16 and ha16, allowing us to get stuff like:
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lis r4, ha16(__ZL4init) ; encoding: [0x3c,0x80,A,A]
; fixup A - offset: 0, value: ha16(__ZL4init), kind: fixup_ppc_ha16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119127 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 06:33:39 +00:00
Chris Lattner
b719437325
add a fixup for conditional branches, giving us output like this:
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beq cr0, LBB0_4 ; encoding: [0x41,0x82,A,0bAAAAAA00]
; fixup A - offset: 0, value: LBB0_4, kind: fixup_ppc_brcond14
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 06:12:22 +00:00
Chris Lattner
8d70411dcd
change direct branches to encode with the same encoding method
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as direct calls. Change conditional branches to encode with
their own method, simplifying the JIT encoder and making room
for adding an mc fixup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119125 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 06:09:35 +00:00
Chris Lattner
019aef6df7
eliminate a now-unneeded operand printer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119124 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 06:01:10 +00:00
Chris Lattner
a9d9ab9673
split call operands out to their own encoding class, simplifying
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code in the JIT. Use this to form the first fixup for the PPC backend,
giving us stuff like this:
bl L_foo$stub ; encoding: [0b010010AA,A,A,0bAAAAAA01]
; fixup A - offset: 0, value: L_foo$stub, kind: fixup_ppc_br24
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119123 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 05:57:53 +00:00
Chris Lattner
7192eb8732
add proper encoding for MTCRF instead of using a hack.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119121 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 05:19:25 +00:00
Chris Lattner
2ac190238e
add fields to the .td files unconditionally, simplifying tblgen a bit.
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Switch the ARM backend to use 'let' instead of 'set' with this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119120 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 05:19:05 +00:00
Chris Lattner
a04084e777
add basic encoding support for immediates and registers, allowing us
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to encode all of these instructions correctly (for example):
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x01,0x00,0x08]
stwu r1, -64(r1) ; encoding: [0x94,0x21,0xff,0xc0]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119118 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:51:55 +00:00
Chris Lattner
a2d602529d
add a dummy entry to fix a build error
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119117 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:47:16 +00:00
Chris Lattner
5ffe38ef6a
Implement a basic MCCodeEmitter for PPC. This doesn't handle
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fixups yet, and doesn't handle actually encoding operand values,
but this is enough for llc -show-mc-encoding to show the base
instruction encoding information, e.g.:
mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6]
stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00]
stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00]
Ltmp0:
lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00]
cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00]
beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 04:16:32 +00:00
Chris Lattner
84a04adf3a
dissolve some more hacks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119115 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 03:53:53 +00:00
Chris Lattner
0fe7184ba1
fix some fixme's, removing dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119114 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 03:51:13 +00:00
Chris Lattner
ab63864564
remove asmstrings (which can never be printed) from pseudo
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instructions, allowing is to eliminate some dead operand
printing methods from the instprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119113 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 03:48:58 +00:00
Chris Lattner
374c608fca
strength reduce TOC temp label generation, no functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119112 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 03:42:54 +00:00
Chris Lattner
cb22fa6536
rip out a ton of old instruction printing junk now that the
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new instprinting logic is there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 03:39:06 +00:00
Evan Cheng
fbc8c67992
Make sure ARM multi load / store pass copies memoperands when forming ldrd / strd. pr8113.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 03:30:30 +00:00
Chris Lattner
3a4dd305ac
Turn on the new instprinter by default.
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The only change in the output is:
1) we get a better comment on mfcr, we get:
mfcr r2 ; cr2
instead of:
mfcr r2 ; 32
2) we no longer emit $stub's on powerpc/leopard. The Leopard
linker autosynthesizes them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 03:27:05 +00:00
Chris Lattner
6d2ff122af
convert the operand bits into bitfields since they are all combinable in
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different ways. Add $non_lazy_ptr support, and proper lowering for
global values.
Now all the ppc regression tests pass with the new instruction printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119106 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 03:13:19 +00:00
Chris Lattner
1e61e69d40
add targetoperand flags for jump tables, constant pool and block address
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nodes to indicate when ha16/lo16 modifiers should be used. This lets
us pass PowerPC/indirectbr.ll.
The one annoying thing about this patch is that the MCSymbolExpr isn't
expressive enough to represent ha16(label1-label2) which we need on
PowerPC. I have a terrible hack in the meantime, but this will have
to be revisited at some point.
Last major conversion item left is global variable references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119105 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 02:46:57 +00:00
Chris Lattner
dd57417c08
remove some extraneous quotes to make the new instprinter match.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119104 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 02:43:46 +00:00
Chris Lattner
65a0adb597
silence a ton of warnings from clang.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 01:45:44 +00:00
Anton Korobeynikov
a460e4a142
Attempt to unbreak cmake-based builds
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 00:48:12 +00:00
Anton Korobeynikov
3346491223
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119097 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 00:06:54 +00:00
Anton Korobeynikov
78b4fee8fd
Whitespace cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119096 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-15 00:06:05 +00:00
Chris Lattner
b908258d59
implement support for the MO_DARWIN_STUB TargetOperand flag,
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and have isel apply to to call operands as required. This allows
us to get $stub suffixes on label references on ppc/tiger with the
new instprinter, fixing two tests. Only 2 to go.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119093 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 23:42:06 +00:00
Chris Lattner
21d272874b
tidy up, no functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119092 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 23:32:42 +00:00
Chris Lattner
749ba48fab
with the picbase nonsense starting to be figured out, implement
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lowering support for MovePCtoLR[8]. Down to 4 failures again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119090 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 22:56:43 +00:00
Chris Lattner
142b531e02
move the pic base symbol stuff up to MachineFunction
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since it is trivial and will be shared between ppc and x86.
This substantially simplifies the X86 backend also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119089 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 22:48:15 +00:00
Chris Lattner
4fd0ea0166
simplify getPICBaseSymbol a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119088 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 22:37:11 +00:00
Chris Lattner
6135a96792
reimplement ppc asmprinter "toc" handling to use a VariantKind
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on the operand, required for .o file writing and fixing
the PowerPC/mult-alt-generic-powerpc64.ll failure with the new
instprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119087 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 22:22:59 +00:00
Chris Lattner
2ead458ae8
lower PPC::MFCRpseud when transforming to MC, avoiding calling
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the aborting printSpecial() method. This gets us to 8 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119084 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 22:03:15 +00:00
Chris Lattner
959fb3dd5c
make the stubbed-out printer methods abort instead of
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printing nothing. This gets us back up to 24 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:54:34 +00:00
Chris Lattner
b2e477f546
wire up a few more things, down to 4 test failures, all
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about handling $stub, lo/hi etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:51:37 +00:00
Chris Lattner
fd6688f59a
properly wire up the instprinter to the ppc64 backend, down to 5 failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119081 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:42:53 +00:00
Chris Lattner
2e35248f14
implement pretty printing support for the various pseudo
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ops the asmprinter supported, fixing PowerPC/rlwimi2.ll
among others. Down to 20 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119080 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:39:51 +00:00
Chris Lattner
58d014f603
Wire up symbol hi/lo printing. We don't print hi()/lo(), but this gets
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us further along. Only 28 failures now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119079 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:33:07 +00:00
Chris Lattner
1520fd6095
implement basic support for symbol operand lowering,
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and printing support for call operands. Down to 77 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119078 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:20:46 +00:00
Chris Lattner
77ec256be6
trim #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119075 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:16:04 +00:00
Chris Lattner
a7217c824d
switch PPC to a simplified MCInstLowering model.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119074 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:12:33 +00:00
Chris Lattner
8d63ba8260
fix PPC.h to not pull in TargetMachine.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:09:28 +00:00
Chris Lattner
30e2cc254b
rename LowerToMCInst -> LowerARMMachineInstrToMCInst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119071 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 21:00:02 +00:00
Chris Lattner
1612a619f1
even more simplifications. ARM MCInstLowering is now just
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a single function instead of a class. It doesn't need the
complexity that X86 does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119070 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 20:58:38 +00:00