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11211 Commits

Author SHA1 Message Date
Evan Cheng
d27c9fc403 Add thumb2 sign / zero extend with rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74755 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 01:43:10 +00:00
Evan Cheng
2889ccea62 Add Thumb2 load / store multiple instructions. Not used yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74749 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 00:18:36 +00:00
Evan Cheng
78236f8c8a t2LDR_PRE etc are loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74741 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 00:08:19 +00:00
Evan Cheng
6d94f11196 Added indexed stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74740 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 00:06:39 +00:00
Evan Cheng
4fbb9960ad Sign extending pre/post indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 23:16:11 +00:00
David Goodwin
b50ea5c48f Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74731 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 22:18:33 +00:00
Douglas Gregor
033080cf6a CMake build fixes, from Xerxes Ranby 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74720 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 18:53:52 +00:00
Chris Lattner
2067433852 simplify some logic by using isWeakForLinker(). Thanks to Anton for 
pointing this out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74700 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 16:08:53 +00:00
Evan Cheng
e88d5cee9d Thumb2 pre/post indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 07:28:31 +00:00
Evan Cheng
0412957764 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74693 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 06:44:30 +00:00
Evan Cheng
d770d9e7d1 Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74692 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 06:38:40 +00:00
Chris Lattner
cd714b12fc @GOTPCREL is also rip-relative. Fix fast-isel to do the right thing. 
This fixes an llvm-gcc bootstrap problem I introduced.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74691 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 04:22:01 +00:00
Chris Lattner
27598ec1e2 Fix yet-another bug I introduced into fastisel, this time handling 
constant pool references that weren't getting properly rip-relative.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74689 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 03:14:25 +00:00
Bruno Cardoso Lopes
3d62a412fb Remove getFunctionAlignment from TargetELFInfo and use new MachineFunction alignment method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74686 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 02:13:13 +00:00
Evan Cheng
31926a78e3 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74683 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 01:30:04 +00:00
Chris Lattner
c4b0b400b0 clarify: stub emission depends on the version of the linker you use, it has nothing 
to do with the target.  Also, the stub elimination optimization *requires* making the
stub explicit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74682 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 01:24:34 +00:00
Evan Cheng
af4550f826 Factor out ARM indexed load matching code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74681 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 01:23:32 +00:00
Dan Gohman
f530c92cd5 Fix a bunch of other places that used operator[] to test whether 
a key is present in a std::map or DenseMap to use find instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74676 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 00:17:47 +00:00
Dale Johannesen
7074feab96 Add darwin stub removal to wishlist. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74667 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 23:36:02 +00:00
Bob Wilson
8b024a5eb5 Add a new addressing mode for NEON load/store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74658 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 23:16:05 +00:00
Bob Wilson
b864e89fe4 Fix a comment typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74650 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 21:59:43 +00:00
Bob Wilson
d4d826e170 Fix up a comment: besides the >80col lines, the operation for this 
addressing mode is encoded in the second operand, not the third.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74641 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 21:22:45 +00:00
Bill Wendling
b4202b84d7 Update comments to make it clear that the function alignment is the Log2 of the 
bytes and not bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74624 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 18:50:55 +00:00
Chris Lattner
4fb75e5425 Fix codegen for references to available_externally symbols. This fixes 
PR4482.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74613 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 16:53:44 +00:00
Chris Lattner
35c28eca62 Fix some fast-isel problems selecting global variable addressing in 
pic mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74582 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 03:27:19 +00:00
Evan Cheng
2578ba26e7 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 01:59:31 +00:00
Daniel Dunbar
5bcc8bd0c6 Remove unused AsmPrinter OptLevel argument, and propogate. 
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74579 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 01:48:54 +00:00
David Goodwin
d1fa120aee Add PIC load and store patterns for Thumb-2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74577 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 00:01:13 +00:00
David Goodwin
6647cea111 Thumb-2 load and store double description. But nothing yet creates them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74566 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 22:50:01 +00:00
Bill Wendling
20c568f366 Add an "alignment" field to the MachineFunction object. It makes more sense to 
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.

This allows for future work that would allow for precise no-op placement and the
like.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74564 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 22:38:32 +00:00
David Goodwin
73b8f16b36 Add thumb-2 store word, halfword, and byte. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74555 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 22:11:34 +00:00
David Goodwin
c9a59b5960 Improve Thumb-2 jump table support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74549 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 19:50:22 +00:00
David Greene
f0c3d023ae Add 256-bit memory operand support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74548 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 19:24:59 +00:00
David Goodwin
5e47a9a6e4 Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74543 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 18:04:13 +00:00
Rafael Espindola
af5f6ba32d Fix PR4485. 
Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would
cause one register to remain on the stack at the function return.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74534 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 16:40:03 +00:00
Rafael Espindola
f55715c5c7 Fix PR4484. 
This was caused by me confounding FP0 and ST(0).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74523 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 12:18:16 +00:00
Evan Cheng
4784f1fc73 Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. 
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 08:49:04 +00:00
Chris Lattner
e3821c79bc remove a bogus note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74509 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 05:22:31 +00:00
Chris Lattner
a05ec61684 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 04:20:46 +00:00
Evan Cheng
f3c21b857b A few more load instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74500 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 02:15:48 +00:00
David Greene
d94c101abb Add a 256-bit register class and YMM registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74469 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 22:50:51 +00:00
David Goodwin
baeb911d60 Add Thumb-2 support for TEQ amd TST. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 22:49:42 +00:00
Rafael Espindola
63de5c3b7e FIX PR 4459. 
Not sure I understand how the temp register gets used,
but this fixes a bug and introduces no regressions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74446 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 20:29:59 +00:00
Owen Anderson
9917700af4 Add a target-specific DAG combine on X86 to fold the common pattern of 
fence-atomic-fence down to just the atomic op.  This is possible thanks to
X86's relatively strong memory model, which guarantees that locked instructions
(which are used to implement atomics) are implicit fences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74435 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 18:04:45 +00:00
David Greene
3016af5a1d Add processor descriptions for Istanbul and Shanghai. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74429 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 16:54:06 +00:00
David Greene
640a0c1477 Fix a subtarget feature bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 16:51:01 +00:00
David Greene
9b9838dbd4 Add more vector ValueTypes for AVX and other extended vector instruction 
sets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74427 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 16:47:10 +00:00
David Goodwin
c0309b48b5 Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74423 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 15:33:01 +00:00
Duncan Sands
c91e68a0c4 Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt 
to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74421 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 13:11:32 +00:00
Evan Cheng
055b0310f8 Implement Thumb2 ldr. 
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74420 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 07:51:04 +00:00
Anton Korobeynikov
55ad1f22b4 Simplify a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74385 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 12:59:03 +00:00
Anton Korobeynikov
a98cbc554c ARM refactoring. Step 2: split RegisterInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74384 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 12:16:40 +00:00
Douglas Gregor
1b573d8b20 Add ThumbInstrInfo.cpp to the CMake makefiles 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 07:44:59 +00:00
Chris Lattner
f7789c72bd remove a bunch of fixmes (old checking code) and commonize all the 
target-specific operand printing functionality.  Yay.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74379 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:46:24 +00:00
Chris Lattner
b1acd68fe4 pull @GOT, @GOTOFF, @GOTPCREL handling into isel from the asmprinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74378 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:39:56 +00:00
Chris Lattner
4c1b606ecd simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74377 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:24:12 +00:00
Chris Lattner
553e571b43 fix clang/test/CodeGenObjC/try.m, a basereg doesn't mean no global anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74375 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:50:14 +00:00
Chris Lattner
380135cc3e fix a bunch of failures in the X86-64 JIT by tolerating RIP as 
a base register.  We just ignore it for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74374 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:46:33 +00:00
Chris Lattner
74d3f50a80 factor some logic out into a helper function, allow remat of loads from constant 
globals.  This implements remat-constant.ll even without aggressive-remat.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74373 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:38:55 +00:00
Chris Lattner
18c5987fa3 Reimplement rip-relative addressing in the X86-64 backend. The new 
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74372 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:16:01 +00:00
Evan Cheng
9cb9e6778c Renaming for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74368 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 02:26:13 +00:00
Chris Lattner
89da699092 Fix PR4466 by making fastisel set operand flags correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74366 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 01:31:51 +00:00
David Goodwin
8eba8e0ca3 Remove outdated comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74357 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 23:39:02 +00:00
David Goodwin
dcdaebc592 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74355 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 23:13:13 +00:00
David Greene
343dadbb36 Add feature flags for AVX and FMA and fix some SSE4A feature flag 
initialization problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74350 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:46:54 +00:00
Evan Cheng
2c2fb823b9 Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:00:19 +00:00
Chris Lattner
d8220e5794 simplify printing of MO_ExternalSymbol in a non-pcrel context. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74334 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:47:27 +00:00
Owen Anderson
2af72d455b Privatize some data. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74332 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:45:04 +00:00
Anton Korobeynikov
d49ea77cbc Split thumb-related stuff into separate classes. 
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74329 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:28:53 +00:00
Chris Lattner
c4233af200 add %rip to the GR64 register class. Lets avoid allocating it to anything though! :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74328 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:25:00 +00:00
Chris Lattner
b903bed0fe Move all the TLS processing logic into isel, don't do it in asmprinter at all. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74327 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:20:29 +00:00
Chris Lattner
ba8ef45d12 make sure to propagate operand flags in SelectTLSADDRAddr properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74326 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:18:37 +00:00
David Goodwin
24062ac5be Thumb-2 has CLZ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74322 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 20:47:43 +00:00
David Goodwin
7ce720b448 Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74321 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 20:45:56 +00:00
Chris Lattner
03a597f2b7 minor cleanup/framework changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74316 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 20:00:05 +00:00
Owen Anderson
52132bf643 Privatize some variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74315 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 19:48:37 +00:00
Chris Lattner
41621a2700 move magic for PIC constantpool references from asmprinter to isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74313 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 19:22:52 +00:00
Chris Lattner
89ca575c31 use jump table operand flags in asm printer instead of "magic predicates" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74310 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 18:55:01 +00:00
David Goodwin
93d95bd2c3 ADC used to implement adde should use "adcs" opcode instead of "adc". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74293 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 18:07:25 +00:00
David Goodwin
83b3593478 Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI. 
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74288 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 16:10:07 +00:00
Evan Cheng
2b51d51bc3 Simplify predicate CarryDefIsUsed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74277 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 06:10:18 +00:00
Chris Lattner
0b0deab464 fix a pasto. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 05:56:49 +00:00
Chris Lattner
b8afeb99e9 propagate target operand flags through addressing mode selection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74272 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 05:51:45 +00:00
Nick Lewycky
b8b7347c10 Escape the name of the module since it comes from the file name and may include 
invalid characters like backslashes on Windows. Patch by James Abbatiello!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74265 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 04:33:37 +00:00
Devang Patel
0f05d22a31 Let's ignore MDStrings also! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74255 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 02:26:12 +00:00
Daniel Dunbar
1c723b7145 Fix may-be-used-uninitialized warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74253 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 02:03:52 +00:00
Chris Lattner
55e7c82730 start adding logic in isel to determine asm printer semantics, step N of M. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74246 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 00:43:52 +00:00
Evan Cheng
151b9afdee Add a note about commuting conditional move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74241 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 00:28:48 +00:00
Evan Cheng
b604b2c470 These are done / no longer applicable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74239 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 00:25:27 +00:00
Evan Cheng
8de898abc8 Mark a bunch of instructions commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74237 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 00:19:44 +00:00
Evan Cheng
e864b74e95 tst is also commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74236 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 00:19:07 +00:00
Owen Anderson
62c38434e2 Committed the wrong version in my last commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74235 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 00:17:05 +00:00
Owen Anderson
94326677f0 Privatize a static variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74234 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 00:15:27 +00:00
Evan Cheng
6267422318 Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74228 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 23:34:10 +00:00
David Goodwin
0919a916bf Use MVN for ~t2_so_imm immediates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74223 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 23:11:21 +00:00
David Goodwin
c9ee1189c5 Add Def/Use of CPSR for Thumb-1 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74219 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 22:49:55 +00:00
Evan Cheng
9e03cbefc5 Unbreak mingw build. Patch by Viktor Kutuzov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74212 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 22:04:44 +00:00
Evan Cheng
1e249e3705 ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74200 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 20:59:23 +00:00
Owen Anderson
3ea93ded0f Privatize this map. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74189 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 18:13:04 +00:00
Sanjiv Gupta
cbd5f0a6b9 Added floating point conditional operations support via libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74187 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 18:12:06 +00:00
Chris Lattner
2b0de6a286 simplify shouldPrintPLT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74186 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 17:58:52 +00:00
David Goodwin
9a36bdbaf1 Test commit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74185 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 17:52:32 +00:00
Chris Lattner
ac5e887a6c Use target-specific machine operand flags to eliminate a gross hack 
from the asmprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74184 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 17:38:33 +00:00
Chris Lattner
b1fb84dee9 just eliminate the code entirely! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74183 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 17:28:07 +00:00
Bob Wilson
e481f12749 Revert 74164. We'll want to use this method later. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74176 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 16:03:07 +00:00
Sanjiv Gupta
8ebd4b6422 Identify unconditional gotos and generate a page sel instructions before them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74172 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 11:03:14 +00:00
Bob Wilson
c9028e69f1 Remove unused hasV6T2Ops method. We already have a separate feature to 
identify Thumb2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74164 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 05:20:31 +00:00
Douglas Gregor
4b73893d82 Add missing dependencies to the CMake build system. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74161 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 05:03:06 +00:00
Evan Cheng
0aa1d8c52d Change thumb2 instruction definitions so if-converter so add predicate operands and / or flip the 's' bit to set the condition flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74158 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 02:08:06 +00:00
Evan Cheng
b6c29d5512 Add thumb2 add sp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74156 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 01:21:30 +00:00
Chris Lattner
4b950ec072 fix comments to be correct. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74154 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 01:15:47 +00:00
Evan Cheng
7dcf4a826c Some reorg and additional comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74152 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 01:05:06 +00:00
Devang Patel
e4c0c0fab8 No need to code gen MDNodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74150 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 00:47:42 +00:00
Evan Cheng
a09b9ca10f Add Thumb2 pc relative add. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74141 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 23:47:58 +00:00
Evan Cheng
023dd3fb0b 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74138 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 23:14:45 +00:00
Chris Lattner
ab16299346 move some functions, add a FIXME, use PrintPICBaseSymbol to print the 
picbase instead of inlining it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74111 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 19:44:36 +00:00
Chris Lattner
b5299dd06a reimplement getPICLabelString as PrintPICBaseSymbol to eliminate std::string heap thrashing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74105 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 19:19:16 +00:00
Chris Lattner
0de1fc4f41 sink management of DwarfWriter & MachineModuleInfo into the AsmPrinter base class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74101 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 19:09:55 +00:00
Chris Lattner
1f522feabf sink dwarf finalization out of each target into AsmPrinter::doFinalization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74097 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:54:37 +00:00
Chris Lattner
0a7befa8bd eliminate the ExtWeakSymbols set from AsmPrinter. This eliminates 
a bunch of code from all the targets, and eliminates nondeterministic
ordering of directives being emitted in the output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74096 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:52:01 +00:00
Chris Lattner
52cff83526 only emit one .align for all the hidden gv stubs instead of one for each. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74094 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:24:42 +00:00
Chris Lattner
8f61f984b0 inline print*Stub and rearrange function stub printing to more closely match 
gv and hiddengv stub printing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74093 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:24:09 +00:00
Chris Lattner
3a03f74349 remove dead code now that personality functions don't print stubs directly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74092 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:19:01 +00:00
Chris Lattner
9dd71749bc remove now-dead argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74091 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:17:56 +00:00
Chris Lattner
381d4fef6f simplify personality function stub printing to use the mangler and 
decorateName like other stuff instead of special casing _.  Also, stick
it into GVStubs and let the normal stub printer print the stub instead 
of doing it manually.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74090 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:17:00 +00:00
Chris Lattner
7af485e109 remove dead argument 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74089 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:00:11 +00:00
Chris Lattner
974469d7aa factor some code better. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74067 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 05:47:59 +00:00
Chris Lattner
40e3c7acad wire up support for MCContext/MCStreamer in -experimental-asm-printer mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74066 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 05:46:28 +00:00
Nick Lewycky
b825aaa028 Unbreak build on Linux by removing Darwinism. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74046 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 01:08:42 +00:00
Dan Gohman
fd6325cbb2 Revert this accidental commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74042 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 00:55:55 +00:00
Dan Gohman
6bbcba18db Move the special cases for constants out of getUnknown and into 
createSCEV. Also, recognize UndefValue in createSCEV.

Change getIntegerSCEV's comment to avoid mentioning FP types,
and re-implement it in terms of getConstant instead of getUnknown.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74041 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 00:54:57 +00:00
Bob Wilson
a96751fc8f Provide InitializeAllTargets and InitializeNativeTarget functions in the 
C bindings.  Change all the backend "Initialize" functions to have C linkage.
Change the "llvm/Config/Targets.def" header to use C-style comments to avoid
compile warnings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74026 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 23:59:40 +00:00
Sean Callanan
1c97ceb5e2 Test commit: fixed spacing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74022 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 23:25:37 +00:00
Evan Cheng
b8f7706911 Test instructions operands were printed in the wrong order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73990 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:56:37 +00:00
Bill Wendling
5c324d77d9 "The MMX_MASKMOVQ and MMX_MASKMOVQ64 instructions are labeled as MRMDestMem 
instructions, which implies that there is an explicit memory operand.  There is
(however) no explicit memory operand; although this is a store, the only memory
operand is implicit, indicated by DS:EDI.  This causes the table-generation code
for the disassembler to report an error."

Patch by Sean Callanan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73989 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:52:59 +00:00
Evan Cheng
a67efd1226 Proper patterns for thumb2 shift and rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73987 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:39:13 +00:00
Evan Cheng
e870af4837 Code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:38:34 +00:00
Evan Cheng
09c39fcf83 Add IsThumb1Only to most 16-bit thumb instructions since we want to isel 32-bit instructions when they are available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73985 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:38:13 +00:00
Evan Cheng
e499f97058 Rename SelectShifterOperand to SelectThumb2ShifterOperandReg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 18:14:38 +00:00
Douglas Gregor
7e9e36a23e Eliminate object-relinking support from CMake. Fixes PR 4429 and 
cleans up the CMake-based build system a bit. Started by a patch from
Xerxes Rånby.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73969 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 17:57:35 +00:00
Evan Cheng
83a2129332 Obvious typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73967 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 17:54:26 +00:00
Evan Cheng
f49810c7e6 Initial Thumb2 support. Majority of the work is done by David Goodwin. There are 
also some contribution from Jim Grosbach, Bob Wilson, and Evan Cheng.

I've done my best to consolidate the patches with those that were done by
Viktor Kutuzov and Anton Korzh from Access Softek, Inc. Let me know if missed
anything. I've completely reorganized the thumb2 td file, made more extensive
uses of multiclass, etc.

Test cases will be contributed later after I re-organize what's in svn first.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73965 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 17:48:47 +00:00
Sanjiv Gupta
ae99227ef9 Fold the add (ptr, offset) into ptr[offset] only if the offset is small enough. movwi and moviw allow value of 5-bits only (i.e. 32). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73953 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 07:10:19 +00:00
Evan Cheng
e07715cfba Minor reorg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 05:25:29 +00:00
Evan Cheng
3850a6ae9d Replace isTwoAddress with operand constraint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73947 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 05:23:49 +00:00
Owen Anderson
606e9eb6e6 Guard the layout info object. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73928 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 00:21:15 +00:00
Bob Wilson
5bafff36c7 Add support for ARM's Advanced SIMD (NEON) instruction set. 
This is still a work in progress but most of the NEON instruction set
is supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 23:27:02 +00:00
Bob Wilson
1c76d0ee5c Add explicit types for shift count constants. This is in preparation for 
another change that makes the types ambiguous (at least as far as tablegen
is concerned).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73909 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 22:08:29 +00:00
Bob Wilson
9170ab6685 Use thumb2 for ARM architectures V6T2 and later. Fix a bug in checking 
for "thumb" and add a check for V6T2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73905 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 21:28:22 +00:00
Bob Wilson
54fc124d72 For Darwin on ARMv6 and newer, make register r9 available for use as a 
caller-saved register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73901 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 21:01:46 +00:00
Bruno Cardoso Lopes
0d3193ef3c Add more methods to gather target specific elf stuff 
Support for .text relocations, implementing TargetELFWriter overloaded methods for x86/x86_64.
Use a map to track global values to their symbol table indexes
Code cleanup and small fixes



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73894 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 19:16:16 +00:00
Evan Cheng
8dcbbdd00e hasFP should return true if frame address is taken. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73893 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 18:38:48 +00:00
Bob Wilson
e64e3cf9ad Fix llvm-gcc build for armv6t2 and later architectures. The hasV6T2Ops 
predicate does not check if Thumb mode is enabled, and when in ARM mode
there are still some checks for constant-pool use that need to run.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73887 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 17:29:13 +00:00
Rafael Espindola
1c3329f707 Fix PR4185. 
Handle FpSET_ST0_80 being used when ST0 is still alive.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73850 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-21 12:02:51 +00:00
Chris Lattner
e372333597 simplify closing paren and (rip) printing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73841 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-21 02:22:53 +00:00
Chris Lattner
4150c086d0 indentation fix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73840 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-21 02:22:34 +00:00
Chris Lattner
2f429e5eb6 remove #if 0 code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73837 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-21 01:48:49 +00:00
Chris Lattner
aecaa1f143 cosmetic changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73836 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-21 01:27:55 +00:00
Chris Lattner
5c0b16d0c4 change TLS_ADDR lowering to lower to a real mem operand, instead of matching as 
a global with that gets printed with the :mem modifier.  All operands to lea's 
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this.  There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).

This also makes the use of EBX explicit in the operand list in the 32-bit, 
instead of implicit in the instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73834 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 20:38:48 +00:00
Chris Lattner
8cb65a5092 remove dead code, the main codepath never has to deal 
with MBB's.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73830 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 19:34:47 +00:00
Chris Lattner
7680e73341 eliminate the "call" operand modifier from the asm descriptions, modeling 
it as a pcrel immediate instead.  This gets pc-rel weirdness out of the
main printoperand codepath.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73829 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 19:34:09 +00:00
Chris Lattner
7f8217f64b fix edit-o 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73824 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 08:13:12 +00:00
Chris Lattner
dc479f6ebf some comments and cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73818 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 07:59:10 +00:00
Chris Lattner
c12430644a implement support for lowering subregs when preparing to print 
LEA64_32r, eliminating a bunch of modifier logic stuff on addr modes.

Implement support for printing mbb labels as operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73817 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 07:03:18 +00:00
Devang Patel
e9fe6c7729 Remove unused field. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73815 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 01:07:54 +00:00
Devang Patel
66b4d3ba52 Initialize MMI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73813 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 01:00:07 +00:00
Chris Lattner
ad48be0ea3 hook up printMemReference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73811 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 00:50:32 +00:00
Chris Lattner
f38c03af2a Start implementing translation of MachineInstr to MCInst. Next 
step is to make tblgen generate something more appropriate for MCInst,
and generate calls to operand translation routines where needed.
This includes a bunch of #if 0 code which will slowly be refactored into
something sensible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73810 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 00:49:26 +00:00
Chris Lattner
d5fb790613 stub out some hacky code for wiring up the new asmprinter interfaces 
on X86.  Not useful yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73799 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 23:59:57 +00:00
Devang Patel
5090f19f09 DwarfWriter is used to emit EH info also. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73792 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 23:21:20 +00:00
Evan Cheng
ae69a2a12b Enable arm pre-allocation load / store multiple optimization pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73791 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 23:17:27 +00:00
Devang Patel
1e86a66b00 mv CodeGen/DebugLoc.h Support/DebugLoc.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73786 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 22:08:58 +00:00
Devang Patel
14a55d952c Move up dwarf writer initialization in common AsmPrinter class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73784 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 21:54:26 +00:00
Anton Korobeynikov
e494b9e0d7 Unbreak cyclic deps 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73781 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 19:36:55 +00:00
Chris Lattner
225503a5b5 fix the sparc codegen to not depend on the sparc asmprinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 15:48:10 +00:00
Evan Cheng
b1019480b6 Add comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73761 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 07:06:07 +00:00
Eli Friedman
7e2242be71 Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to 
handle with an SSE2 instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73760 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 07:00:55 +00:00
Evan Cheng
7a42b08be8 Should be using Bcc (average) latency to determine if-conversion threshold, not BL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73759 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 06:56:26 +00:00
Eli Friedman
aace4b1a2c Misc tweaks to Intel asm printing to make it more compatible with MASM. 
Patch by Benedict Gaster.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73753 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 04:48:38 +00:00
Evan Cheng
974fe5d691 Transfer dead markers when a ldrd is changed into a ldm or a pair of ldr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73749 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:59:04 +00:00
Evan Cheng
8557c2bcb8 Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73747 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:51:50 +00:00
Eli Friedman
6b7bb42c36 Mark a few Thumb instructions commutable; just happened to spot this 
while experimenting.  I'm reasonably sure this is correct, but please 
tell me if these instructions have some strange property which makes this
change unsafe.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73746 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:43:08 +00:00
Chris Lattner
fadc83c699 add a file I missed, this goes with r73743 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73744 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 00:47:59 +00:00
Chris Lattner
475370b036 Add some scaffolding for a new experimental asmprinter 
implementation.  The idea is that we want asmprinting to
work by converting MachineInstrs into a new MCInst class,
then the per-instruction asmprinter works on MCInst.  MCInst
and the new asmprinters will not depend on most of the 
llvm code generators.  This allows building diassemblers
that don't link in the whole llvm code generator.  This is
step #1 of many.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73743 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 00:47:33 +00:00
Chris Lattner
4e0f25b603 merge the common darwin settings from the X86/PPC/ARM targets 
into DarwinTargetAsmInfo.cpp.  The remaining differences should
be evaluated.  It seems strange that x86/arm has .zerofill but ppc
doesn't, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73742 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 00:08:39 +00:00
Chris Lattner
a93ca92379 move mangler quote handling from asm printers to TargetAsmInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73738 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:41:35 +00:00
Chris Lattner
7e816dc175 minor cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73737 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:33:13 +00:00
Chris Lattner
b839c3f577 simplify macro debug info directive handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:31:37 +00:00
Evan Cheng
cd828618b8 Remove UseThumbBacktraces. Just check if subtarget is darwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73734 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:14:30 +00:00
Evan Cheng
b13bafe5c1 On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73720 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 20:37:15 +00:00
Evan Cheng
f9f1da17f8 - Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints. 
- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping.
- More fixes to get ARM load / store double word working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73671 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 02:04:01 +00:00
Dale Johannesen
063989455d It looks like nobody is working on PR 4158, so I'm 
adding a check to catch this case at compile time
instead of quietly generating incorrect code.
That will at least let us identify CBE failures
that are not due to this problem.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73668 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 01:07:23 +00:00
Bob Wilson
ff6de36558 ARM unified syntax is not specific to ELF; use it for Darwin, too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73665 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 00:36:17 +00:00
Anton Korobeynikov
7c4f7dd43a Fix asm string from MOVi16 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73661 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 23:43:36 +00:00
Anton Korobeynikov
d61eca5330 Thumb2 instructions are enabled only in unified assembler mode. 
Emit switch directive for it. I have no idea whether this is
requirement for Darwin or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73660 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 23:43:18 +00:00
Anton Korobeynikov
52237119a9 Initial support for some Thumb2 instructions. 
Patch by Viktor Kutuzov and Anton Korzh from Access Softek, Inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73622 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 18:13:58 +00:00
Devang Patel
369de261e7 Do not use first actual instruction's location for prologue. The debug wants to skip prologue while setting a breakpoint for the function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73592 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 00:48:26 +00:00
Chris Lattner
e8f1018130 fix a circular dependency between the mips code generator 
and its asmprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73573 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 22:38:04 +00:00
Douglas Gregor
1555a23335 Introduce new headers whose inclusion forces linking and 
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73543 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 20:12:29 +00:00
Evan Cheng
876eac9da5 CALL64pcrel32 immediate field is 32-bit. Patch by Abhinav Duggal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73536 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 19:44:27 +00:00
Anton Korobeynikov
385f5a99ec Address review comments: add 3 ARM calling conventions. 
Dispatch C calling conv. to one of these conventions based on
target triple and subtarget features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73530 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 18:50:49 +00:00
Anton Korobeynikov
2932795309 GNU as refuses to assemble "pop {}" instruction. Do not emit such 
(this is the case when we have thumb vararg function with single
callee-saved register, which is handled separately).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73529 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 18:49:08 +00:00
Sanjiv Gupta
003263bb9f Added missing libcalls for floating point to int conversions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73491 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 16:17:35 +00:00
Sanjiv Gupta
bde7942072 Code Restructuring. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73481 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 09:45:18 +00:00
Eli Friedman
6314ac2bca Misc accumulated tweaks to legalization logic for various targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73476 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 06:40:59 +00:00
Chris Lattner
b42e20be77 another xform that is target-independent (should be done in instcombine). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73472 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 06:15:56 +00:00
Chris Lattner
d23fffeb16 I think instcombine should unconditionally do this xform. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73471 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 06:11:35 +00:00
Bill Wendling
fe7f294d5c There doesn't seem to be a reason to move the save FP stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 04:12:45 +00:00
Bill Wendling
d0446b08c4 The DWARF to compact encoding converter assumes that the DW_CFA_def_cfa_offset 
comes after the DW_CFA_def_cfa_register, because the CFA is really ESP from the
start of the function and only gets an offset when the "subl $xxx,%esp"
instruction happens, not the other way around.

And reapply r72898:

The DWARF unwind info was incorrect. While compiling with
`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.

So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73465 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 04:06:15 +00:00
Evan Cheng
88cc7c4194 On Darwin, frame pointer r7 is never available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73434 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 22:32:01 +00:00
Anton Korobeynikov
bb62962342 Rename methods for the sake of consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 21:46:20 +00:00
Evan Cheng
675860758e Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73422 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 21:18:20 +00:00
Bill Wendling
927788c500 The Ls and Qs were mixed up. Patch by Sean. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73417 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 20:59:31 +00:00
Evan Cheng
d780f35794 Do not form ldrd / strd if the two dests / srcs are the same. Code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73413 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 20:54:56 +00:00
Bill Wendling
453eb26106 "The Intel instruction tables should include the 64-bit and 32-bit instructions 
that push immediate operands of 1, 2, and 4 bytes (extended to the native
register size in each case).  The assembly mnemonics are "pushl" and "pushq."
One such instruction appears at the beginning of the "start" function , so this
is essential for accurate disassembly when unwinding."

Patch by Sean Callanan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73407 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 19:39:04 +00:00
Evan Cheng
7f04428738 Silence a warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73406 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 19:36:32 +00:00
Evan Cheng
358dec5180 Part 1. 
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent.
- Allow targets to specify alternative register allocation orders based on allocation hint.

Part 2.
- Use the register allocation hint system to implement more aggressive load / store multiple formation.
- Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g.
v1025 = LDR v1024, 0
v1026 = LDR v1024, 0
=>
v1025,v1026 = LDRD v1024, 0

If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair.

- Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions.

This is work in progress, not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 08:28:29 +00:00
Chris Lattner
3771071dd8 remove extraneous const qualifier 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73373 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 04:42:32 +00:00
Chris Lattner
2e06dd2101 I got J and K backward, many thanks to Eli for spotting this! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73372 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 04:39:05 +00:00
Chris Lattner
e4935150c7 implement support for the 'K' asm constraint, PR4347 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73366 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 04:01:39 +00:00
Dan Gohman
a119de86a0 Fix old-style type names in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73362 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-14 23:30:43 +00:00
Bruno Cardoso Lopes
ae9163f0e2 Introduce new BinaryObject (blob) class, ELF Writer modified to use it. BinaryObject.h by Aaron Gray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73333 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-14 07:53:21 +00:00
Sanjiv Gupta
dcb6da3efd The subprogram descriptor for a function may be missing (llvm-ld linking two static functions with same name), so pick up the compilation unit for the function from the first valid debug loc of its instructions. 
This patch also emits debug info for structure (aggregate types in 
general) types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73295 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-13 17:35:54 +00:00
Evan Cheng
e7d6df7353 Add a ARM specific pre-allocation pass that re-schedule loads / stores from 
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73291 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-13 09:12:55 +00:00
Evan Cheng
cd799b99cb Mark some pattern-less instructions as neverHasSideEffects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73252 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-12 20:46:18 +00:00
Arnold Schwaighofer
bbd8c33ee6 Fix Bug 4278: X86-64 with -tailcallopt calling convention 
out of sync with regular cc.

The only difference between the tail call cc and the normal
cc was that one parameter register - R9 - was reserved for
calling functions through a function pointer. After time the
tail call cc has gotten out of sync with the regular cc. 

We can use R11 which is also caller saved but not used as
parameter register for potential function pointers and
remove the special tail call cc on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73233 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-12 16:26:57 +00:00
Eli Friedman
7161cb1dad Misc x86 README updates: remove a couple of already-fixed issues, 
add a few suggestions from looking at some assembly code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73210 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 23:07:04 +00:00
Bruno Cardoso Lopes
d00d4159d4 Use forward declarations and move TargetELFWriterInfo impl to a new file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73209 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 22:13:00 +00:00
Bruno Cardoso Lopes
c997d45ae5 Support for ELF Visibility 
Emission for globals, using the correct data sections
Function alignment can be computed for each target using TargetELFWriterInfo
Some small fixes



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73201 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 19:16:03 +00:00
Sanjiv Gupta
6396329d52 Generate libcalls for floating point arithmetic and casting operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73194 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 16:50:48 +00:00
Sanjiv Gupta
fa3f80a2b7 More formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73185 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 06:55:48 +00:00
Sanjiv Gupta
b65d1f23ca Fixed source comments. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73184 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-11 06:49:55 +00:00
Anton Korobeynikov
b51b6cf1d0 Silence a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73152 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-09 23:00:39 +00:00
Bill Wendling
3ae67f5910 Simplified logic of this if-then statement to reduce nesting. No functionality 
change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73143 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-09 20:08:51 +00:00
Sanjiv Gupta
b157f25926 PIC16 emits auto variables as globals. When optimizer removes a function entierly by estimating its side effects on globals, those globals(autos) without a function were not being printed by the Asm printer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73135 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-09 15:31:19 +00:00
Anton Korobeynikov
2e7ccfce98 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73098 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:59:50 +00:00
Anton Korobeynikov
dada95b5b3 Revert hunk commited by accident 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73097 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:57:18 +00:00
Anton Korobeynikov
0eebf653a7 The attached patches implement most of the ARM AAPCS-VFP hard float 
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73095 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:53:56 +00:00
Anton Korobeynikov
fbbf1eeccf Separate V6 from V6T2 since the latter has some extra nice instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 21:20:36 +00:00
Anton Korobeynikov
a7b0ded2a2 Add helper for checking of Thumb1 mode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73080 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 20:31:02 +00:00
Bill Wendling
faf2671776 Revert r72898. It does not solve the problem I want it to solve. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73075 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 18:18:28 +00:00
Eli Friedman
5d28eb9e97 Get rid of some unnecessary code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73017 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-07 07:28:45 +00:00
Eli Friedman
7a5e55509b Slightly generalize the code that handles shuffles of consecutive loads 
on x86 to handle more cases.  Fix a bug in said code that would cause it 
to read past the end of an object.  Rewrite the code in 
SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general. 
Remove PerformBuildVectorCombine, which is no longer necessary with 
these changes.  In addition to simplifying the code, with this change, 
we can now catch a few more cases of consecutive loads.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73012 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-07 06:52:44 +00:00
Eli Friedman
0da9975299 PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec 
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73009 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-07 01:07:55 +00:00
Eli Friedman
30e71eb61b Avoid crashing on a variable-index insertelement with element type i16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72991 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 06:32:50 +00:00
Eli Friedman
1041553424 Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL 
nodes for vectors with an i16 element type.  Add an optimization for 
building a vector which is all zeros/undef except for the bottom 
element, where the bottom element is an i8 or i16.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 06:05:10 +00:00
Eli Friedman
9d47b8d8ea Fix an obvious typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72987 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 05:55:37 +00:00
Bruno Cardoso Lopes
cf0a577033 x86_64 now uses the correct ELF e_machine type 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 04:29:16 +00:00
Eli Friedman
1762c1439e Get rid of a bogus pattern that interferes with optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72985 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 04:17:04 +00:00
Eli Friedman
23ef105580 PR2598: make sure to expand illegal forms of integer/floating-point 
conversions for x86, like <2 x i32> -> <2 x float> and <4 x i16> -> 
<4 x float>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72983 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-06 03:57:58 +00:00
Dan Gohman
2392efef1b Add explicit keywords. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72969 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 23:05:51 +00:00
Devang Patel
578efa920a Add new function attribute - noimplicitfloat 
Update code generator to use this attribute and remove NoImplicitFloat target option.
Update llc to set this attribute when -no-implicit-float command line option is used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72959 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 21:57:13 +00:00
Nate Begeman
abc0199680 Adapt the x86 build_vector dagcombine to the current state of the legalizer. 
build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector 
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.

Teach the build_vector dag combine in x86 back end to recognize consecutive 
loads producing the low part of the vector.

Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.

Add a testcase for the transform.

Old:
	subl	$28, %esp
	movl	32(%esp), %eax
	movl	4(%eax), %ecx
	movl	%ecx, 4(%esp)
	movl	(%eax), %eax
	movl	%eax, (%esp)
	movaps	(%esp), %xmm0
	pmovzxwd	%xmm0, %xmm0
	movl	36(%esp), %eax
	movaps	%xmm0, (%eax)
	addl	$28, %esp
	ret

New:
	movl	4(%esp), %eax
	pmovzxwd	(%eax), %xmm0
	movl	8(%esp), %eax
	movaps	%xmm0, (%eax)
	ret




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72957 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 21:37:30 +00:00
Evan Cheng
925492279a Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72955 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 19:08:58 +00:00
Devang Patel
6a784894b1 Evan thinks NoImplicitFloat check is not required here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72954 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 18:48:29 +00:00
Evan Cheng
87d59e49e9 When merging multiple load / store instructions. Use the DebugLoc of the first one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72952 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 18:19:23 +00:00
Evan Cheng
5ba71887f9 Code clean up: return vector by reference rather than by value. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72950 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 17:56:14 +00:00
Dan Gohman
c965ee223c Remove some unnecessary #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 16:32:58 +00:00
Sanjiv Gupta
4680077959 Lower i16/i32 sdiv/udiv/srem/urem using libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72942 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 14:43:12 +00:00
Dan Gohman
9f5f322a03 Fix an erroneous check for isFNeg; the FNeg case is handled 
a few lines later on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 23:43:29 +00:00
Bill Wendling
e075a62746 The DWARF unwind info was incorrect. While compiling with 
`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.

So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 22:52:30 +00:00
Dan Gohman
ae3a0be92e Split the Add, Sub, and Mul instruction opcodes into separate 
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 22:49:04 +00:00
Devang Patel
d18e31ae17 Add new function attribute - noredzone. 
Update code generator to use this attribute and remove DisableRedZone target option.
Update llc to set this attribute when -disable-red-zone command line option is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72894 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 22:05:33 +00:00
Dale Johannesen
4c9369df57 Fix FP_TO_UINT->i32 on ppc32 -mcpu=g5. This was 
using Promote which won't work because i64 isn't
a legal type.  It's easy enough to use Custom, but
then we have the problem that when the type
legalizer is promoting FP_TO_UINT->i16, it has no
way of telling it should prefer FP_TO_SINT->i32
to FP_TO_UINT->i32.  I have uncomfortably hacked
this by making the type legalizer choose FP_TO_SINT
when both are Custom.
This fixes several regressions in the testsuite.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72891 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 20:53:52 +00:00
Sanjiv Gupta
82f1d1b572 Remove unused code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72866 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 15:16:24 +00:00
Sanjiv Gupta
3b0a4f186b Custom lower SUB with two register operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72861 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 08:52:28 +00:00
Eli Friedman
bccf4b3050 PR3739, part 2: Use an explicit store to spill XMM registers. (Previously, 
the code tried to use "push", which doesn't exist for XMM registers.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72836 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 02:32:04 +00:00
Eli Friedman
9a41712122 PR3739, part 1: Disable the red zone on Win64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72830 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 02:02:01 +00:00
Evan Cheng
1488326156 Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72826 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 01:15:28 +00:00
Stuart Hastings
d58902a19b Evan says it's wrong; back out 72808. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72817 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 22:59:34 +00:00
Stuart Hastings
77648cfd75 Recognize another euphemism for MOVDQ2Q. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72808 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 21:39:14 +00:00
Evan Cheng
424f8f339a For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine. 
I view this as a temporary workaround until the assembler / linker changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72806 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 21:13:54 +00:00
Dan Gohman
9911405183 Convert Alpha and Mips to use a MachineFunctionInfo subclass to 
carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This
eliminates the need for them to search through the
MachineRegisterInfo livein list in order to identify these
virtual registers. EmitLiveInCopies is now the only user of the
virtual register portion of MachineRegisterInfo's livein data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72802 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 20:30:14 +00:00
Dan Gohman
c553462c29 Remove the redundant TM member from X86DAGToDAGISel; replace it 
with an accessor method which simply casts the parent class
SelectionDAGISel's TM to the target-specific type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72801 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 20:20:00 +00:00
Mike Stump
222858256f Make the buildbot see green (to make it easier to spot the next person 
that puts a new warning in).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72797 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 19:07:46 +00:00
Dan Gohman
974d90bb70 Remove unnecessary #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72782 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 16:47:12 +00:00
Sanjiv Gupta
3fc7e532aa Emit file directives correctly in case of a .bc is generated by llvm-ld after linking in several .bc files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72781 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 16:27:49 +00:00
Sanjiv Gupta
892c8caa3c FrameIndex could be used as a value (addressof (arg)) or as an address. 
Expand it exactly like GlobalAddress.
Fix some more crashes (InsertBranch() not being implemented) for compiling hitec libs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72776 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 15:31:12 +00:00
Sanjiv Gupta
703e235f0c Fixed a bug in which signed comparisons were being used instead of unsigned comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72771 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 13:36:44 +00:00
Duncan Sands
12513889fd Avoid a warning "'U' might be used uninitialized in 
this function" when using a not-too-smart compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72768 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 12:05:18 +00:00
Evan Cheng
70fd60bd57 Temporarily revert 72756 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72757 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 07:40:47 +00:00
Evan Cheng
9d5fb981b0 Fold preceding / trailing base inc / dec into the single load / store as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72756 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 06:14:58 +00:00
Dan Gohman
6ecc2602a6 Revert r72734. The Darwin assembler doesn't support the static 
relocation model on x86-64. Higher level logic should override
the relocation model to PIC on x86_64-apple-darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72746 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 00:37:20 +00:00
Evan Cheng
da9863fa41 On Darwin x86_64 small code model doesn't guarantee code address fits in 32-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72734 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-02 20:09:31 +00:00
Dale Johannesen
874ae251c3 Revert 72707 and 72709, for the moment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-02 03:12:52 +00:00
Dale Johannesen
ca46fdd284 Add missing file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72709 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 23:48:58 +00:00
Dale Johannesen
4150d83abe Make the implicit inputs and outputs of target-independent 
ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag.  Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.

Most targets will still produce a Flag-setting target-dependent
version when selection is done.  X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc.  This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted.  All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly.  The
same can be done on other targets.

The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 23:27:20 +00:00
Dale Johannesen
8313899851 Comment grammaro/clarification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72706 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 23:13:42 +00:00
Dale Johannesen
69bbb4cd39 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 23:12:52 +00:00
Anton Korobeynikov
70459bef9c Implement review feedback. Make thumb2 'normal' subtarget feature 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72698 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 20:00:48 +00:00
Bruno Cardoso Lopes
434dd4fd94 Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:57:37 +00:00
Anton Korobeynikov
d260c248ab Do not emit "generic" CPU string. This fixes PR4291. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:03:17 +00:00
Dan Gohman
2d98f0664b Fix a grammaro and clarify a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72668 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-31 17:52:18 +00:00
Bruno Cardoso Lopes
a3f99f9033 First patch in the direction of splitting MachineCodeEmitter in two subclasses: 
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 20:51:52 +00:00
Evan Cheng
cf7895ff8b (i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72618 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 08:43:27 +00:00
Bill Wendling
51b16f4737 Untabification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 01:09:53 +00:00
Anton Korobeynikov
d4022c3fbb Add placeholder for thumb2 stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72593 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-29 23:41:08 +00:00
Evan Cheng
cb219f0ef6 More h-registers tricks: folding zext nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72558 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-29 01:44:43 +00:00
Bill Wendling
2265ba0717 The MONITOR and MWAIT instructions have insufficient information for 
decoding. Essentially, they both map to the same column in the "opcode
extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm
complicates decoding this.

Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code
emitter special case these, a la [SML]FENCE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72556 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 23:40:46 +00:00
Evan Cheng
8a0b2daac2 Fix MOVMSKPDrr encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72535 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-28 18:55:28 +00:00