6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-22 07:32:48 +00:00
Code Issues Projects Releases Wiki Activity
30,532 Commits 39 Branches 0 Tags 277 MiB
b654176cb4
Commit Graph

1578 Commits

Author SHA1 Message Date
Evan Cheng
1a8f1fe676 Preliminary soft float support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32394 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-09 02:42:38 +00:00
Chris Lattner
555d8d6f4b Fix CodeGen/PowerPC/2006-12-07-SelectCrash.ll on PPC64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32336 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 22:36:47 +00:00
Bill Wendling
bcd2498f4f Removed more <iostream> includes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32321 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 20:28:15 +00:00
Bill Wendling
832171cb97 Removing even more <iostream> includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-07 20:04:42 +00:00
Chris Lattner
ac0b6ae358 Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-06 17:46:33 +00:00
Jeff Cohen
97af751deb Unbreak VC++ build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32113 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-02 02:22:01 +00:00
Evan Cheng
ba59a1e453 Match TargetInstrInfo changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32098 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-01 21:52:58 +00:00
Evan Cheng
6a16c5ab2d Avoid inifinite looping if READCYCLECOUNTER isn't custom lowered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32022 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 19:13:47 +00:00
Evan Cheng
f0b3ba6752 Allow target to custom lower READCYCLECOUNTER (when it doesn't have to be expanded). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32016 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 08:26:18 +00:00
Evan Cheng
f3e486e069 Fix for PR1023 by Dan Gohman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32003 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 01:58:12 +00:00
Evan Cheng
a5a57d66f5 Fix for PR1022 (folding loads of static initializers) by Dan Gohman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32000 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 01:38:07 +00:00
Chris Lattner
3f7927c84c add a hook to allow targets to hack on inline asms to lower them to llvm 
when they want to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 01:12:32 +00:00
Chris Lattner
b6c806045b Fix PR1016 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31950 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-28 01:03:30 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Chris Lattner
3687c1a4d3 Fix the dag combiner bug corresponding to PR1014. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31943 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 21:50:02 +00:00
Chris Lattner
bc4cf8d5b1 For better or worse, load from i1 is assumed to be zero extended. Do not 
form a load from i1 from larger loads that may not be zext'd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31933 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 04:40:53 +00:00
Chris Lattner
f9908172e9 If a brcond condition is promoted, make sure to zero extend it, even if not 
expanded into BR_CC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31932 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 04:39:56 +00:00
Reid Spencer
3da59db637 For PR950: 
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31931 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 01:05:10 +00:00
Chris Lattner
32ba1aa204 Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31878 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 18:05:46 +00:00
Reid Spencer
45fb3f3cb2 For PR950: 
First in a series of patches to convert SetCondInst into ICmpInst and
FCmpInst using only two opcodes and having the instructions contain their
predicate value. Nothing uses these classes yet. More patches to follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31867 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 01:22:35 +00:00
Jim Laskey
5f64a16869 Fixing the ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1 build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31822 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-17 13:07:55 +00:00
Evan Cheng
cc47021f49 Fix an incorrectly inverted condition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31773 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 00:08:20 +00:00
Chris Lattner
43193d60e9 remove dead #include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31753 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 17:51:15 +00:00
Evan Cheng
7ce4578353 Matches MachineInstr changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:36:35 +00:00
Reid Spencer
a07d5b9164 Make an assert comment match the tested assertion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31686 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 20:07:59 +00:00
Evan Cheng
3ba433a7e8 Add methods to add implicit def use operands to a MI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31675 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 10:20:02 +00:00
Chris Lattner
41e53fd39b disallow preinc of a frameindex. This is not profitable and causes 2-addr 
pass to explode.  This fixes a bunch of llc-beta failures on ppc last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31661 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 01:00:15 +00:00
Chris Lattner
9f1794ea58 reduce indentation by using early exits. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31660 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 00:56:29 +00:00
Chris Lattner
448f219fed move big chunks of code out-of-line, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31658 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 00:39:41 +00:00
Chris Lattner
734c91d250 Fix a dag combiner bug exposed by my recent instcombine patch. This fixes 
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31644 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 21:37:15 +00:00
Evan Cheng
438f7bc67c Add implicit def / use operands to MachineInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:43:01 +00:00
Evan Cheng
a7ff64d608 When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31631 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 08:28:11 +00:00
Chris Lattner
1e7aa5c209 commentate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31627 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 04:41:34 +00:00
Evan Cheng
8dc5cad8a2 Don't attempt expensive pre-/post- indexed dag combine if target does not support them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31598 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 19:10:46 +00:00
Evan Cheng
5ff839fbab Add a mechanism to specify whether a target supports a particular indexed load / store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31597 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 18:56:43 +00:00
Evan Cheng
0030582239 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31596 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 18:44:21 +00:00
Evan Cheng
144d8f09e1 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 17:55:04 +00:00
Evan Cheng
d258efaf6e getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-09 04:29:46 +00:00
Evan Cheng
b00dddd164 Match more post-indexed ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 20:27:27 +00:00
Jim Laskey
d6c3422e31 Remove redundant <cmath>. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 19:16:44 +00:00
Evan Cheng
03fa6ea402 - When performing pre-/post- indexed load/store transformation, do not worry 
about whether the new base ptr would be live below the load/store. Let two
  address pass split it back to non-indexed ops.
- Minor tweaks / fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31544 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 08:30:28 +00:00
Evan Cheng
a4f53ef527 Fixed a minor bug preventing some pre-indexed load / store transformation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31543 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 06:56:05 +00:00
Reid Spencer
3822ff5c71 For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 06:47:33 +00:00
Evan Cheng
6c1491dd06 Fix a obscure post-indexed load / store dag combine bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31537 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-08 02:38:55 +00:00
Evan Cheng
bbd6f6ec1a Add post-indexed load / store transformations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31498 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 09:03:05 +00:00
Chris Lattner
fa9aa2b424 Fix PR988 and CodeGen/Generic/2006-11-06-MemIntrinsicExpand.ll. 
The low part goes in the first operand of expandop, not the second one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31487 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 04:11:44 +00:00
Evan Cheng
d5ad440f43 Remove dead code; added a missing null ptr check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31478 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 21:33:46 +00:00
Evan Cheng
3ef554d2b1 Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31473 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-06 08:14:30 +00:00
Jeff Cohen
d41b30def3 Unbreak VC++ build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 19:31:28 +00:00
Evan Cheng
33dbedcdcb Added pre-indexed store support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31459 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 09:31:14 +00:00
Evan Cheng
9109fb1eb7 Added getIndexedStore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31458 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-05 09:30:09 +00:00
Evan Cheng
95f6edeff5 Changes to use operand constraints to process two-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31453 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-04 09:44:31 +00:00
Evan Cheng
e6e97e66a3 Fix comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31414 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 07:31:32 +00:00
Evan Cheng
1a854be352 Rename 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 07:21:16 +00:00
Reid Spencer
b8f4e0aa17 Remove dead variable. Fix 80 column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31412 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 03:30:34 +00:00
Evan Cheng
7fc033a24d Added DAG combiner transformation to generate pre-indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31410 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 03:06:21 +00:00
Evan Cheng
c5fc57dcae Added isPredecessor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31409 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 03:05:24 +00:00
Chris Lattner
02cb49ee67 silence warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31397 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-03 01:28:29 +00:00
Reid Spencer
3ed469ccd7 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 20:25:50 +00:00
Reid Spencer
0a783f783c For PR950: 
Replace the REM instruction with UREM, SREM and FREM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31369 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 01:53:59 +00:00
Chris Lattner
2a821601f1 Allow the getRegForInlineAsmConstraint method to return a register class with 
no fixes physreg.  Treat this as permission to use any register in the register
class.  When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time.  This eliminates a ton
of copies around common inline asms.  For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31366 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 01:41:49 +00:00
Evan Cheng
1dabb68ab4 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31359 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 22:39:30 +00:00
Evan Cheng
93467e7fe3 CopyFromReg starts a live range so its use should not be considered a floater. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31356 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 22:17:06 +00:00
Evan Cheng
6cc31ae4da Print jumptable index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31340 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-01 04:48:30 +00:00
Chris Lattner
0ccb500fa7 Compile CodeGen/PowerPC/fp-branch.ll to: 
_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

instead of:

_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31330 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 23:06:00 +00:00
Chris Lattner
df19f27d03 look through isunordered to inline it into branch blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31328 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 22:37:42 +00:00
Chris Lattner
efa46ce87b handle global address constant sdnodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31323 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 20:01:56 +00:00
Chris Lattner
53069fbbae TargetLowering::isOperandValidForConstraint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31319 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 19:41:18 +00:00
Chris Lattner
dba1aeedd8 Change the prototype for TargetLowering::isOperandValidForConstraint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 19:40:43 +00:00
Chris Lattner
d03f1581c8 Turn an assert into an error message. This is commonly triggered when 
we don't support a specific constraint yet.  When this happens, print the
unsupported constraint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31310 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 07:33:13 +00:00
Evan Cheng
d063189c09 Fix a typo which can break jumptables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 02:31:00 +00:00
Evan Cheng
3d4ce11085 Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the target custom lower it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31293 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-30 08:00:44 +00:00
Evan Cheng
c41cd9c391 Added a new SDNode type: BR_JT for jumptable branch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31292 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-30 07:59:36 +00:00
Chris Lattner
6a586c8d9a fix Generic/2006-10-29-Crash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31281 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-29 21:01:20 +00:00
Chris Lattner
5a145f0094 Fix a load folding issue that Evan noticed: there is no need to export values 
used by comparisons in the main block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-29 18:23:37 +00:00
Evan Cheng
ba726ab3ec VLOAD is not the LoadSDNode opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31276 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-29 06:14:47 +00:00
Nick Lewycky
f6aaaaa39e Remove spurious case. EXTLOAD is not one of the node opcodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-29 02:26:30 +00:00
Chris Lattner
bad7f48c70 split critical edges more carefully and intelligently. In particular, critical 
edges whose destinations are not phi nodes don't bother us.  Also, share
split edges, since the split edge can't have a phi.  This significantly
reduces the complexity of generated code in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31274 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-28 19:22:10 +00:00
Jim Laskey
1c6f01aaa5 Load and stores have not been uniqued properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-28 17:25:28 +00:00
Chris Lattner
47e32e6b83 Split *all* critical edges before isel. This resolves issues with spill code 
being inserted on unsplit critical edges, which introduces (sometimes large
amounts of) partially dead spill code.

This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31260 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-28 17:04:37 +00:00
Chris Lattner
6fb6ef4d65 Fix a serious bug that caused any x86 vector stuff to infinite loop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31254 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-28 06:15:26 +00:00
Jim Laskey
def69b92e7 Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31243 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-27 23:52:51 +00:00
Chris Lattner
8c494ab759 Fix a bug in merged condition handling (CodeGen/Generic/2006-10-27-CondFolding.ll). 
Add many fewer CFG edges and PHI node entries.  If there is a switch which has
the same block as multiple destinations, only add that block once as a successor/phi
node (in the jumptable case)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31242 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-27 23:50:33 +00:00
Jim Laskey
583bd47f77 Switch over from SelectionNodeCSEMap to FoldingSet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-27 23:46:08 +00:00
Chris Lattner
1c9b2f312d remove debug code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31233 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-27 21:58:03 +00:00
Chris Lattner
d2f9ee9ea7 Codegen cond&cond with two branches. This compiles (f.e.) PowerPC/and-branch.ll to: 
cmpwi cr0, r4, 4
        bgt cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_3: ;entry
        cmplwi cr0, r3, 0
        bne cr0, LBB1_2 ;UnifiedReturnBlock

instead of:

        cmpwi cr7, r4, 4
        mfcr r2
        addic r4, r3, -1
        subfe r3, r4, r3
        rlwinm r2, r2, 30, 31, 31
        or r2, r2, r3
        cmplwi cr0, r2, 0
        bne cr0, LBB1_2 ;UnifiedReturnBlock
LBB1_1: ;cond_true


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31232 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-27 21:54:23 +00:00
Chris Lattner
571e434a34 Turn conditions like x<Y|z==q into multiple blocks. 
This compiles Regression/CodeGen/X86/or-branch.ll into:

_foo:
        subl $12, %esp
        call L_bar$stub
        movl 20(%esp), %eax
        movl 16(%esp), %ecx
        cmpl $5, %eax
        jl LBB1_1       #cond_true
LBB1_3: #entry
        testl %ecx, %ecx
        jne LBB1_2      #UnifiedReturnBlock
LBB1_1: #cond_true
        call L_bar$stub
        addl $12, %esp
        ret
LBB1_2: #UnifiedReturnBlock
        addl $12, %esp
        ret

instead of:

_foo:
        subl $12, %esp
        call L_bar$stub
        movl 20(%esp), %eax
        movl 16(%esp), %ecx
        cmpl $4, %eax
        setg %al
        testl %ecx, %ecx
        setne %cl
        testb %cl, %al
        jne LBB1_2      #UnifiedReturnBlock
LBB1_1: #cond_true
        call L_bar$stub
        addl $12, %esp
        ret
LBB1_2: #UnifiedReturnBlock
        addl $12, %esp
        ret

And on ppc to:

        cmpwi cr0, r29, 5
        blt cr0, LBB1_1 ;cond_true
LBB1_3: ;entry
        cmplwi cr0, r30, 0
        bne cr0, LBB1_2 ;UnifiedReturnBlock

instead of:

        cmpwi cr7, r4, 4
        mfcr r2
        addic r4, r3, -1
        subfe r30, r4, r3
        rlwinm r29, r2, 30, 31, 31
        and r2, r29, r30
        cmplwi cr0, r2, 0
        bne cr0, LBB1_2 ;UnifiedReturnBlock


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31230 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-27 21:36:01 +00:00
Evan Cheng
5270cf1b77 getPreIndexedLoad -> getIndexedLoad. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31209 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-26 21:53:40 +00:00
Reid Spencer
1628cec4d7 For PR950: 
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31195 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-26 06:15:43 +00:00
Chris Lattner
2452595927 visitSwitchCase knows how to insert conditional branches well. Change 
visitBr to just call visitSwitchCase, eliminating duplicate logic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31167 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-24 18:07:37 +00:00
Chris Lattner
57ab65972e Generalize CaseBlock a bit more: 
Rename LHSBB/RHSBB to TrueBB/FalseBB.  Allow the RHS value to be null,
in which case the LHS is treated as a bool.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31166 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-24 17:57:59 +00:00
Chris Lattner
7b248d9866 generalize 'CaseBlock'. It really allows any comparison to be inserted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31161 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-24 17:03:35 +00:00
Chris Lattner
b354343af7 Minor tweak. Instead of generating: 
movl 32(%esp), %eax
        cmpl $1, %eax
        je LBB1_1       #bb
LBB1_4: #entry
        cmpl $2, %eax
        je LBB1_2       #bb2
        jmp LBB1_3      #UnifiedReturnBlock
LBB1_1: #bb

notice that we would miss the fall through and emit this instead:

        movl 32(%esp), %eax
        cmpl $2, %eax
        je LBB1_2       #bb2
LBB1_4: #entry
        cmpl $1, %eax
        jne LBB1_3      #UnifiedReturnBlock
LBB1_1: #bb


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31130 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-23 18:38:22 +00:00
Chris Lattner
b2e806eecd Fix phi node updating for switches lowered to linear sequences of branches. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31125 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-22 23:00:53 +00:00
Chris Lattner
e236ac64a2 disable this code for now, it's not yet safely updating phi nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31124 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-22 22:47:10 +00:00
Chris Lattner
d2c1d2200b Implement PR964 and Regression/CodeGen/Generic/SwitchLowering.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31119 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-22 21:36:53 +00:00
Chris Lattner
34ab4d45d2 Make flag and chain edges visually distinguishable from value edges in DOT 
output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31067 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-20 18:06:09 +00:00
Reid Spencer
b83eb6447b For PR950: 
This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31063 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-20 07:07:24 +00:00
Bill Wendling
c70ddad2b7 Partially in response to PR926: insert the newly created machine basic 
blocks into the basic block list when lowering the switch inst. into a
binary tree of if-then statements. This allows the "visitSwitchCase" func
to allow for fall-through behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31057 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-19 21:46:38 +00:00
Jim Laskey
07a2709e9d Add option for controlling inclusion of global AA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31040 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-18 19:08:31 +00:00
Jim Laskey
096c22ea3d Use global info for alias analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31035 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-18 12:29:57 +00:00
Chris Lattner
b360729873 Trivial patch to speed up legalizing common i64 constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31020 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 21:47:13 +00:00
Chris Lattner
50662beab7 Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31019 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 21:24:15 +00:00
Evan Cheng
649b7ef627 Fix printer for StoreSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31017 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 21:18:26 +00:00
Evan Cheng
2cacccae19 Reflect MemOpAddrMode change; added a helper to create pre-indexed load. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31016 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 21:14:32 +00:00
Jim Laskey
26f7fa7bba Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31009 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 19:33:52 +00:00
Evan Cheng
5d04a1af4f Make sure operand does have size and element type operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30999 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-17 17:06:35 +00:00
Evan Cheng
5956922a2d Be careful when looking through a vbit_convert. Optimizing this: 
(vector_shuffle
  (vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32),
  (undef, undef, undef, undef), (0, 0, 0, 0), 4, f32)
to the
  vbitconvert
is a very bad idea.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30989 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-16 22:49:37 +00:00
Jim Laskey
c7c3f110ed Pass AliasAnalysis thru to DAGCombiner. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30984 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-16 20:52:31 +00:00
Jim Laskey
d4edf2cf91 Tidy up after truncstore changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30961 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 12:14:27 +00:00
Evan Cheng
d42a5238a9 Debug tweak. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30959 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 08:34:06 +00:00
Chris Lattner
30f73e78bd Make sure that the node returned by SimplifySetCC is added to the worklist 
so that it can be deleted if unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30955 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 03:52:46 +00:00
Chris Lattner
8ac9d0ebde fold setcc of a setcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30953 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 01:02:29 +00:00
Chris Lattner
51dabfb283 When SimplifySetCC was moved to the DAGCombiner, it was never removed from 
SelectionDAG and it has since bitrotted.  Remove the copy from SelectionDAG.
Next, remove the constant folding piece of DAGCombiner::SimplifySetCC into
a new FoldSetCC method which can be used by getNode() and SimplifySetCC.

This fixes obscure bugs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-14 00:41:01 +00:00
Jim Laskey
274062c172 Reduce the workload by not adding chain users to work list. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30948 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 23:32:28 +00:00
Chris Lattner
dc78cbf457 Fix a bug where we incorrectly turned '(X & 0) == 0' into '(X & 0) >> -1', 
which is undefined.  "0" isn't a power of 2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 22:46:18 +00:00
Evan Cheng
8b2794aeff Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 21:14:26 +00:00
Chris Lattner
26d2990e03 Lower X%C into X/C+stuff. This allows the 'division by a constant' logic to 
apply to rems as well as divs.  This fixes PR945 and speeds up ReedSolomon
from 14.57s to 10.90s (which is now faster than gcc).

It compiles CodeGen/X86/rem.ll into:

_test1:
        subl $4, %esp
        movl %esi, (%esp)
        movl $2155905153, %ecx
        movl 8(%esp), %esi
        movl %esi, %eax
        imull %ecx
        addl %esi, %edx
        movl %edx, %eax
        shrl $31, %eax
        sarl $7, %edx
        addl %eax, %edx
        imull $255, %edx, %eax
        subl %eax, %esi
        movl %esi, %eax
        movl (%esp), %esi
        addl $4, %esp
        ret
_test2:
        movl 4(%esp), %eax
        movl %eax, %ecx
        sarl $31, %ecx
        shrl $24, %ecx
        addl %eax, %ecx
        andl $4294967040, %ecx
        subl %ecx, %eax
        ret
_test3:
        subl $4, %esp
        movl %esi, (%esp)
        movl $2155905153, %ecx
        movl 8(%esp), %esi
        movl %esi, %eax
        mull %ecx
        shrl $7, %edx
        imull $255, %edx, %eax
        subl %eax, %esi
        movl %esi, %eax
        movl (%esp), %esi
        addl $4, %esp
        ret

instead of div/idiv instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30920 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 20:58:32 +00:00
Evan Cheng
130a6471b9 Add RemoveDeadNode to remove a dead node and its (potentially) dead operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30916 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 20:34:05 +00:00
Chris Lattner
3657ffe037 add a minor dag combine noticed when looking at PR945 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30915 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 20:23:19 +00:00
Jim Laskey
3ad175bd70 D'oh - need to use the rigth kind of store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30903 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 15:22:24 +00:00
Jim Laskey
7aed46c25b Alias analysis of TRUNCSTORE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 18:55:16 +00:00
Jim Laskey
2d84c4c7b3 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30884 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 17:52:19 +00:00
Jim Laskey
c2b19f3449 Handle aliasing of loadext. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30883 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 17:47:52 +00:00
Jim Laskey
7ca56aff22 Fix regression in combiner alias analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 13:47:09 +00:00
Evan Cheng
2e49f090f9 Naming consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30878 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 07:10:22 +00:00
Andrew Lenharth
82c3d8f81a Jimptables working again on alpha. 
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30873 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 04:29:42 +00:00
Chris Lattner
755480681c add two helper methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30869 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 03:58:02 +00:00
Evan Cheng
9629abac79 FindModifiedNodeSlot needs to add LoadSDNode ivars to create proper SelectionDAGCSEMap ID. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30866 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-11 01:47:58 +00:00
Evan Cheng
45aeccc1fd Also update getNodeLabel for LoadSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30861 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-10 20:11:26 +00:00
Evan Cheng
0ac1c6ad9a SDNode::dump should also print out extension type and VT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30860 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-10 20:05:10 +00:00
Chris Lattner
55b5708b6b Fix another bug in extload promotion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30857 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-10 18:54:19 +00:00
Evan Cheng
62f2a3c7aa Fix a bug introduced by my LOAD/LOADX changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30853 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-10 07:51:21 +00:00
Evan Cheng
466685d41a Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-09 20:57:25 +00:00
Chris Lattner
6270f686b3 Eliminate more token factors by taking advantage of transitivity: 
if TF depends on A and B, and A depends on B, TF just needs to depend on
A.  With Jim's alias-analysis stuff enabled, this compiles the testcase in
PR892 into:

__Z4test3Val:
        subl $44, %esp
        call L__Z3foov$stub
        movl %edx, 28(%esp)
        movl %eax, 32(%esp)
        movl %eax, 24(%esp)
        movl %edx, 36(%esp)
        movl 52(%esp), %ecx
        movl %ecx, 4(%esp)
        movl %eax, 8(%esp)
        movl %edx, 12(%esp)
        movl 48(%esp), %eax
        movl %eax, (%esp)
        call L__Z3bar3ValS_$stub
        addl $44, %esp
        ret

instead of:

__Z4test3Val:
        subl $44, %esp
        call L__Z3foov$stub
        movl %eax, 24(%esp)
        movl %edx, 28(%esp)
        movl 24(%esp), %eax
        movl %eax, 32(%esp)
        movl 28(%esp), %eax
        movl %eax, 36(%esp)
        movl 32(%esp), %eax
        movl 36(%esp), %ecx
        movl 52(%esp), %edx
        movl %edx, 4(%esp)
        movl %eax, 8(%esp)
        movl %ecx, 12(%esp)
        movl 48(%esp), %eax
        movl %eax, (%esp)
        call L__Z3bar3ValS_$stub
        addl $44, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30821 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-08 22:57:01 +00:00
Jim Laskey
7138234baf Combiner alias analysis passes Multisource (release-asserts.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30818 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 23:37:56 +00:00
Chris Lattner
ed83a7019b Fix a bug legalizing zero-extending i64 loads into 32-bit loads. The bottom 
part was always forced to be sextload, even when we needed an zextload.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30782 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-07 00:58:36 +00:00
Chris Lattner
cf9668f23d initialize ivar 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30780 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:52:08 +00:00
Chris Lattner
e0cfc8b2f2 jump tables handle pic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30776 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 22:32:29 +00:00
Chris Lattner
4bdd2753db Fix a miscompilation of: 
long long foo(long long X) {
  return (long long)(signed char)(int)X;
}

Instead of:

_foo:
        extsb r2, r4
        srawi r3, r4, 31
        mr r4, r2
        blr

we now produce:

_foo:
        extsb r4, r4
        srawi r3, r4, 31
        blr

This fixes a miscompilation in ConstantFolding.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30768 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-06 17:34:12 +00:00
Evan Cheng
786225adf0 Make use of getStore(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 23:01:46 +00:00
Evan Cheng
ad071e1cd1 Add getStore() helper function to create ISD::STORE nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30758 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 22:57:11 +00:00
Jim Laskey
bc588b8bbf Alias analysis code clean ups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30753 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 15:07:25 +00:00
Evan Cheng
693163e74d Fix some typos that can cause a flag value to have more than one use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30727 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 22:23:53 +00:00
Jim Laskey
6ff23e5e84 More extensive alias analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30721 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 16:53:27 +00:00
Evan Cheng
c548428c5d Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an 
extra operand to LOADX to specify the exact value extension type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 00:56:09 +00:00
Evan Cheng
bf497a3a68 Fix an obvious typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30711 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-03 23:08:27 +00:00
Jim Laskey
01078fb7ec Debugging kruft 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30688 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-02 13:01:17 +00:00
Jim Laskey
ec20402c90 Add ability to annotate (color) nodes in a viewGraph. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30686 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-02 12:26:53 +00:00
Chris Lattner
57f9a43c64 refactor critical edge breaking out into the SplitCritEdgesForPHIConstants method. 
This is a baby step towards fixing PR925.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30643 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-28 06:17:10 +00:00
Andrew Lenharth
16113431e8 Comments on JumpTableness 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30615 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 20:02:30 +00:00
Jim Laskey
bb1518585b Load chain check is not needed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30613 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 17:44:58 +00:00
Jim Laskey
79597d2af6 Chain can be any operand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30611 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 09:32:41 +00:00
Jim Laskey
3dd1170616 Wrong size for load 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30610 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 08:14:06 +00:00
Jim Laskey
172585b3aa Can't move a load node if it's chain is not used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30609 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 07:37:42 +00:00
Jim Laskey
14fbcbfa2b Accidental enable of bad code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30601 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-25 21:11:32 +00:00
Jim Laskey
288af5e740 Fix chain dropping in load and drop unused stores in ret blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30600 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-25 19:32:58 +00:00
Jim Laskey
279f053eae Core antialiasing for load and store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30597 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-25 16:29:54 +00:00
Andrew Lenharth
beec30eaf3 Add support for other relocation bases to jump tables, as well as custom asm directives 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30593 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-24 19:45:58 +00:00
Evan Cheng
2ae5b87996 PIC jump table entries are always 32-bit. This fixes PIC jump table support on X86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30590 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-24 05:22:38 +00:00
Evan Cheng
2adffa1f66 Make it work for DAG combine of multi-value nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30573 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 19:04:05 +00:00
Jim Laskey
516b0eacff core corrections 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30570 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 17:35:47 +00:00
Jim Laskey
d1aed7aaf7 Basic "in frame" alias analysis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30568 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 16:28:59 +00:00
Chris Lattner
0e4b922680 fold (aext (and (trunc x), cst)) -> (and x, cst). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:40:43 +00:00
Chris Lattner
bf3708794f Check the right value type. This fixes 186.crafty on x86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30560 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:17:39 +00:00
Chris Lattner
111c228241 Compile: 
int %test(ulong *%tmp) {
        %tmp = load ulong* %tmp         ; <ulong> [#uses=1]
        %tmp.mask = shr ulong %tmp, ubyte 50            ; <ulong> [#uses=1]
        %tmp.mask = cast ulong %tmp.mask to ubyte
        %tmp2 = and ubyte %tmp.mask, 3          ; <ubyte> [#uses=1]
        %tmp2 = cast ubyte %tmp2 to int         ; <int> [#uses=1]
        ret int %tmp2
}

to:

_test:
        movl 4(%esp), %eax
        movl 4(%eax), %eax
        shrl $18, %eax
        andl $3, %eax
        ret

instead of:

_test:
        movl 4(%esp), %eax
        movl 4(%eax), %eax
        shrl $18, %eax
        # TRUNCATE movb %al, %al
        andb $3, %al
        movzbl %al, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30558 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:14:31 +00:00
Chris Lattner
6007b84a5b Generalize (zext (truncate x)) and (sext (truncate x)) folding to work when 
the src/dst are not the same size.  This catches things like "truncate
32-bit X to 8 bits, then zext to 16", which happens a bit on X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30557 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 06:00:20 +00:00
Chris Lattner
e3152e54b5 Compile: 
int test3(int a, int b) { return (a < 0) ? a : 0; }

to:

_test3:
        srawi r2, r3, 31
        and r3, r2, r3
        blr

instead of:

_test3:
        cmpwi cr0, r3, 1
        li r2, 0
        blt cr0, LBB2_2 ;entry
LBB2_1: ;entry
        mr r3, r2
LBB2_2: ;entry
        blr


This implements: PowerPC/select_lt0.ll:seli32_a_a


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30517 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 06:41:35 +00:00
Chris Lattner
84750587bf Fold the full generality of (any_extend (truncate x)) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30514 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 06:29:17 +00:00
Chris Lattner
5f42a240ba Two things: 
1. teach SimplifySetCC that '(srl (ctlz x), 5) == 0' is really x != 0.
2. Teach visitSELECT_CC to use SimplifySetCC instead of calling it and
   ignoring the result.  This allows us to compile:

bool %test(ulong %x) {
  %tmp = setlt ulong %x, 4294967296
  ret bool %tmp
}

to:

_test:
        cntlzw r2, r3
        cmplwi cr0, r3, 1
        srwi r2, r2, 5
        li r3, 0
        beq cr0, LBB1_2 ;
LBB1_1: ;
        mr r3, r2
LBB1_2: ;
        blr

instead of:

_test:
        addi r2, r3, -1
        cntlzw r2, r2
        cntlzw r3, r3
        srwi r2, r2, 5
        cmplwi cr0, r2, 0
        srwi r2, r3, 5
        li r3, 0
        bne cr0, LBB1_2 ;
LBB1_1: ;
        mr r3, r2
LBB1_2: ;
        blr

This isn't wonderful, but it's an improvement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30513 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 06:19:26 +00:00
Chris Lattner
0ea26ca45b Expand 64-bit shifts more optimally if we know that the high bit of the 
shift amount is one or zero.  For example, for:

long long foo1(long long X, int C) {
  return X << (C|32);
}

long long foo2(long long X, int C) {
  return X << (C&~32);
}

we get:

_foo1:
        movb $31, %cl
        movl 4(%esp), %edx
        andb 12(%esp), %cl
        shll %cl, %edx
        xorl %eax, %eax
        ret
_foo2:
        movb $223, %cl
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        andb 12(%esp), %cl
        shldl %cl, %eax, %edx
        shll %cl, %eax
        ret

instead of:

_foo1:
        subl $4, %esp
        movl %ebx, (%esp)
        movb $32, %bl
        movl 8(%esp), %eax
        movl 12(%esp), %edx
        movb %bl, %cl
        orb 16(%esp), %cl
        shldl %cl, %eax, %edx
        shll %cl, %eax
        xorl %ecx, %ecx
        testb %bl, %bl
        cmovne %eax, %edx
        cmovne %ecx, %eax
        movl (%esp), %ebx
        addl $4, %esp
        ret
_foo2:
        subl $4, %esp
        movl %ebx, (%esp)
        movb $223, %cl
        movl 8(%esp), %eax
        movl 12(%esp), %edx
        andb 16(%esp), %cl
        shldl %cl, %eax, %edx
        shll %cl, %eax
        xorl %ecx, %ecx
        xorb %bl, %bl
        testb %bl, %bl
        cmovne %eax, %edx
        cmovne %ecx, %eax
        movl (%esp), %ebx
        addl $4, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30506 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 03:38:48 +00:00
Chris Lattner
863ac769b8 Fold extract_element(cst) to cst 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30478 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-19 05:02:39 +00:00
Chris Lattner
5c6621c3bc Minor speedup for legalize by avoiding some malloc traffic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30477 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-19 04:51:23 +00:00
Evan Cheng
6b5578f052 Fix a typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30474 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 23:28:33 +00:00
Evan Cheng
52cc1ea2a1 Allow i32 UDIV, SDIV, UREM, SREM to be expanded into libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30470 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 21:49:04 +00:00
Andrew Lenharth
3fbd67898e absolute addresses must match pointer size 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30461 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-18 17:59:35 +00:00
Chris Lattner
8829dc88a8 Oh yeah, this is needed too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30407 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-16 05:08:34 +00:00
Chris Lattner
a89654b1a1 simplify control flow, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30403 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-16 00:21:44 +00:00
Chris Lattner
7d7bffe157 Allow custom expand of mul 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30402 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-16 00:09:24 +00:00
Chris Lattner
1ec72738ac Fold (X & C1) | (Y & C2) -> (X|Y) & C3 when possible. 
This implements CodeGen/X86/and-or-fold.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30379 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 21:11:37 +00:00
Chris Lattner
516b962b5a Split rotate matching code out to its own function. Make it stronger, by 
matching things like ((x >> c1) & c2) | ((x << c3) & c4) to (rot x, c5) & c6


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 20:50:57 +00:00
Chris Lattner
c970f062e0 If LSR went through a lot of trouble to put constants (e.g. the addr of a global 
in a specific BB, don't undo this!).  This allows us to compile
CodeGen/X86/loop-hoist.ll into:

_foo:
        xorl %eax, %eax
***     movl L_Arr$non_lazy_ptr, %ecx
        movl 4(%esp), %edx
LBB1_1: #cond_true
        movl %eax, (%ecx,%eax,4)
        incl %eax
        cmpl %edx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

instead of:

_foo:
        xorl %eax, %eax
        movl 4(%esp), %ecx
LBB1_1: #cond_true
***     movl L_Arr$non_lazy_ptr, %edx
        movl %eax, (%edx,%eax,4)
        incl %eax
        cmpl %ecx, %eax
        jne LBB1_1      #cond_true
LBB1_2: #return
        ret

This was noticed in 464.h264ref.  This doesn't usually affect PPC,
but strikes X86 all the time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 06:02:42 +00:00
Chris Lattner
79980b07da Compile X << 1 (where X is a long-long) to: 
addl %ecx, %ecx
        adcl %eax, %eax

instead of:

        movl %ecx, %edx
        addl %edx, %edx
        shrl $31, %ecx
        addl %eax, %eax
        orl %ecx, %eax

and to:

        addc r5, r5, r5
        adde r4, r4, r4

instead of:

        slwi r2,r9,1
        srwi r0,r11,31
        slwi r3,r11,1
        or r2,r0,r2

on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30284 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:50:39 +00:00
Evan Cheng
d6594ae54c Added support for machine specific constantpool values. These are useful for 
representing expressions that can only be resolved at link time, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:00:35 +00:00
Chris Lattner
c66764c007 This code was trying too hard. By eliminating redundant edges in the CFG 
due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.

This fixes 458.sjeng on x86 with llc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30236 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-10 06:36:57 +00:00
Chris Lattner
6ddf8ed6fe Implement the fpowi now by lowering to a libcall 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 06:03:30 +00:00
Chris Lattner
f3f333dbd6 Allow targets to custom lower expanded BIT_CONVERT's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30217 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-09 00:20:27 +00:00
Chris Lattner
d5e93c0795 Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted 
too many phi operands when lowering a switch to branches in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30142 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 01:59:34 +00:00
Chris Lattner
7acf5f39fe Change the default to 0, which means 'default'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30114 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 17:39:15 +00:00
Chris Lattner
09e460662a Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-05 02:31:13 +00:00
Duraid Madina
0c9e0ff249 forgot this 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30097 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-04 07:44:11 +00:00
Evan Cheng
3f4fd0fd64 Allow legalizer to expand ISD::MUL using only MULHS in the rare case that is 
possible and the target only supports MULHS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30022 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-01 18:17:58 +00:00
Evan Cheng
dfcfacb0cb DAG combiner fix for rotates. Previously the outer-most condition checks 
for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-31 07:41:12 +00:00
Evan Cheng
1efba0ecb4 Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29951 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-29 06:42:35 +00:00
Chris Lattner
a4f0b3a084 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 12:54:02 +00:00
Evan Cheng
694481ee01 Eliminate SelectNodeTo() and getTargetNode() variants which take more than 
3 SDOperand operands. They are replaced by versions which take an array
of SDOperand and the number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29905 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-27 08:08:54 +00:00
Evan Cheng
95514bae73 SelectNodeTo now returns a SDNode*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-26 08:00:10 +00:00
Chris Lattner
f921a51891 Fix PR861 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29796 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-21 20:24:53 +00:00
Chris Lattner
228a18e0f2 switch the SUnit pred/succ sets from being std::sets to being smallvectors. 
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%).  More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29743 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 00:09:56 +00:00
Chris Lattner
be384162c6 minor changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29740 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-16 22:57:46 +00:00