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398 Commits

Author SHA1 Message Date
Evan Cheng
c8306bde15 In PIC mode, GV not requiring an extra load can be used as address immediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32028 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 23:48:14 +00:00
Evan Cheng
d0ff02cf6f Fix for PR1018 - Better support for X86-64 Linux in small code model. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32026 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 23:19:46 +00:00
Evan Cheng
3fa9dff2c9 Custom lower READCYCLECOUNTER for x86-64. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32017 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-29 08:28:13 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Anton Korobeynikov
12c49af81e Refactored *GVRequiresExtraLoad() to Subtarget method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31887 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-21 00:01:06 +00:00
Anton Korobeynikov
a59868519b We should perform extra load for dllimported calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31874 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-20 10:46:14 +00:00
Evan Cheng
7ce4578353 Matches MachineInstr changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:36:35 +00:00
Evan Cheng
5cd3e9f4b7 Add implicit use / def operands to created MI's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31676 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-11 10:21:44 +00:00
Evan Cheng
8ca29326e1 Don't dag combine floating point select to max and min intrinsics. Those 
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.

This fixes PR996.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31645 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 21:43:37 +00:00
Anton Korobeynikov
df78611726 Fixing PR990: http://llvm.org/PR990. 
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31613 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-10 00:48:11 +00:00
Evan Cheng
6e56e2c602 Fixed a bug which causes x86 be to incorrectly match 
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.

Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31519 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-07 22:14:24 +00:00
Reid Spencer
3ed469ccd7 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-02 20:25:50 +00:00
Chris Lattner
22aaf1d61c allow the address of a global to be used with the "i" constraint when in 
-static mode.  This implements PR882.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31326 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 20:13:11 +00:00
Chris Lattner
1a60aa7bc1 handle "st" as "st(0)" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 19:42:44 +00:00
Anton Korobeynikov
ab4022f196 1. Clean up code due to changes in SwitchTo*Section(2) 
2. Added partial debug support for mingw\cygwin targets (the same as
   Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
   for storing debug info by default, thus many (runtime) libraries has
   this information included. These formats shouldn't be mixed in one binary
   ('stabs' & 'DWARF'), otherwise binutils tools will be confused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31311 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-31 08:31:24 +00:00
Reid Spencer
02b8511364 Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4 
generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31299 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-30 22:32:30 +00:00
Evan Cheng
c35497fc2a All targets expand BR_JT for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-30 08:02:39 +00:00
Evan Cheng
f686d9b71f Fixed a significant bug where unpcklpd is incorrectly used to extract element 1 from a v2f64 value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31228 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-27 21:08:32 +00:00
Evan Cheng
6bdb3f6c8f Fix for PR968: expand vector sdiv, udiv, srem, urem. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31220 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-27 18:49:08 +00:00
Evan Cheng
9eca5e814d During vector shuffle lowering, we sometimes commute a vector shuffle to try 
to match MOVL (movss, movsd, etc.). Don't forget to commute it back and try
unpck* and shufp* if that doesn't pan out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31186 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-25 21:49:50 +00:00
Evan Cheng
9bbbb98a60 Remove -disable-x86-shuffle-opti 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31183 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-25 20:48:19 +00:00
Chris Lattner
7fbe9723e3 Implement branch analysis/xform hooks required by the branch folding pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31065 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-20 17:42:20 +00:00
Evan Cheng
d9b8e40ab3 Avoid getting into an infinite loop when -disable-x86-shuffle-opti is specified. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30974 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-16 06:36:00 +00:00
Evan Cheng
8b2794aeff Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-13 21:14:26 +00:00
Evan Cheng
cf12ec4897 Some X86ISD::CMP were created with wrong ValueType's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30913 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-12 19:12:56 +00:00
Evan Cheng
23425f5c74 Don't convert to MOVLP if using shufps etc. may allow load folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30847 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-09 21:39:25 +00:00
Evan Cheng
466685d41a Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-09 20:57:25 +00:00
Evan Cheng
786225adf0 Make use of getStore(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 23:01:46 +00:00
Chris Lattner
1907a7b37b Lower some min/max idioms to minss/maxss when unsafe fp math is enabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30748 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-05 04:11:26 +00:00
Evan Cheng
e111303408 Added option -disable-x86-shuffle-opti to disable X86 specific vector shuffle optimizations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30723 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 18:33:38 +00:00
Chris Lattner
83e6c9925e Pattern match min/max nodes when we have sse. This implements 
CodeGen/X86/scalar_sse_minmax.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30719 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 06:57:07 +00:00
Evan Cheng
c548428c5d Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an 
extra operand to LOADX to specify the exact value extension type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-04 00:56:09 +00:00
Chris Lattner
13bf6c1350 Fix PR933 and CodeGen/X86/2006-10-02-BoolRetCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30703 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-03 17:18:42 +00:00
Chris Lattner
f38f543e01 silence warnings in release build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30631 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-27 18:29:38 +00:00
Chris Lattner
e87e1154a1 Various random and minor code cleanups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30608 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-26 03:57:53 +00:00
Nick Lewycky
70084fd53a Fix compile error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30553 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-21 02:08:31 +00:00
Anton Korobeynikov
f824868ed9 Adding codegeneration for StdCall & FastCall calling conventions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30549 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-20 22:03:51 +00:00
Anton Korobeynikov
bcb9770efe Added some eye-candy for Subtarget type checking 
Added X86 StdCall & FastCall calling conventions. Codegen will follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30446 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-17 20:25:45 +00:00
Anton Korobeynikov
93c2b37340 Small fixes for supporting dll* linkage types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30441 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-17 13:06:18 +00:00
Anton Korobeynikov
b74ed07bfd Adding dllimport, dllexport and external weak linkage types. 
DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-14 18:23:27 +00:00
Chris Lattner
bfd68a7858 Turn X < 0 -> TEST X,X js 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 17:04:54 +00:00
Chris Lattner
7a6366de86 The sense of this branch was inverted :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30293 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 16:56:12 +00:00
Chris Lattner
f95705163f Compile X > -1 -> text X,X; js dest 
This implements CodeGen/X86/jump_sign.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30283 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-13 03:22:10 +00:00
Evan Cheng
c356a572e3 Reflects MachineConstantPoolEntry changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-12 21:04:05 +00:00
Evan Cheng
734503be59 X86ISD::CMP now produces a chain as well as a flag. Make that the chain 
operand of a conditional branch to allow load folding into CMP / TEST
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-11 02:19:56 +00:00
Evan Cheng
25ab690a43 Committing X86-64 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 06:48:29 +00:00
Evan Cheng
8cf723d8eb - Identify a vector_shuffle that can be turned into an undef, e.g. 
shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
  optimal code by failing to identify MOVL (move to lowest element of a
  vector).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-08 01:50:06 +00:00
Chris Lattner
ffc0b2663e Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns 
using test, which provides nice simplifications like:

-       movl %edi, %ecx
-       andl $2, %ecx
-       cmpl $0, %ecx
+       testl $2, %edi
        je LBB1_11      #cond_next90

There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-09-07 20:33:45 +00:00
Chris Lattner
5ea7a68e15 Revert this patch, the front-end has been fixed to make it unneccesary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29752 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 18:43:24 +00:00
Chris Lattner
b5bc04d38a 'g' is handled by the front-end. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29751 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 18:12:28 +00:00
Andrew Lenharth
ad1ed016ce Fix handling of 'g'. Closes 883 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29750 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 17:50:12 +00:00
Andrew Lenharth
d337295fb0 Add the 'c' constraint as needed by the linux kernel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29747 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 16:07:50 +00:00
Andrew Lenharth
c63e56ee5f Add support for S and D constraints, as needed to compile the linux kernel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29746 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-17 15:35:43 +00:00
Chris Lattner
e219945348 Eliminate use of getNode that takes a vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29614 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 17:38:39 +00:00
Evan Cheng
64a752f7c7 Match tablegen changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 09:08:15 +00:00
Evan Cheng
311ace0391 Convert more calls of getNode() that takes a vector to pass in the start of an array. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29601 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-11 07:35:45 +00:00
Chris Lattner
bd564bfc63 Start eliminating temporary vectors used to create DAG nodes. Instead, pass 
in the start of an array and a count of operands where applicable.  In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap.  In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.

I updated a lot of code calling getNode that takes a vector, but ran out of
time.  The rest of the code should be updated, and these methods should be
removed.

We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.

It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-08 02:23:42 +00:00
Chris Lattner
f76d180c95 Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll. 
The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29420 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-31 23:26:50 +00:00
Chris Lattner
35d86fef1f Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29307 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-26 21:12:04 +00:00
Evan Cheng
625518002d This opt is now handled in DAG combine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29243 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 08:26:46 +00:00
Evan Cheng
1e1a88e8cc A splat of a vector constant of all zero or all one is the vector constant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29234 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 23:09:47 +00:00
Chris Lattner
6d3465793f Add information preventing several register class constraints from working. 
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 16:59:49 +00:00
Chris Lattner
f4dff84c86 Implement the inline asm 'A' constraint. This implements PR825 and 
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29101 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 02:54:03 +00:00
Evan Cheng
1e60c098cc Fixed stack objects do not specify alignments, but their offsets are known. 
Use that information when doing the transformation to merge multiple loads
into a 128-bit load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29090 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 21:37:44 +00:00
Chris Lattner
5c5f4ca6f1 Mark internal function static 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29085 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 19:53:12 +00:00
Evan Cheng
206ee9d86c X86 target specific DAG combine: turn build_vector (load x), (load x+4), 
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).

e.g.

__m128 test(float a, float b, float c, float d) {
  return _mm_set_ps(d, c, b, a);
}

_test:
        movups 4(%esp), %xmm0
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-07 08:33:52 +00:00
Evan Cheng
60c07e1aea Reorg. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28999 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-05 22:17:51 +00:00
Evan Cheng
da08d2c39a Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28910 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-24 08:36:10 +00:00
Evan Cheng
015188ffbc Type of vector extract / insert index operand should be iPTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:14:54 +00:00
Evan Cheng
b69d113201 Add argument registers to the end of call operand list (partial fix). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28783 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 18:17:40 +00:00
Evan Cheng
b12223e284 Minor compilation speed improvement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28736 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-09 06:24:42 +00:00
Evan Cheng
e8bd0a332a Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28703 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 23:30:24 +00:00
Evan Cheng
2675534b7f Typos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28617 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 05:53:27 +00:00
Evan Cheng
04b2562502 Remove a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28607 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 00:30:39 +00:00
Evan Cheng
8f692e2457 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28581 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 00:50:42 +00:00
Evan Cheng
6848be1a27 Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 23:10:12 +00:00
Evan Cheng
3fddf241d8 Vector argument must be passed in memory location aligned on 16-byte boundary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28505 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 20:37:47 +00:00
Evan Cheng
1d6a9b3b6c Mac OS X ABI document lied. The first four XMM registers are used to pass 
vector arguments, not three.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28504 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 19:22:06 +00:00
Evan Cheng
052fb5110f Minor update to make the code more clear 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28499 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:39:59 +00:00
Evan Cheng
f9d62dc6e5 Update more comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28498 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:37:16 +00:00
Evan Cheng
f9ff7c54be Fix some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28497 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:25:43 +00:00
Evan Cheng
6f707999a1 No need to handle illegal types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28496 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:22:49 +00:00
Evan Cheng
cc1fc220a0 Consistency 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28488 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 23:31:23 +00:00
Evan Cheng
25e71d10a0 Some clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28483 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 22:38:31 +00:00
Evan Cheng
a9bb445db0 Remove some dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28481 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 22:25:52 +00:00
Evan Cheng
6b5783d0b1 Build breakage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28475 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 18:56:34 +00:00
Evan Cheng
32fe1035a7 Switch X86 over to a call-selection model where the lowering code creates 
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28463 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:59:30 +00:00
Chris Lattner
c6d0567324 Fix file header comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28441 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 23:20:42 +00:00
Evan Cheng
4db3af3511 Better way to check for vararg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28440 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 21:08:24 +00:00
Evan Cheng
25caf63cd2 Remove PreprocessCCCArguments and PreprocessFastCCArguments now that 
FORMAL_ARGUMENTS nodes include a token operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28439 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 21:06:34 +00:00
Chris Lattner
2d2970905c Implement an annoying part of the Darwin/X86 abi: the callee of a struct 
return argument pops the hidden struct pointer if present, not the caller.

For example, in this testcase:

struct X { int D, E, F, G; };
struct X bar() {
  struct X a;
  a.D = 0;
  a.E = 1;
  a.F = 2;
  a.G = 3;
  return a;
}
void foo(struct X *P) {
  *P = bar();
}

We used to emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
        addl $28, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
        ret

This is correct on Linux/X86 but not Darwin/X86.  With this patch, we now
emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
***     addl $24, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
***     ret $4

For the record, GCC emits (which is functionally equivalent to our new code):

_bar:
        movl    4(%esp), %eax
        movl    $3, 12(%eax)
        movl    $2, 8(%eax)
        movl    $1, 4(%eax)
        movl    $0, (%eax)
        ret     $4
_foo:
        pushl   %esi
        subl    $40, %esp
        movl    48(%esp), %esi
        leal    16(%esp), %eax
        movl    %eax, (%esp)
        call    _bar
        subl    $4, %esp
        movl    16(%esp), %eax
        movl    %eax, (%esi)
        movl    20(%esp), %eax
        movl    %eax, 4(%esi)
        movl    24(%esp), %eax
        movl    %eax, 8(%esi)
        movl    28(%esp), %eax
        movl    %eax, 12(%esi)
        addl    $40, %esp
        popl    %esi
        ret

This fixes SingleSource/Benchmarks/CoyoteBench/fftbench with LLC and the
JIT, and fixes the X86-backend portion of PR729.  The CBE still needs to
be updated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28438 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 18:50:38 +00:00
Chris Lattner
cdbaeb52ae CSRet allows varargs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28409 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-19 21:34:04 +00:00
Evan Cheng
4ac8974d02 Should pass by reference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28357 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 19:07:40 +00:00
Chris Lattner
aa9406b0c4 Implement the custom lowering hook right, returning values for all of the 
arguments at once.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28327 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 17:14:26 +00:00
Chris Lattner
e7746c9084 Fix a bug I introduced yesterday, which broke functions with *no* arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28326 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 17:08:35 +00:00
Evan Cheng
069287d460 X86 integer register classes naming changes. Make them consistent with FP, vector classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28324 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 07:21:53 +00:00
Chris Lattner
8c0c10c2b9 Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend, 
it doesn't currently use/maintain the chain properly.  Also, make the
X86ISelLowering.cpp file 80-col clean.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 06:45:34 +00:00
Chris Lattner
03ea4c8326 Dead variable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28265 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 21:12:22 +00:00
Chris Lattner
80a7ecc923 Teach the X86 backend about non-i32 inline asm register classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28139 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 00:29:37 +00:00
Chris Lattner
bd04aa5796 Teach the code generator to use cvtss2sd as extload f32 -> f64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28131 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:35:18 +00:00
Owen Anderson
a69571c799 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 01:29:57 +00:00
Evan Cheng
347d5f789a Initial caller side support (for CCC only, not FastCC) of 128-bit vector 
passing by value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28015 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 21:29:37 +00:00
Evan Cheng
43f3bd310b Implement four-wide shuffle with 2 shufps if no more than two elements come 
from each vector. e.g.
        shuffle(G1, G2, 7, 1, 5, 2)
==>
        movaps _G2, %xmm0
        shufps $151, _G1, %xmm0
        shufps $216, %xmm0, %xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28011 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 07:03:38 +00:00
Evan Cheng
020c41f21e TargetLowering::LowerArguments should return a VBIT_CONVERT of 
FORMAL_ARGUMENTS SDOperand in the return result vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28009 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 05:25:15 +00:00
Evan Cheng
fea89c14ec Make x86 isel lowering produce tailcall nodes. They are match to normal calls 
for now.

Patch contributed by Alexander Friedman.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27994 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 08:40:39 +00:00
Evan Cheng
2fdd95eee7 Support for passing 128-bit vector arguments via XMM registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27992 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 08:31:10 +00:00
Evan Cheng
5fb03ce905 Oops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27989 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 05:44:50 +00:00
Evan Cheng
85e3800e42 Bug fix: not updating NumIntRegs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27988 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 05:35:28 +00:00
Evan Cheng
eda65fa20b - Clean up formal argument lowering code. Prepare for vector pass by value work. 
- Fixed vararg support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27985 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 01:32:22 +00:00
Evan Cheng
9191dbba8e Fix fastcc failures. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27980 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-26 18:21:31 +00:00
Evan Cheng
1bc7804e4c Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27975 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-26 01:20:17 +00:00
Evan Cheng
0db9fe6775 Separate LowerOperation() into multiple functions, one per opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27972 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 20:13:52 +00:00
Evan Cheng
37d1d9bc66 Special case handling two wide build_vector(0, x). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27961 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-24 22:58:52 +00:00
Evan Cheng
c78d3b43f5 A little bit more build_vector enhancement for v8i16 cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27959 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-24 18:01:45 +00:00
Evan Cheng
9293451e3f MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27953 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-23 06:35:19 +00:00
Nate Begeman
37efe67645 JumpTable support! What this represents is working asm and jit support for 
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 18:53:45 +00:00
Evan Cheng
1900c012f5 Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27946 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 08:34:05 +00:00
Evan Cheng
a083af14c8 Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 06:21:46 +00:00
Evan Cheng
ba05f728b5 Revamp build_vector lowering to take advantage of movss and movd instructions. 
movd always clear the top 96 bits and movss does so when it's loading the
value from memory.
The net result is codegen for 4-wide shuffles is much improved. It is near
optimal if one or more elements is a zero. e.g.

__m128i test(int a, int b) {
  return _mm_set_epi32(0, 0, b, a);
}

compiles to

_test:
	movd 8(%esp), %xmm1
	movd 4(%esp), %xmm0
	punpckldq %xmm1, %xmm0
	ret

compare to gcc:

_test:
	subl	$12, %esp
	movd	20(%esp), %xmm0
	movd	16(%esp), %xmm1
	punpckldq	%xmm0, %xmm1
	movq	%xmm1, %xmm0
	movhps	LC0, %xmm0
	addl	$12, %esp
	ret

or icc:

_test:
        movd      4(%esp), %xmm0                                #5.10
        movd      8(%esp), %xmm3                                #5.10
        xorl      %eax, %eax                                    #5.10
        movd      %eax, %xmm1                                   #5.10
        punpckldq %xmm1, %xmm0                                  #5.10
        movd      %eax, %xmm2                                   #5.10
        punpckldq %xmm2, %xmm3                                  #5.10
        punpckldq %xmm3, %xmm0                                  #5.10
        ret                                                     #5.10

There are still room for improvement, for example the FP variant of the above example:

__m128 test(float a, float b) {
  return _mm_set_ps(0.0, 0.0, b, a);
}

_test:
	movss 8(%esp), %xmm1
	movss 4(%esp), %xmm0
	unpcklps %xmm1, %xmm0
	xorps %xmm1, %xmm1
	movlhps %xmm1, %xmm0
	ret

The xorps and movlhps are unnecessary. This will require post legalizer optimization to handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27939 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 23:03:30 +00:00
Evan Cheng
017dcc6e55 Now generating perfect (I think) code for "vector set" with a single non-zero 
scalar value.

e.g.
        _mm_set_epi32(0, a, 0, 0);
==>
	movd 4(%esp), %xmm0
	pshufd $69, %xmm0, %xmm0

        _mm_set_epi8(0, 0, 0, 0, 0, a, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
==>
	movzbw 4(%esp), %ax
	movzwl %ax, %eax
	pxor %xmm0, %xmm0
	pinsrw $5, %eax, %xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27923 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 01:05:10 +00:00
Evan Cheng
39623daef6 - Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1> 
to a vector shuffle.
- VECTOR_SHUFFLE lowering change in preparation for more efficient codegen
of vector shuffle with zero (or any splat) vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27875 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 08:58:49 +00:00
Evan Cheng
72cd9a9439 Handle v2i64 BUILD_VECTOR custom lowering correctly. v2i64 is a legal type, 
but i64 is not. If possible, change a i64 op to a f64 (e.g. load, constant)
and then cast it back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27849 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 00:11:39 +00:00
Evan Cheng
94fe5eb14a isSplatMask() bug: first element can be an undef. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27847 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 23:28:59 +00:00
Evan Cheng
80d428c370 - Added support to do aribitrary 4 wide shuffle with no more than three 
instructions.
- Fixed a commute vector_shuff bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27845 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 22:48:17 +00:00
Evan Cheng
533a0aa9ba Commute vector_shuffle to match more movlhps, movlp{s|d} cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27840 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 20:35:22 +00:00
Evan Cheng
cdfc3c82a7 Use movss to insert_vector_elt(v, s, 0). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27782 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 22:45:49 +00:00
Evan Cheng
5edb8d270c Use two pinsrw to insert an element into v4i32 / v4f32 vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27779 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 22:04:06 +00:00
Evan Cheng
c575ca22ea Implement v8i16, v16i8 splat using unpckl + pshufd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27768 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 20:43:08 +00:00
Chris Lattner
b2be4032c5 implement returns of a vector, testcase here: CodeGen/X86/vec_return.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27767 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 20:32:50 +00:00
Evan Cheng
5001ea1078 FP SETOLT, SETOLT, SETUGE, SETUGT conditions were implemented incorrectly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27755 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 07:24:10 +00:00
Evan Cheng
57ebe9fbf0 Silly bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27719 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 05:37:34 +00:00
Evan Cheng
39fc145995 Do not use movs{h|l}dup for a shuffle with a single non-undef node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27718 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 03:13:24 +00:00
Evan Cheng
d953947d26 Last few SSE3 intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27711 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 21:59:03 +00:00
Evan Cheng
f99898453d X86 SSE2 supports v8i16 multiplication 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27644 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-13 05:10:25 +00:00
Evan Cheng
2c3ae37213 All "integer" logical ops (pand, por, pxor) are now promoted to v2i64. 
Clean up and fix various logical ops issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 21:21:57 +00:00
Evan Cheng
91b740da12 Promote v4i32, v8i16, v16i8 load to v2i64 load. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27612 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 17:12:36 +00:00
Evan Cheng
d6d1cbd692 Added support for _mm_move_ss and _mm_move_sd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27575 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 00:19:04 +00:00
Evan Cheng
f7c378e9ea Conditional move of vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27556 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 07:23:14 +00:00
Evan Cheng
c5cdff2341 Code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27501 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 21:53:05 +00:00
Evan Cheng
5ced1d812e - movlp{s|d} and movhp{s|d} support. 
- Normalize shuffle nodes so result vector lower half elements come from the
  first vector, the rest come from the second vector. (Except for the
  exceptions :-).
- Other minor fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27474 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:23:56 +00:00
Evan Cheng
6be2c58c8c Support for comi / ucomi intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27444 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 23:38:46 +00:00
Evan Cheng
1d5a8cca00 Handle canonical form of e.g. 
vector_shuffle v1, v1, <0, 4, 1, 5, 2, 6, 3, 7>

This is turned into
vector_shuffle v1, <undef>, <0, 0, 1, 1, 2, 2, 3, 3>
by dag combiner.

It would match a {p}unpckl on x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27437 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 07:20:06 +00:00
Evan Cheng
865f0606f7 Bogus assert 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27434 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 06:11:20 +00:00
Evan Cheng
278158b487 Fallthrough to expand if a VECTOR_SHUFFLE cannot be custom lowered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27433 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 06:09:26 +00:00
Evan Cheng
c21a053729 Handle v8i16 shuffle that must be broken into a pair of pshufhw / pshuflw. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27427 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 01:47:37 +00:00
Evan Cheng
20e3ed102b Use movlpd to: store lower f64 extracted from v2f64. 
Use movhpd to: store upper f64 extracted from v2f64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27382 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 22:30:54 +00:00
Evan Cheng
11e15b38e9 - More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc. 
- Some bug fixes and naming inconsistency fixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27377 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 20:53:28 +00:00
Evan Cheng
653159f4aa Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed 
INSERT_VECTOR_ELT to insert a 16-bit value in a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27314 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:55:24 +00:00
Evan Cheng
b067a1e7e6 Add support to use pextrw and pinsrw to extract and insert a word element 
from a 128-bit vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27304 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:22:53 +00:00
Evan Cheng
33e85ca7b6 Expand all INSERT_VECTOR_ELT (obviously bad) for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:30:39 +00:00