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233 Commits

Author SHA1 Message Date
Evan Cheng
5bc4da4893 Bye bye HACKTROCITY. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24935 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-22 02:26:21 +00:00
Evan Cheng
3a03ebb377 * Fix a GlobalAddress lowering bug. 
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 23:05:39 +00:00
Evan Cheng
793ca4caa4 Oops. Accidentally deleted RET pattern. It's still needed for return void; 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24920 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 22:22:16 +00:00
Evan Cheng
d5781fca4f * Added support for X86 RET with an additional operand to specify number of 
bytes to pop off stack.
* Added support for X86 SETCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24917 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 20:21:51 +00:00
Chris Lattner
c515ad18f8 This was meant to go in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24900 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 07:50:26 +00:00
Chris Lattner
58fe459e36 Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns 
that were overloaded to work before and after the stackifier runs.  With the
new clean world, it is possible to write patterns for these instructions: woo!

This also adds a few simple patterns here and there, though there are a lot
still missing.  These should be easy to add though. :)

See the comments under "Floating Point Stack Support" for more details on
the new world order.

This patch as absolutely no effect on the generated code, woo!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24899 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 07:47:04 +00:00
Chris Lattner
9fb2422c49 Wrap some long lines: no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24898 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 05:34:58 +00:00
Evan Cheng
b077b842b6 * Added lowering hook for external weak global address. It inserts a load 
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
  value (or store / fld / copy to ST(0) for floating point value). This
  eliminate the need to write C++ code to handle RET with variable number
  of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24888 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 02:39:21 +00:00
Evan Cheng
bbc8ddbea3 SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24886 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-20 22:59:51 +00:00
Evan Cheng
a5386b0823 Added X86 readport patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24879 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-20 07:38:38 +00:00
Evan Cheng
898101c15f X86 conditional branch support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24870 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-19 23:12:38 +00:00
Chris Lattner
4543251834 eliminate some redundancy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24781 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 19:47:05 +00:00
Evan Cheng
1aabc4ea15 Added anyext, modelled as zext on X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24759 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 01:47:57 +00:00
Evan Cheng
aed7c721df Added support for cmp, test, and conditional move instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24756 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 01:24:02 +00:00
Evan Cheng
cb17bac3a3 * Promote all 1 bit entities to 8 bit. 
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24726 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-15 19:49:23 +00:00
Evan Cheng
502c5bb428 Added frameindex, constpool, globaladdr, and externalsym as root nodes of 
leaaddr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24724 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-15 08:31:04 +00:00
Evan Cheng
f6036a3f1b Use MOV8rm to load 1 bit value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24721 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-15 00:59:17 +00:00
Evan Cheng
7a7e8375a9 Added sext and zext patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24705 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-14 02:22:27 +00:00
Evan Cheng
85dd889ed6 Add load + store folding srl and sra patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24696 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 07:24:22 +00:00
Evan Cheng
c937ffafba Beautify a few patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24690 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 02:40:18 +00:00
Evan Cheng
763b029b28 Some shl patterns which do load + store folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24689 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 02:34:51 +00:00
Evan Cheng
605c415046 A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24688 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 01:57:51 +00:00
Evan Cheng
0ef3a77bdf Add and, or, and xor patterns which fold load + stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24687 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 01:41:36 +00:00
Evan Cheng
6cad276c90 Add inc + dec patterns which fold load + stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24686 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 01:02:47 +00:00
Evan Cheng
5ce4edb967 Add neg and not patterns which fold load + stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24685 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:54:44 +00:00
Evan Cheng
5a38e0210d Missed a couple redundant explicit type casts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:25:07 +00:00
Evan Cheng
9b6b642647 Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24683 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:14:11 +00:00
Evan Cheng
b3558540b6 * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands. 
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24682 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:01:09 +00:00
Evan Cheng
f281e02cbd Add some integer mul patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24681 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 23:47:46 +00:00
Evan Cheng
d160d48a2b Add some sub patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24675 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 21:54:05 +00:00
Evan Cheng
ee93f9db87 Add a few more add / store patterns. e.g. ADD32mi8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24670 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 19:45:23 +00:00
Evan Cheng
b51a059b2c * Added X86 store patterns. 
* Added X86 dec patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-10 00:48:20 +00:00
Evan Cheng
ab24ed2a32 Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-09 22:48:48 +00:00
Evan Cheng
670fd8f8dd Added explicit type field to ComplexPattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-08 02:15:07 +00:00
Evan Cheng
ec693f77c0 * Added intelligence to X86 LEA addressing mode matching routine so it returns 
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-08 02:01:35 +00:00
Evan Cheng
8d202230b4 Remove unnecessary let hasCtrlDep=1 now it can be inferred. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 23:09:43 +00:00
Chris Lattner
3d36a9f6f4 Several things: 
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly.  The port number really
   *is* a 16-bit value, but the patterns should only match if the number
   is 0-255.  Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
   i8, not an i16 as they were believed to be before.  This previous fib
   stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-05 02:40:25 +00:00
Evan Cheng
d35b8c1adb Added isel patterns for RET, JMP, and WRITEPORT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-04 08:19:43 +00:00
Evan Cheng
640f299b44 Proper support for shifts with register shift value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24559 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-01 00:43:55 +00:00
Nate Begeman
391c5d231a No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 18:54:35 +00:00
Chris Lattner
5b9bbc8792 Fix a bug in a recent patch that broke shifts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24526 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-30 05:11:18 +00:00
Evan Cheng
f0701842f7 Add more X86 ISel patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24520 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-29 19:38:52 +00:00
Chris Lattner
441b223c9b encode rdtsc correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24435 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-20 22:13:18 +00:00
Andrew Lenharth
b873ff322c The second patch of X86 support for read cycle counter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24430 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-20 21:41:10 +00:00
Chris Lattner
6adaf79ad7 Teach the x86 backend about the register constraints of its addressing mode. 
Patch by Evan Cheng


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24423 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-19 07:01:30 +00:00
Chris Lattner
f124d5e500 add more patterns, patch by Evan Cheng. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24406 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-18 01:04:42 +00:00
Chris Lattner
78432feff8 Add patterns for some 16-bit immediate instructions, patch contributed by 
Evan Cheng.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24384 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-17 02:01:55 +00:00
Chris Lattner
7a12537843 Add patterns for several simple instructions that take i32 immediates. 
Patch contributed by Evan Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24382 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-11-16 22:59:19 +00:00
Nate Begeman
14e2cf62f4 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23735 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-14 22:06:00 +00:00
Chris Lattner
43ef1318c6 give all operands names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23356 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-14 21:10:24 +00:00
Chris Lattner
9d9dc816d0 add a few missing cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22891 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:41:29 +00:00
Chris Lattner
b822abade7 Give ADJCALLSTACKDOWN/UP the correct operands. 
Give a whole bunch of other stuff variable operands, particularly FP.  The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable.  This will have to be fixed before we can dag->dag
the X86 backend.  The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22890 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-19 00:38:22 +00:00
Nate Begeman
1c73c7be9d Scalar SSE: load +0.0 -> xorps/xorpd 
Scalar SSE: a < b ? c : 0.0 -> cmpss, andps
Scalar SSE: float -> i16 needs to be promoted


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22637 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-08-03 23:26:28 +00:00
Nate Begeman
16b04f3d5e Get closer to fully working scalar FP in SSE regs. This gets singlesource 
working, and Olden/power.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22441 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-15 00:38:55 +00:00
Nate Begeman
f63be7d395 First round of support for doing scalar FP using the SSE2 ISA extension and 
XMM registers.  There are many known deficiencies and fixmes, which will be
addressed ASAP.  The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.

The x86 backend will still default to x87 style FP.  To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.

An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
                        Sum += P[i]; return Sum; }

The inner loop looks like the following:
x87:
.LBB_foo_1:     # no_exit
        fldl (%esp)
        faddl (%eax,%ecx,8)
        fstpl (%esp)
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit

SSE2:
        addsd (%eax,%ecx,8), %xmm0
        incl %ecx
        cmpl $1000, %ecx
        #FP_REG_KILL
        jne .LBB_foo_1  # no_exit


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22340 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-07-06 18:59:04 +00:00
Nate Begeman
f1702ac589 Initial set of .td file changes necessary to get scalar fp in xmm registers 
working.  The instruction selector changes will hopefully be coming later
this week once they are debugged.  This is necessary to support the darwin
x86 FP model, and is recommended by intel as the replacement for x87.  As
a bonus, the register allocator knows how to deal with these registers
across basic blocks, unliky the FP stackifier.  This leads to significantly
better codegen in several cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22300 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-06-27 21:20:31 +00:00
Chris Lattner
1e9448bce8 Add markers in the asm file for tail calls, add a new ADJSTACKPTRri 
sorta-pseudo-instruction


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22042 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 03:10:37 +00:00
Chris Lattner
0dede079e7 Yes, calltarget is the operand of the day. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22040 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-15 01:10:30 +00:00
Chris Lattner
2b3d56ee72 Add some new instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22036 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-14 23:35:21 +00:00
Chris Lattner
1be4811d34 add 'ret imm' instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21945 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-13 17:56:48 +00:00
Chris Lattner
82c7897f49 Fix the syntax of the i/o instructions, these are obviously unused. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21829 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-05-09 20:49:20 +00:00
Chris Lattner
5afc124bdf Add some new X86 instrs, patch contributed by Morten Ofstad 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21608 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-28 21:50:05 +00:00
Chris Lattner
1e6a71524e add signed versions of the extra precision multiplies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21106 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-06 04:19:22 +00:00
Chris Lattner
b1f26fb921 add an fabs instr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21006 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-04-02 04:31:56 +00:00
Chris Lattner
da895d6337 Fix spelling, patch contributed by Gabor Greif! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20343 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-02-27 06:18:25 +00:00
Chris Lattner
40ff633b05 Add rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19690 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:50:03 +00:00
Chris Lattner
0df53d22c3 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19687 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:31:24 +00:00
Chris Lattner
41e431ba04 Teach the code generator that shrd/shld is commutable if it has an immediate. 
This allows us to generate this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shld %EDX, %EDX, 2
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

Note the magically transmogrifying immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19686 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:11:01 +00:00
Chris Lattner
57fbfb5879 Add conditional moves for the parity flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19437 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-10 22:09:33 +00:00
Chris Lattner
10197ff5cd ADC and IMUL are also commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19264 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-03 01:27:59 +00:00
Chris Lattner
cc65beeb39 Two changes here: 
1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
   instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19246 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-02 02:35:46 +00:00
John Criswell
546faca4ef Correct the name of stosd for the AT&T syntax: 
It's stosl (l for long == 32 bit).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17658 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-11-10 04:48:15 +00:00
Chris Lattner
09c750f73d Remove debugging code, fix encoding problem. This fixes the problems 
the JIT had last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16766 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 14:31:50 +00:00
Chris Lattner
d93d3b047c Add some new instructions. Fix the asm string for sbb32rr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16759 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:01:02 +00:00
Chris Lattner
8f99eff156 Convert some missed patterns to support AT&T style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16645 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:23:07 +00:00
Chris Lattner
10f873b420 Apparently the GNU assembler has a HUGE hack to be compatible with really 
old and broken AT&T syntax assemblers.  The problem with this hack is that
*SOME* forms of the fdiv and fsub instructions have the 'r' bit inverted.
This was a real pain to figure out, but is trivially easy to support: thus
we are now bug compatible with gas and gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16644 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:08:46 +00:00
Chris Lattner
ac6a47588b Fix incorrect suffix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16642 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 05:20:16 +00:00
Chris Lattner
707c6fe3ad Fix some more missed suffixes and swapped operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16641 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 01:38:10 +00:00
Chris Lattner
60c715c9a2 Add missing suffixes to FP instructions for AT&T mode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16640 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 00:43:31 +00:00
Chris Lattner
3a173dfc72 Add support to the instruction patterns for AT&T style output, which will 
hopefully lead to the death of the 'GasBugWorkaroundEmitter'.  This also
includes changes to wrap the whole file to 80 columns! Woot! :)

Note that the AT&T style output has not been tested at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16638 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 20:35:00 +00:00
Alkis Evlogimenos
93c1ab2e15 Use a shorter form to express implicit use/defs in FpGETRESULT and 
FpSETRESULT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16247 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-08 18:29:31 +00:00
Alkis Evlogimenos
978f629ba9 A call instruction should implicitely define ST0 since the return 
value is returned in that register. The pseudo instructions
FpGETRESULT and FpSETRESULT shold also have an implicity use and def
of ST0 repsecitvely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16246 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-09-08 16:54:54 +00:00
Chris Lattner
c96bb817aa Remove a bunch of ad-hoc target-specific flags that were only used by the 
old asmprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15660 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 07:12:04 +00:00
Chris Lattner
e4ead0ce62 Add asmprintergen support for the last X86 instruction that needs it: pcrelative calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15657 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 06:59:12 +00:00
Chris Lattner
9795b3a0e7 Scrunch memoperands, add a few more for floating point memops 
Eliminate the FPI*m classes, converting them to use FPI instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15655 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 06:50:10 +00:00
Chris Lattner
0f38e6ccca Make FPI take asm string and operand list 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15653 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 05:54:16 +00:00
Chris Lattner
f5d3a83f65 Nuke the Im*i* patterns, by asmprintergenifying all users. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15652 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 05:31:07 +00:00
Chris Lattner
f29ed0937f X86 instructions that read-modify-write memory are not LLVM two-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15651 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 05:07:25 +00:00
Chris Lattner
57a02306c5 Get rid of the Im8, Im16, Im32 classes, converting more instructions over to 
asmprintergeneration


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15650 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 04:31:00 +00:00
Chris Lattner
66fa1dcf90 Convert asmprinter to new style of instruction printer 
Start asmprintergen'ifying machine instrs with memory operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15646 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-11 02:25:00 +00:00
Chris Lattner
36b689009d This is purely a formatting patch that gets us closer to the mecca of fitting 
X86InstrInfo.td into 80 columns


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15629 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 21:21:30 +00:00
Chris Lattner
1b9e20e32f Drop the first argument of FPI, and asmprinterify fxch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15628 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 21:02:13 +00:00
Chris Lattner
30bf2d8951 This purely mechanical patch gives the "I" tblgen class operand list and asm 
string operands, and adjusts all users to pass them in instead of using II.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15624 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 20:17:41 +00:00
Chris Lattner
869f477f34 Convert Ii32 instructions over to use the asmprinter generator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15621 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 19:06:36 +00:00
Chris Lattner
7d620d57a4 Convert the Ii16 instructions over 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15606 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 16:22:02 +00:00
Chris Lattner
ab67067186 Convert all Ii8 instructions over to the autogenerated asmprinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15605 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-10 16:09:54 +00:00
Chris Lattner
fc752713d7 Convert all I<> instructions to asmformat. 
Delete the 'name' field of all instructions that have asmformats.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15403 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-01 09:52:59 +00:00
Chris Lattner
a35ce87e2e Eliminate 3 of the X86 printImplicit* flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15398 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-01 08:23:17 +00:00
Chris Lattner
0e967d4f48 Convert more instructions over to the asmprinter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15396 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-01 08:13:11 +00:00
Chris Lattner
ffff70827c Switch more instructions over to using the asmprinter. Fix bugs in the emission 
of in/out instructions (missing %'s on registers).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15393 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-08-01 07:44:35 +00:00