Thomas Harte
bdcab447f9
Add a further accessor.
2021-06-27 16:27:26 -04:00
Thomas Harte
d80f03e369
Corrects longstanding deviation from naming convention.
2021-04-25 14:11:36 -04:00
Thomas Harte
e7a9ae18a1
Introduce further default state.
2021-04-24 23:18:00 -04:00
Thomas Harte
77fcf52d27
Purely style: remove some redundant nullptr
s.
2021-04-19 18:53:00 -04:00
Thomas Harte
79c2bc1fd7
Put the program counter on the bus during interrupt acknowledge.
2021-04-19 18:43:50 -04:00
Thomas Harte
7017324d60
r_step
is obsolete now that I know that [DD/FD]CB don't have a refresh cycle.
2021-04-13 22:17:30 -04:00
Thomas Harte
deb5d69ac7
Consolidates macros.
2021-04-13 22:11:28 -04:00
Thomas Harte
5998f3b35b
Corrects LD[I/D/IR/DR] timing.
...
Macro cleanup to come.
2021-04-13 20:00:18 -04:00
Thomas Harte
869567fdd9
Corrects EX (SP), HL
breakdown.
2021-04-13 19:45:48 -04:00
Thomas Harte
b42780173a
Establishes that there really is no Read4 and Read4Pre distinction.
...
Will finish these unit tests, then clean up.
2021-04-12 20:54:10 -04:00
Thomas Harte
947de2d54a
Switches five-cycle read to a post hoc pause.
2021-04-12 17:17:08 -04:00
Thomas Harte
e82367def3
Switches to test-conformant behaviour for (IX/IY+n) opcode fetches.
2021-04-11 23:01:00 -04:00
Thomas Harte
9cde7c12ba
Shifts responsibility for refresh into the fetch-decode-execute sequence.
2021-04-11 22:50:24 -04:00
Thomas Harte
015556cc91
Switch (ii+n) to Read4Pre.
2021-04-11 10:26:14 -04:00
Thomas Harte
b397059d5e
Moves read time in Read4Pre.
2021-04-10 17:54:20 -04:00
Thomas Harte
e0736435f8
Makes assumption that the address bus just holds its value during an internal operation.
2021-04-10 12:00:53 -04:00
Thomas Harte
eacffa49f5
Exposes IR during 'internal' operations.
2021-04-08 22:22:26 -04:00
Thomas Harte
29cf80339a
Corrects too-short buffer.
2021-04-08 22:15:03 -04:00
Thomas Harte
57a7e0834f
Corrects sampling of MREQ.
2021-04-08 19:21:35 -04:00
Thomas Harte
25b8c4c062
Provide clearer failure case.
2021-04-03 21:04:44 -04:00
Thomas Harte
1be88a5308
Remove first draft.
2021-04-02 07:39:22 -04:00
Thomas Harte
294280a94e
Spells out everything except interrupt acknowledge.
2021-04-02 07:38:06 -04:00
Thomas Harte
32aebfebe0
Starts spelling out meaning of the Z80's partial machine cycles.
2021-04-02 07:37:56 -04:00
Thomas Harte
76299a2add
Include AF' in Z80 state.
2021-03-29 22:58:52 -04:00
Thomas Harte
c8471eb993
Adds various asserts, some comments.
2021-03-03 20:47:45 -05:00
Thomas Harte
83d0cfc24e
Improves commentary.
2021-03-03 20:33:28 -05:00
Thomas Harte
f6466fd657
Remove temporary hackery.
2021-02-19 22:47:50 -05:00
Thomas Harte
72d7901c88
Takes a shot at the keyboard data full flag.
...
Just a guess. But likely?
2021-02-19 20:06:12 -05:00
Thomas Harte
992ee6d631
Don't zero out the program bank until after it has headed stackward.
2021-02-17 22:08:08 -05:00
Thomas Harte
3c887aff95
Improves consistency.
2021-01-21 18:58:22 -05:00
Thomas Harte
e0b36c9c3d
Corrects PBR/DBR resetting upon an exception.
2020-12-29 15:27:49 -05:00
Thomas Harte
574a37814c
Attempts to fix exception selection and timing.
2020-12-08 18:46:30 -05:00
Thomas Harte
c72bdd776e
Adds a new assert: I think this is the issue getting into GS/OS.
2020-12-07 22:43:24 -05:00
Thomas Harte
9e0e063f8a
Resolves one further GCC warning.
...
Technically this leaves one further, on a temporary printf I have in my IIgs. I'll fix that when I strip all this caveman stufff.
2020-11-22 21:57:48 -05:00
Thomas Harte
8ace258fbc
Tackles outstanding GCC warnings.
2020-11-22 21:43:56 -05:00
Thomas Harte
cdacf280e1
After much extra logging, corrects destination bank for MVN and MVP.
2020-11-15 16:08:29 -05:00
Thomas Harte
d3c7253981
Shifts size-limiting of X and Y to transitions and mutations, away from reads.
...
Primarily to remove potential bug-causing complexity — this is easier to debug. But let's see.
2020-11-04 20:35:41 -05:00
Thomas Harte
d50b059a17
Imports 6502-esque test for decimal SBC overflow.
...
All applicable krom tests now pass.
2020-11-03 20:37:30 -05:00
Thomas Harte
cc5ec78156
Provides something on WAI/STP; sizes STY by the x flag; disables MSC test.
2020-11-03 20:17:44 -05:00
Thomas Harte
ddc44ce0d1
Reshuffles enum to make macro tests marginally easier.
2020-11-03 20:17:09 -05:00
Thomas Harte
5cbb91f352
Fixes COP
vector, ensures WDM
skips a byte.
2020-11-03 20:01:02 -05:00
Thomas Harte
91ea2eff4c
Corrects MVN/MVP off-by-one and failure to store what was read.
2020-11-03 18:29:35 -05:00
Thomas Harte
bf85d71674
Brings ADC into conformance. Fixes JML
.
2020-11-03 18:12:10 -05:00
Thomas Harte
3889646d6b
Takes a swing at incorporating krom's 65816 test suite. At least as far as ADC.
2020-11-02 21:09:32 -05:00
Thomas Harte
0178aaee2b
Attempts retroactively to enforce the rule that 8-bit index modes => no top byte.
...
(Rather than a preserved but ignored top byte)
2020-11-02 18:55:28 -05:00
Thomas Harte
e8943618dc
Adds some extra commentary and distinguishes X/Y sizing from M.
2020-10-31 10:21:13 -04:00
Thomas Harte
1ae2f6f449
PHD and PLD should always be 16-bit; PLP 8-bit.
2020-10-31 09:22:35 -04:00
Thomas Harte
88e26b42f5
Fixed: PHP pushes only 8 bits regardless of mode.
2020-10-30 22:36:00 -04:00
Thomas Harte
7f3f6c339f
Corrects stacked program bank during native-mode exceptions.
2020-10-30 20:11:39 -04:00
Thomas Harte
266022b193
Fixes PEA.
2020-10-28 22:00:28 -04:00
Thomas Harte
1df2ce513a
Ensures that reset doesn't push to the stack.
2020-10-28 21:23:35 -04:00
Thomas Harte
1e4679ae14
Corrects JSL
and RTL
.
2020-10-28 17:25:40 -04:00
Thomas Harte
b3ab9fff9b
Imports a custom-built copy of Klaus Dormann's 65C02 test, with only 65816-compatible parts.
...
Thereby fixes another couple of 65816 issues — BRK(, etc) not clearing the decimal flag, and `TRB d` being mismapped.
2020-10-19 19:27:16 -04:00
Thomas Harte
14718b93a4
Improve commentary.
2020-10-19 09:32:50 -04:00
Thomas Harte
76d9893866
Declares address-bus sizes formally.
...
This allows me to fix the final two implicit conversion warnings, albeit that it would have been nice to find a templatey way just to get the type directly from the declaration of `perform_bus_operation`.
2020-10-18 15:08:21 -04:00
Thomas Harte
c3f8982c62
Resolves all internal implicit type-conversion warnings.
...
Chasing those down, it looks like flags were wrong for PLB and PLD. So it's official: warnings help.
2020-10-18 14:55:17 -04:00
Thomas Harte
99eba2f8ba
Ensures intended 65816 exception behaviour.
...
i.e. the relevant micro-op sequence exists, and its operation isn't lost. Also sets the 65816 by default to jump straight into power-on, not to execute an instruction first. That shouldn't make a functional difference, but it makes debugging easier because it makes startup fully deterministic.
2020-10-18 14:43:47 -04:00
Thomas Harte
e5f57ea743
Make isReadOperation
more overt.
2020-10-17 22:27:04 -04:00
Thomas Harte
3b398f7a9a
Attempts to complete all 65816 bus signalling.
2020-10-16 21:56:20 -04:00
Thomas Harte
096add7551
Exposes non-BusOperation bus outputs.
2020-10-16 21:05:42 -04:00
Thomas Harte
334e0666b7
Reports ::Ready upon a WAI.
2020-10-15 21:37:37 -04:00
Thomas Harte
98c81749c8
Adds the conventional flush
.
2020-10-15 21:36:04 -04:00
Thomas Harte
5dcf720bb5
Extends list of BusOperations.
...
Now to retest, widely.
2020-10-15 21:35:01 -04:00
Thomas Harte
9c0c0255f6
Ensures data/program bank can't accidentally be set to 16-bit values.
2020-10-15 21:10:32 -04:00
Thomas Harte
68c15bd605
Updates Qt project; catches another couple of issues via its compiler.
2020-10-15 21:09:22 -04:00
Thomas Harte
9a2f32795f
Revokes stack-local storage non-optimisation.
2020-10-15 21:03:10 -04:00
Thomas Harte
7aa6cf4c6b
Tidies up layout very slightly.
2020-10-15 20:51:23 -04:00
Thomas Harte
dfda2adf0d
Attempts implementations of both ready and abort.
...
Which I think concludes the inputs?
2020-10-15 20:46:18 -04:00
Thomas Harte
c0a1c34012
Wraps all registers into a struct, so that I can implement abort.
...
Makes some preparations for ready too.
2020-10-15 18:42:38 -04:00
Thomas Harte
3c6adc1ff4
Completes 65816 addressing mode tests and corresponding fixes.
2020-10-14 22:00:52 -04:00
Thomas Harte
e511d33a7c
Adds test for [d], y; fixes implementation.
2020-10-14 21:42:41 -04:00
Thomas Harte
27afb8f0a7
Adds direct indirect long test, and thereby fixes addressing mode.
...
Nine to go!
2020-10-14 21:26:20 -04:00
Thomas Harte
327ab81436
Fills in direct, x and (direct) tests, fixing implementation of the latter.
...
10 to go.
2020-10-14 21:17:28 -04:00
Thomas Harte
b22aa5d699
Starts transcribing the addressing examples I have into tests.
...
Correspondingly extends the exposed register set and test-machine addressing range.
2020-10-13 21:38:30 -04:00
Thomas Harte
3e6a2adaaf
Corrects absolute, x and absolute, y addressing modes.
2020-10-13 20:30:39 -04:00
Thomas Harte
8f5537aaaa
Attempts to resolve my direct-indirect addressing stumble.
2020-10-13 20:21:53 -04:00
Thomas Harte
a15d4a156b
Starts trying to ensure appropriate address wrapping.
2020-10-12 22:33:43 -04:00
Thomas Harte
7479dc74ed
Removes printf. It's no longer telling me anything.
2020-10-12 21:52:58 -04:00
Thomas Harte
28da1a724a
Introduces Jeek816 test case.
2020-10-12 21:43:44 -04:00
Thomas Harte
f529eadbec
Corrects 16-bit read-modify-write.
...
Subject to the TODO proviso on 'correct'; has my 6502 prejudice pushed me into unrealistic bus signalling?
2020-10-12 18:36:09 -04:00
Thomas Harte
5dc3cd3a2f
Starts using Jeek816 for a basic native-mode audit. Fixes absolute long addressing.
2020-10-11 22:02:46 -04:00
Thomas Harte
3039a445f0
Ups the 65816 test machine to a full 16mb RAM.
2020-10-11 21:18:01 -04:00
Thomas Harte
82797fd395
Attempts to do the proper thing for interrupts.
2020-10-11 21:10:44 -04:00
Thomas Harte
a0885ab7d0
Implements STP and WAI.
...
Albeit still without fully-implemented reactions to exceptions in general.
2020-10-11 17:56:55 -04:00
Thomas Harte
8eaf1303a3
Attempts proactively to ensure proper RTI behaviour on the 65816.
2020-10-11 15:25:13 -04:00
Thomas Harte
20cbe72985
Ties to 8- or 16-bit those instructions that aren't M/X-dependent.
...
This is technically redundant for PEI, PEA and PER since they have dedicated bus programs anyway, but it's good to be explicit.
2020-10-11 14:38:35 -04:00
Thomas Harte
071ad6b767
I don't think RTL is needed; JML looks like it covers it.
2020-10-10 22:16:35 -04:00
Thomas Harte
0619e49eac
Takes a short at TSB and TRB.
...
Three to go.
2020-10-10 22:00:17 -04:00
Thomas Harte
b8848d8580
Implements TCD, TDC, TCS, TSC.
2020-10-10 21:43:05 -04:00
Thomas Harte
aface1f8be
Implements XBA and XCE.
2020-10-10 21:34:22 -04:00
Thomas Harte
ae87728770
Ensures M and X are exposed to the public interface.
2020-10-10 21:33:56 -04:00
Thomas Harte
28c8ba70c1
Implements REP and SEP and exposes the MX flags generally.
2020-10-10 21:23:59 -04:00
Thomas Harte
6892ac13e8
Corrects BIT. All 65816-applicable Wolfgang Lorenz tests now pass.
2020-10-10 17:47:33 -04:00
Thomas Harte
0fe09cd1e4
Knocks SBC into producing likely results; disables Lorenz testing.
2020-10-10 17:13:16 -04:00
Thomas Harte
da4702851f
Fixes ADC.
2020-10-10 16:29:48 -04:00
Thomas Harte
d17c90edf7
Corrects ROL d, x.
2020-10-10 11:25:14 -04:00
Thomas Harte
7966592fae
Corrects ROL d.
2020-10-10 11:22:23 -04:00
Thomas Harte
6efe4e1753
Fixes AND, EOR, ORA. Takes an unsuccessful shot at ROL.
2020-10-10 10:53:17 -04:00
Thomas Harte
536c4d45c1
Adds additional 65816 tests, some failing; seeks to improve carry behaviour in ASL and ROL.
2020-10-10 10:11:57 -04:00
Thomas Harte
290598429a
Applies indirect page zero emulation mode addressing constraint to ix addressing.
...
Lorenz's LDA tests now pass in emulation mode.
2020-10-09 23:22:48 -04:00
Thomas Harte
92e72959c3
Makes corrections to ix addressing mode and shift/roll flags.
2020-10-09 23:12:20 -04:00
Thomas Harte
c01bc784b9
Slightly reduces branching.
2020-10-09 22:21:55 -04:00
Thomas Harte
abcd86a294
Fixes accumulator instructions.
2020-10-09 22:18:22 -04:00
Thomas Harte
451f83ba51
Corrects emulation-mode read-modify-writes not to empty the data buffer.
2020-10-09 22:14:42 -04:00
Thomas Harte
b439f40fe2
Corrects INC and DEC.
2020-10-09 22:04:25 -04:00
Thomas Harte
968166b06d
Resolves incorrectly flow after setting up an absolute address.
2020-10-09 21:48:35 -04:00
Thomas Harte
0ed98cbfac
Attempts to fix direct indirect indexed; not yet successful I think.
2020-10-08 22:15:19 -04:00
Thomas Harte
7dde7cc743
Implements altered direct indexed addressing in emulation mode.
2020-10-08 22:02:14 -04:00
Thomas Harte
755627f12d
Corrects direct addressing.
2020-10-08 20:00:01 -04:00
Thomas Harte
f8004d7096
Implements RTI, corrects TAY.
2020-10-08 18:06:11 -04:00
Thomas Harte
0418f51ef2
Takes a shot at emulation-mode 'exceptions'.
...
It's just RTI and correct decimal SBC left of the official 6502s now, I think.
2020-10-08 17:52:13 -04:00
Thomas Harte
054e0af071
Corrects RTS behaviour: the return address on the stack is off by one.
...
Dormann's tests now proceed to a BRK.
2020-10-08 16:55:45 -04:00
Thomas Harte
907c3374c3
Attempts to clean up my JMP/JSR mess.
...
Also takes a step forwards in decimal SBC, but it's not right yet.
2020-10-08 16:48:46 -04:00
Thomas Harte
f83ee97439
PHP pushes with the BRK flag set in emulation mode.
2020-10-07 21:37:50 -04:00
Thomas Harte
19aea85184
Corrects CMP, CPX, CPY carry flags.
2020-10-07 21:23:29 -04:00
Thomas Harte
1ba0a117e7
Corrects PLB, PLD, PLP.
2020-10-07 20:23:53 -04:00
Thomas Harte
b510b9d337
Adds PHD, PHK and 8-bit PHP and PLP.
2020-10-07 20:13:12 -04:00
Thomas Harte
b608e11965
Realises that not all non-incrementing PC fetches should be thrown away.
2020-10-07 20:06:27 -04:00
Thomas Harte
e68b3a2f32
Corrects JMP program.
2020-10-07 19:59:29 -04:00
Thomas Harte
f7b119ffe1
Moves temporary logging, fixes branch instructions.
2020-10-07 19:57:58 -04:00
Thomas Harte
a4cec95db1
Corrects load and transfer flag oversights.
2020-10-07 19:36:23 -04:00
Thomas Harte
84c4fa197b
Corrects DEX mapping, notes new Dormann failure case.
2020-10-07 18:48:03 -04:00
Thomas Harte
eac722cf59
Implements enough of ADC and SBC for the Dormann test definitively to fail.
2020-10-07 18:36:17 -04:00
Thomas Harte
7439a326a6
Implements BIT (in regular and immediate forms).
2020-10-07 18:15:18 -04:00
Thomas Harte
5ca1c0747f
Generalises CMP to implement CPX and CPY.
2020-10-07 18:09:56 -04:00
Thomas Harte
466ca38dfa
Corrects TXY and TYX; kudos to PatrickvL for the spot!
2020-10-07 18:05:42 -04:00
Thomas Harte
93b0839036
Knocks out some transfer operations.
...
I'm possibly only seven or eight away from being able to test with complete official-opcode-only 6502 code?
2020-10-06 22:29:34 -04:00
Thomas Harte
e068cbc103
Implements CMP and fixes a zero-flag error on 16-bit operations.
2020-10-06 21:47:26 -04:00
Thomas Harte
5c809e5fbf
Implements rolls and shifts.
2020-10-06 21:34:39 -04:00
Thomas Harte
3933bf49cf
Implements BRL.
2020-10-06 21:28:54 -04:00
Thomas Harte
7065ba4857
Implements the single-byte branches.
2020-10-06 21:24:43 -04:00
Thomas Harte
ebff83018e
Implements the bitwise operators.
2020-10-06 20:17:03 -04:00
Thomas Harte
9ce9167e3c
Formalises work left to do.
2020-10-06 19:12:19 -04:00
Thomas Harte
993eff1d3d
Starts slowly, with flag manipulation.
2020-10-06 16:25:30 -04:00
Thomas Harte
7be983ec00
Slightly improve exposition.
2020-10-05 22:25:20 -04:00
Thomas Harte
18e8d6ce06
Makes an effort to factor out the 6502's [lazy] flags.
...
This is preparatory to deciding which instructions, if any, are worth factoring out.
2020-10-05 22:23:33 -04:00
Thomas Harte
b7ba0d4327
Attempts to complete all addressing modes.
...
So, if bugs didn't exist, it'd just be members of the Operation enum to go.
2020-10-05 17:04:57 -04:00
Thomas Harte
825201f4f2
Adds direct indirect.
2020-10-04 22:11:41 -04:00
Thomas Harte
9a05c68ce7
Attempts direct and direct indexed indirect.
2020-10-04 22:06:25 -04:00
Thomas Harte
d8dccf2500
Attempts a full implementation of MVN and MVP.
2020-10-04 19:21:04 -04:00
Thomas Harte
b416aa640f
Slightly tidies up, eliminating some store bugs.
2020-10-04 19:12:04 -04:00
Thomas Harte
4ebf594b3b
This should bring me up to absolute, y.
...
i.e. next is datasheet program 7.
2020-10-04 19:02:47 -04:00
Thomas Harte
8a83024962
Starts a dash towards just completing the addressing modes for now.
...
This brings me up to the end of absolute long (i.e. 4a on the datasheet).
2020-10-04 18:52:46 -04:00
Thomas Harte
bdc1136b96
Edges towards working short absolute addressing mode.
2020-10-03 21:30:24 -04:00
Thomas Harte
b83d93abc2
Accepts that whether instructions do 8- or 16-bit bus accesses depends on either M or X depending on the operation.
2020-10-02 17:08:30 -04:00
Thomas Harte
36f843bc6e
Ensure std::function is visible to 65816Storage.cpp.
2020-09-29 19:23:38 -04:00
Thomas Harte
15c87e02e9
Ditto for printf
.
2020-09-29 18:53:02 -04:00
Thomas Harte
00923eac7c
Ensure assert
is visible to 65816Implementation.hpp.
2020-09-29 18:52:25 -04:00
Thomas Harte
78b3ec4b10
The actual work begins: starts implementing 65816 micro-ops.
2020-09-29 18:42:07 -04:00
Thomas Harte
ef1a514785
Introduces 6502Selector, for picking either a 6502 or a 65816 based on a single template parameter.
2020-09-28 21:35:46 -04:00
Thomas Harte
6635876e7e
Performs a bare factoring out of the 6502 bus handler.
2020-09-28 18:43:53 -04:00
Thomas Harte
5645f90abe
Takes a minor first step towards actually performing 65816 instructions.
2020-09-27 22:20:58 -04:00
Thomas Harte
ad8a2e2cb9
Corrects a long-standing naming obscurity.
2020-09-27 22:19:42 -04:00
Thomas Harte
8641494809
Resolve various test-case warnings.
2020-09-27 15:10:29 -04:00
Thomas Harte
5449e90b34
Edges towards offering the 65816 as another type of 6502 for testing.
2020-09-26 22:31:50 -04:00
Thomas Harte
1cd664ad85
Adds a sanity check.
2020-09-26 21:43:26 -04:00
Thomas Harte
e680022b1f
Completes the opcode set.
...
A million bugs yet to find.
2020-09-26 21:35:31 -04:00
Thomas Harte
67c2ce2174
Takes a run at completing the stack section.
...
I'm not really sure about BRK though — does it gain a signature on the 65816?
2020-09-26 21:20:01 -04:00
Thomas Harte
596e700b60
Drags myself onto the final page of bus programs.
...
233 opcodes now complete; six bus programs to go.
2020-09-26 20:57:24 -04:00
Thomas Harte
4a53b6e538
Adds push and pull, reaching 229/256 opcodes.
2020-09-26 20:38:29 -04:00
Thomas Harte
687f4bb3bb
Adds relative and relative long bus patterns.
...
Many of the rest cover only one or two opcodes so this puts me at 216/256 opcodes covered; 35/47 bus programs; just more than 5/7 pages.
2020-09-26 20:24:50 -04:00
Thomas Harte
473799cb62
There's not a lot to STP and WAI from a bus program point of view.
2020-09-26 20:18:30 -04:00
Thomas Harte
3dc22a9fd5
Adds implied and immediate modes.
...
... for 204/256 opcodes covered.
2020-09-26 17:42:42 -04:00
Thomas Harte
f54b655606
Adds d, x
and d, y
.
2020-09-26 17:26:17 -04:00
Thomas Harte
d2e868ea2b
Adds (d), y; [d], y; and [d].
...
Now covered: 146/256 opcodes, 4/7 pages, 25/47 bus programs.
2020-09-26 16:55:58 -04:00
Thomas Harte
3fc649359a
Transcribes the titles of all remaining bus programs.
...
Thereby frames the distance yet to travel.
2020-09-25 22:29:19 -04:00
Thomas Harte
1512ac11da
Adds (d, x) and (d) modes. Albeit by deferring the hard work.
...
That's: 122/256 opcodes; 22/47 bus programs, ~3.5/7 pages transcribed. Maybe I'll be able to get to the runtime stuff sooner rather than later?
2020-09-25 22:22:30 -04:00
Thomas Harte
5039cc7bb2
Adds direct page.
...
... to cover 106 opcodes.
2020-09-25 22:01:36 -04:00
Thomas Harte
5360a7b4ce
Adds block moves.
...
These are fairly specialised, dealing in two data addresses simultaneously.
2020-09-25 21:49:03 -04:00
Thomas Harte
2957a31f40
Adds absolute, x; absolute,y; and accumulator addressing modes.
...
Now covered: 80/256 opcodes, from 2/6 pages of the data sheet; or 16/47 bus programs.
2020-09-25 21:16:36 -04:00
Thomas Harte
8c11df52bf
Adds absolute long, x.
...
Factors out the commonality of a closing read/write while I'm here.
2020-09-25 19:27:17 -04:00
Thomas Harte
2b7ffcd48f
Takes a run at JSL al.
2020-09-25 18:35:00 -04:00
Thomas Harte
7980a9033e
Adds two-thirds of absolute long.
...
Working total: 31 opcodes covered; 10/47ths of bus patterns.
Next is JSL, which I think will require additional operations.
2020-09-25 18:16:49 -04:00
Thomas Harte
125ddfa513
Pays a little attention to runtime storage; completes the first page of bus patterns.
2020-09-25 18:00:02 -04:00
Thomas Harte
636e929607
Adds a check for 8/16-bit redundancy.
2020-09-25 17:42:42 -04:00
Thomas Harte
22c792dc46
Adds enough logic to start serialising instructions to somewhere.
...
Possibly extraneous for now, but it means I can start stepping and testing.
2020-09-25 17:18:25 -04:00
Thomas Harte
95af1815c8
Completes absolute indexed indirect micro-ops.
...
For the record: this is just six out of forty-seven codes complete. Or about two-thirds of six pages. Plenty to do even before I start trying to interpret these things.
2020-09-24 22:37:31 -04:00
Thomas Harte
d707c5ac95
Switches to generators with stable pointers; adds 2a.
2020-09-24 22:27:20 -04:00
Thomas Harte
5c9192e5e6
Switches to generators for spitting out micro-ops.
...
Hopefully with a lot of parts to factor out naturally.
2020-09-24 17:36:11 -04:00
Thomas Harte
72b5584042
Immediately runs afoul of a read/write difference in the specs between 8/16-bit mode that suggests maybe this isn't a good structure.
...
Perhaps generators of some sort?
2020-09-23 22:28:15 -04:00
Thomas Harte
f9045b5352
Rounds out declaration of the absolutes.
2020-09-23 22:23:23 -04:00
Thomas Harte
f87fe92bc8
Begins a meandering road towards the 65816.
2020-09-23 22:14:42 -04:00
Thomas Harte
402f2ddbd9
Increases likelihood of 68000 Program
offset-size assumptions being met.
2020-07-02 22:24:04 -04:00
Thomas Harte
6e4b8d58a5
Completes [[fallthrough]]
s.
2020-06-19 23:50:37 -04:00
Thomas Harte
945a9da94f
Adds further [[fallthrough]]s.
2020-06-19 23:44:20 -04:00
Thomas Harte
2477752fa4
Adds further [[fallthrough]]
attributes.
2020-06-19 23:36:51 -04:00
Thomas Harte
91229a1dbd
Adds overt fallthrough attributes.
2020-06-19 23:22:29 -04:00
Thomas Harte
73131735fa
Further qmake warning corrections.
2020-05-30 19:31:17 -04:00
Thomas Harte
267006782f
Starts to add Qt target; resolves many build warnings.
2020-05-30 00:37:06 -04:00
Thomas Harte
512a52e88d
Increases const correctness, marks some additional constructors as constexpr, switches std::atomic construction style.
2020-05-20 23:34:26 -04:00
Thomas Harte
28881cb391
Implements apply
.
2020-05-19 18:27:10 -04:00
Thomas Harte
a16b710d22
Removes <cassert> from Struct.h (which means it's needed in the 68000's State).
2020-05-19 00:06:29 -04:00
Thomas Harte
a3d4c7599b
Attempts fully to capture 68000 state.
...
Albeit that it can't be put back yet.
2020-05-18 23:55:54 -04:00
Thomas Harte
6f16928215
Adds all remaining simple scalar fields.
2020-05-16 22:47:04 -04:00
Thomas Harte
57edfe8751
Formalises TODO list and marches onward into execution state.
2020-05-16 18:31:43 -04:00
Thomas Harte
dcc0ee3679
Adds input line capture.
2020-05-16 17:44:15 -04:00
Thomas Harte
f7a16762b4
Starts populating the 68000 state registers.
2020-05-16 00:06:04 -04:00
Thomas Harte
8b76d4007e
Starts adding State
for the 68000.
2020-05-14 22:46:40 -04:00
Thomas Harte
c5b746543b
Factors the half mask into steps count.
2020-05-14 00:09:01 -04:00
Thomas Harte
11d936331d
Attempts to preserve scheduled_program_counter_.
2020-05-13 23:58:04 -04:00