Commit Graph

7237 Commits

Author SHA1 Message Date
Bob Wilson
e0f745b54e Fix a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 21:19:45 +00:00
Dan Gohman
9a38e3e399 Revert 71165. It did more than just revert 71158 and it introduced
several regressions. The problem due to 71158 is now fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 19:46:24 +00:00
Bill Wendling
5b8479c385 Temporarily revert r71158. It was causing a failure during a full bootstrap:
checking for bcopy... no
checking for getc_unlocked... Assertion failed: (0 && "Unknown SCEV kind!"), function operator(), file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/Analysis/ScalarEvolution.cpp, line 511.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/libdecnumber/decUtility.c:360: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [decUtility.o] Error 1
make[4]: *** Waiting for unfinished jobs....
Assertion failed: (0 && "Unknown SCEV kind!"), function operator(), file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/Analysis/ScalarEvolution.cpp, line 511.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/libdecnumber/decNumber.c:5591: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter> for instructions.
make[4]: *** [decNumber.o] Error 1
make[3]: *** [all-stage2-libdecnumber] Error 2
make[3]: *** Waiting for unfinished jobs....



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71165 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 17:26:14 +00:00
Argyrios Kyrtzidis
cd76240f3d Move the tablegen-produced DebugLoc handling into a AsmWriter::processDebugLoc function.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71156 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 13:55:51 +00:00
Evan Cheng
7132e12ee5 Code refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71151 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 05:49:39 +00:00
Evan Cheng
bbf1db7213 Rename "loop aligner" pass to "code placement optimization" pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 05:42:24 +00:00
Bill Wendling
2c1d7726f2 Just turn aggressive stack coloring off at -O3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71140 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 01:33:38 +00:00
Bill Wendling
d0c1f9c932 Temporarily revert r71010. It was causing massive failures during self-hosting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71138 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 01:27:25 +00:00
Argyrios Kyrtzidis
116b27444a Make DwarfWriter::RecordInlinedFnStart more like the other DwarfWriter's methods:
-Have it return a label ID
-Remove the unused Instruction parameter

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71132 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-07 00:16:31 +00:00
Bill Wendling
3f500d9358 - Move some debug fields to coincide with how GCC emits them. No functionality
change.
- Reformatting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71118 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 21:21:34 +00:00
Evan Cheng
caab129cd1 Do not use register as base ptr of pre- and post- inc/dec load / store nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71098 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 18:25:01 +00:00
Oscar Fuentes
5dcf50bd03 CMake: Updated lib/CodeGen/CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 14:56:40 +00:00
Duncan Sands
a9cad0e7e0 Add generic expansion of SUB when ADD and XOR
are legal.  Based on a patch by Micah Villmow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71078 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 11:29:50 +00:00
Lang Hames
87e3bcab73 Renamed Spiller classes (plus uses and related files) to VirtRegRewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-06 02:36:21 +00:00
Dan Gohman
5412d06e9c If a MachineBasicBlock has multiple ways of reaching another block,
allow it to have multiple CFG edges to that block. This is needed
to allow MachineBasicBlock::isOnlyReachableByFallthrough to work
correctly. This fixes PR4126.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 21:10:19 +00:00
Evan Cheng
f9a9b51429 Enable stack coloring with regs at -O3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71010 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 20:30:36 +00:00
Chris Lattner
e3f6cea9e9 Do not require variable debug info nodes to have a compile unit.
For implicit decls like "self" and "_cmd" in ObjC, these decls
should not have a location.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 04:55:56 +00:00
Evan Cheng
bef60d3804 Do not substitute if the new register isn't in the register class of the operand being updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70953 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 00:46:16 +00:00
Evan Cheng
d923fc621f Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70950 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-05 00:30:09 +00:00
Evan Cheng
c3806ea3bc Do forward and backward substitution to eliminate loads and stores when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70937 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 23:13:13 +00:00
Chris Lattner
af29a5235d Make DBG_STOPPOINT nodes, and therefore DBG_LABEL labels, get a DebugLoc, so that it
shows up in -print-machineinstrs.  This doesn't appear to affect anything, but it was
weird for some DBG_LABELs to have DebugLocs but not all of them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70921 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 22:10:05 +00:00
Argyrios Kyrtzidis
28f1412c97 Restore a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 19:23:45 +00:00
Mike Stump
fe095f39e7 Restore minor deletion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-04 18:40:41 +00:00
Evan Cheng
04fa35ab13 Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70792 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 19:10:11 +00:00
Evan Cheng
c781a243a3 In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.
VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants.

Not yet enabled. This is part 1. More coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 18:32:42 +00:00
Anton Korobeynikov
9fe9c8ec7d Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70770 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:19:57 +00:00
Anton Korobeynikov
813090cf89 Properly handle sdiv / udiv / srem / urem libcalls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:18:16 +00:00
Anton Korobeynikov
c31642f7af Proper name 16 bit libcalls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70750 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:14:08 +00:00
Anton Korobeynikov
2f25c2c63f Add libcall expansion for 16 and 128 bit muls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 13:13:51 +00:00
Argyrios Kyrtzidis
77eaa6880b -Move the DwarfWriter::ValidDebugInfo check to a static DIDescriptor::ValidDebugInfo
-Create DebugLocs without the need to have a DwarfWriter around


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03 08:50:41 +00:00
Bob Wilson
5ee24e54d7 Allow CONCAT_VECTORS nodes to be legal or have custom lowering for some targets.
Changes to take advantage of this will come later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01 17:55:32 +00:00
Bill Wendling
d5a6381195 Simplify more code and add timer stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70539 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01 08:40:06 +00:00
Bill Wendling
ff86ef33e2 Simplify more code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70537 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01 08:35:12 +00:00
Bill Wendling
ef956fc784 Simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70534 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01 08:32:14 +00:00
Bill Wendling
7fa8162f08 Fix whitespace. It was confusing me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70533 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01 08:25:13 +00:00
Evan Cheng
5b16cd2cdd Code clean up. Bye bye PhysRegTracker.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70524 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01 01:03:49 +00:00
Argyrios Kyrtzidis
a26eae64dd Make DebugLoc independent of DwarfWriter.
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 23:22:31 +00:00
Jakob Stoklund Olesen
3a155f0e34 Join cross class copies using getCommonSubClass()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70513 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 21:24:03 +00:00
Evan Cheng
0490dcb1b7 Add a smarter heuristic to determine when to coalesce a virtual register with a physical one. More specifically, it avoid tying a virtual register in the loop with a physical register defined / used outside the loop. When it determines it's not profitable, it will use the physical register as the allocation preference instead.
This is *not* turned on by default. Testing indicates this is just as likely to pessimize code. The main issue seems to be allocation preference doesn't work effectively. That will change once I've taught register allocator "swapping".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70503 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 18:39:57 +00:00
Jay Foad
4e5ea553d0 Move helper functions for optimizing division by constant into the APInt
class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70488 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 10:15:35 +00:00
Chris Lattner
6c147293d6 fix a regression handling indirect results: these need to be considered
memory operands otherwise the writebacks get lost when the inline asm 
doesn't otherwise have side effects.  This fixes rdar://6839427, though
clang really shouldn't generate these anymore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70455 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 00:48:50 +00:00
Bill Wendling
98a366d547 Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 23:29:43 +00:00
Nate Begeman
ec8eee2d3a Fix infinite recursion in the C++ code which handles movddup by making it unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 22:47:44 +00:00
Jakob Stoklund Olesen
ce9be2cf5d MachineInstr::isRegTiedTo{Use,Def}Operand can safely be made const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70408 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 20:57:16 +00:00
Nate Begeman
a641575828 Update comment, replace theoretically impossible check with an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70391 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 18:13:31 +00:00
Evan Cheng
96f3fd9a7f spillPhysRegAroundRegDefsUses() may have invalidated iterators stored in fixed_ IntervalPtrs. Reset them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 07:16:34 +00:00
Nate Begeman
5a5ca1519e Implement review feedback for vector shuffle work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 05:20:52 +00:00
Sanjiv Gupta
a3518a1d6a Add a public method called getAddressSpace() to the GlobalAddressSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 04:43:24 +00:00
Chris Lattner
672452d5a0 Disable the load-shrinking optimization from looking at
anything larger than 64-bits, avoiding a crash.  This should
really be fixed to use APInts, though type legalization happens
to help us out and we get good code on the attached testcase at
least.

This fixes rdar://6836460


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 03:45:07 +00:00
Evan Cheng
1c2f6da331 Determine allocation 'preference' with right register class. I haven't seen this changing codegen so no test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70351 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 00:42:27 +00:00
Bill Wendling
be8cc2a3de Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29 00:15:41 +00:00
Evan Cheng
8a8a0dfc3b Move getMatchingSuperReg() out of coalescer and into TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70309 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 18:29:27 +00:00
Jakob Stoklund Olesen
08e791fdb3 Don't coalesce a physical register with an incompatible virtual register.
If the physical register does not belong to the virtual register's regclass,
don't coalesce. The physical register could be an invalid operand for an
instruction using the vreg.

The regclass matching is done after determining the actual subregisters being copied.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70298 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 16:34:35 +00:00
Sanjiv Gupta
d3d965714b Initialized arrays can be in any address space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70297 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 16:34:20 +00:00
Jakob Stoklund Olesen
fa4677b483 Move getSubRegisterRegClass from ScheduleDagSDNodesEmit.cpp to a TargetRegisterClass method.
Also make the method non-asserting. It will return NULL when given an invalid subreg index.

The method is needed by an upcoming patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70296 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 16:34:09 +00:00
Evan Cheng
30590f5023 Fix PR4034. Bug in LiveInterval::join when it's compacting new valno's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70291 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 06:24:09 +00:00
Evan Cheng
e9ccb3a7d4 Fix for PR4051. When 2address pass delete an instruction, update kill info when necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 02:12:36 +00:00
Bill Wendling
c69d56f115 r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 01:04:53 +00:00
Bill Wendling
2e9d5f912a Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28 00:21:31 +00:00
Evan Cheng
c45288e06b Fix PR4076. Correctly create live interval of physical register with two-address update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70245 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 20:42:46 +00:00
Owen Anderson
82fd3f3d3a Don't skip the CopyMI when removing kill markers.
This should have no effect on generated code, but makes the intermediate state
of the coalescer more sane.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70238 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 19:55:47 +00:00
Duncan Sands
9771b91c2b Now that PR2957 is resolved, remove a bunch of
no-longer needed workarounds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70234 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 19:33:03 +00:00
Nate Begeman
9008ca6b6b 2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.
PR2957

ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask.  A value of -1 represents UNDEF.

In addition to eliminating the creation of illegal BUILD_VECTORS just to 
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 18:41:29 +00:00
Evan Cheng
d521bc983b Fix PR4056. It's possible a physical register def is dead if its implicit use is deleted by two-address pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70213 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 17:36:47 +00:00
Evan Cheng
27e4666c20 Also delete last unused val#.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 17:35:19 +00:00
Dan Gohman
c7b3444095 When transforming sext(trunc(load(x))) into sext(smaller load(x)),
the trunc is directly replaced with the smaller load, so don't
try to create a new sext node. This fixes PR4050.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27 02:00:55 +00:00
Evan Cheng
a4b2bab233 Reuse unused val#'s to avoid running out of memory in extreme cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70069 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25 20:20:15 +00:00
Dan Gohman
2bee0afb7d Refactor the code to grab the low and high parts of a value
using EXTRACT_ELEMENT into a utility function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25 17:55:53 +00:00
Dan Gohman
4128700ab1 Add a top-level comment about DAGCombiner's role in the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25 17:09:45 +00:00
Evan Cheng
0adb527d16 Do not share a single unknown val# for all the live ranges merged into a physical sub-register live interval. When coalescer is merging in clobbered virtaul register live interval into a physical register live interval, give each virtual register val# a separate val# in the physical register live interval. Otherwise, the coalescer would have lost track of the definitions information it needs to make correct coalescing decisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25 09:25:19 +00:00
Dale Johannesen
2f91f30b93 Fix PR 4057, a crash doing float->char const folding.
This particular one is undefined behavior (although this
isn't related to the crash), so it will no longer do it
at compile time, which seems better.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69990 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 21:34:13 +00:00
Rafael Espindola
15684b2955 Revert 69952. Causes testsuite failures on linux x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 12:40:33 +00:00
Nate Begeman
b706d29f9c PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask.  A value of -1 represents UNDEF.

In addition to eliminating the creation of illegal BUILD_VECTORS just to 
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.

A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 03:42:54 +00:00
Dan Gohman
98d07102d6 Instead of requiring TLI.LowerCallTo to return an ISD::BUILD_PAIR,
use ISD::EXTRACT_ELEMENT. SelectionDAG has a special fast-path for
the cast of an EXTRACT_ELEMENT with a BUILD_PAIR operand, for the
common case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69948 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24 02:40:23 +00:00
Dan Gohman
ad62f53795 Factor out a bit of code that appears in several places into a
utility function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69937 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 23:13:24 +00:00
Dan Gohman
5e5558bc66 Handle Void types in ComputeValueVTs. This doesn't currently occur,
but this change makes the code more general and easier to adapt for
new purposes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69935 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 22:50:03 +00:00
Evan Cheng
aa809fbde1 Update comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69919 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 20:39:31 +00:00
Evan Cheng
c2cee14a8c Fix an obvious type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69918 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-23 20:18:13 +00:00
Evan Cheng
5b69ebac85 It has finally happened. Spiller is now using live interval info.
This fixes a very subtle bug. vr defined by an implicit_def is allowed overlap with any register since it doesn't actually modify anything. However, if it's used as a two-address use, its live range can be extended and it can be spilled. The spiller must take care not to emit a reload for the vn number that's defined by the implicit_def. This is both a correctness and performance issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 22:46:52 +00:00
Devang Patel
3e3702d00b Fix Visual Studio 2008 build failure.
Patch by Marius Wachtler



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69637 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-21 00:08:56 +00:00
Dan Gohman
70bc17dbf5 Make X86's copyRegToReg able to handle copies to and from subclasses.
This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp
unnecessary. Derived from a patch by Jakob Stoklund Olesen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69635 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 22:54:34 +00:00
Dan Gohman
bd209ab9bc Simplify this code. getConstant knows how to make
broadcasted vector constants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69634 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 22:51:43 +00:00
Bob Wilson
998e125a87 Move duplicated AddLiveIn function from X86 and ARM backends to be a method
in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock.  Thanks for Anton for suggesting this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69615 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 18:36:57 +00:00
Bob Wilson
c885165e66 Revise my previous change 68996 as suggested by Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69607 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 17:27:09 +00:00
Evan Cheng
c4f718a3a7 - Remove an arbitrary spill weight tweak that should not have been there.
- Find more reloads from SS.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69606 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 17:23:48 +00:00
Evan Cheng
206d1856ad Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g.
%reg1498<def> = MOV32rm %reg1024, 1, %reg0, 12, %reg0, Mem:LD(4,4) [sunkaddr39 + 0]
        %reg1506<def> = MOV32rm %reg1024, 1, %reg0, 8, %reg0, Mem:LD(4,4) [sunkaddr42 + 0]
        %reg1486<def> = MOV32rr %reg1506
        %reg1486<def> = XOR32rr %reg1486, %reg1498, %EFLAGS<imp-def,dead>
        %reg1510<def> = MOV32rm %reg1024, 1, %reg0, 4, %reg0, Mem:LD(4,4) [sunkaddr45 + 0]

=>

        %reg1498<def> = MOV32rm %reg2036, 1, %reg0, 12, %reg0, Mem:LD(4,4) [sunkaddr39 + 0]
        %reg1506<def> = MOV32rm %reg2037, 1, %reg0, 8, %reg0, Mem:LD(4,4) [sunkaddr42 + 0]
        %reg1486<def> = MOV32rr %reg1506
        %reg1486<def> = XOR32rr %reg1486, %reg1498, %EFLAGS<imp-def,dead>
        %reg1510<def> = MOV32rm %reg2038, 1, %reg0, 4, %reg0, Mem:LD(4,4) [sunkaddr45 + 0]

From linearscan's point of view, each of reg2036, 2037, and 2038 are separate registers, each is "killed" after a single use. The reloaded register is available and it's often clobbered right away. e.g. In thise case reg1498 is allocated EAX while reg2036 is allocated RAX. This means we end up with multiple reloads from the same stack slot in the same basic block.

Now linearscan recognize there are other reloads from same SS in the same BB. So it'll "downgrade" RAX (and its aliases) after reg2036 is allocated until the next reload (reg2037) is done. This greatly increase the likihood reloads from SS are reused.

This speeds up sha1 from OpenSSL by 5.8%. It is also an across the board win for SPEC2000 and 2006.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 08:01:12 +00:00
Duncan Sands
a507e5538f Now that BUILD_VECTOR operands are allowed to be
bigger than the vector element type, turn checking
of the operand type back on again, appropriately
adjusted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69516 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-19 06:40:30 +00:00
Chris Lattner
2f992d13ea Fix PR3898, which manifests as failures on are an Xcore,
patch by Jakob Stoklund Olesen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69472 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-18 20:48:07 +00:00
Duncan Sands
b10b5ac8d9 Don't try to make BUILD_VECTOR operands have the same
type as the vector element type: allow them to be of
a wider integer type than the element type all the way
through the system, and not just as far as LegalizeDAG.
This should be safe because it used to be this way
(the old type legalizer would produce such nodes), so
backends should be able to handle it.  In fact only
targets which have legal vector types with an illegal
promoted element type will ever see this (eg: <4 x i16>
on ppc).  This fixes a regression with the new type
legalizer (vec_splat.ll).  Also, treat SCALAR_TO_VECTOR
the same as BUILD_VECTOR.  After all, it is just a
special case of BUILD_VECTOR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69467 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-18 20:16:54 +00:00
Evan Cheng
cccdb2b602 Add a new LiveInterval::overlaps(). It checks if the live interval overlaps a range specified by [Start, End).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-18 08:52:15 +00:00
Dale Johannesen
97d14fcb6a Inline asm's were still introducing bogus dependencies;
my earlier patch to this code only fixed half of it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69408 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-18 00:09:40 +00:00
Evan Cheng
276b77e66c Teach spiller to unfold instructions which modref spill slot when a scratch
register is available and when it's profitable.

e.g.
     xorq  %r12<kill>, %r13
     addq  %rax, -184(%rbp)
     addq  %r13, -184(%rbp)
==>
     xorq  %r12<kill>, %r13
     movq  -184(%rbp), %r12
     addq  %rax, %r12
     addq  %r13, %r12
     movq  %r12, -184(%rbp)

Two more instructions, but fewer memory accesses. It can also open up
opportunities for more optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69341 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-17 01:29:40 +00:00
Dan Gohman
0e4042d30b In the list-burr's pseudo two-addr dependency heuristics, don't
add dependencies on nodes with exactly one successor which is a
COPY_TO_REGCLASS node. In the case that the copy is coalesced
away, the dependence should be on the user of the copy, rather
than the copy itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69309 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 20:59:02 +00:00
Dan Gohman
8af808a3d6 Handle SUBREG_TO_REG instructions with the same heuristics
as INSERT_SUBREG instructions in the list-burr scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69308 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 20:57:10 +00:00
Devang Patel
02f8c41014 Do not treat beginning of inlined scope as beginning of normal function scope if the location info is missing.
Insetad of doing ...
if (inlined_subroutine && known_location)
  DW_TAG_inline_subroutine
else
  DW_TAG_subprogram

do

if (inlined_subroutine) {
 if (known_location)
   DW_TAG_inline_subroutine
} else {
 DW_TAG_subprogram
}



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69300 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 17:55:30 +00:00
Devang Patel
906caf2ae4 Record line number at the beginning of a func.start.
This line was accidently lost yesterday.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69286 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 15:07:09 +00:00
Devang Patel
16f2ffd158 In -fast mode do what FastISel does.
This code could use some refactoring help!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69254 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 02:33:41 +00:00
Devang Patel
390f3ace34 If FastISel is run and it has known DebugLoc then use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69253 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 01:33:10 +00:00
Devang Patel
682e0e6a72 If location where the function was inlined is not know then do not emit debug info describing inlinied region.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16 01:31:54 +00:00
Devang Patel
7d2f972f59 s/RootDbgScope/FunctionDbgScope/g
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69216 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 20:41:31 +00:00
Devang Patel
8818b8f443 Add DISubprogram is not null check.
This fixes test/CodeGen//2009-01-21-invalid-debug-info.m test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 20:11:08 +00:00
Dan Gohman
c23e496879 Generalize one of the SelectionDAG::ReplaceAllUsesWith overloads
to support replacing a node with another that has a superset of
the result types. Use this instead of calling
ReplaceAllUsesOfValueWith for each value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 20:06:30 +00:00
Devang Patel
c782ad055e Check isInlinedSubroutine() before creating DW_TAG_inlined_subroutine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69202 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 19:42:57 +00:00
Dan Gohman
9407cd4ede Fix MachineInstr::getNumExplicitOperands to count
variadic operands correctly. Patch by Jakob Stoklund Olesen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69190 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 17:59:11 +00:00
Dan Gohman
33f1c68cba Move MachineRegisterInfo::setRegClass out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69126 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:19:35 +00:00
Dan Gohman
593ea05957 Move MachineJumpTableInfo::ReplaceMBBInJumpTables out of line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69125 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:18:49 +00:00
Dan Gohman
3bc1a3735f Give RemoveRegOperandFromRegInfo a comment and move the
code out of line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 01:17:37 +00:00
Devang Patel
1be3eccecb Construct and emit DW_TAG_inlined_subroutine DIEs for inlined subroutine scopes (only in FastISel mode).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69116 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15 00:10:26 +00:00
Dan Gohman
5ec3b427c8 When the result of an EXTRACT_SUBREG, INSERT_SUBREG, or SUBREG_TO_REG
operator is used by a CopyToReg to export the value to a different
block, don't reuse the CopyToReg's register for the subreg operation
result if the register isn't precisely the right class for the
subreg operation.

Also, rename the h-registers.ll test, now that there are more
than one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69087 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 22:17:14 +00:00
Dale Johannesen
ec65a7d89b Do not force asm's to be chained if they don't touch
memory and aren't volatile.  This was interfering with
good scheduling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 00:56:56 +00:00
Evan Cheng
87d696a4d2 Fix PR3934 part 2. findOnlyInterestingUse() was not setting IsCopy and IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14 00:32:25 +00:00
Daniel Dunbar
4cbb173d6c Make these errors more noticable in build logs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68998 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 22:26:09 +00:00
Bob Wilson
b1303d05a8 Change SelectionDAG type legalization to allow BUILD_VECTOR operands to be
promoted to legal types without changing the type of the vector.  This is
following a suggestion from Duncan
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-February/019923.html).
The transformation that used to be done during type legalization is now
postponed to DAG legalization.  This allows the BUILD_VECTORs to be optimized
and potentially handled specially by target-specific code.

It turns out that this is also consistent with an optimization done by the
DAG combiner: a BUILD_VECTOR and INSERT_VECTOR_ELT may be combined by
replacing one of the BUILD_VECTOR operands with the newly inserted element;
but INSERT_VECTOR_ELT allows its scalar operand to be larger than the
element type, with any extra high bits being implicitly truncated.  The
result is a BUILD_VECTOR where one of the operands has a type larger the
the vector element type.

Any code that operates on BUILD_VECTORs may now need to be aware of the
potential type discrepancy between the vector element type and the
BUILD_VECTOR operands.  This patch updates all of the places that I could
find to handle that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 22:05:19 +00:00
Dan Gohman
88c7af096b Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 21:06:25 +00:00
Bob Wilson
26cbf9eb99 Refactor some code in SelectionDAGLegalize::ExpandBUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68981 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 20:20:30 +00:00
Evan Cheng
3005ed6048 PR3934: Fix a bogus two-address pass assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 20:04:24 +00:00
Devang Patel
48c7fa21a3 Right now, Debugging information to encode scopes (DW_TAG_lexical_block) relies on DBG_LABEL. Unfortunately this intefers with the quality of optimized code.
This patch updates dwarf writer to encode scoping information in DWARF only in FastISel mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 18:13:16 +00:00
Devang Patel
0f7fef3872 Reapply 68847.
Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 17:02:03 +00:00
Dan Gohman
f8c7394781 Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.
This will be used to replace things like X86's MOV32to32_.

Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.

Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68961 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:38:05 +00:00
Dan Gohman
70f2f65aac Don't abort on an aliasing physical register that does not have
a live interval. This is needed for some upcoming subreg changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68956 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:22:29 +00:00
Dan Gohman
9a77a92859 When assigning a physical register to a MachineOperand, set
the subreg field to 0, since the subreg field is only used
for virtual register subregs. This doesn't change
current functionality; it just eliminates bogus noise from
debug output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68955 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:21:32 +00:00
Dan Gohman
6ed0e20eb2 Add an assertion to verify that a copy was actually emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68953 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 15:16:56 +00:00
Chris Lattner
266c7bbbbc Add a new "available_externally" linkage type. This is intended
to support C99 inline, GNU extern inline, etc.  Related bugzilla's
include PR3517, PR3100, & PR2933.  Nothing uses this yet, but it
appears to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 05:44:34 +00:00
Chris Lattner
36e3946ac2 make UpdateValueMap handle the possiblity that we could be
copying into the right register, avoiding a copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 07:46:30 +00:00
Chris Lattner
c5040ab606 optimize FastISel::UpdateValueMap to avoid duplicate map lookups,
and make it return the assigned register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68888 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12 07:45:01 +00:00
Dan Gohman
c6fa3ff0bd Revert r68847. It breaks the build on non-Darwin targets, with this message
from the assembler:

Error: unknown pseudo-op: `.debug_inlined'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-11 15:57:04 +00:00
Devang Patel
2057532679 Keep track of inlined functions and their locations. This information is collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.)
Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-11 00:16:47 +00:00
Devang Patel
03f0a2fba0 DebugLabelFolder ruthlessly deletes redundant labels. However, sometimes the redundant labels is referenced by debug info somewhere else. This patch provies a way so that dwarf writer can mark labels as used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 18:58:59 +00:00
Bob Wilson
ec15bbfd2f Clean up a bunch of whitespace issues and fix a comment typo.
No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 18:48:47 +00:00
Chris Lattner
296185c264 fix two problems with machine sinking:
1. Sinking would crash when the first instruction of a block was
   sunk due to iterator problems.
2. Instructions could be sunk to their current block, causing an
   infinite loop.

This fixes PR3968


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 16:38:36 +00:00
Dan Gohman
0355862f71 Now that register classes have names, include the name in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68786 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 15:59:38 +00:00
Bill Wendling
7d16e85bfc Pass in the std::string parameter instead of returning it by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68747 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 00:12:49 +00:00
Bill Wendling
a6f02fbb75 Constify getter methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10 00:00:25 +00:00
Dan Gohman
fc1665793e Remove the obsolete SelectionDAG::getNodeValueTypes and simplify
code that uses it by using SelectionDAG::getVTList instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 23:54:40 +00:00
Bill Wendling
f34be827ac StringMap<DIE*>::iterator::first() returns a pointer to the first character of
the key. This will cause it to create a new std::string, which isn't
wanted. Instead, pass back the "const char*". Modify the EmitString() method to
take a "const char*".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68741 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 23:51:31 +00:00
Devang Patel
923838533a Silence unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68735 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 23:45:17 +00:00
Chris Lattner
c30aa7b3de ignore register zero in isRegTiedToUseOperand, following the example of
isRegTiedToDefOperand.  Thanks to Bob for pointing this out!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 23:33:34 +00:00
Bill Wendling
972bbac789 Use a StringMap instead of std::map for storing std::string->DIE* maps. This
gives a micro speedup in the Dwarf writer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68728 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 21:49:15 +00:00
Devang Patel
b396992f68 llvm.dbg.func_start also defines beginning of function scope.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 21:42:11 +00:00
Bob Wilson
d9df501704 Fix pr3954. The register scavenger asserts for inline assembly with
register destinations that are tied to source operands.  The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly.  The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68714 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 17:16:43 +00:00
Chris Lattner
0c8382ce9a reg0 references are not real registers. This fixes a crash on the
attached testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68712 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 16:50:43 +00:00
Dan Gohman
57fc82d409 Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND,
in addition to ZERO_EXTEND and SIGN_EXTEND. Fix a bug in the
way it checked for live-out values, and simplify the way it
find users by using SDNode::use_iterator's (relatively) new
features. Also, make it slightly more permissive on targets
with free truncates.

In SelectionDAGBuild, avoid creating ANY_EXTEND nodes that are
larger than necessary. If the target's SwitchAmountTy has
enough bits, use it. This exposes the truncate to optimization
early, enabling more optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68670 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 03:51:29 +00:00
Dan Gohman
8e5c0da848 Don't copy the operand of a SwitchInst into virtual registers as
eagerly. This helps avoid CopyToReg nodes in some cases where they
aren't needed, and also helps subsequent optimizer heuristics
in cases where the extra nodes would cause the node to appear
to have multiple results. This doesn't have a significant impact
currently; it'll help an upcoming change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68667 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 02:33:36 +00:00
Devang Patel
75b2738d73 If subprogram type is not tagged as DW_TAG_subroutine_type then use it directly as a return value type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68647 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 22:18:45 +00:00
Duncan Sands
3d0355b825 Soft float support for FREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68614 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 16:20:57 +00:00
Duncan Sands
7beb1ec298 Soft float support for undef. Reported by Xerxes Rånby.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68607 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 13:33:37 +00:00
Chris Lattner
a118c2ee89 change printStringChar to emit characters as unsigned char instead of char,
avoiding sign extension for the top octet.  For "negative" chars, we'd print
stuff like:

.asciz	"\702...
now we print:
.asciz	"\302...



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68577 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 00:28:38 +00:00
Dan Gohman
97121ba2af Implement support for using modeling implicit-zero-extension on x86-64
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.

This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.

Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.

Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.

Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.

Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08 00:15:30 +00:00
Devang Patel
a49a671efe Revert prev. patch for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68569 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 23:00:04 +00:00
Devang Patel
caf6129aba Right now DBG_LABEL are required for llvm.dbg.region_start and llvm.dbg.region_end in non-fast mode also.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68559 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 22:27:56 +00:00
Dan Gohman
4fd552880c Don't attempt to handle aggregate argument values in FastISel; let
SelectionDAG do those. This fixes PR3955.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68546 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07 20:40:11 +00:00
Dan Gohman
f50c7981ae Fix a TargetLowering optimization so that it doesn't duplicate
loads when an input node has multiple uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 20:11:30 +00:00
Dan Gohman
8f9643f0f7 Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused.
Note that these are distinct from TargetInstrInfo::INSERT_SUBREG
and TargetInstrInfo::EXTRACT_SUBREG, which are used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68355 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03 00:25:26 +00:00
Sanjiv Gupta
5274a4afb7 To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-02 18:03:10 +00:00
Evan Cheng
6fb2168aae Fully general expansion of integer shift of any size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68134 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 19:39:24 +00:00
Dan Gohman
968dc7a207 Reapply 68073, with fixes. EH Landing-pad basic blocks are not
entered via fall-through. Don't miss fallthroughs from blocks
terminated by conditional branches. Also, move
isOnlyReachableByFallthrough out of line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68129 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 18:39:13 +00:00
Dan Gohman
456e281c11 Minor top-level comment fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68113 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 16:51:18 +00:00
Bill Wendling
e67f5e4273 Oy! When reverting r68073, I added in experimental code. Sorry...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 08:41:31 +00:00
Owen Anderson
696a1307ba Remove the "fast" cases for spill and restore point determination, as these were subtlely wrong in obscure cases. Patch the testcase
to account for this change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 08:27:09 +00:00
Bill Wendling
8fe00540fc Revert r68073. It's causing a failure in the Apple-style builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68092 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 08:26:26 +00:00
Dan Gohman
07c26ee87e Fix live-out reg logic to not insert over-aggressive AssertZExt
instructions. This fixes lua.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 01:38:29 +00:00
Evan Cheng
e6f350d755 Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed.
e.g.
%reg1024<def> = MOV r1
%reg1025<def> = ADD %reg1024, %reg1026
r0            = MOV %reg1025

If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 21:34:07 +00:00
Bill Wendling
fd302b7056 Balance out quote in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68059 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 20:32:22 +00:00
Bill Wendling
430d423e4b Fix grammar-o in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68057 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 20:30:02 +00:00
Dan Gohman
6d1b89e74f Constify arguments in isSuccessor and isLayoutSuccessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68054 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30 20:06:29 +00:00
Duncan Sands
004e27cc1b Fix PR3899: add support for extracting floats from vectors
when using -soft-float.
Based on a patch by Jakob Stoklund Olesen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-29 13:51:06 +00:00
Arnold Schwaighofer
11ff97801b Make check in CheckTailCallReturnConstraints for ignorable instructions between
a CALL and a RET node more generic. Add a test for tail calls with a void
return.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67943 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 12:36:29 +00:00
Arnold Schwaighofer
e75fd69f15 Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67934 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 08:33:27 +00:00
Evan Cheng
0b0cd9113a Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq    $3, %rdi
leaq    (%rdi,%rdi,4), %rax

This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq    (%rdi,%rdi,2), %rax
leaq    (%rsi,%rax,8), %rax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28 05:57:29 +00:00
Dan Gohman
a80efceb93 Fix what surely must be a copy+pasto.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67881 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-27 23:55:04 +00:00
Dan Gohman
84d08db733 Initialize LiveOutInfo's APInt members to zero, as APInt's
default constructor produces an uninitialized APInt.
This fixes PR3896.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67879 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-27 23:51:02 +00:00
John Mosby
ea4d351fc6 Shrink wrapping in PEI: initial release. Finishing development, enable with --shrink-wrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67828 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-27 06:09:40 +00:00
Owen Anderson
b98bbb7597 Don't assign a new stack slot if the pre-alloc splitter already assigned one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 18:53:38 +00:00
Bill Wendling
a02a3dda56 Pull transform from target-dependent code into target-independent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26 06:14:09 +00:00
Evan Cheng
3927f438b5 Revert 67132. This is breaking some objective-c apps.
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25 20:20:11 +00:00
Dale Johannesen
beaec4cbf6 When optimizing with debug info, don't keep the
stoppoint nodes around until Legalize; doing this
imposed an ordering on a sequence of loads that
came from different lines, interfering with scheduling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25 17:36:08 +00:00
Evan Cheng
42bf74be14 CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25 01:47:28 +00:00
Devang Patel
86bda4174a Do not ignore DW_TAG_class_type!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67661 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25 00:28:40 +00:00
Evan Cheng
78a5bd5dbd Fix PR3845: Avoid stale MachineInstruction pointer reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67649 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24 20:33:17 +00:00
Chris Lattner
e2f7bf8e2d more tidying: name the components of PhysReg in the case when
the target constraint specifies a specific physreg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67618 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24 15:27:37 +00:00
Chris Lattner
b3b4484e3d Tidy a bit more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67617 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24 15:25:07 +00:00
Chris Lattner
fc9d161f16 simplify this code a bit now that "allocation to a vreg class" can never
fail.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67616 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24 15:22:11 +00:00
Dan Gohman
8f4aa333d0 Minor compile-time optimization; don't bother checking
canClobberPhysRegDefs if the successor node doesn't
clobber any physical registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67587 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24 00:50:07 +00:00
Dan Gohman
002b44f1d7 Add a pre-pass to the burr-list scheduler which makes adjustments to
help out the register pressure reduction heuristics in the case of
nodes with multiple uses. Currently this uses very conservative
heuristics, so it doesn't have a broad impact, but in cases where it
does help it can make a big difference.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24 00:49:12 +00:00
Evan Cheng
f1c0ae9de5 Do not emit comments unless -asm-verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67580 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24 00:17:40 +00:00
Evan Cheng
5d088fee7c Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases.
e.g. allocating for GR32, bh is not used, updating bl spill weight.                                                                                                        
     bl should get the same spill weight otherwise it will be choosen                                                                                              
     as a spill candidate since spilling bh doesn't make ebx available.
This fix PR2866.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 22:57:19 +00:00
Dale Johannesen
1b25cb2416 Fix internal representation of fp80 to be the
same as a normal i80 {low64, high16} rather
than its own {high64, low16}.  A depressing number
of places know about this; I think I got them all.
Bitcode readers and writers convert back to the old
form to avoid breaking compatibility.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 21:16:53 +00:00
Dan Gohman
fa9afef7ea When unfolding a load during scheduling, the new operator node has
a data dependency on the load node, so it really needs a
data-dependence edge to the load node, even if the load previously
existed.

And add a few comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67554 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 20:20:43 +00:00
Evan Cheng
2824a65550 Fix PR3391 and PR3864. Reg allocator infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67544 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 18:24:37 +00:00
Dan Gohman
8cccf0ef0c Don't set SUnit::hasPhysRegDefs to true unless the defs are
actually have uses, which reflects the way it's used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67540 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 17:39:36 +00:00
Dan Gohman
a5c8ae233e Fix canClobberPhysRegDefs to check all SDNodes grouped together
in an SUnit, instead of just the first one. This fix is needed
by some upcoming scheduler changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67531 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 16:23:01 +00:00
Dan Gohman
3974667c1a Add a new bit to SUnit to record whether a node has implicit physreg
defs, regardless of whether they are actually used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67528 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 16:10:52 +00:00
Dan Gohman
f871ccb853 Now that errs() is properly non-buffered, there's no need to
explicitly flush it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67526 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 15:57:19 +00:00
Evan Cheng
fb11288109 Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67512 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 08:01:15 +00:00
Evan Cheng
7d6d4b360f Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
%RAX<def> = ...
%RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
The first def is defining RAX, not EAX so the top bits were not zero-extended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67511 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23 07:19:58 +00:00
Dan Gohman
db95fa131a Simplify this code; use a while instead of an if and a do-while.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67400 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-20 20:42:23 +00:00
Evan Cheng
697cbbfb00 For inline asm output operand that matches an input. Encode the input operand index in the high bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67387 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-20 18:03:34 +00:00
Sanjiv Gupta
91520ea585 Fixed build warnings for unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67372 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-20 13:49:20 +00:00
Sanjiv Gupta
b169426272 Fixed the comment. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67370 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-20 09:38:50 +00:00
Chris Lattner
8fc2d0ee8d Apply the patch requested in PR3846.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67364 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-20 05:08:24 +00:00
Sebastian Redl
48fe63526e Fix the Win32 VS2008 build:
- Make type declarations match the struct/class keyword of the definition.
 - Move AddSignalHandler into the namespace where it belongs.
 - Correctly call functions from template base.
 - Some other small changes.
With this patch, LLVM and Clang should build properly and with far less noise under VS2008.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67347 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-19 23:26:52 +00:00
Evan Cheng
a24752ff43 Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67335 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-19 20:30:06 +00:00
Chris Lattner
5e6345bde0 Fix PEI to not walk off the start of a block when an updated instruction
is the first in its block.  This is PR3842.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67304 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-19 17:15:43 +00:00
Mon P Wang
aa9df0b0c3 Added missing support for widening when splitting an unary op (PR3683)
and expanding a bit convert (PR3711).  In both cases, we extract the
valid part of the widen vector and then do the conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-18 06:24:04 +00:00
Rafael Espindola
152932b71c Don't force promotion of return arguments on the callee.
Some architectures (like x86) don't require it.
This fixes bug 3779.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67132 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 23:43:59 +00:00
Chris Lattner
0b18e59336 Fix codegen to compute the size of an allocation by multiplying the
size by the array amount as an i32 value instead of promoting from
i32 to i64 then doing the multiply.  Not doing this broke wrap-around
assumptions that the optimizers (validly) made.  The ultimate real
fix for this is to introduce i64 version of alloca and remove mallocinst.

This fixes PR3829


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 19:36:00 +00:00
Sanjiv Gupta
12a9dc8c14 r66870 missed this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67082 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 15:46:15 +00:00
Duncan Sands
a5fec0dba3 Reapply r67049, with the test adjusted for darwin
(which produces "call L_f$stub" rather than "call f").


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67079 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 09:46:22 +00:00
Mon P Wang
93b7415f4c Fix a problem with DAGCombine where we were building an illegal build
vector shuffle mask. Forced the mask to be built using i32.  Note: this will
be irrelevant once vector_shuffle no longer takes a build vector for the
shuffle mask.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67076 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 06:33:10 +00:00
Evan Cheng
e47b0089d9 Spiller may unfold load / mod / store instructions as an optimization when the would be loaded value is available in a register. It needs to check if it's legal to clobber the register. Also, the register can contain values of multiple spill slots, make sure to check all instead of just the one being unfolded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67068 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-17 01:23:09 +00:00
Bill Wendling
db14d63cea --- Reverse-merging (from foreign repository) r67049 into '.':
U    test/CodeGen/X86/2009-03-13-PHIElimBug.ll
D    test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
U    lib/CodeGen/PHIElimination.cpp

r67049 was causing this failure:

Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/X86/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/X86/2009-03-13-PHIElimBug.ll for PR3784
Failed with exit(1) at line 1
while running:  llvm-as < /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/CodeGen/X86/2009-03-13-PHIElimBug.ll |  llc -march=x86 | /usr/bin/grep -A 2 {call f} | /usr/bin/grep movl
child process exited abnormally


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-16 20:27:20 +00:00
Duncan Sands
dfec24c877 Tweak the fix for PR3784: be less sensitive about just
how invokes are set up.  The fix could be disturbed by
register copies coming after the EH_LABEL, and also didn't
behave quite right when it was the invoke result that
was used in a phi node.  Also (see new testcase) fix
another phi elimination bug while there: register copies
in the landing pad need to come after the EH_LABEL, because
that's where execution branches to when unwinding.  If they
come before the EH_LABEL then they will never be executed...
Also tweak the original testcase so it doesn't use a no-longer
existing counter.
The accumulated phi elimination changes fix two of seven Ada
testsuite failures that turned up after landing pad critical
edge splitting was turned off.  So there's probably more to come.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-16 19:58:38 +00:00
Owen Anderson
420dd37326 Give the pre-alloc splitter access to the VirtRegMap. It doesn't do anything
useful with it at the moment, but it will in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67012 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-14 21:40:05 +00:00
Daniel Dunbar
cfbf05ef03 Add newlines at end of file (this can annoy gcov)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67000 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-14 01:53:05 +00:00
Mon P Wang
0b7a786842 Avoid doing the transformation c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4
if FPConstant is legal because if the FPConstant doesn't need to be stored
in a constant pool, the transformation is unlikely to be profitable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66994 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-14 00:25:19 +00:00
Dan Gohman
474d3b3f40 Improve FastISel's handling of truncates to i1, and implement
ptrtoint and inttoptr in X86FastISel. These casts aren't always
handled in the generic FastISel code because X86 sometimes needs
custom code to do truncation and zero-extension.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13 23:53:06 +00:00
Evan Cheng
fc0b80d974 Fix PR3784: If the source of a phi comes from a bb ended with an invoke, make sure the copy is inserted before the try range (unless it's used as an input to the invoke, then insert it after the last use), not at the end of the bb.
Also re-apply r66140 which was disabled as a workaround.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13 22:59:14 +00:00
Dan Gohman
14ea1ec232 Fix FastISel's assumption that i1 values are always zero-extended
by inserting explicit zero extensions where necessary. Included
is a testcase where SelectionDAG produces a virtual register
holding an i1 value which FastISel previously mistakenly assumed
to be zero-extended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66941 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13 20:42:20 +00:00
Evan Cheng
1606e8e4cd Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues.
1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants.
2. MachineConstantPool alignment field is also a log2 value.
3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values.
4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries.
5. Asm printer uses expensive data structure multimap to track constant pool entries by sections.
6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic.


Solutions:
1. ConstantPoolSDNode alignment field is changed to keep non-log2 value.
2. MachineConstantPool alignment field is also changed to keep non-log2 value.
3. Functions that create ConstantPool nodes are passing in non-log2 alignments.
4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT.
5. Asm printer uses cheaper data structure to group constant pool entries.
6. Asm printer compute entry offsets after grouping is done.
7. Change JIT code to compute entry offsets on the fly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66875 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13 07:51:59 +00:00
Owen Anderson
49c8aa0d8b Convert VirtRegMap to a MachineFunctionPass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66870 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13 05:55:11 +00:00
Bill Wendling
0582ae99ba Oops...I committed too much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66867 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13 04:39:26 +00:00
Bill Wendling
c7a09ab311 Temporarily XFAIL this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13 04:37:11 +00:00
Dan Gohman
b398fca15b Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12 23:55:10 +00:00
Owen Anderson
0ff4e2105b Reorganize some #include's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66780 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12 06:58:19 +00:00
Chris Lattner
d1980a5acd Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))"
related transformations out of target-specific dag combine into the
ARM backend.  These were added by Evan in r37685 with no testcases
and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll).

Add some simple X86-specific (for now) DAG combines that turn things
like cond ? 8 : 0  -> (zext(cond) << 3).  This happens frequently
with the recently added cp constant select optimization, but is a
very general xform.  For example, we now compile the second example
in const-select.ll to:

_test:
        movsd   LCPI2_0, %xmm0
        ucomisd 8(%esp), %xmm0
        seta    %al
        movzbl  %al, %eax
        movl    4(%esp), %ecx
        movsbl  (%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl    4(%esp), %eax
        leal    4(%eax), %ecx
        movsd   LCPI2_0, %xmm0
        ucomisd 8(%esp), %xmm0
        cmovbe  %eax, %ecx
        movsbl  (%ecx), %eax
        ret

This passes multisource and dejagnu.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66779 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12 06:52:53 +00:00
Evan Cheng
8042255118 Enable Chris' value propagation change. It make available known sign, zero, one bits information for values that are live out of basic blocks. The goal is to eliminate unnecessary sext, zext, truncate of values that are live-in to blocks. This does not handle PHI nodes yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66777 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12 06:29:49 +00:00
Gabor Greif
c40d4f85dd update
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11 22:52:25 +00:00
Owen Anderson
1ed5b714f1 Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11 22:31:21 +00:00
Evan Cheng
a597a97618 My last coalescer fix introduced a subtler one. It's aborting a commuting optimization too late and left the live intervals to be out of sync with instructions. This fixes 8b10b.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11 22:18:44 +00:00
Duncan Sands
4dc2b39bf8 It makes no sense to have a ODR version of common
linkage, so remove it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66690 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11 20:14:15 +00:00
Duncan Sands
9e8bd0b362 Add parentheses to pacify gcc-4.3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66653 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11 09:04:34 +00:00
Chris Lattner
600fec3cea reapply my previous patch (r66358) with a tweak to set the
alignment of the generated constant pool entry to the
desired alignment of a type.  If we don't do this, we end up
trying to do movsd from 4-byte alignment memory.  This fixes
450.soplex and 456.hmmer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66641 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11 05:08:08 +00:00
Bill Wendling
1362f97018 Put the assignment back at the top of this method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66611 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11 00:03:50 +00:00
Evan Cheng
a2e6435e48 Two coalescer fixes in one.
1. Use the same value# to represent unknown values being merged into sub-registers.
2. When coalescer commute an instruction and the destination is a physical register, update its sub-registers by merging in the extended ranges.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11 00:03:21 +00:00
Bill Wendling
dd44632498 Make ivars private. Other cleanup. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66607 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 23:57:09 +00:00
Bill Wendling
68edf5f68a Just make the Dwarf timer group static inside of the getter function. No need to alloc/dealloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66591 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 22:58:53 +00:00
Bill Wendling
fc232b08f3 Don't put static functions in anonymous namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66589 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 22:36:31 +00:00
Bill Wendling
7b69720ff4 These should *stop* the timer, not start it again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 22:02:13 +00:00
Bill Wendling
e9e960ff55 - Fix misspelled method name.
- Remove unused method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 21:59:25 +00:00
Bill Wendling
c8615e4d39 - Create GetOrCreateSourceID from getOrCreateSourceID. GetOrCreateSourceID is
the untimed version of getOrCreateSourceID. getOrCreateSourceID calls
  GetOrCreateSourceID, of course.

- Move some methods into the "private" section. Constify at least one method.

- General clean-ups.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66582 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 21:47:45 +00:00
Bill Wendling
163ba3fa39 Refine the Dwarf writer timers so that they measure exception writing and debug
writing individually.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66577 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 21:23:25 +00:00
Evan Cheng
41d88d2ac0 Revert 66358 for now. It's breaking povray, 450.soplex, and 456.hmmer on x86 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 20:47:18 +00:00
Bill Wendling
91b8b8010a Add a timer to the DwarfWriter pass that measures the total time it takes to
emit exception and debug Dwarf info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 20:41:52 +00:00
Dan Gohman
1274ced8a3 Fix a post-RA scheduling liveness bug. When a basic block is being
scheduled in multiple regions, liveness data used by the
anti-dependence breaker is carried from one region to the next, however
the information reflects the state of the instructions before scheduling.
After scheduling, there may be new live range overlaps. Handle this by
pessimizing the liveness data carried between regions to the point where
it will be conservatively correct now matter how the earlier region is
scheduled. This fixes a miscompilation in 176.gcc with the post-RA
scheduler enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 18:10:43 +00:00
Chris Lattner
3e0cc2634e wire up support for emitting "special" values from inline asm
format strings with the standard ${:foo} syntax.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66527 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10 05:37:13 +00:00
Chris Lattner
66b8bc3289 Fix PR3763 by using proper APInt methods instead of uint64_t's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09 20:22:18 +00:00
Evan Cheng
0d8fc52ed3 Yet another case where the spiller marked two uses of the same register on the same instruction as kill. This fixes PR3706.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09 19:00:05 +00:00
Chris Lattner
ea3a9ff53d just remove the use_empty() check entirely, the only reason it
existed was for llvm-gcc 3.4 (which used the __main hack) which 
is really really long dead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09 08:18:48 +00:00
Chris Lattner
f231c07228 Make the code generator rip of dead constant expr uses before deciding
whether a global is dead or not.  This should fix PR3749 - linker adds 
spurious use to appending globals.  I can't reasonably add a testcase
for this, because the bc writer/reader strip dead constant users.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09 05:52:15 +00:00
Bill Wendling
ccbdc7ab82 Pass in a std::string when getting the names of debugging things. This cuts down
on the number of times a std::string is created and copied.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66396 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09 05:04:40 +00:00
Evan Cheng
821b8560e7 If a MI uses the same register more than once, only mark one of them as 'kill'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-08 03:58:35 +00:00
Chris Lattner
476769498e implement an optimization to codegen c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4.
For 2009-03-07-FPConstSelect.ll we now produce:

_f:
	xorl	%eax, %eax
	testl	%edi, %edi
	movl	$4, %ecx
	cmovne	%rax, %rcx
	leaq	LCPI1_0(%rip), %rax
	movss	(%rcx,%rax), %xmm0
	ret

previously we produced:

_f:
	subl	$4, %esp
	cmpl	$0, 8(%esp)
	movss	LCPI1_0, %xmm0
	je	LBB1_2	## entry
LBB1_1:	## entry
	movss	LCPI1_1, %xmm0
LBB1_2:	## entry
	movss	%xmm0, (%esp)
	flds	(%esp)
	addl	$4, %esp
	ret

on PPC the code also improves to:

_f:
	cntlzw r2, r3
	srwi r2, r2, 5
	li r3, lo16(LCPI1_0)
	slwi r2, r2, 2
	addis r3, r3, ha16(LCPI1_0)
	lfsx f1, r3, r2
	blr 

from:

_f:
	li r2, lo16(LCPI1_1)
	cmplwi cr0, r3, 0
	addis r2, r2, ha16(LCPI1_1)
	beq cr0, LBB1_2	; entry
LBB1_1:	; entry
	li r2, lo16(LCPI1_0)
	addis r2, r2, ha16(LCPI1_0)
LBB1_2:	; entry
	lfs f1, 0(r2)
	blr 

This also improves the existing pic-cpool case from:

foo:
	subl	$12, %esp
	call	.Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
	popl	%eax
	addl	$_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
	cmpl	$0, 16(%esp)
	movsd	.LCPI1_0@GOTOFF(%eax), %xmm0
	je	.LBB1_2	# entry
.LBB1_1:	# entry
	movsd	.LCPI1_1@GOTOFF(%eax), %xmm0
.LBB1_2:	# entry
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$12, %esp
	ret

to:

foo:
	call	.Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
	popl	%eax
	addl	$_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
	xorl	%ecx, %ecx
	cmpl	$0, 4(%esp)
	movl	$8, %edx
	cmovne	%ecx, %edx
	fldl	.LCPI1_0@GOTOFF(%eax,%edx)
	ret

This triggers a few dozen times in spec FP 2000.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66358 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-08 01:51:30 +00:00
Chris Lattner
d2e936a513 random cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66357 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-08 01:47:41 +00:00
Duncan Sands
667d4b8de6 Introduce new linkage types linkonce_odr, weak_odr, common_odr
and extern_weak_odr.  These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global.  In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time.   This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function.  If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body.  The
code generators on the other hand map weak and weak_odr linkage
to the same thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-07 15:45:40 +00:00
Dan Gohman
16e8eda4b8 Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodes
with multiple chain operands. This can occur when the scheduler
has added chain operands to a node that already has a chain
operand, in order to handle physical register dependencies.

This fixes an llvm-gcc bootstrap failure on x86-64 introduced
in r66058.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66240 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-06 02:23:01 +00:00
Bill Wendling
5601699d7c When we split a basic block, there's a default branch to the newly created BB.
Delete this default branch, because we're going to generate our own.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66234 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-06 01:41:15 +00:00
Owen Anderson
a2bfb54e4d (Hopefully) silence a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-05 08:23:20 +00:00
Owen Anderson
323c58d862 Be more careful about choosing restore points when doing restore folding. This fixes some subtle miscompilations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66147 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-05 07:19:18 +00:00
Evan Cheng
0076c616e8 Fix how livein live intervals are handled. Previously it could end at MBB start. Sorry, no small test case possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66129 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-05 03:34:26 +00:00
Bob Wilson
d344b884dd Fix BuildVectorSDNode::isConstantSplat to handle one-element vectors.
It is an error to call APInt::zext with a size that is equal to the value's
current size, so use zextOrTrunc instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66039 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04 17:47:01 +00:00
Owen Anderson
c93023a89e Add a restore folder, which shaves a dozen or so machineinstrs off oggenc. Update a testcase to check this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66029 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04 08:52:31 +00:00
Eli Friedman
27759f41ca PR3686: make the legalizer handle bitcast from i80 to x86 long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66021 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04 06:23:34 +00:00
Evan Cheng
599a6a88ce Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04 01:41:49 +00:00
Bill Wendling
36ae6c1827 The DAG combiner was performing a BT combine. The BT combine had a value of -1,
so it changed it into a 31 via the TLO.ShrinkDemandedConstant() call. Then it
would go through the DAG combiner again. This time it had a value of 31, which
was turned into a -1 by TLI.SimplifyDemandedBits(). This would ping pong
forever.

Teach the TLO.ShrinkDemandedConstant() call not to lower a value if the demanded
value is an XOR of all ones.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65985 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04 00:18:06 +00:00
Bob Wilson
24e338e8a3 Generalize BuildVectorSDNode::isConstantSplat to use APInts and handle
arbitrary vector sizes.  Add an optional MinSplatBits parameter to specify
a minimum for the splat element size.  Update the PPC target to use the
revised interface.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65899 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-02 23:24:16 +00:00
Nate Begeman
cbd88adea6 Fix a problem with DAGCombine on 64b targets where folding
extracts + build_vector into a shuffle would fail, because the
type of the new build_vector would not be legal.  Try harder to
create a legal build_vector type.  Note: this will be totally 
irrelevant once vector_shuffle no longer takes a build_vector for
shuffle mask.

New:
_foo:
	xorps	%xmm0, %xmm0
	xorps	%xmm1, %xmm1
	subps	%xmm1, %xmm1
	mulps	%xmm0, %xmm1
	addps	%xmm0, %xmm1
	movaps	%xmm1, 0

Old:
_foo:
	xorps	%xmm0, %xmm0
	movss	%xmm0, %xmm1
	xorps	%xmm2, %xmm2
	unpcklps	%xmm1, %xmm2
	pshufd	$80, %xmm1, %xmm1
	unpcklps	%xmm1, %xmm2
	pslldq	$16, %xmm2
	pshufd	$57, %xmm2, %xmm1
	subps	%xmm0, %xmm1
	mulps	%xmm0, %xmm1
	addps	%xmm0, %xmm1
	movaps	%xmm1, 0



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65791 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-01 23:44:07 +00:00
Evan Cheng
870b80722f Minor optimization:
Look for situations like this:                                                                                                                                                              
%reg1024<def> = MOV r1                                                                                                                                                                      
%reg1025<def> = MOV r0                                                                                                                                                                      
%reg1026<def> = ADD %reg1024, %reg1025                                                                                                                                                      
r0            = MOV %reg1026                                                                                                                                                                
Commute the ADD to hopefully eliminate an otherwise unavoidable copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-01 02:03:43 +00:00
Bob Wilson
a27ea9e89f Combine PPC's GetConstantBuildVectorBits and isConstantSplat functions to a new
method in a BuildVectorSDNode "pseudo-class".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65747 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-01 01:13:55 +00:00
Evan Cheng
c8bb37a50a Last commit accidentially deleted this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65679 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-28 06:02:14 +00:00
Devang Patel
9ac08d6a67 It is possible that subprgoram definition is only encoding return value directly, instsad of an DIArray of all argument types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65643 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-27 18:05:21 +00:00
Rafael Espindola
9a58023c6c Refactor TLS code and add some tests. The tests and expected results are:
pic |  declaration | linkage  | visibility |

!pic |  declaration | external | default    | tls1.ll     tls2.ll     | local exec
 pic |  declaration | external | default    | tls1-pic.ll tls2-pic.ll | general dynamic
!pic | !declaration | external | default    | tls3.ll     tls4.ll     | initial exec
 pic | !declaration | external | default    | tls3-pic.ll tls4-pic.ll | general dynamic

!pic |  declaration | external | hidden     | tls7.ll     tls8.ll     | local exec
 pic |  declaration | external | hidden     | X                       | local dynamic
!pic | !declaration | external | hidden     | tls9.ll     tls10.ll    | local exec
 pic | !declaration | external | hidden     | X                       | local dynamic

!pic |  declaration | internal | default    | tls5.ll     tls6.ll     | local exec
 pic |  declaration | internal | default    | X                       | local dynamic

The ones marked with an X have not been implemented since local dynamic is not implemented.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65632 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-27 13:37:18 +00:00
Evan Cheng
efc783951c MachineLICM CSE should match destination register classes; avoid hoisting implicit_def's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65592 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-27 00:02:22 +00:00
Owen Anderson
130abb29cc Enable stack slot coloring DCE. Evan's spiller fixes were needed before this could happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65501 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-26 04:47:57 +00:00
Evan Cheng
04cf3e39f3 The last commit was overly conservative. It's ok to reuse value that's already marked livein.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65498 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-26 03:02:21 +00:00
Evan Cheng
f792352c25 If an available register falls through to a succ block, unset the last kill. Sorry, it's impossible to reduce a sensible test case. It basically requires the moon and stars to align in order to cause a failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65497 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-26 02:30:42 +00:00
Evan Cheng
a87008d90b Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-25 22:49:59 +00:00
Dale Johannesen
8a36f509cd Fix big-endian codegen bug. We're splitting up
overly long ints, e.g. i96, into pieces at PHIs
and the nodes that feed into them; however big-endian
reverses the order of the pieces (for some reason), and
wasn't doing it the same way on both sides, so
the pieces didn't match and runtime failures ensued.
Fixes 188.ammp and sqlite3 on ppc32.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65481 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-25 22:39:13 +00:00
Devang Patel
053372dc3c Print variable's display name in dwarf DIE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-25 19:41:35 +00:00
Evan Cheng
e3d423244a Clean up dwarf writer, part 1. This eliminated the horrible recursive getGlobalVariablesUsing and replaced it something readable. It eliminated use of slow UniqueVector and replaced it with StringMap, SmallVector, and DenseMap, etc. It also fixed some non-deterministic behavior.
This is a very minor compile time win.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65438 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-25 07:04:34 +00:00
Scott Michel
8f1579aedc Expand tabs to spaces (overlooked in previous commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65427 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-25 03:57:49 +00:00
Scott Michel
df38043a46 Remove all "cached" data from BuildVectorSDNode, preferring to retrieve
results via reference parameters.

This patch also appears to fix Evan's reported problem supplied as a
reduced bugpoint test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65426 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-25 03:12:50 +00:00
Bill Wendling
57f0db833d Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-24 08:30:20 +00:00
Owen Anderson
3d8bde8dfb Add a debugging option for SSC DCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-24 05:44:18 +00:00
Bill Wendling
5aa4977fba - Use the "Fast" flag instead of "OptimizeForSize" to determine whether to emit
a DBG_LABEL or not. We want to fall back to the original way of emitting debug
  info when we're in -O0/-fast mode.
- Add plumbing in to pass the "Fast" flag to places that need it.
- XFAIL DebugInfo/deaddebuglabel.ll. This is finding 11 labels instead of 8. I
  need to investigate still.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65367 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-24 02:35:30 +00:00
Dan Gohman
0001e56f15 Fix a ValueTracking rule: RHS means operand 1, not 0. Add a simple
ashr instcombine to help expose this code. And apply the fix to
SelectionDAG's copy of this code too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65364 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-24 02:00:40 +00:00
Devang Patel
002ec1482c gdb uses DW_AT_prototyped to identify K&R style in C based languages.
This fixes objc.dg/dwarf-prototypes.m scan-assembler DW_AT_prototyped from llvmgcc42 test suite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65357 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-24 00:52:19 +00:00
Devang Patel
53cac18cca If there is not any debug info available for any global variables and any subprograms then there is not any debug info to emit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65352 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-24 00:02:15 +00:00
Scott Michel
4214a5531c Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65296 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-22 23:36:09 +00:00
Evan Cheng
58207f12ee If a use operand is marked isKill, don't forget to add kill to its live interval as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-22 08:35:56 +00:00
Richard Pennington
278f83daeb bug 3610: Floating point vaarg not softened.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65239 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-21 19:11:18 +00:00
Anton Korobeynikov
b5bd026a75 Drop bunch of half-working stuff in the ext_weak linkage support.
Now we're using one gross, but quite robust hack :) (previous ones
did not work, for example, when ext_weak symbol was used deep inside
constant expression in the initializer).

The proper fix of this problem will require some quite huge asmprinter
changes and that's why was postponed. This fixes PR3629 by the way :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65230 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-21 11:53:32 +00:00
Evan Cheng
28c7ce3fd4 If two-address def is dead and the instruction does not define other registers, and it doesn't produce side effects, just delete the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65218 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-21 03:14:25 +00:00
Dan Gohman
1ba519b726 Fix a bug that David Greene found in the DAGCombiner's logic
that checks whether it's safe to transform a store of a bitcast
value into a store of the original value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-20 23:29:13 +00:00
Bill Wendling
9a65cfe7dd - Early exit a nested block.
- Correct comment.
- Whitespace changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65149 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-20 20:40:28 +00:00
Owen Anderson
4cafbb58e2 Fix a crash in the pre-alloc splitter exposed by recent codegen changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65121 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-20 10:02:23 +00:00
Owen Anderson
3b2c01723c Add a quick pass to the stack slot colorer to eliminate some trivially redundant spills after coloring.
Ideally these would never get created in the first place, but until we enhance the spiller to have a more
global picture of what's happening, this is necessary for code quality in some circumstances.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65120 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-20 09:11:36 +00:00
Bill Wendling
4ed0c5fb07 Add an accessor method to DwarfWriter to tell of debugging info should be emitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65092 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-20 00:44:43 +00:00
Bill Wendling
14a2e1eda0 Temporarily revert r65065. It was causing test failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65068 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-19 21:57:07 +00:00
Bill Wendling
b5ef273757 Print out debug info when printing the machine instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-19 21:44:55 +00:00
Bill Wendling
490359d687 Check for -fast here too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-19 21:23:54 +00:00