Evan Cheng
28b3c45109
Minor interface change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34967 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-06 10:05:14 +00:00
Evan Cheng
5e6df4647e
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34707 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-28 00:21:17 +00:00
Jim Laskey
d313a9b148
Duplicate use of LR, take 2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34666 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 11:55:45 +00:00
Evan Cheng
3d3d627513
Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrapping
...
to infinite loop:
PPCMachineFunctionInfo.h updated: 1.2 -> 1.3
PPCRegisterInfo.cpp updated: 1.110 -> 1.111
PPCRegisterInfo.h updated: 1.28 -> 1.29
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34652 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-27 02:55:29 +00:00
Chris Lattner
9f0bc659c8
implement support for the linux/ppc function call ABI. Patch by
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Nicolas Geoffray!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34574 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-25 05:34:32 +00:00
Jim Laskey
2a27a7598b
Don't spill LR as a callee saved register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34533 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 20:34:16 +00:00
Evan Cheng
0fa1b6d1b1
By default, spills kills the register being stored.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34515 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-23 01:10:04 +00:00
Jim Laskey
62819f3144
Support to provide exception and selector registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-21 22:54:50 +00:00
Evan Cheng
b371f457b0
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34428 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-19 21:49:54 +00:00
Reid Spencer
a284cbf667
For PR1207:
...
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34399 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-19 03:20:00 +00:00
Evan Cheng
eceada6728
Added getReservedRegs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34376 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-17 11:06:00 +00:00
Jim Laskey
b82313fdc2
Support for non-landing pad exception handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33755 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 16:31:34 +00:00
Chris Lattner
9aa2895360
Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33732 91177308-0d34-0410-b5e6-96231b3b80d8
2007-02-01 00:39:08 +00:00
Jim Laskey
e078d1a14a
Only gather frame info if debug or eh.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33639 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29 23:20:22 +00:00
Jim Laskey
072200c36d
Landing pad-less eh for PPC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33622 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-29 18:51:14 +00:00
Jim Laskey
44c3b9fdd4
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
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for debugging and exception handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33550 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 21:22:28 +00:00
Jim Laskey
1ee2925742
Make LABEL a builtin opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 14:34:52 +00:00
Evan Cheng
fab0439c62
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33508 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 22:48:25 +00:00
Evan Cheng
99403b6964
- Tell PEI that PPC will handle stack frame rounding itself.
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- Do not round up to max. alignment of stack object if it is > stack alignment.
It will have to be handled with dynamic aligning code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33505 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-25 22:25:04 +00:00
Jim Laskey
5e73d5bd2e
Repair debug frames as a prelude to eh_frames. Switched to using MachineMoves
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by value so that clean up is less confusing (these vectors tend to be small.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33488 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-24 18:45:13 +00:00
Evan Cheng
dc77540d95
hasFP() is now a virtual method of MRegisterInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33455 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-23 00:57:47 +00:00
Evan Cheng
c2b861da18
Fix naming inconsistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32823 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-02 21:33:40 +00:00
Bill Wendling
f5da13367f
What should be the last unnecessary <iostream>s in the library.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 22:21:48 +00:00
Chris Lattner
c88fa749eb
fix CodeGen/PowerPC/2006-12-07-LargeAlloca.ll on ppc64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32331 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 22:15:58 +00:00
Jim Laskey
51fe9d9aa4
Make it easier for gdb to find the return address.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32277 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-06 17:42:06 +00:00
Evan Cheng
12a447898a
MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32034 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-30 07:12:03 +00:00
Evan Cheng
c0f64ffab9
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27 23:37:22 +00:00
Chris Lattner
bdc571b7d5
r13 is the thread pointer on darwin/ppc64, don't allocate it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31882 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-20 19:33:51 +00:00
Jim Laskey
d6fa8c166a
Assert unhandled case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 18:49:39 +00:00
Jim Laskey
2ff5cdb16c
1. Ignore the -disable-fp-elim when the routine is a leaf.
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2. Offsets on 64-bit stores are still in bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-17 16:09:31 +00:00
Jim Laskey
2f616bff7e
This is a general clean up of the PowerPC ABI. Address several problems and
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bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31792 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-16 22:43:37 +00:00
Chris Lattner
5e797a5b1c
Fix ppc64 epilog bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31771 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 23:35:30 +00:00
Evan Cheng
6ce7dc2a97
Properly transfer kill / dead info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31765 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 20:58:11 +00:00
Chris Lattner
5e14b821cd
Fix the PPC regressions last night
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31752 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 17:40:51 +00:00
Chris Lattner
6a5339ba65
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
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clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31734 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-14 18:44:47 +00:00
Evan Cheng
7ce4578353
Matches MachineInstr changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-13 23:36:35 +00:00
Jim Laskey
dfc55885e2
Make sure stack link is set in 64-bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31690 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 22:22:07 +00:00
Chris Lattner
a94a203f34
implement proper PPC64 prolog/epilog codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31684 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 19:05:28 +00:00
Jim Laskey
4bfd1e9b43
Running with frame pointers prevented debugging, external probes and
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potentially some system calls/exception handling from working. TOS must always
link to previous frame. This is a short term workaround until alloca scheme is
reworked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31677 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-11 10:21:58 +00:00
Reid Spencer
3ed469ccd7
For PR786:
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Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02 20:25:50 +00:00
Chris Lattner
09e460662a
Completely eliminate def&use operands. Now a register operand is EITHER a
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def operand or a use operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:31:13 +00:00
Jim Laskey
ce50a165c7
Handle callee saved registers in dwarf frame info (lead up to exception
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handling.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29954 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-29 16:24:26 +00:00
Jim Laskey
4c2c9031ac
Fix some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29880 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-25 19:40:59 +00:00
Chris Lattner
be6a039ad4
The PPC64 JIT needs register numbers to encode instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29114 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 20:53:55 +00:00
Chris Lattner
804e067042
In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 00:48:23 +00:00
Chris Lattner
7ffa9abdad
Fix rewriting frame offsets with ixaddr instructions, which implicitly shift
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the offset two bits to the left.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28933 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-27 18:55:49 +00:00
Chris Lattner
b410dc9977
Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28889 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-20 23:18:58 +00:00
Chris Lattner
e67304fb78
Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register
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allocated, thus live across the save/reload. This fixes
llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg
and probably others, with -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28761 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 23:59:16 +00:00
Chris Lattner
b47e0897a0
Fix spilling and reloading of CR regs to reload the right values. This fixes
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Olden/power (and probably others) with -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28760 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 21:50:57 +00:00
Evan Cheng
0f3ac8d8d4
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-18 00:12:58 +00:00
Chris Lattner
3e6a35076e
Fix the PowerPC JIT-only failure on UnitTests/Vector/sumarray-dbl, which is
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really a bad codegen bug that LLC happens to get lucky with. I must chat with
Nate for the proper fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28213 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-10 06:38:32 +00:00
Chris Lattner
e53f4a055f
Move some methods out of MachineInstr into MachineOperand
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28102 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 17:52:23 +00:00
Chris Lattner
63b3d7113d
There shalt be only one "immediate" operand type!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 17:21:20 +00:00
Chris Lattner
e45aa737ba
Revert Nate's CR patch from last night, which caused many regressions (e.g. fhourstones).
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Loading and storing off R0 isn't what we wanted. Also, taking some CR's out of
CRRC seems to cause failures as well. Further investigation is required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28097 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04 16:56:45 +00:00
Nate Begeman
426cd7c25f
Since we don't handle callee-save CRs right yet, don't allocate them. Also
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don't step on R11 in the middle of a function when saving and restoring CRs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28058 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 17:37:31 +00:00
Chris Lattner
f9568d8700
Don't diddle VRSAVE if no registers need to be added/removed from it. This
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allows us to codegen functions as:
_test_rol:
vspltisw v2, -12
vrlw v2, v2, v2
blr
instead of:
_test_rol:
mfvrsave r2, 256
mr r3, r2
mtvrsave r3
vspltisw v2, -12
vrlw v2, v2, v2
mtvrsave r2
blr
Testcase here: CodeGen/PowerPC/vec_vrsave.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27777 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 21:48:13 +00:00
Chris Lattner
402504b1ba
Vectors that are known live-in and live-out are clearly already marked in
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the vrsave register for the caller. This allows us to codegen a function as:
_test_rol:
mfspr r2, 256
mr r3, r2
mtspr 256, r3
vspltisw v2, -12
vrlw v2, v2, v2
mtspr 256, r2
blr
instead of:
_test_rol:
mfspr r2, 256
oris r3, r2, 40960
mtspr 256, r3
vspltisw v0, -12
vrlw v2, v0, v0
mtspr 256, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27772 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 21:22:06 +00:00
Chris Lattner
369503f841
Move some knowledge about registers out of the code emitter into the register info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27770 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 21:07:20 +00:00
Chris Lattner
f7d2372b74
Use a small table instead of macros to do this conversion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27769 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 20:59:25 +00:00
Nate Begeman
218629813a
Fix SingleSource/UnitTests/Vector/sumarray-dbl
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27594 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 19:44:43 +00:00
Nate Begeman
030514cd96
Fix PR727, correctly handling large stack aligments on ppc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27593 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 19:29:21 +00:00
Jim Laskey
52fa2449c9
Suppress debug label when not debug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27588 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 08:11:53 +00:00
Jim Laskey
4188699f80
Foundation for call frame information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-07 16:34:46 +00:00
Chris Lattner
4f91a4c497
Force use of a frame-pointer if there is anything on the stack that is aligned
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more than the OS keeps the stack aligned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27381 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-03 22:03:29 +00:00
Jim Laskey
a99791886d
Expose base register for DwarfWriter. Refactor code accordingly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-28 13:48:33 +00:00
Jim Laskey
414e682bac
Translate llvm target registers to dwarf register numbers properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-27 20:18:45 +00:00
Jim Laskey
f1d78e8335
Add support to locate local variables in frames (early version.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23 18:12:57 +00:00
Chris Lattner
ecfe55e65b
When possible, custom lower 32-bit SINT_TO_FP to this:
...
_foo2:
extsw r2, r3
std r2, -8(r1)
lfd f0, -8(r1)
fcfid f0, f0
frsp f1, f0
blr
instead of this:
_foo2:
lis r2, ha16(LCPI2_0)
lis r4, 17200
xoris r3, r3, 32768
stw r3, -4(r1)
stw r4, -8(r1)
lfs f0, lo16(LCPI2_0)(r2)
lfd f1, -8(r1)
fsub f0, f1, f0
frsp f1, f0
blr
This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s
with llcbeta (16.7% and 38.1% respectively).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26943 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 05:30:33 +00:00
Chris Lattner
e261c474ca
remove dead variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26813 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 23:52:08 +00:00
Chris Lattner
9c09c9ec9d
teach the ppc backend how to spill/reload vector regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26806 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 22:24:02 +00:00
Chris Lattner
8aa777d5ea
in functions that use a lot of callee saved regs, this can be more than
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5 instructions away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26801 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 21:31:45 +00:00
Chris Lattner
335fd3c7c2
Add support for copying registers. still needed: spilling and reloading them
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26800 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 20:03:58 +00:00
Chris Lattner
1877ec9b02
For functions that use vector registers, save VRSAVE, mark used
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registers, and update it on entry to each function, then restore it on exit.
This compiles:
void func(vfloat *a, vfloat *b, vfloat *c) {
*a = *b * *c + *c;
}
to this:
_func:
mfspr r2, 256
oris r6, r2, 49152
mtspr 256, r6
lvx v0, 0, r5
lvx v1, 0, r4
vmaddfp v0, v1, v0, v0
stvx v0, 0, r3
mtspr 256, r2
blr
GCC produces this (which has additional stack accesses):
_func:
mfspr r0,256
stw r0,-4(r1)
oris r0,r0,0xc000
mtspr 256,r0
lvx v0,0,r5
lvx v1,0,r4
lwz r12,-4(r1)
vmaddfp v0,v0,v1,v0
stvx v0,0,r3
mtspr 256,r12
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26733 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13 21:52:10 +00:00
Chris Lattner
4083960147
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-02 20:12:32 +00:00
Chris Lattner
ba625726a1
Fix an off-by-one error that Nate's eagle eyes caught
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25231 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 23:16:29 +00:00
Chris Lattner
c6d48d36a3
Use the auto-insert BuildMI constructor to avoid an explicit insert. No
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functionality change, just code cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 23:07:57 +00:00
Chris Lattner
64da172b14
If a function has a non-zero sized frame, use an add to adjust the stack
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pointer in the epilog, not a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25229 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 23:03:54 +00:00
Evan Cheng
6da8d99f70
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
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hasInFlag, hasOutFlag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 18:28:21 +00:00
Evan Cheng
171049d10f
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
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* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 22:14:32 +00:00
Nate Begeman
ae232e7a10
Add the necessary support to the ISel to allow targets to codegen the new
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alignment information appropriately. Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack. Support for
arbitrarily aligned dynamic allocas coming soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24224 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-06 09:00:38 +00:00
Chris Lattner
841d12d9ac
Fix the JIT encoding of LWA, LD, STD, and STDU.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23787 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 16:51:22 +00:00
Nate Begeman
1d9d7427c4
First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
...
purely mechanical.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23778 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 00:28:58 +00:00
Nate Begeman
21e463b2bf
More PPC32 -> PPC changes, as well as merging some classes that were
...
redundant after the change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-16 05:39:50 +00:00
Chris Lattner
16e71f2f70
Rename PPC32*.h to PPC*.h
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This completes the grand PPC file renaming
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23745 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:59:06 +00:00
Chris Lattner
2668959b88
Rename PowerPC*.h to PPC*.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23743 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:51:18 +00:00
Chris Lattner
26bd0d48a1
Rename PowerPCInstrBuilder.h -> PPC*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23742 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:45:43 +00:00
Chris Lattner
4c7b43b43f
Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23738 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 23:37:35 +00:00
Chris Lattner
b91956e7f8
like the comment says, enable this
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23581 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 23:02:40 +00:00
Chris Lattner
919c032fa4
Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
...
These are used to represent float and double values, and the two regclasses
contain the same physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-01 01:35:02 +00:00
Nate Begeman
2b5e66fc6e
Remove some now-dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23571 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 21:28:27 +00:00
Chris Lattner
5802be13e0
constant fold these calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23558 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 17:16:59 +00:00
Chris Lattner
b48d2cf5eb
pass extra args
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23539 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 01:31:52 +00:00
Chris Lattner
6a78c2157a
Implement hook for ppc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23374 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-17 01:03:26 +00:00
Chris Lattner
c9fe7508a5
I forgot that we always spill fp values as 64-bits. Implement spill folding
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for FP as well. This triggers a couple dozen times on 177.mesa (for example).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23299 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09 21:59:44 +00:00
Chris Lattner
f38df04c3a
Fix a problem that Nate noticed, where spill code was not getting coallesced
...
with copies, leading to code like this:
lwz r4, 380(r1)
or r10, r4, r4 ;; Last use of r4
By teaching the PPC backend how to fold spills into copies, we now get this
code:
lwz r10, 380(r1)
wow. :)
This reduces a testcase nate sent me from 1505 instructions to 1484.
Note that this could handle FP values but doesn't currently, for reasons
mentioned in the patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23298 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09 21:46:49 +00:00
Chris Lattner
1463019e84
code cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23297 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-09 20:51:08 +00:00
Chris Lattner
82972705df
teach getClass what a condition reg is
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23105 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 21:51:29 +00:00
Chris Lattner
5087daac23
Minor cleanups:
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* avoid calling getClass() multiple times (it is relatively expensive)
* Allow -disable-fp-elim to turn of frame pointer elimination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23104 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 21:49:18 +00:00
Chris Lattner
0b1e641b82
Now that the simple isels are dead, so is this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22913 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:30:39 +00:00
Chris Lattner
3f852b45fc
MFLR doesn't take an operand, the LR register is implicit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22882 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:24:50 +00:00
Nate Begeman
3d72d14887
Use the new subtarget support to automatically choose the correct ABI
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and asm printer for PowerPC if one is not specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22659 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-04 20:49:48 +00:00
Jeff Cohen
d29b6aa608
Keep tabs and trailing spaces out.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22565 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-30 18:33:25 +00:00
Nate Begeman
3dee17581c
Fix some comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22530 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-27 23:11:27 +00:00
Nate Begeman
54eed36da5
Implement the optimization for the Red Zone on Darwin. This removes the
...
unnecessary SP manipulation in leaf routines that don't need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-27 06:06:29 +00:00
Misha Brukman
7847fcac17
Convert tabs to spaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21452 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-22 17:54:37 +00:00
Misha Brukman
b5f662fa03
Remove trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-21 23:30:14 +00:00
Nate Begeman
7af0248af4
Initial support for allocation condition registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21246 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 07:04:16 +00:00
Nate Begeman
340f290783
Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do not
...
have to inform the register allocator it might be stepped on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21202 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-10 03:59:42 +00:00
Nate Begeman
04ec80173b
Remove unnecessary register copy now that regalloc is fixed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21085 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 21:48:13 +00:00
Nate Begeman
dfd0e7bc34
Eliminate usage of MRegisterInfo::getRegClass(physreg)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17240 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 05:40:45 +00:00
Nate Begeman
da721e74f8
Correct some BuildMI arguments for the upcoming simple scheduler
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16519 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-27 05:08:17 +00:00
Reid Spencer
551ccae044
Changes For Bug 352
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Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01 22:55:40 +00:00
Nate Begeman
5709998993
Register sizes are in bits, not bytes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16070 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-27 04:28:10 +00:00
Nate Begeman
1f4a132599
Don't hard code the offset of the saved R31 in functions with frame pointers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15990 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-22 08:09:17 +00:00
Chris Lattner
8edcd84653
Reduce uses of getRegClass
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15968 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 19:51:17 +00:00
Misha Brukman
f2ccb77ee9
PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15850 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 04:55:41 +00:00