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1530 Commits

Author SHA1 Message Date
Chris Lattner
9acddcd07e add a note, I have no idea how important this is. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25907 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 19:16:34 +00:00
Chris Lattner
1bac941019 implemented, testcase here: test/Regression/CodeGen/X86/compare-add.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25899 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 06:36:48 +00:00
Evan Cheng
8b6e4e6e3e Update. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25896 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 02:40:17 +00:00
Evan Cheng
d25e9e8294 Fix a erroneous comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25894 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:28:23 +00:00
Chris Lattner
4d7db40ab1 more notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25890 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:38:08 +00:00
Evan Cheng
bda54cdd47 Tell codegen MOVAPSrr and MOVAPDrr are copies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:03:16 +00:00
Evan Cheng
b1b4e86a02 Added SSE entries to foldMemoryOperand(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25888 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:02:25 +00:00
Evan Cheng
78376d59ab Rearrange code to my liking. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25887 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 23:01:57 +00:00
Chris Lattner
3e2b94a171 another note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25883 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 21:44:48 +00:00
Nate Begeman
750ac1bdfa Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 07:19:44 +00:00
Chris Lattner
1f7c6302be add a note, I'll take care of this after nate commits his big patch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25873 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 06:40:32 +00:00
Evan Cheng
3c55c54a87 - Use xor to clear integer registers (set R, 0). 
- Added a new format for instructions where the source register is implied
  and it is same as the destination register. Used for pseudo instructions
  that clear the destination register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25872 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 06:13:50 +00:00
Evan Cheng
214a79423f Remove another entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25871 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 06:08:48 +00:00
Chris Lattner
3e1d5e5ea3 Another regression from the pattern isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25867 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 01:44:25 +00:00
Evan Cheng
760df29881 Return's chain should be matching either the chain produced by the 
value or the chain going into the load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25863 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 01:19:32 +00:00
Evan Cheng
0d084c9e4a When folding a load into a return of SSE value, check the chain to 
ensure the memory location has not been clobbered.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25861 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 00:20:21 +00:00
Evan Cheng
4ccf4c0d0b Remove an item. It's done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25860 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 00:15:53 +00:00
Evan Cheng
0e8671bf4a Be smarter about whether to store the SSE return value in memory. If 
it is already available in memory, do a fld directly from there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25859 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 23:19:54 +00:00
Chris Lattner
bb1d528aa6 turning these into 'adds' would require extra copies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25858 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 22:59:46 +00:00
Evan Cheng
223547ab31 - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*. 
- Use XORP* to implement fneg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25857 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 22:28:30 +00:00
Evan Cheng
598463fde4 Remove entries on fabs and fneg. These are done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25856 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 22:26:21 +00:00
Chris Lattner
259e97cc72 * Fix 80-column violations 
* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25854 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 19:43:35 +00:00
Evan Cheng
ef6ffb17c7 Added custom lowering of fabs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25831 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 03:14:29 +00:00
Chris Lattner
8e38ae60c7 Another high-prio selection performance bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25828 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 02:10:06 +00:00
Chris Lattner
594086d494 more mumbling 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25826 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 00:45:37 +00:00
Chris Lattner
bdde465bcf add some notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25825 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 00:20:38 +00:00
Evan Cheng
6dfa999c01 Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip 
the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25824 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 23:41:35 +00:00
Evan Cheng
02568ff48d i64 -> f32, f32 -> i64 and some clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25818 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 22:13:22 +00:00
Evan Cheng
6dab05363f Always use FP stack instructions to perform i64 to f64 as well as f64 to i64 
conversions. SSE does not have instructions to handle these tasks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25817 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 08:02:57 +00:00
Chris Lattner
c6fd6cd65c Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 04:09:27 +00:00
Chris Lattner
87c890a9c2 adjust prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25798 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 03:49:07 +00:00
Chris Lattner
c7097afe51 add another note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25789 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 09:46:06 +00:00
Chris Lattner
5164a313e0 add some performance notes from looking at sgefa 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25788 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 09:42:20 +00:00
Chris Lattner
6a28456e18 add a high-priority SSE issue from sgefa 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25787 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 09:14:47 +00:00
Chris Lattner
b638cd89db add a missed optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25786 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 09:08:15 +00:00
Reid Spencer
2ce5b263ba Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a 
few stores under certain conditions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25777 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 06:48:25 +00:00
Chris Lattner
0fc9c26e7d remove now-dead code, the legalizer takes care of this for us 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25776 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 06:45:31 +00:00
Chris Lattner
44d9b9bb86 The FP stack doesn't support UNDEF, ask the legalizer to legalize it 
instead of lying and saying we have it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25775 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 06:44:22 +00:00
Chris Lattner
a54aa94197 Targets all now request ConstantFP to be legalized into TargetConstantFP. 
'fpimm' in .td files is now TargetConstantFP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25771 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 06:26:08 +00:00
Jeff Cohen
b8643ac476 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25760 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 03:45:35 +00:00
Jeff Cohen
c4013d6772 Flesh out AMD family/models. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25755 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 20:30:18 +00:00
Jeff Cohen
216d281d0a Correctly determine CPU vendor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25754 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 19:48:34 +00:00
Jeff Cohen
a349640b7f Use union instead of reinterpret_cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25751 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 18:47:32 +00:00
Jeff Cohen
7617717496 Fix recognition of Intel CPUs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25750 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 18:38:20 +00:00
Chris Lattner
c2fad16155 Is64Bit reflects the capability of the chip, not an aspect of the target os 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25749 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 18:23:48 +00:00
Chris Lattner
dabbc98396 Fix a bunch of JIT failures with the new isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25748 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 18:19:37 +00:00
Jeff Cohen
41adb0d679 Improve X86 subtarget support for Windows and AMD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25747 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 18:09:06 +00:00
Chris Lattner
6b2469c1ad silence a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25745 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 10:34:47 +00:00
Chris Lattner
1e39a15b42 make this work on non-native hosts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25734 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 06:05:41 +00:00
Evan Cheng
d41e9e5e7a A bit of wisdom from Chris on the last entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25715 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 22:54:32 +00:00
Evan Cheng
85214ba3cc AT&T assembly convention: registers are in lower case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25714 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 22:53:29 +00:00
Chris Lattner
104988a16a initialize all instance vars 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25711 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 22:37:09 +00:00
Evan Cheng
e826a018b9 Added notes about a x86 isel deficiency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25706 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 22:11:01 +00:00
Evan Cheng
dbd38d7f64 Added a temporary option -enable-x86-sse to enable sse support. It is used by 
llc-beta.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25701 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 21:49:34 +00:00
Evan Cheng
8e44f0756f Bye bye Pattern ISel, hello DAG ISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25700 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 21:26:54 +00:00
Nate Begeman
ee625573b5 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 21:09:22 +00:00
Evan Cheng
b3a7e21b7e A better workaround 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25692 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 19:30:30 +00:00
Chris Lattner
9f96a32831 force sse/3dnow off until they work. This fixes all the x86 failures last night 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25690 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 18:30:50 +00:00
Chris Lattner
c2493c45a0 Unbreak the JIT with SSE 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25688 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 18:27:18 +00:00
Evan Cheng
559806f575 x86 CPU detection and proper subtarget support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25679 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 08:10:46 +00:00
Chris Lattner
cedc6f4b30 PHI and INLINEASM are now built-in instructions provided by Target.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25674 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 01:46:15 +00:00
Jeff Cohen
9471c8a93b Improve compatibility with VC2005, patch by Morten Ofstad! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25661 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 20:41:32 +00:00
Chris Lattner
38f7373018 Improve compatibility with VC2005, patch by Morten Ofstad! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25653 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 19:55:20 +00:00
Evan Cheng
97c7fc351e Added preliminary x86 subtarget support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25645 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 09:53:06 +00:00
Evan Cheng
67caa39e4c Work around some x86 Darwin assembler bugs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25638 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 02:27:43 +00:00
Evan Cheng
9bba894596 When trying to fold X86::SETCC into a Select, make a copy if it has more than 
one use. This allows more CMOV instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25634 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 02:13:10 +00:00
Evan Cheng
71fb9ad5d9 Remove the uses of STATUS flag register. Rely on node property SDNPInFlag, 
SDNPOutFlag, and SDNPOptInFlag instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25629 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 00:29:36 +00:00
Nate Begeman
acc398c195 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 18:21:52 +00:00
Evan Cheng
0b2afbd58a X86 prefer scheduling for reduced register pressure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25602 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 09:15:17 +00:00
Evan Cheng
0d718e9afc Fix a selectcc lowering bug. Make a copy of X86ISD::CMP when folding it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25596 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 09:05:09 +00:00
Chris Lattner
31e63881b3 Loosen up these checks to allow direct uses of ESP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25595 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 08:00:36 +00:00
Chris Lattner
91cacc810b use ESP directly, not a copy of ESP into some other register for fastcc calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25584 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-24 06:14:44 +00:00
Chris Lattner
af63bb03c5 Emit the copies out of call return registers *after* the ISD::CALLSEQ_END 
node, fixing fastcc and the case where a function has a frame pointer due
to dynamic allocas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25580 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-24 05:17:12 +00:00
Chris Lattner
6da23db69f Allow jit-beta to work 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25578 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-24 04:50:48 +00:00
Chris Lattner
2c2c6c61f1 Add explicit #includes of <iostream> 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-22 23:41:00 +00:00
Evan Cheng
86556a5f42 Rename fcmovae to fcmovnb and fcmova to fcmovnbe (following Intel manual). 
Some assemblers can't recognize the aliases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25494 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-21 02:55:41 +00:00
Chris Lattner
1f16ff6f0a LowerReturn now doesn't have to handle f32 returns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25484 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-20 18:41:25 +00:00
Evan Cheng
98f5dab8a7 Stop doing that accidental commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25474 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-20 01:14:05 +00:00
Evan Cheng
21d5443934 A few more SH{L|R}D peepholes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25473 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-20 01:13:30 +00:00
Evan Cheng
cce47faf52 Didn't mean to commit the last one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25469 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-19 23:27:08 +00:00
Evan Cheng
956044cf03 Added i16 SH{L|R}D patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25468 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-19 23:26:24 +00:00
Evan Cheng
dc8d2ab3e9 Avoid generating a redundant setcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25457 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-19 08:52:46 +00:00
Evan Cheng
41b6dc8dbe adc and sbb need an incoming flag to ensure it reads the carry flag 
from add / sub.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25444 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-19 06:53:20 +00:00
Evan Cheng
68b951a5e5 Two peepholes: 
(or (x >> c) | (y << (32 - c))) ==> (shrd x, y, c)
(or (x << c) | (y >> (32 - c))) ==> (shld x, y, c)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25438 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-19 01:56:29 +00:00
Evan Cheng
d9c45e9af9 Didn't mean to check that in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25436 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-19 01:52:56 +00:00
Evan Cheng
b7b5706340 A obvious typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25435 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-19 01:46:14 +00:00
Evan Cheng
99fa0a102a SRA shift amount must be in i8 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25416 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-18 09:26:46 +00:00
Evan Cheng
68e5d084f1 If a call return type is i1, insert a truncate from X86::AL to i1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25415 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-18 08:08:38 +00:00
Evan Cheng
357c58efde Fix lowering of calls which return f32 values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-17 21:58:21 +00:00
Evan Cheng
e5d9343377 Zero extending load from i1 to i8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25391 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-17 07:02:46 +00:00
Evan Cheng
6892f28e99 SSE does not support i64 SINT_TO_FP (FP stack doesn't either, but we custom 
expand it), so ask legalizer to expand i32 UINT_TO_FP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25386 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-17 02:32:49 +00:00
Evan Cheng
2059f884aa Added a FIXME comment about why FST is currently flagged to fpGETRESULT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25381 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-17 00:37:42 +00:00
Evan Cheng
42ef0bc6fb Bug fixes: fpGETRESULT should produces a flag result and X86ISD::FST should 
read a flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25378 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-17 00:19:47 +00:00
Evan Cheng
b5d0b0bae5 More typo's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25375 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-16 23:26:53 +00:00
Evan Cheng
8a3f4c75fa Some typo's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-16 22:48:46 +00:00
Evan Cheng
0cc3945efe Fix FP_TO_INT**_IN_MEM lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25368 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-16 21:21:29 +00:00
Chris Lattner
1db4b4f5c4 transfer some notes from my email to somewhere useful. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25361 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-16 17:53:00 +00:00
Evan Cheng
cf74a7c762 Added patterns for 8-bit multiply 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25338 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-15 10:05:20 +00:00
Chris Lattner
e112552b5a Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-15 09:00:21 +00:00
Chris Lattner
b47fad9892 silence a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25322 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-14 20:11:13 +00:00
Nate Begeman
d88fc03602 bswap implementation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25312 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-14 03:14:10 +00:00
Evan Cheng
e3703d44e9 A typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25307 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-14 01:18:49 +00:00
Evan Cheng
b8414333ac Add truncstore i1 patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25296 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 21:45:19 +00:00
Chris Lattner
052d2ff5dd Fix a bug in my last X86 checkin, pointed out by cozmic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25293 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 20:19:44 +00:00
Evan Cheng
e90da97f3e LHS = X86ISD::CMOVcc LHS, RHS means LHS = RHS if cc. So the operands must be 
flipped around.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 19:51:46 +00:00
Chris Lattner
9edba7605e Enable X86 support for savestack/restorestack 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 18:00:54 +00:00
Chris Lattner
b99329e8a0 expand unsupported stacksave/stackrestore nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25272 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 02:42:53 +00:00
Evan Cheng
e08c270623 Minor update. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25263 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 01:20:42 +00:00
Evan Cheng
80ebe38118 More typo's. I need new eye glasses... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25261 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 01:17:24 +00:00
Evan Cheng
189d01e8cc Oops. Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25260 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 01:06:49 +00:00
Evan Cheng
1bcee3602e Fix a SETCC / BRCOND folding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25259 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-13 01:03:02 +00:00
Evan Cheng
a3195e8643 Fix sint_to_fp (fild*) support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25257 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-12 22:54:21 +00:00
Evan Cheng
77e9043b84 Specify transformation from GlobalAddress to TargetGlobalAddress and 
ExternalSymbol to TargetExternalSymbol.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25253 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-12 19:36:31 +00:00
Evan Cheng
5ee4ccce5b X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be 
linked together).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25247 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-12 08:27:59 +00:00
Evan Cheng
002fe9baf2 * Materialize GlobalAddress and ExternalSym with MOV32ri rather than 
LEA32r.
* Do not lower GlobalAddress to TargetGlobalAddress. Let isel does it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25246 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-12 07:56:47 +00:00
Evan Cheng
eb422a7234 Added ROTL and ROTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25232 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 23:20:05 +00:00
Evan Cheng
67f92a7649 Support for MEMCPY and MEMSET. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 22:15:48 +00:00
Evan Cheng
38262cad0a Select DYNAMIC_STACKALLOC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 22:15:18 +00:00
Nate Begeman
35ef913ec2 Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25222 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 21:21:00 +00:00
Evan Cheng
8700e14ba1 * Add special entry code main() (to set x87 to 64-bit precision). 
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
  call parmater passing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 06:09:51 +00:00
Chris Lattner
92cb0af675 implement FP_REG_KILL insertion for the dag-dag instruction selector 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25192 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 01:15:34 +00:00
Chris Lattner
a2b694ce35 Fit into 80 cols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25191 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 00:46:55 +00:00
Evan Cheng
4a46080fe0 SSE cmov support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25190 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 00:33:36 +00:00
Evan Cheng
f710062bfb * fp to sint patterns. 
* fiadd, fisub, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25189 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-10 22:22:02 +00:00
Evan Cheng
aaca22ca91 FP_TO_INT*_IN_MEM and x87 FP Select support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25188 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-10 20:26:56 +00:00
Evan Cheng
510e478098 * Added undef patterns. 
* Some reorg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25163 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-09 23:10:28 +00:00
Evan Cheng
910cd3cfa2 More typos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25162 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-09 22:29:54 +00:00
Evan Cheng
82a24b9813 typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25160 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-09 20:49:21 +00:00
Evan Cheng
e3413160ca Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25158 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-09 18:33:28 +00:00
Evan Cheng
948f343a2f * Added integer div / rem. 
* Fixed a load folding bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 23:19:29 +00:00
Evan Cheng
0114e94903 ISEL code for MULHU, MULHS, and UNDEF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25132 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 20:36:21 +00:00
Chris Lattner
cb83374bd9 silence a bogus gcc warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25129 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 17:56:38 +00:00
Evan Cheng
cfa260b2ab Addd (shl x, 1) ==> (shl x, x) peepholes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25123 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 02:31:59 +00:00
Evan Cheng
da95a84a11 fold (shl x, 1) -> (add x, x) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25120 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 01:06:31 +00:00
Evan Cheng
d9558e0ba6 * Fast call support. 
* FP cmp, setcc, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 00:43:03 +00:00
Evan Cheng
650d688db6 Added ConstantFP patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-05 02:08:37 +00:00
Jim Laskey
e0bce71c42 Had expand logic backward. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-05 01:47:43 +00:00
Jim Laskey
abf6d1784b Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25104 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-05 01:25:28 +00:00
Evan Cheng
d90eb7fb24 DAG based isel call support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25103 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-05 00:27:02 +00:00
Chris Lattner
f31d193cce Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25024 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-27 03:02:18 +00:00
Evan Cheng
2b4ea795a2 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-26 09:11:45 +00:00
Evan Cheng
e4672aa5b4 Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25004 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-24 09:48:35 +00:00
Evan Cheng
171049d10f * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-23 22:14:32 +00:00
Evan Cheng
38bcbaf23e More X86 floating point patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24990 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-23 07:31:11 +00:00
Chris Lattner
21f66859e4 make sure bit_convert's are expanded 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24979 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-23 05:15:23 +00:00
Evan Cheng
5bc4da4893 Bye bye HACKTROCITY. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24935 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-22 02:26:21 +00:00
Evan Cheng
3a03ebb377 * Fix a GlobalAddress lowering bug. 
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 23:05:39 +00:00
Evan Cheng
793ca4caa4 Oops. Accidentally deleted RET pattern. It's still needed for return void; 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24920 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 22:22:16 +00:00
Jim Laskey
e81aecbae6 Disengage DEBUG_LOC from non-PPC targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24919 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 20:51:37 +00:00
Evan Cheng
d5781fca4f * Added support for X86 RET with an additional operand to specify number of 
bytes to pop off stack.
* Added support for X86 SETCC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24917 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 20:21:51 +00:00
Chris Lattner
c515ad18f8 This was meant to go in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24900 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 07:50:26 +00:00
Chris Lattner
58fe459e36 Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns 
that were overloaded to work before and after the stackifier runs.  With the
new clean world, it is possible to write patterns for these instructions: woo!

This also adds a few simple patterns here and there, though there are a lot
still missing.  These should be easy to add though. :)

See the comments under "Floating Point Stack Support" for more details on
the new world order.

This patch as absolutely no effect on the generated code, woo!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24899 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 07:47:04 +00:00
Chris Lattner
9fb2422c49 Wrap some long lines: no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24898 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 05:34:58 +00:00
Evan Cheng
8263c5e920 Remove ISD::RET select code. Now tblgen'd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24889 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 02:41:57 +00:00
Evan Cheng
b077b842b6 * Added lowering hook for external weak global address. It inserts a load 
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
  value (or store / fld / copy to ST(0) for floating point value). This
  eliminate the need to write C++ code to handle RET with variable number
  of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24888 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 02:39:21 +00:00
Evan Cheng
bbc8ddbea3 SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24886 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-20 22:59:51 +00:00
Evan Cheng
a5386b0823 Added X86 readport patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24879 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-20 07:38:38 +00:00
Evan Cheng
7226158d7e Added a hook to print out names of target specific DAG nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24877 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-20 06:22:03 +00:00
Evan Cheng
898101c15f X86 conditional branch support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24870 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-19 23:12:38 +00:00
Evan Cheng
fcaa9957c9 It's essential we clear CodeGenMap after isel every basic block! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24867 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-19 22:36:02 +00:00
Chris Lattner
4543251834 eliminate some redundancy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24781 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 19:47:05 +00:00
Evan Cheng
bdce7b4090 Darwin API issue: indirect load of external and weak symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24775 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 09:13:43 +00:00
Evan Cheng
433dbdaa63 Remove a few lines of dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24768 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 07:18:44 +00:00
Evan Cheng
98abbfb2ef Added an idea about any_extend for performance tuning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24763 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 06:54:43 +00:00
Evan Cheng
45f37bc527 Added truncate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24760 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 02:02:50 +00:00
Evan Cheng
1aabc4ea15 Added anyext, modelled as zext on X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24759 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 01:47:57 +00:00
Evan Cheng
8dee8cca3a Added some isel ideas. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24757 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 01:25:19 +00:00
Evan Cheng
aed7c721df Added support for cmp, test, and conditional move instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24756 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 01:24:02 +00:00
Evan Cheng
56323c761a Only lower SELECT when using DAG based isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24755 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 01:22:13 +00:00
Evan Cheng
7df96d6672 X86 lowers SELECT to a cmp / test followed by a conditional move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24754 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 01:21:05 +00:00
Chris Lattner
272f998f6f Don't globalize internal functions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24727 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-16 00:07:30 +00:00
Evan Cheng
cb17bac3a3 * Promote all 1 bit entities to 8 bit. 
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24726 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-15 19:49:23 +00:00
Evan Cheng
502c5bb428 Added frameindex, constpool, globaladdr, and externalsym as root nodes of 
leaaddr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24724 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-15 08:31:04 +00:00
Evan Cheng
def941b41f Handling zero extension of 1 bit value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24722 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-15 01:02:48 +00:00
Evan Cheng
f6036a3f1b Use MOV8rm to load 1 bit value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24721 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-15 00:59:17 +00:00
Evan Cheng
74164098ff Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24717 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-14 22:28:18 +00:00
Evan Cheng
7a7e8375a9 Added sext and zext patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24705 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-14 02:22:27 +00:00
Evan Cheng
85dd889ed6 Add load + store folding srl and sra patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24696 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 07:24:22 +00:00
Chris Lattner
d1239b7c69 Use the shared asmprinter code for printing special llvm globals 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24695 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 06:32:50 +00:00
Chris Lattner
a046e0d79f Add ELF and darwin support for static ctors and dtors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24693 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 04:53:51 +00:00
Evan Cheng
c937ffafba Beautify a few patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24690 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 02:40:18 +00:00
Evan Cheng
763b029b28 Some shl patterns which do load + store folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24689 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 02:34:51 +00:00
Evan Cheng
605c415046 A few helper fragments for loads. e.g. (i8 (load addr:$src)) -> (loadi8 addr:$src). Only to improve readibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24688 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 01:57:51 +00:00
Evan Cheng
0ef3a77bdf Add and, or, and xor patterns which fold load + stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24687 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 01:41:36 +00:00
Evan Cheng
6cad276c90 Add inc + dec patterns which fold load + stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24686 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 01:02:47 +00:00
Evan Cheng
5ce4edb967 Add neg and not patterns which fold load + stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24685 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:54:44 +00:00
Evan Cheng
5a38e0210d Missed a couple redundant explicit type casts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24684 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:25:07 +00:00
Evan Cheng
9b6b642647 Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24683 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:14:11 +00:00
Evan Cheng
b3558540b6 * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands. 
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24682 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-13 00:01:09 +00:00
Evan Cheng
f281e02cbd Add some integer mul patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24681 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 23:47:46 +00:00
Evan Cheng
d160d48a2b Add some sub patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24675 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 21:54:05 +00:00
Evan Cheng
e5280536a3 When SelectLEAAddr() fails, it shouldn't cause the side effect of having the 
base or index operands being selected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24674 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 21:49:40 +00:00
Evan Cheng
cbd6ed4d6b For ISD::RET, if # of operands >= 2, try selection the real data dep. operand 
first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 20:32:18 +00:00
Chris Lattner
a763969837 remove some never-completed and now-obsolete code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24671 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 20:12:20 +00:00
Evan Cheng
ee93f9db87 Add a few more add / store patterns. e.g. ADD32mi8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24670 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 19:45:23 +00:00
Evan Cheng
b51a059b2c * Added X86 store patterns. 
* Added X86 dec patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-10 00:48:20 +00:00
Evan Cheng
ab24ed2a32 Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24648 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-09 22:48:48 +00:00
Evan Cheng
670fd8f8dd Added explicit type field to ComplexPattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24637 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-08 02:15:07 +00:00
Evan Cheng
ec693f77c0 * Added intelligence to X86 LEA addressing mode matching routine so it returns 
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-08 02:01:35 +00:00
Chris Lattner
e80242a948 X86 doesn't support sextinreg for 8-bit things either. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-07 17:59:14 +00:00