Commit Graph

1401 Commits

Author SHA1 Message Date
Chris Lattner
ff97fbc527 Rename FInfo.cpp to FunctionInfo.cpp, eliminate FInfo.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6712 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-16 15:31:52 +00:00
Chris Lattner
fb4d20bad8 move contents of include/llvm/Reoptimizer/Mapping/FInfo.h into here, it is sparc internal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6711 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-16 15:31:09 +00:00
Chris Lattner
da92090f0e Fix typeo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6704 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-16 12:21:19 +00:00
Chris Lattner
02da6c0f08 Fix bug: CBackend/2003-06-11-HexConstant.ll
Fix bug: CBackend/2003-06-11-LiteralStringProblem.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6697 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-16 12:09:09 +00:00
Chris Lattner
84c9d5c3c0 Fix invalid number of arguments problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6692 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-16 12:03:00 +00:00
John Criswell
be583b914d Included assert.h so that the code compiles under newer versions of GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6682 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-11 14:01:36 +00:00
John Criswell
9aa2639370 Updated for the new projects Makefile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6678 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-11 13:49:11 +00:00
Guochun Shi
0e93687cca add some comments
add a function ModuloScheduling::dumpFinalSchedule() to print out final schedule


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6677 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-10 20:04:30 +00:00
Guochun Shi
e95b827db2 add an brief instruction what this pass is
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6676 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-10 20:03:39 +00:00
Guochun Shi
0b970dad72 a simple introduction to this pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6675 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-10 20:02:16 +00:00
Guochun Shi
f325261856 cleaned code
add some comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6674 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-10 19:09:00 +00:00
Guochun Shi
8f1d4ab409 delete useless functions
add comment


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6673 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-08 23:16:07 +00:00
Guochun Shi
33280524f4 change DEBUG to DEBUG_PRINT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6672 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-08 20:40:47 +00:00
Misha Brukman
6fe6905df2 Do not hastily change the Opcode from 'r' to 'i' type if we're not actually
SETTING the operand to be an immediate or have verified that one of the operands
is really a SignExtended or Unextended immediate value already, which warrants
an 'i' opcode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6662 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-07 02:34:43 +00:00
Chris Lattner
30d002bd66 Fix warnings on Sparc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6658 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 18:25:33 +00:00
Misha Brukman
8631ac4b76 Print address out as hex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6657 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 09:53:28 +00:00
Misha Brukman
f75bab7756 Added 'r' and 'i' versions to WRCCR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6656 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 09:52:58 +00:00
Misha Brukman
d36e30e623 * Changed Bcc instructions to behave like BPcc instructions
* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6655 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 09:52:23 +00:00
Misha Brukman
a51245036e * Removed PreSelection pass because that is now done in the JIT
* Removed instruction scheduling as it is too slow to run in a JIT environment
* Removed other passes because they aren't necessary and can slow JIT down


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6652 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 07:11:16 +00:00
Chris Lattner
940b08dd1e Don't output explicit initializers for globals that are zero initialized
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6651 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 07:10:24 +00:00
Misha Brukman
de07be3b78 Fixed a bunch of test cases in test/Regression/Jello which could not get the
address of a floating-point (allocated via ConstantPool) correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6647 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 04:41:22 +00:00
Chris Lattner
302de59001 Add statistic for # machine instrs emitted
Add GROSS HACK to get CompilationCallback to work when compiled in release mode


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6646 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 04:00:05 +00:00
Misha Brukman
3339459e48 * If a global is not a function, just ask the MachineCodeEmitter for the addr
* Do not block a print statement with a DEBUG() guard if we're going to abort()


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6645 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 03:35:37 +00:00
Misha Brukman
82c9e55913 The SUB*i instructions belong to a different class than their SUB*r brethren.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6644 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 03:34:47 +00:00
Misha Brukman
8f1222245e Put all debug print statements under the DEBUG() guard to make output clean so
that tests can automatically diff the output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6642 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 00:26:11 +00:00
Misha Brukman
6994dab12a Fixed confusion between register classes and register types.
Now %fcc registers are recognized correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6640 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:51:10 +00:00
Misha Brukman
432fba5572 Added missing directive to store the instruction name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6639 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:35:11 +00:00
Misha Brukman
ce50542179 Moved predict and annul fields to the end of each individual instruction
class, because they are currently unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6638 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:33:15 +00:00
Misha Brukman
d4ad1d10bc Do not preset the cc register, the instructions actually use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6637 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:30:27 +00:00
Vikram S. Adve
cf819454e4 Minor tuning -- avoid a non-inlinable function call on every operand.
Also, reorder a couple of functions for inlining.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6635 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 21:12:56 +00:00
Misha Brukman
f47d9c28d9 Added lazy function resolution to the JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6633 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 20:52:06 +00:00
Misha Brukman
e77d65a8ed * The textual output of (non-)predicted FP branches is the same.
* Stop mapping FBcc instructions to deprecated opcodes, map to FBPcc instead.
* Fixed opf in FCMPxy instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6632 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 20:51:37 +00:00
Chris Lattner
333864d81b Implement generation of cmp R, C to not use an extra register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6627 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 19:30:30 +00:00
Chris Lattner
35333e16ee Special case simple binary operator X op C
This avoid generating a register to hold C, which in turn speeds up the
  register allocator by a lot: ~9% on 164.gzip and ~17% on 256.bzip2.  This
  also speeds up other passes.  This also speeds up execution of the program
  marginally, and makes the asm much easier to read. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6626 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 18:28:55 +00:00
Chris Lattner
76594014f2 Add instructions for (add|sub|and|or|xor)ri(8|16|32)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6625 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 18:25:08 +00:00
Misha Brukman
406d9abc9e All store instructions really want 'rd' in the first field.
Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and
expect %fsr as the parameter in assembly. They are disabled (since not used)
until an encoding, both for code generation and output, is chosen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6619 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 01:06:10 +00:00
Misha Brukman
2e7e8fadf8 Added missing 'rs1' field to F3_rdrs1imm13, 'rd' to F3_rdrs1rs2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6618 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 00:39:45 +00:00
Brian Gaeke
aeab1e163f lib/CodeGen/Mapping/MappingInfo.cpp:
Update file comment to contain a bunch of the overview mapping-info
  documentation previously buried within the file.
 Remove some unnecessary include/using stmts.
 Rename pass to MappingInfoCollector.
 Rewrite a lot of it so it doesn't use global instance variables and so
  it outputs into MappingInfo objects and then dumps those out, instead of going
  straight to an assembly file.
 Change name of factory to getMappingInfoCollector.
 Fold prologue & epilogue writers into MappingInfo methods.

lib/Target/Sparc/FInfo.cpp:
 Correct file comment to reflect above change

lib/Target/Sparc/Sparc.cpp:
 Change name of factory to getMappingInfoCollector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6617 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 22:07:12 +00:00
Brian Gaeke
c86b8d5c46 Add file comment. Include <vector> and <string>. Update include guards
to reflect file's current location.  Add definition of class
MappingInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6616 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 22:02:47 +00:00
Chris Lattner
e5d4293cba Revert brians patch to get mapping info working again
sorry dude


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6615 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 21:01:12 +00:00
Tanya Lattner
758578e158 Had to comment out a line in outByte() to get it to compile because Out and tmp were
undeclared. I was not sure what Brian wanted, so I will let him fix this. But now it compiles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6614 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 20:53:46 +00:00
Misha Brukman
a2196c1aae * Instead of re-inventing the MachineConstantPool emitter that's already given
in Emitter.cpp, just convert the Sparc version of the constant pool into
  what's already supported and inter-operate.
* Implemented a first pass at lazy function resolution in the JITResolver. That
  required adding a SparcV9CodeEmitter pointer to simplify generating
  bit-patterns of the instructions.
* SparcV9CodeEmitter now creates and destroys static TheJITResolver, which makes
  sense because the SparcV9CodeEmitter is the only user of TheJITResolver, and
  lives for the entire duration of the JIT (via PassManager which lives in VM).
* Changed all return values in the JITResolver to uint64_t because of the 64-bit
  Sparc architecture.
* Added a new version of getting the value of a GlobalValue in the
  SparcV9CodeEmitter, which now works for already-generated functions (JITted or
  library functions).
* Removed little-used and unused functions, cleaning up the internal view of the
  SparcV9CodeEmitter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6612 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 20:01:13 +00:00
Brian Gaeke
e961d9614a Make writeNumber() void. Get ready to decouple it from .byte directive output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6609 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 18:17:22 +00:00
Misha Brukman
d15cd2752f I have finally seen the light. The code to change the opcode must live higher in
the loop, and in both cases. In the first case, it is a VReg that is a constant
so it may be actually converted to a constant. In the second case, it is already
a constant, but then if it doesn't change its type (e.g. to become a register
and have the value loaded from memory if it is too large to live in its
instruction field), we must change the opcode BEFORE the 'continue', otherwise
we miss the opportunity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6602 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 04:54:06 +00:00
Misha Brukman
d22807a43e Added the 4.7 instruction class and all the FMOVcc instructions in them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6601 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 04:48:31 +00:00
Misha Brukman
f5b1d3dcd4 Comment out opcodes currently unused in the Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6597 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 02:57:55 +00:00
Chris Lattner
94a5118672 No really, you _cannot use_ getelementptr on an unsized type: that makes
no sense.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6595 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 02:35:35 +00:00
Misha Brukman
9dc3ede509 Added instruction format class 3.15 and floating-point compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6594 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 02:26:14 +00:00
Vikram S. Adve
55a85a47d4 Undo one of those last fixes -- it was incorrect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6593 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 02:10:37 +00:00
Chris Lattner
2ab5e120d4 Avoid generating a getelementptr instruction of a function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6591 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 01:24:40 +00:00
Brian Gaeke
fc97c8b225 Make the write*map methods more self-contained. Document some more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6589 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 19:30:15 +00:00
Chris Lattner
8cc72d2968 Remove usage of typedef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6583 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 15:41:58 +00:00
Chris Lattner
ff3261ae86 Add namespace comments for doxygen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6581 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 15:31:23 +00:00
Brian Gaeke
e14ccafe25 I documented this file, in an attempt to understand it, with a view toward
rewriting it.  I also vacuumed out all the commented-out code and
inaccurate comments, etc.

(We need to put the mapping information in a data structure so that we can
pass it out to the JIT, instead of automagically converting it to .byte
directives.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6574 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 07:56:05 +00:00
Chris Lattner
946ef12273 Use the new -o tablegen option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6572 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 05:06:33 +00:00
Misha Brukman
e8e28dd7af Constants are laid out in memory in PC-relative form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6568 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 03:24:12 +00:00
Misha Brukman
e630b7f3e9 Added opcode conversion for conditional move of integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6567 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 03:23:35 +00:00
Misha Brukman
ea481ccc8f * Convert load/store opcodes from register to immediate forms.
* Stop code from wrapping to the next line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6566 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 03:21:58 +00:00
Misha Brukman
c559e0590b Convert load/store opcodes from register to immediate forms, if necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6565 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 03:20:57 +00:00
Misha Brukman
2ee9fa11a2 Store instructions are different from other Format 3.1/3.2 instructions in that
they prefer the destination register to be last. Thus, two new classes were made
for them that accomodate for having this layout of operands (F3_1rd, F3_2rd).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6564 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 03:20:14 +00:00
Misha Brukman
c740aae220 Moved code to modify the opcode from 'reg' to 'imm' form to a more logical place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6563 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 03:18:20 +00:00
Misha Brukman
534538921d * Added section A.34: Move FP register on int reg condition (FMOVr)
* Labeled sections that are not currently used in the Sparc backend as not
  requiring completion at this time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6562 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 01:16:27 +00:00
Misha Brukman
a76528ca6e * Removed unused classes (rd field is always mentioned last); fixed comments.
* Added instruction classes which start building from rs1, then rs2, and rd.
* Fixed order of operands in classes 4.1 and 4.2; added 4.6 .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6561 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 01:13:53 +00:00
Misha Brukman
13292a3347 * Removed unused classes: the rd field is always mentioned as the last reg.
* Added new classes which start building from rs1, adding rs2, and then rd.
* Fixed order of operands in classes 3.11, 3.12, 3.16, and 3.17 .
* Fixed comments to reflect Real Life (tm).
* Removed "don't care" commented out assignments and dead classes (#if 0).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6560 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 01:11:58 +00:00
Misha Brukman
3da0923868 The rd field goes after the immediate field in format 2.1 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6559 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 01:04:04 +00:00
Chris Lattner
9efc4d6aaa Remove usage of noncopyable classes to clean up doxygen output.
In particular these classes are the last that link the noncopyable classes
with the hash_map, vector, and list classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6552 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 22:45:07 +00:00
Chris Lattner
747a044550 Add #include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6550 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 22:05:13 +00:00
Misha Brukman
e085a9d279 Added MOVR (move int reg on register condition), aka comparison with zero.
None of these instructions are actually used in the Sparc backend, so no changes
were required in the instruction selector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6549 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 21:16:54 +00:00
Misha Brukman
eecdb661ec SparcInstr.def: added 'r' and 'i' versions of MOV(F)cc instructions
SparcInstrSelection.cpp:
* Fixed opcodes to return correct 'i' version since the two functions are each
  only used in one place.
* Changed name of function to have an 'i' in the name to signify that they each
  return an immediate form of the opcode.
* Added a warning if either of the functions is ever used in a context which
  requires a register-version opcode.

SparcV9_F4.td: fixed class F4_3, added F4_4 and notes that F4_{1,2} need fixing
SparcV9.td: added the MOV(F)cc instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6548 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 20:55:14 +00:00
Misha Brukman
26343a5642 * Added casts to/from floating-point to integers.
* Changed // comments to #ifdef 0 to maintain syntax highlighting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6546 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 19:08:37 +00:00
Guochun Shi
099b064a46 compiled with the new SchedGraphCommon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6545 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 17:48:56 +00:00
Misha Brukman
eaaf8ad3cc Clean up after merging in SparcEmitter.cpp; branches and return work again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6536 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 05:24:46 +00:00
Chris Lattner
4954f04914 Minor cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6535 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 05:21:06 +00:00
Misha Brukman
bc80b2249a Eliminated a compiler warning due to casting to a different-sized datatype.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6531 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 04:13:58 +00:00
Misha Brukman
f86aaa8eb7 Merged in tools/lli/JIT/SparcEmitter.cpp, coupled with the JITResolver taken
from lib/Target/X86/X86CodeEmitter.cpp .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6530 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 04:12:39 +00:00
Misha Brukman
cd60313915 Renamed MachineCodeEmitter.cpp -> X86CodeEmitter.cpp as it conflicts with the
target-independent lib/CodeGen/MachineCodeEmitter.cpp; preserved CVS history.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6528 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 03:28:00 +00:00
Chris Lattner
cf135cbc77 Fix bug: CBackend/2003-06-01-NullPointerType.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6526 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 03:10:53 +00:00
Brian Gaeke
c3eaa89933 Deal with %lo/%lm/%hm/%hh flags in getMachineOpValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6522 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-02 02:13:26 +00:00
Chris Lattner
04b0b309c4 Move X86 specific code out of the JIT into the X86 backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6516 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-01 23:23:50 +00:00
Brian Gaeke
76e3dc798b Make the .inc file depend on $(TBLGEN), so that changes to TableGen followed
by a re-link of TableGen will notify Make to rebuild the .inc file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6512 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-01 04:52:51 +00:00
Chris Lattner
20772547c5 * Implement cast (long|ulong) to bool
* Fix cast of (short|ushort|int|uint) to bool to work right


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6510 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-01 03:38:24 +00:00
Chris Lattner
6c8125fa56 Add RR forms of test instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6509 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-01 03:37:46 +00:00
Chris Lattner
d13bd22fbe Fix a bug with casts to bool. This fixes testcase UnitTests/2003-05-31-CastToBool.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6507 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-01 03:36:51 +00:00
Anand Shukla
55afc33882 Add map info for arguments to call (copies)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6503 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-01 02:48:23 +00:00
Chris Lattner
9171ef5e8d Add support for shl and shr for 64 bit integer types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6499 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-01 01:56:54 +00:00
Chris Lattner
3f7905bdec Add definitions for TEST instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6498 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-01 01:56:39 +00:00
Chris Lattner
8d8e0c6e83 Add new cmovne32 instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6496 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-01 00:05:15 +00:00
Vikram S. Adve
2263df029a Renamed a variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6472 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 07:43:41 +00:00
Vikram S. Adve
5cdb12f958 Minor changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6470 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 07:41:54 +00:00
Vikram S. Adve
f3d3ca18b5 Added MachineCodeForInstruction object as an argument to
TmpInstruction constructors because every TmpInstruction object has
to be registered with a MachineCodeForInstruction to prevent leaks.
This simplifies the user's code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6469 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 07:41:24 +00:00
Vikram S. Adve
7952d6088e Changes to allow explicit physical register arguments that have been
preallocated.  While reg-to-reg dependences were already handled, this
change required new code for adding edges to/from call instructions.
This was part of the extensive changes to the way code generation occurs
for function call arguments and return values.
See log for CodeGen/PhyRegAlloc.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6467 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 07:37:05 +00:00
Vikram S. Adve
9635867d6f Several bug fixes: globals in call operands were not being pulled out;
globals in some other places may not have been pulled out either;
globals in phi operands were being put just before the phi instead of
in the predecessor basic blocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6466 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 07:34:57 +00:00
Vikram S. Adve
d0d06ad4f3 Extensive changes to the way code generation occurs for function
call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6465 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 07:32:01 +00:00
Vikram S. Adve
af9fd51da2 Reverting previous beautification changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6464 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 07:27:17 +00:00
Misha Brukman
dcbe712841 Removed useless code -- the byte order of output code is correct as is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6462 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 06:26:06 +00:00
Misha Brukman
33cc12319c The 'rd' register is consistently mentioned last in instruction definitions.
Created new classes from which instructions inherit their ordering of fields.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6461 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 06:25:19 +00:00
Misha Brukman
286903909f * Put back into action SLL/SRL/SRA{r,i}6 instructions
* Fixed page numbers referring to the Sparc manual


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6460 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 06:24:29 +00:00
Misha Brukman
b3fabe0c83 Code beautification, no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6459 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 06:22:37 +00:00
Misha Brukman
b17343d81e Enabling some of these passes causes lli to break
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6457 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 04:23:04 +00:00
Misha Brukman
c89d256e95 The actual order of parameters in a 2-reg-immediate assembly instructions is
"rs1, imm, rd": most importantly, rd goes last.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6456 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-31 04:22:26 +00:00
Misha Brukman
88ba25444c When converting virtual registers to immediate constants, change the opcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6452 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 20:36:27 +00:00
Misha Brukman
a9f7f6e25d Added:
* ability to save BasicBlock references to be resolved later
* register remappings from the enum values to the real hardware numbers


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6449 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 20:17:33 +00:00
Misha Brukman
f3453d1695 Fixed the namespace to match SparcInternals.h; added notes on some missing
sections of instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6448 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 20:15:59 +00:00
Misha Brukman
d3d97be4d1 The register types need to be visible outside of the class to be useful.
For one, converting register numbers based on class in the code emitter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6447 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 20:12:42 +00:00
Misha Brukman
7b647942ef Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes.
Code beautification for the rest of the code: changed layout to match the rest
of the code base.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6446 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 20:11:56 +00:00
Misha Brukman
d1ef7a816e Make LLI behave just like LLC with regard to the compile passes it uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6444 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 20:00:13 +00:00
Misha Brukman
ed36fd8da6 Made the register and immediate versions of instructions consecutive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6439 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 19:14:01 +00:00
Misha Brukman
9b03633265 Because the format of the shift instructions is `shift r, shcnt, r', the
instructions of format 3.12 and 3.13 cannot inherit from F3rdrs1, because that
implies that the two registers are the first two parameters to the instruction.

Thus I made the instructions inherit from F3rd again, and manually added an rs1
field AFTER the shcnt field in the instruction, which maps to the appropriate
place in the instruction.

The other changes are just elimination of unnecessary spaces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6437 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 18:06:10 +00:00
Brian Gaeke
9604416192 Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well.
SparcV9_F3.td: F3_12 and F3_13 instructions have rd and rs1 fields. Also,
 their fields were totally screwed up. This seems to fix the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6429 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 08:02:14 +00:00
Guochun Shi
139f0c279d so far everything compiles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6423 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-30 00:17:09 +00:00
Misha Brukman
6cf7f6d43d Since there is now another derived .inc file, ignore them all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6411 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 20:15:27 +00:00
Misha Brukman
6567975ec5 Use an absolute path to TableGen because not everyone (e.g. automatic tester)
has their path set up by this point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6410 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 20:09:56 +00:00
Misha Brukman
01c1638123 Added the target-independent part of TableGen data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6403 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 18:48:17 +00:00
Chris Lattner
ab2b328c78 Eliminate unnecessary ->get calls that are now automatically handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6397 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 15:12:27 +00:00
Misha Brukman
3f7b58bca0 When TableGen finds an error in the SparcV9.td file, it exits with a non-zero
exit code. This, in turn, makes an empty file SparcV9CodeEmitter.inc, and only
much later, produces a link error because the key function that TableGen creates
isn't found.

Using a temporary file in the middle forces a good .INC file to be generated by
TableGen, and it will keep trying until you fix the input file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6392 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 05:29:22 +00:00
Misha Brukman
25f36306ff Fixed to use the correct format of the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6390 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 04:53:56 +00:00
Misha Brukman
983d1d3835 This should work better with re-generating the SparcV9CodeEmitter.inc file.
Also, added a rule to delete the generated .inc file on `make clean'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6389 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 03:32:49 +00:00
Misha Brukman
dafa504341 * Broke up SparcV9.td into separate files as it was getting unmanageable
* Added some Format 4 classes, but not instructions
* Added notes on missing sections with FIXMEs
* Added RDCCR instr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6388 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 03:31:43 +00:00
Misha Brukman
8996f44f7a Fixed ordering of elements in instructions: although the binary instructions
list (rd, rs1, imm), in that order (bit-wise), the actual assembly syntax is
instr rd, imm, rs1, and that is how they are constructed in the instruction
selector. This fixes the discrepancy.

Also fixed some comments along the same lines and fixed page numbers referring
to where instructions are described in the Sparc manual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6384 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-28 17:49:29 +00:00
Brian Gaeke
e57a529fca Add dependency to make TableGen rule fire.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6383 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-28 17:41:09 +00:00
Misha Brukman
f2ef76782d Fixed an error preventing compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6381 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:48:28 +00:00
Misha Brukman
3c4cf15f76 Added the 'r' and 'i' annotations to instructions as their opcode names have
changed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6380 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:44:44 +00:00
Misha Brukman
0d60345dcf Keep track of the current BasicBlock being processed so that a referencing
MachineInstr can later be patched up correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6378 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:41:44 +00:00
Misha Brukman
af6f38e424 Added 'r' and 'i' annotations to instructions as SparcInstr.def has changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6377 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:40:34 +00:00
Misha Brukman
b5b9adc5a0 Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
Non-obvious change: since I have changed ST and STD to be STF and STDF to
(a) closer resemble their name (NOT assembly text) in the Sparc manual, and
(b) clearly specify that they they are floating-point opcodes,
I made the same changes in this file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6376 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:39:01 +00:00
Misha Brukman
91aee47a1b Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
Here I had to make one non-trivial change: add a function to get a version of
the opcode that takes an immediate, given an opcode that takes all registers.

This is required because sometimes it is not known at construction time which
opcode is used because opcodes are passed around between functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6375 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:37:00 +00:00
Misha Brukman
71ed1c997b Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6373 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:35:43 +00:00
Misha Brukman
24b22a18ec Added entries for each of the instructions with annotations ('r' or 'i').
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6372 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:33:39 +00:00
Misha Brukman
6ddd9d87a7 One of the first major changes to make the work of JITting easier: adding
annotations on instructions to specify which format they are (i.e., do they take
2 registers and 1 immediate or just 3 registers) as that changes their binary
representation and hence, code emission.

This makes instructions more like how X86 defines them to be. Now, writers of
instruction selection must choose the correct opcode based on what instruction
type they are building, which they already know. Thus, the JIT doesn't have to
do the same work by `discovering' which operands an instruction really has.

As this involves lots of small changes to a lot of files in lib/target/Sparc,
I'll commit them individually because otherwise the diffs will be unreadable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6371 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:32:38 +00:00
Misha Brukman
86172ab3d6 * Allow passing in an unsigned configuration to allocateSparcTargetMachine()
a default value is set in the header file.
* Fixed some code layout to make it more consistent with the rest of codebase
* Added addPassesToJITCompile() with relevant passes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6369 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:24:48 +00:00
Misha Brukman
51aa21c702 Moved generation of the SparcV9CodeEmitter.inc file higher in the Makefile so
that Makefile.common would see it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6367 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:04:38 +00:00
Misha Brukman
79caf1fe26 Add prototypes to add passes to JIT compilation and code emission.
Also, added annotations to how instructions are modified (reg/imm operands).
Added prototype for adding register numbers to values pass for interfacing with
the target-independent register allocators in the JIT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6366 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 22:01:10 +00:00
Misha Brukman
0cc640e6c8 Broke out class definition from SparcV9CodeEmitter, and added ability to take a
MachineCodeEmitter to make a pass-through debugger -- output to memory and to
std::cerr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6363 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 21:45:05 +00:00
Misha Brukman
3de36f5309 SparcV9CodeEmitter.cpp is a part of the Sparc code emitter. The main function
that assembles instructions is generated via TableGen (and hence must be built
before building this directory, but that's already the case in the top-level
Makefile).

Also added is .cvsignore to ignore the generated file `SparcV9CodeEmitter.inc',
which is included by SparcV9CodeEmitter.cpp .


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6357 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 20:07:58 +00:00
Misha Brukman
998800cb87 Added definitions for a bunch of floating-point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6356 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 20:03:29 +00:00
Vikram S. Adve
a22eace55b Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags.  Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6342 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:06:48 +00:00
Vikram S. Adve
5f2180c533 (1) Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.

(2) Moved some machine-independent reg-class code to class TargetRegInfo
    from SparcReg{Class,}Info.

(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
    and related functions and flags.  Fixed several bugs where only
    "isDef" was being checked, not "isDefAndUse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:05:23 +00:00
Vikram S. Adve
49cab03c81 Renamed opIsDef to opIsDefOnly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6340 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:03:17 +00:00
Vikram S. Adve
78a4f23a8e Added special register class containing (for now) %fsr.
Fixed spilling of %fcc[0-3] which are part of %fsr.
Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6339 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-27 00:02:22 +00:00
Vikram S. Adve
645fea33be Bug fix: right shift for int divide-by-power-of-2 was incorrect for
negative values.  Need to add one to a negative value before right shift!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6334 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25 21:59:47 +00:00
Vikram S. Adve
9e49824d70 Bug fix: padding bytes within a structure should go after each field!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6333 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25 21:59:09 +00:00
Vikram S. Adve
c2f0939320 Bug fix: sign-extension was not happening for C = -MININT since C == -C!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6332 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25 21:58:11 +00:00
Vikram S. Adve
5b1b47b824 Add support for compiling varargs functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6325 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-25 15:59:47 +00:00
Misha Brukman
12745c55e1 Reword to remove reference to how things worked in the past.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6323 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-24 01:08:43 +00:00
Misha Brukman
e9d883828a Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6320 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-24 00:09:50 +00:00
Misha Brukman
f96eb64666 Cleaned up code layout; no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6312 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-23 19:20:57 +00:00
Misha Brukman
6b77ec4156 Cleaned up code layout. No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6304 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-22 21:49:18 +00:00
Misha Brukman
c2312df45c Kill `using' directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6301 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-22 21:24:35 +00:00
Misha Brukman
c97a2075d9 Fixed `volatile' typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6266 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21 19:34:28 +00:00
Misha Brukman
81b0686f09 Cleaned up code layout, spacing, etc. for readability purposes and to be more
consistent with the style of LLVM's code base (and itself! it's inconsistent in
some places.)

No functional changes were made.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6265 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-21 18:48:06 +00:00