Evan Cheng
29c57c34ef
Specify instruction encoding using range list to avoid endianess issues.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56276 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 07:16:21 +00:00
Dan Gohman
682d5a8834
Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw
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up some new ascii art to illustrate what it does. This change
currently has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56270 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 01:39:10 +00:00
Bill Wendling
7795932d41
Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"
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function with appropriate parameters. This allows us to support blocks on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56267 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17 00:30:57 +00:00
Bill Wendling
056292fd73
Reverting r56249. On further investigation, this functionality isn't needed.
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Apologies for the thrashing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 21:48:12 +00:00
Bill Wendling
9468a9b6be
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
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- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16 21:12:30 +00:00
Bruno Cardoso Lopes
b3d7299694
Fixed Bug 2751
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http://llvm.org/bugs/show_bug.cgi?id=2751
Abicall was enabled even when static code model was provided
in the command line.
The correct behavior is to disable abicall when static is
specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56228 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15 21:06:55 +00:00
Dan Gohman
014278e6a1
Remove isImm(), isReg(), and friends, in favor of
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isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 17:58:21 +00:00
Evan Cheng
2aa0e649bf
Fix random abort.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56184 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:55:59 +00:00
Dan Gohman
095cc29f32
Define CallSDNode, an SDNode subclass for use with ISD::CALL.
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Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:54:27 +00:00
Evan Cheng
e7de7e3574
Typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56182 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:44:01 +00:00
Evan Cheng
be3034c288
Rely on instruction format to determine so_reg operand for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56181 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:38:29 +00:00
Evan Cheng
05fc966401
Revert 56176. All those instruction formats are still needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56180 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:35:33 +00:00
Evan Cheng
55375a44f9
Accidentially flipped the condition.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56179 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:29:57 +00:00
Evan Cheng
42d5ee062a
Add debug dumps.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56178 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13 01:15:21 +00:00
Evan Cheng
a964b7dffe
Eliminate unnecessary instruction formats.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56176 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 23:15:39 +00:00
Evan Cheng
49a9f2958d
Addrmode 1 S bit can be dynamically set. Look for CPSR def.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56172 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 22:45:55 +00:00
Evan Cheng
5f1db7bf31
Rewrite address mode 1 code emission routines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56171 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 22:01:15 +00:00
Dan Gohman
f5aeb1a8e4
Rename ConstantSDNode::getValue to getZExtValue, for consistency
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with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12 16:56:44 +00:00
Jim Grosbach
e5d20f947a
udpate header comment: s/VP/VFP/
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56126 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 21:41:29 +00:00
Arnold Schwaighofer
1fdc40f062
When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56119 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 20:28:43 +00:00
Owen Anderson
ac34a00fe0
Fix a bug in ANY_EXTEND handling that was breaking 403.gcc on X86-64 in fast isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56117 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 19:44:55 +00:00
Dale Johannesen
d18a462bdd
The version of AtomicSDNode::AtomicSDNode used (only) for
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cmp-and-swap reversed the Cmp and Swap arguments; comments
make it clear this is unintentional. Unfortunately, the
x86 BE had a compensating reversal, which is removed here.
PPC is OK.
From inspection of the Alpha code I think it is OK, but
if somebody has that platform please check it out. I
cannot test on that platform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56091 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 03:12:59 +00:00
Owen Anderson
b63691350d
If ISD::ANY_EXTEND fails, try ISD::ZERO_EXTEND and ISD::SIGN_EXTEND before giving up. This fixes 445.gobmk on
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X86-64 in fast isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56088 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 02:41:37 +00:00
Dale Johannesen
209a4099f9
Succumb utterly to compatibility and implement
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__sync_fetch_and_nand as ANDC, even though that's
not what nand means.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56087 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11 02:15:03 +00:00
Dan Gohman
78efce6155
X86FastISel support for double->float and float->double casts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56070 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 21:02:08 +00:00
Dan Gohman
0586d91bb3
Add X86FastISel support for static allocas, and refences
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to static allocas. As part of this change, refactor the
address mode code for laods and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56066 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 20:11:02 +00:00
Evan Cheng
b188dd9c5b
Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56061 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 18:25:29 +00:00
Dale Johannesen
fb0e1323e2
Handle new intrinsics with vector arguments.
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Patch by Paul Redmond.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56059 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 17:31:40 +00:00
Duncan Sands
bf53c2952d
Fix name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56055 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 13:22:10 +00:00
Duncan Sands
3ed7d37cbf
Add trampoline support for the new FastCC calling
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convention (not related to recent Ada testsuite
failures).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56054 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 13:11:09 +00:00
Duncan Sands
06d77dd945
Turn off the new FastCC for the moment. It causes
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a slew of Ada testsuite failures on x86-32 linux.
Seems to be related to the use of float.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56053 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10 13:09:24 +00:00
Dale Johannesen
d2e51af035
Move the uglier parts of deciding not to emit a
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UsedDirective for some symbols in llvm.used into
Darwin-specific code. I've decided LessPrivateGlobal
is potentially a useful abstraction and left it in
the target-independent area, with improved comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56024 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 22:29:13 +00:00
Anton Korobeynikov
19e861a4ff
Make safer variant of alias resolution routine to be default
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56005 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 20:05:04 +00:00
Dan Gohman
e3b4c0e176
Mark IMPLICIT_DEF as being rematerializable and cheap-as-a-move.
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It's already special-cased and treated as rematerializable within
LiveIntervals; this allows it to be handled by other passes
such as TwoAddressInstrctionPass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55999 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 18:25:28 +00:00
Anton Korobeynikov
bff66b0c6c
Replace explicit pointer-size constants to TargetData query.
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55996 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 18:22:57 +00:00
Evan Cheng
59fbc80f6b
Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55975 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 01:26:59 +00:00
Dale Johannesen
b2dfb89e0e
Fix logic for not emitting no-dead-strip for some
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objects in llvm.used (thanks Anton). Makes visible
the magic 'l' prefix for symbols on Darwin which are
to be passed through the assembler, then removed at
linktime (previously all references to this had been
hidden in the ObjC FE code, oh well).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55973 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09 01:21:22 +00:00
Anton Korobeynikov
a177871c8a
Reapply 55901: Drop unused variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55957 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 21:13:33 +00:00
Anton Korobeynikov
c4da15a5e6
Reapply 55900: We do support EH on x86-64!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55956 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 21:13:08 +00:00
Anton Korobeynikov
b84c1676f1
Reapply 55899: First draft of EH support on x86/64-linux
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Now with fix, which prevents subtle codegen bug to trigger on darwin.
No fix for bug though, it's still there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55955 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 21:12:47 +00:00
Anton Korobeynikov
260a6b8f85
Reapply blindly reverted 55898: Implement FRAME_TO_ARGS_OFFSET for x86-64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55954 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 21:12:11 +00:00
Bill Wendling
1b0123c3cd
Reverting r55898 as well. This wasn't reverted in the original revert...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55938 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 19:42:32 +00:00
Bill Wendling
1ed49fb74b
Accidental commit of partial 'stack canaries' code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55937 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 18:12:00 +00:00
Bill Wendling
a425e0073d
Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin:
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/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55928 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 17:59:12 +00:00
Evan Cheng
debdea0a66
Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55925 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 17:15:42 +00:00
Dan Gohman
f91570c264
i128 and f80 are implemented for x86-64 now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55920 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 16:42:56 +00:00
Dan Gohman
863890e2fa
Fix copy+pastos in comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55918 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 16:31:35 +00:00
Dan Gohman
8106b0a995
Delete an unused variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55915 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 16:28:17 +00:00
Anton Korobeynikov
9bf41effc4
Drop unused variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55901 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 14:22:38 +00:00
Anton Korobeynikov
28b1deac2c
We do support EH on x86-64!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55900 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 14:22:16 +00:00
Anton Korobeynikov
302affbc53
First draft of EH support on x86/64-linux
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55899 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 14:21:53 +00:00
Anton Korobeynikov
559189e0ac
Implement FRAME_TO_ARGS_OFFSET for x86-64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55898 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 14:21:10 +00:00
Evan Cheng
24e3a90904
Add support to extend call operands when needed. Enable x86 fastisel call support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55891 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-08 06:35:17 +00:00
Evan Cheng
f3d4efe30c
Initial fastisel call support for C, Fast, and X86_FastCall calling conventions. It's meant to handle "simple" calls, i.e. no byval, structret, etc. It doesn't support multi-result returns either.
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Not yet turned on, it needs to support sext / zext of arguments and result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55882 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-07 09:09:33 +00:00
Evan Cheng
e9ac9e6b7d
Some code clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55881 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-07 09:07:23 +00:00
Evan Cheng
10a8d9c737
Handle x86 truncate to i8 with target hook for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55877 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-07 08:47:42 +00:00
Owen Anderson
3b217c6f5c
Fix constant pool loads, and remove broken versions of addConstantPoolReference.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55868 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-06 01:11:01 +00:00
Owen Anderson
99d6dca2f8
Fix the X86 addConstantPoolReference, which had the operands in the wrong order.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55867 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-06 00:50:00 +00:00
Eli Friedman
d0c0fae63b
Fix for PR2687: Add patterns to match sint_to_fp and fp_to_sint for <2 x
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i32>. This is a little messy, but it works.
We should really get rid of the intrinsics, though, since they map
perfectly well to standard LLVM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55864 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 23:07:03 +00:00
Dan Gohman
f58cb6d224
Fix X86FastISel's shift and select code to reject illegal types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55857 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 21:27:34 +00:00
Dan Gohman
31d26912cc
Fix the opcodes used by X86FastISel for shifts and conditional moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55855 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 21:13:04 +00:00
Evan Cheng
0de588fd89
Factor out code that emits load and store instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55854 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 21:00:03 +00:00
Owen Anderson
9c7216f984
Rename method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55853 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 20:49:33 +00:00
Dan Gohman
c39f4dba1c
X86FastISel support for shifts and conditional moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55844 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 18:30:08 +00:00
Evan Cheng
e2471a9169
If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55840 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 17:24:07 +00:00
Dan Gohman
4f22bb0676
Check a comparion's operand type for legality before
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expanding its operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55820 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 01:33:56 +00:00
Dan Gohman
f52550b50e
Fix X86FastISel code for comparisons and conditional branches
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to check the result of getRegForValue before using it, and
to check for illegal operand types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55819 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 01:15:35 +00:00
Dan Gohman
d89ae99ec8
X86FastISel support for conditional branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55816 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 01:06:14 +00:00
Owen Anderson
95267a1e67
Add initial support for selecting constant materializations that require constant
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pool loads on X86 in fast isel. This isn't actually used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55814 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-05 00:06:23 +00:00
Dan Gohman
6e3f05f5ce
X86FastISel support for ICmpInst and FCmpInst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55811 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 23:26:51 +00:00
Evan Cheng
4a03775777
For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55807 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 22:59:58 +00:00
Devang Patel
db10033d7c
If function notes say optimize for size, then adjust alignment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55794 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 21:03:41 +00:00
Dan Gohman
ae73dc1448
Tidy up several unbeseeming casts from pointer to intptr_t.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 17:05:41 +00:00
Owen Anderson
79924eb6f5
Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55777 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 16:48:33 +00:00
Dan Gohman
6448d91ad1
Clean up uses of TargetLowering::getTargetMachine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55769 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 15:39:15 +00:00
Owen Anderson
a3971dfbfe
Add a first attempt at implementing stores for X86 fast isel using target hooks.
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Dan or Evan, please review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55764 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 07:08:58 +00:00
Evan Cheng
373d50af1d
Load from GV stub should be locally CSE'd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55763 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 06:18:33 +00:00
Evan Cheng
c2feb5c262
Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55756 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 01:04:15 +00:00
Dale Johannesen
7794f2a3a7
Add intrinsics for log, log2, log10, exp, exp2.
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No functional change (and no FE change to generate them).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04 00:47:13 +00:00
Dan Gohman
3df24e667f
Create HandlePHINodesInSuccessorBlocksFast, a version of
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HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.
This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 23:12:08 +00:00
Evan Cheng
8b19e56051
Add X86 target hook to implement load (even from GlobalAddress).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55693 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 06:44:39 +00:00
Ted Kremenek
b388eb82fb
Fix capitalization in #include of FastISel.h. This unbreaks the build on case-sensitive filesystems.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 02:54:11 +00:00
Evan Cheng
88e3041ca6
Unbreak fast isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55685 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 01:04:47 +00:00
Evan Cheng
c3f44b0d63
Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55679 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-03 00:03:49 +00:00
Dale Johannesen
a619d012c1
Fix some bugs in the code sequences for atomics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55643 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 20:30:23 +00:00
Evan Cheng
95ce1178e4
Add Mac OS X compatible JIT callback routine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55625 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 07:49:03 +00:00
Evan Cheng
7602e11c32
Revamp ARM JIT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55624 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 06:52:38 +00:00
Evan Cheng
acff339e39
Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55623 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-02 06:51:36 +00:00
Evan Cheng
3aac788365
Control flow instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55601 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 08:25:56 +00:00
Evan Cheng
3c2ee4939b
ldm / stm instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55599 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:48:18 +00:00
Evan Cheng
5d2c1cf74d
AXI2 and AXI3 instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55598 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:34:13 +00:00
Evan Cheng
4bbd5f8a9c
Reorganize instruction formats again; AXI1 encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55597 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:19:00 +00:00
Evan Cheng
840917be2c
addrmode3 instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55596 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 07:00:14 +00:00
Evan Cheng
0d14fc8cd5
Reorganize some instruction format definitions. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55594 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 01:51:14 +00:00
Evan Cheng
93912739c9
Rest of addrmode2 instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55593 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01 01:27:33 +00:00
Evan Cheng
17222df0ec
Addr2 word / byte load encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55591 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 19:02:21 +00:00
Evan Cheng
b7880ac470
Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55590 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 18:32:16 +00:00
Gabor Greif
93c53e5583
fix a bunch of 80-col violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55588 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 15:37:04 +00:00
Bill Wendling
9440e35b98
Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR
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instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55582 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:59:23 +00:00
Bill Wendling
3156b62855
Expand for ROTR with MVT::i64.
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Dale, Could you please review this?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55581 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31 02:53:19 +00:00
Gabor Greif
92362680c1
fix some 80-col violations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55565 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 10:09:02 +00:00
Evan Cheng
b18ae3cb63
For now, can't mark XOR64rr isAsCheapAsAMove. It's technically correct. But various passes cannot handle remating these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 08:54:22 +00:00
Evan Cheng
eb9f89287e
Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 02:03:58 +00:00
Dale Johannesen
ea9eedb787
Add ppc partial-word ATOMIC_CMP_SWAP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55554 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30 00:08:53 +00:00
Evan Cheng
456704476f
Swap fp comparison operands and change predicate to allow load folding (safely this time).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:22:12 +00:00
Evan Cheng
97af60b3ae
Use static_cast instead of C style cast.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55552 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 23:21:31 +00:00
Evan Cheng
94a50da93c
Backing out 55521. Not safe.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55548 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 22:13:21 +00:00
Dale Johannesen
0e55f0678c
Add partial word version of ATOMIC_SWAP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55546 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 18:29:46 +00:00
Owen Anderson
667d8f7607
Add initial support for fast isel of instructions that have inputs pinned to physical registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55545 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 17:45:56 +00:00
Evan Cheng
ba705f62b1
TableGen'ing instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55533 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 07:42:03 +00:00
Evan Cheng
612b79edc9
addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 encode the opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55531 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 07:40:52 +00:00
Evan Cheng
3924f78a96
MVN is addrmode1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55530 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 07:36:24 +00:00
Evan Cheng
130966411f
More refactoring.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55528 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29 06:41:12 +00:00
Evan Cheng
4d46d0af58
Swap fp comparison operands and change predicate to allow load folding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55521 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:48:31 +00:00
Evan Cheng
37f25d989a
Refactor ARM instruction format definitions into a separate file. No functionality changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55518 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:39:26 +00:00
Dan Gohman
99b218218c
Add a target callback for FastISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55512 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:21:34 +00:00
Gabor Greif
327ef031ed
remove tabs, fix > 80 cols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55511 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 23:19:51 +00:00
Gabor Greif
ba36cb5242
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:40:38 +00:00
Mon P Wang
5ad0bf658a
In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55499 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 21:04:05 +00:00
Rafael Espindola
833a990c26
Use resize instead of reserve. Reserve doesn't change size().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55486 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 18:32:53 +00:00
Dale Johannesen
97efa36586
Implement partial-word binary atomics on ppc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55478 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 17:53:09 +00:00
Evan Cheng
66e13153bd
FsFLD0S{S|D} and V_SETALLONES are as cheap as moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55466 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 07:52:25 +00:00
Dale Johannesen
e00a8a2a2e
Split the ATOMIC NodeType's to include the size, e.g.
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ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.
This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad. This is the alternative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55457 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28 02:44:49 +00:00
Bill Wendling
1dd0086b06
Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the
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SSE2 registers as well as the MMX registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55436 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 21:32:04 +00:00
Dan Gohman
7deb17108f
Reinstate the x86-64 portion of r55190. When doing extloads into
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64-bit registers from 16-bit and smaller memory locations, prefer
instructions that define the entire 64-bit register, to avoid
partial-register updates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55422 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-27 17:33:15 +00:00
Gabor Greif
99a6cb92d1
disallow direct access to SDValue::ResNo, provide a getter instead
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 22:36:50 +00:00
Owen Anderson
a317767f0e
These assertions should be return false's instead, allowing the client to detect the failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55377 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 18:50:40 +00:00
Owen Anderson
940f83e772
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
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was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 18:03:31 +00:00
Chris Lattner
6ba50a9252
If an xmm register is referenced explicitly in an inline asm, make sure to
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assign it to a version of the xmm register with the regclass that matches its
type. This fixes PR2715, a bug handling some crazy xpcom case in mozilla.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55358 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 06:19:02 +00:00
Evan Cheng
b09c25ebf0
This is done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 01:13:44 +00:00
Dale Johannesen
bdab93a2ef
Implement 32 & 64 bit versions of PPC atomic
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binary primitives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55343 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 22:34:37 +00:00
Evan Cheng
bdf7b5da47
80 col. violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55341 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 21:58:43 +00:00
Evan Cheng
ab6c3bb44d
Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55338 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 21:27:18 +00:00
Dale Johannesen
140a8bb006
Remove PPC-specific lowering for atomics; the
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generic stuff works fine.
Mark rewritten cmp-and-swap as not using CR1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55336 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 21:09:52 +00:00
Dale Johannesen
65e3973dff
It's important for the cmp-and-swap to balance
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loads and stores but it's even more important for
it to store the right value.:(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55319 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 18:53:26 +00:00
Bill Wendling
cb3c51a4ae
Nevermind. This broke the bootstrap (?!).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55318 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 18:32:39 +00:00
Bill Wendling
51e05e7a99
MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of these
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instructions on having SSE2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55317 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 18:20:52 +00:00
Evan Cheng
e7321441ac
Fix asm printing of MOVSDto64mr and MOV64toSDrm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55300 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 04:11:42 +00:00
Bill Wendling
59b63e4a18
Temporarily reverting r55292. It's causing a bootstraping failure:
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/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55295 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-24 21:45:30 +00:00
Evan Cheng
32c727cd95
Move callseq_start above the call address load to allow load to be folded into the call node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55292 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-24 19:19:55 +00:00
Cedric Venet
d85f51abd4
Use additionnal include directory instead of ../ in #include.
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Suggested by aKor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55282 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-24 12:30:46 +00:00
Chris Lattner
944fac71e0
Switch the asmprinter (.ll) and all the stuff it requires over to
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use raw_ostream instead of std::ostream. Among other goodness,
this speeds up llvm-dis of kc++ with a release build from 0.85s
to 0.49s (88% faster).
Other interesting changes:
1) This makes Value::print be non-virtual.
2) AP[S]Int and ConstantRange can no longer print to ostream directly,
use raw_ostream instead.
3) This fixes a bug in raw_os_ostream where it didn't flush itself
when destroyed.
4) This adds a new SDNode::print method, instead of only allowing "dump".
A lot of APIs have both std::ostream and raw_ostream versions, it would
be useful to go through and systematically anihilate the std::ostream
versions.
This passes dejagnu, but there may be minor fallout, plz let me know if
so and I'll fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55263 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 22:23:09 +00:00
Anton Korobeynikov
017c260944
Provide a 64 bit variant of mmx.maskmovq intrinsic lowering.
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Is there way to avoid explicit target check?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55238 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 15:53:19 +00:00
Dan Gohman
f350b277f3
Move the point at which FastISel taps into the SelectionDAGISel
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process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.
Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.
To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 02:25:05 +00:00
Anton Korobeynikov
70f24c62ad
Make option variables static, so they won't cause nameclash
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55203 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 21:27:49 +00:00
Bill Wendling
449416deb6
Reverting r55190, r55191, and r55192. They broke the build with this error message:
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{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55200 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 20:51:05 +00:00
Dan Gohman
b4ae2da7e4
Anyext tweaks for x86. When extloading a value to i32 or i64, choose
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instructions that define the full 32 or 64-bit value. When anyexting
from i8 to i16 or i32, it's not necessary to zero out the high
portion of the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55190 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 19:19:31 +00:00
Dale Johannesen
f87d6c02f5
Implement __sync_synchronize on ppc32. Patch by Gary Benson.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55186 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 17:20:54 +00:00
Dale Johannesen
5f0cfa299d
Rewrite ppc code generated for __sync_{bool|val}_compare_and_swap
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so that lwarx and stwcx are always executed the same number of times.
This is important for performance, I'm told.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55163 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 03:49:10 +00:00
Dan Gohman
22bb31103d
Factor out the predicate check code from DAGISelEmitter.cpp
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and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 00:20:26 +00:00
Bill Wendling
ae0218c914
If part of the mask is "undef", then ignore it as we don't care what goes into it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55147 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 22:36:36 +00:00
Bill Wendling
e85dc49e13
Fix whitespace. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55146 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 22:35:37 +00:00
Evan Cheng
1887c1c2f9
Fix a number of byval / memcpy / memset related codegen issues.
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1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying.
2. Do not use byte repeat move and store operations. These are slow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 21:00:15 +00:00
Mon P Wang
7e66510a2e
Treat floating point ST1 the same as ST0 when lowering for a call result
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55135 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 19:54:16 +00:00
Dan Gohman
509e84fa71
Add libm-oriented ISD opcodes for rounding operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55130 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 17:55:02 +00:00
Anton Korobeynikov
62990bafa3
Allow inline asm nodes with empty bodies inside JIT.
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This unbreaks explicit reg vars inside JIT, which are
implemented in such hacky way :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 17:33:01 +00:00
Dan Gohman
ad3460c3c9
Simplify SelectRoot's interface, and factor out some common code
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from all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55124 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 16:36:34 +00:00
Bill Wendling
3b32a23a90
Clean up whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55117 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 08:38:54 +00:00
Chris Lattner
1f0f37a742
unbreak the CBE on treeadd an many others.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55112 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 05:51:43 +00:00
Owen Anderson
cb37188323
Use raw_ostream throughout the AsmPrinter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 00:14:44 +00:00
Dan Gohman
0bfa1bfbff
Move the handling of ANY_EXTEND, SIGN_EXTEND_INREG, and TRUNCATE
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out of X86ISelDAGToDAG.cpp C++ code and into tablegen code.
Among other things, using tablegen for these things makes them
friendlier to FastISel.
Tablegen can handle the case of i8 subregs on x86-32, but currently
the C++ code for that case uses MVT::Flag in a tricky way, and it
happens to schedule better in some cases. So for now, leave the
C++ code in place to handle the i8 case on x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55078 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 21:27:32 +00:00
Dan Gohman
bb466331e7
Simplify FastISel's constructor argument list, make the FastISel
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class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 21:05:57 +00:00
Dan Gohman
cb0fe7c226
Clean up a dead return missed in r55055.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55057 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 15:54:46 +00:00
Dan Gohman
67ca6be16a
Tablegen generated code already tests the opcode value, so it's not
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necessary to use dyn_cast in these predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55055 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 15:24:22 +00:00
Dan Gohman
d8ed2a7184
Use cast instead of dyn_cast.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55052 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 14:50:24 +00:00
Dan Gohman
1e684cf1ef
Fix comment spacing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55047 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 13:46:21 +00:00
Dale Johannesen
a99e38495f
Add remaining 64-bit atomic patterns for x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55029 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:48:50 +00:00
Bill Wendling
5bf1b4eacd
Revert r55018 and apply the correct "fix" for the 64-bit sub_and_fetch atomic.
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Just expand it like the other X-bit sub_and_fetches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55023 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:28:16 +00:00
Bill Wendling
108ecf3975
Add support for the __sync_sub_and_fetch atomics and friends for X86. The code
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was already present, but not hooked up to anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55018 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 23:09:18 +00:00
Dan Gohman
1adf1b03af
Instantiate FastISel for X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55011 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 21:45:35 +00:00
Dan Gohman
d9f3c480a7
The X86 target will soon have an implementation of createFastISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55010 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 21:32:53 +00:00
Dale Johannesen
140be2dfb7
Add support for 8 and 16 bit forms of __sync
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builtins on X86.
Change "lock" instructions to be on a separate line.
This is needed to work around a bug in the Darwin
assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54999 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 18:47:28 +00:00
Chris Lattner
23f35bc3ae
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54985 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 06:22:16 +00:00
Chris Lattner
fa7e17d379
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54964 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 00:41:02 +00:00
Chris Lattner
cd7ab05c37
remove empty file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54950 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-18 21:27:19 +00:00
Anton Korobeynikov
70053c340e
Unbreak cpp backend: upgrade output due to change in APInt API
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54942 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-18 20:03:45 +00:00
Evan Cheng
6aa3898730
ARM asm printer can't handle dwarf info yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54913 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-18 08:52:48 +00:00
Evan Cheng
0ac3fc2a61
Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54903 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 19:22:34 +00:00
Gordon Henriksen
8715367182
Don't require Registry specializations to define random static variables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54902 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 19:08:34 +00:00
Gordon Henriksen
5eca075b74
Rename some GC classes so that their roll will hopefully be clearer.
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In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:
Collector -> GCStrategy
CollectorMetadata -> GCFunctionInfo
CollectorModuleMetadata -> GCModuleInfo
CollectorRegistry -> GCRegistry
Function::getCollector -> getGC (setGC, hasGC, clearGC)
Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54899 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 18:44:35 +00:00
Cedric Venet
94fb5f2a70
Make it compile on VC2005:
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- update VC projects.
- Add an overload to llvm::Stream for <<, since std::hex and std::dec have type std::ios_base& (*)(std::ios_base&) in VC++. (templating the function don't work, due to ambiguities)
- add ../ on several include in X86/AsmPrinter/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54898 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 18:24:26 +00:00
Anton Korobeynikov
0bd89712c0
Move ARM to pluggable asmprinter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54889 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 13:55:10 +00:00
Anton Korobeynikov
676fa7df9c
Use correct name for PPC codegen library
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54888 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 13:54:44 +00:00
Anton Korobeynikov
06be997654
Factor out asmprinter out of ppc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54887 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 13:54:28 +00:00
Anton Korobeynikov
3c3bc48d33
Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54886 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 13:53:59 +00:00
Chris Lattner
fad86b003a
Rework the routines that convert AP[S]Int into a string. Now, instead of
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returning an std::string by value, it fills in a SmallString/SmallVector
passed in. This significantly reduces string thrashing in some cases.
More specifically, this:
- Adds an operator<< and a print method for APInt that allows you to
directly send them to an ostream.
- Reimplements APInt::toString to be much simpler and more efficient
algorithmically in addition to not thrashing strings quite as much.
This speeds up llvm-dis on kc++ by 7%, and may also slightly speed up the
asmprinter. This also fixes a bug I introduced into the asmwriter in a
previous patch w.r.t. alias printing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54873 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 07:19:36 +00:00
Anton Korobeynikov
afc20ae0e5
PPC/Linux normally uses named section for bss
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54847 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16 12:59:02 +00:00
Anton Korobeynikov
888839e5ed
Use proper strings section name for PPC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54846 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16 12:58:46 +00:00
Anton Korobeynikov
d97f29531c
Use correct name for TLS address resolution routine on x86-64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54845 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16 12:58:29 +00:00
Anton Korobeynikov
328da65bd1
Add interface for section override. Use this for Sparc, since it should use named BSS section.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54844 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16 12:58:12 +00:00
Anton Korobeynikov
ffe31d7bf1
Move SLEB/ULEB size calculation routines from AsmPrinter to TargetAsmInfo. This makes JIT asmprinter-free.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54843 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16 12:57:46 +00:00
Anton Korobeynikov
d0c1e29aec
Reduce heap trashing due to std::string construction / concatenation via caching of section flags string representations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54842 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16 12:57:07 +00:00
Dan Gohman
172f0fa16b
Build the X86GenFastISel.inc file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54806 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 23:18:11 +00:00
Dan Gohman
ef521f14b7
Also avoid pinsrw and pinsrb with a variable insertelement index.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54803 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 22:53:18 +00:00
Owen Anderson
44eb65cf58
Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 22:49:33 +00:00
Dan Gohman
c0573b13a1
Don't try to use the insertps instruction for vector
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element inserts with non-constant indices. This fixes
CodeGen/X86/vector-variable-idx.ll on machines that
have SSE4.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54801 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 22:43:26 +00:00
Owen Anderson
eaa009d963
Remove more uses of std::set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54787 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 21:01:00 +00:00
Dan Gohman
ea9587bf41
Oops, check in these files too, for the FastISel -> Fast rename.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54750 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-13 19:55:00 +00:00
Bruno Cardoso Lopes
739e441311
Removed SELECT_CC custom lowering. This is not needed anymore, the SELECT node
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is lowered properly and covers everything LowerSELECT_CC did.
Added method printUnsignedImm in AsmPrinter to print uimm16 operands. This
avoid the ugly instruction by instruction checking in printOperand.
Added a swap instruction present in the allegrex core.
Added two conditional instructions present in the allegrex core : MOVZ and MOVN.
They both allow a more efficient SELECT operation for integers.
Also added SELECT patterns to optimize MOVZ and MOVN usage.
The brcond and setcc patterns were cleaned: redundant and suboptimal patterns
were
removed. The suboptimals were replaced by more efficient ones.
Fixed some instructions that were using immZExt16 instead of immSExt16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54724 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-13 07:13:40 +00:00
Dale Johannesen
6f83be0c61
When resolving a stub in x86-64 JIT, use a PC-relative branch
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rather than the absolute address if the target is within range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54708 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-12 23:20:24 +00:00
Dale Johannesen
5f777192a0
Make x86-64 JIT changes Darwin-specific.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54700 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-12 21:02:08 +00:00
Jim Grosbach
1a6c683315
Whitespace cleanup. Test commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54695 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-12 18:34:45 +00:00
Dale Johannesen
ec867a22b3
In the absence of a linker to build the GOT, use the 32-bit
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non_lazy_ptr mechanism on x86-64 Darwin JIT. Fixes a bunch
of last night's failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-12 18:23:48 +00:00
Dale Johannesen
50dd1d0280
Some fixes for x86-64 JIT. Make it use small code
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model, except for external calls; this makes
addressing modes PC-relative. Incomplete.
The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54656 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-11 23:46:25 +00:00
Nate Begeman
1db3c92306
Implement ISD::TRAP support on PPC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54644 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-11 17:36:31 +00:00
Chris Lattner
26e150f361
move some more stuff out of my email into readme.txt
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54603 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-10 01:14:08 +00:00
Chris Lattner
c90b866797
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54602 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-10 00:47:21 +00:00
Dan Gohman
d9ced09299
Add an EXTRACTPSmr pattern to match the pattern that
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X86ISelLowering creates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54544 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:30:21 +00:00
Anton Korobeynikov
cbdf30af79
Properly print flags on Sparc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54543 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:26:10 +00:00
Anton Korobeynikov
16b7f5101b
Generalize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:25:52 +00:00
Anton Korobeynikov
25c6a087dd
Use mergeable strings sections on sparc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54541 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:25:29 +00:00
Anton Korobeynikov
f5b6a47bb5
Handle visibility printing with all generality. Remove bunch of duplicate code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54540 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:25:07 +00:00
Anton Korobeynikov
382f002272
Use chars, where possible
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:24:10 +00:00
Anton Korobeynikov
7396e59543
Convert PPC/Linux to new section printing stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54538 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:23:49 +00:00
Anton Korobeynikov
bc331a8d6f
Switch PPC/Darwin to new section handling stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54537 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:23:25 +00:00
Anton Korobeynikov
34da127be5
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54536 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:22:59 +00:00
Evan Cheng
42ccc21ce7
Undo most of r54519.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54534 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 17:56:50 +00:00
Evan Cheng
711b6dce24
It's not legal to output a GV in a coalesced section if it's used in an ARM PIC relative constantpool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54519 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 06:56:16 +00:00
Evan Cheng
15621a2569
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54518 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 06:43:59 +00:00
Bruno Cardoso Lopes
65ad452536
Support added for ctlz intrinsic, test case added.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54516 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 06:16:31 +00:00
Bruno Cardoso Lopes
f131fa26e6
Match raw "psp" triple target, as done by the homebrew toolchain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54514 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:49:42 +00:00
Bruno Cardoso Lopes
7da151cd5d
Added Mips support for DYNAMIC_STACKALLOC
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Fixed bug in adjustMipsStackFrame, which was breaking
while trying to access a dead stack object index. Also added
one more alignment before fixing the callee saved registers
stack offset adjustment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54485 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 19:08:11 +00:00
Anton Korobeynikov
6a35daed6f
Remove dead forward decl
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:55:25 +00:00
Anton Korobeynikov
feac94b18d
Print section flags ok on platforms, which use '@' as comment string. Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:55:06 +00:00
Anton Korobeynikov
1e27da3e6c
Add assertion for easy debugging of missing stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54459 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:54:40 +00:00
Anton Korobeynikov
0f3cc65738
Switch ARM to new section handling stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54458 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:54:23 +00:00
Anton Korobeynikov
79579c911f
Switch Alpha to new section handling stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54457 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:53:57 +00:00
Anton Korobeynikov
fcd99bb428
Use EmitAlignment consistently
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54456 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:53:38 +00:00
Anton Korobeynikov
2a166e9739
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54455 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:53:13 +00:00
Anton Korobeynikov
98a6dd0cf5
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54454 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:52:54 +00:00
Anton Korobeynikov
dc3ca2ec3c
Switch IA64 to new section-handling stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54453 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:52:35 +00:00
Anton Korobeynikov
003bcab8f3
Cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54452 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:52:13 +00:00
Anton Korobeynikov
4578862dcc
Provide convenient helpers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54451 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:51:54 +00:00
Anton Korobeynikov
5b794b98ce
Switch Sparc to new section handling stuff. Refactor printing of module-level GVs significantly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54450 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:51:25 +00:00
Anton Korobeynikov
84e160e265
Add hook for constant pool section selection for darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54449 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:51:02 +00:00
Anton Korobeynikov
93cacf131d
Select section for constant pool entries
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54448 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 09:50:34 +00:00
Dan Gohman
e3d920699c
Re-enable elimination of unnecessary SUBREG_TO_REG instructions in
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LowerSubregs, and fix an x86-64 isel bug that this exposed.
SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54444 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 02:54:50 +00:00
Dan Gohman
8a1510d192
Re-introduce the 8-bit subreg zext-inreg patterns for x86-32,
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this time using MOV32to32_ and MOV16to16_. Thanks to Evan for
suggesting this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54418 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-06 18:27:21 +00:00
Dan Gohman
165660e417
xchg does not modify FLAGS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54411 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-06 15:52:50 +00:00
Bruno Cardoso Lopes
bbe51362d5
Added support for fp callee saved registers.
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Added fp register clobbering during calls.
Added AsmPrinter support for "fmask", a bitmask that indicates where on the
stack the fp callee saved registers are.
Fixed the stack frame layout for Mips, now the callee saved regs
are in the right stack location (a little documentation about how this
stack frame must look like is present in MipsRegisterInfo.cpp).
This was done using the method MipsRegisterInfo::adjustMipsStackFrame
To be more clear, these are examples of what is solves :
1) FP and RA are also callee saved, and despite they aren't in CSI they
must be saved before the fp callee saved registers.
2) The ABI requires that local varibles are allocated before the callee
saved register area, the opposite behavior from the default allocation.
3) CPU and FPU saved register area must be aligned independent of each
other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54403 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-06 06:14:43 +00:00
Evan Cheng
e9d5035838
Fix PR2620: Fix X86cmppd selection code so it expects operands to be v2f64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54376 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 22:19:15 +00:00
Dan Gohman
8f613f30a7
Trim #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54350 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 15:32:23 +00:00
Owen Anderson
6ac8df7f61
This option doesn't need to be a target option. It can be in SDISel instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54336 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 00:27:28 +00:00
Owen Anderson
bd3ba461eb
- Fix SelectionDAG to generate correct CFGs.
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- Add a basic machine-level dead block eliminator.
These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54333 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 23:54:43 +00:00
Dan Gohman
d0859943ac
Add an assert to catch invalid VECTOR_SHUFFLE mask indices.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 23:09:15 +00:00
Bruno Cardoso Lopes
f7f3b50cd8
Mips ISelLowering cleanup : Removed old LowerCALL and FORMAL_ARGS helpers, they
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aren't used anyway, they also used to broke compiling when fastcc was specified for a
function, but not anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54316 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 07:12:52 +00:00
Bruno Cardoso Lopes
ea9d4d6ab0
Handle i32->f32 bitconvert results.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54315 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 06:44:31 +00:00
Andrew Lenharth
08ca62bb6f
Add atomic sub for other sizes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54314 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-03 20:17:34 +00:00
Chris Lattner
e594fd473e
Emit saveri with the correct operand order, patch by Richard Pennington!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54313 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-03 18:16:14 +00:00
Bruno Cardoso Lopes
64cf160fef
Fix PR2615
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54312 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-03 15:37:43 +00:00
Bruno Cardoso Lopes
91ef849e6c
Improved asm inline for hi,lo results
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Added hi,lo registers to be used,def implicitly. This provides better handle of
instructions which use hi/lo.
Fixes a small BranchAnalysis bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54274 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-02 19:42:36 +00:00
Bruno Cardoso Lopes
1906c5a63b
Apply the same pattern used in 'and' lowering for 'or'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54273 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-02 19:37:33 +00:00
Bruno Cardoso Lopes
7bd7182e21
Expand fcopysign
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54250 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-31 18:50:54 +00:00
Bruno Cardoso Lopes
772837778b
Handle more SELECT corner cases considering legalize types, probabily wont work with
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the default legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54249 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-31 18:31:28 +00:00
Dale Johannesen
7232464bda
Add a flag to disable jump table generation (all
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switches use the binary search algorithm) for
environments that don't support it. PPC64 JIT
is such an environment; turn the flag on for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54248 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-31 18:13:12 +00:00
Bruno Cardoso Lopes
7030ae7728
Added pattern for floating point zero immediate (avoiding a constant pool
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access).
Added pattern to match bitconvert node.
Fixed MTC1 asm string bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54229 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 19:00:31 +00:00
Dan Gohman
11ba3b1af6
Reapply r54147 with a constraint to only use the 8-bit
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subreg form on x86-64, to avoid the problem with x86-32
having GPRs that don't have 8-bit subregs.
Also, change several 16-bit instructions to use
equivalent 32-bit instructions. These have a smaller
encoding and avoid partial-register updates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54223 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 18:09:17 +00:00
Bruno Cardoso Lopes
4b877ca1c5
Fixed bug in global address lowering for functions and in Brcond lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54215 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 17:06:13 +00:00
Bruno Cardoso Lopes
ea7930e618
Removed small section flag for mips, the assembler doesnt support this flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54214 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 17:04:04 +00:00
Bruno Cardoso Lopes
d3a680dda5
Added new features to represent specific instructions groups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54213 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 17:01:06 +00:00
Bruno Cardoso Lopes
f7d66f7345
Instruction definition cleanup
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54212 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 16:58:59 +00:00
Bruno Cardoso Lopes
97843cdb0b
Changed some methods order.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54169 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-29 19:29:50 +00:00
Nate Begeman
24dc346a16
Fix broken CellSPU lowering, re-instate braces in Legalize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54168 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-29 19:07:27 +00:00
Bruno Cardoso Lopes
6d399bdea2
Added floating point lowering for select.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-29 19:05:28 +00:00
Dan Gohman
7ba145b0b4
Revert 54147.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54148 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-29 01:02:18 +00:00
Dan Gohman
b1e8cad61e
Add x86 isel patterns to match what would be a ZERO_EXTEND_INREG operation,
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which is represented in codegen as an 'and' operation. This matches them
with movz instructions, instead of leaving them to be matched by and
instructions with an immediate field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54147 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-28 22:18:25 +00:00
Bruno Cardoso Lopes
f33bc43c9a
Disable gp_rel relocation for constant pools access for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54142 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-28 19:26:25 +00:00
Duncan Sands
53388fcde6
Since build_vector is a variadic node, the number
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of operands should be -1 not 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54141 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-28 19:17:21 +00:00
Bruno Cardoso Lopes
85e31e3a53
Added floating point lowering for setcc and brcond.
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Fixed COMM asm directive usage.
ConstantPool using custom FourByteConstantSection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-28 19:11:24 +00:00
Bill Wendling
1a53eadbff
Remove <iostream> include.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54131 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27 23:18:30 +00:00
Dan Gohman
475871a144
Rename SDOperand to SDValue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27 21:46:04 +00:00
Dan Gohman
8968450305
Tidy SDNode::use_iterator, and complete the transition to have it
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parallel its analogue, Value::value_use_iterator. The operator* method
now returns the user, rather than the use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54127 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27 20:43:25 +00:00
Nate Begeman
fb8ead0c20
Disable mov{L, LP, HP, HLP, *DUP} shuffles for mmx
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mmx needs its own fancy shuffle logic based on unpack; for now we get correct but awful code.
Also commit Mon Ping's VSETCC patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54039 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 19:05:58 +00:00
Nate Begeman
beb572b698
Fit in 80 cols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54029 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 17:34:41 +00:00
Nate Begeman
5f6ae30de5
Remove dead PatLeaf; there are a number of issues around MMX movl that need to be fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 17:25:04 +00:00
Evan Cheng
d1b3da621b
Teach ARM isLegalAddressingMode to handle unknown type without crashing. This fixes pr2589.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54004 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 00:55:17 +00:00
Dan Gohman
9f8d5715b1
Avoid emitting casts in static initializer contexts. This fixes
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large numbers of CBE regressions caused by r53958.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53990 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-24 17:57:48 +00:00
Evan Cheng
982a05955a
Fix a catastrophic PPC64 ABI bug: i32 operands which are passed in memory (all of the parameter registers are used) are loaded from sp offsets that were off by 4.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53979 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-24 08:17:07 +00:00
Dan Gohman
1a24539405
Use C99 aggregate literal syntax for first-class struct and array values.
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This fixes several recent CBE regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53958 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-23 18:41:03 +00:00
Bruno Cardoso Lopes
92e87f2379
Minor fixes.
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Added ConstantPool support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53951 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-23 16:01:50 +00:00
Dan Gohman
fc74abfba5
Enable first-class aggregates support.
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Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
support for return instructions with multiple values. These are auto-upgraded
to use InsertValueInst instructions.
The IRBuilder still accepts multiple-value returns, and auto-upgrades them
to InsertValueInst instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53941 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-23 00:34:11 +00:00
Evan Cheng
5e6ebaf4d1
Fix PR2485: do all 4-element SSE shuffles in max. of 2 shuffle instructions.
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Based on patch by Nicolas Capens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53939 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-23 00:22:17 +00:00
Evan Cheng
ace3c17798
Factor out SSE 4 wide shuffle lowering code into its own function. No functionality changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53933 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 21:13:36 +00:00
Evan Cheng
52672b813e
Fix PR2574: implement v2f32 scalar_to_vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53927 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 18:39:19 +00:00
Anton Korobeynikov
04dda73926
Provide default implementation of different small-sections related stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53920 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 17:09:59 +00:00
Anton Korobeynikov
0980980174
Tie small stuff to non-small by default on ELF platforms
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53919 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 17:09:41 +00:00
Bruno Cardoso Lopes
c92a0e90b7
simplified small section logic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53912 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 16:24:21 +00:00
Anton Korobeynikov
f88a6faf93
Fix encoding of atomic compare and swap for i64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53911 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 16:22:48 +00:00
Bruno Cardoso Lopes
feb95cc7e3
Added small section asm emition logic for mips.
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Fixed small bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53908 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 15:34:27 +00:00
Bruno Cardoso Lopes
62d590cc8e
Basic support for small sections
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53907 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 15:26:53 +00:00
Bill Wendling
829487e7c9
Remove another tab.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53904 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 08:54:38 +00:00
Bill Wendling
bbf2e06f73
More tab removals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53903 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 08:50:44 +00:00
Dan Gohman
62bdec0de3
Fix a typo in a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53894 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-22 00:52:04 +00:00
Evan Cheng
a022bdfd99
Eliminate a compilation warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53873 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21 20:02:45 +00:00
Dan Gohman
462dc7f496
Add titles to the various SelectionDAG viewGraph calls
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that include useful information like the name of the
block being viewed and the current phase of compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21 20:00:07 +00:00
Bruno Cardoso Lopes
91fd532eb9
Added initial support for small sections on Mips.
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Added gp_rel relocations to support addressing small section contents.
Added command line to specify small section threshold in bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53869 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21 18:52:34 +00:00
Anton Korobeynikov
9685506c4f
Use better variable names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53859 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21 18:29:23 +00:00
Anton Korobeynikov
d493b043c4
Don't use larger alignment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53857 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21 18:25:17 +00:00
Duncan Sands
d038e04188
Add VerifyNode, a place to put sanity checks on
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generic SDNode's (nodes with their own constructors
should do sanity checking in the constructor). Add
sanity checks for BUILD_VECTOR and fix all the places
that were producing bogus BUILD_VECTORs, as found by
"make check". My favorite is the BUILD_VECTOR with
only two operands that was being used to build a
vector with four elements!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53850 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21 10:20:31 +00:00
Evan Cheng
41c0840583
Use movaps instead of movups to spill 16-byte vector values when default alignment is >= 16. This fixes some massive performance regressions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53844 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21 06:34:17 +00:00