marqs
0c55cc03bb
use LEDs for debug in latency tester mode
2020-02-09 21:35:50 +02:00
marqs
a076c6d2db
update quartus to 19.1
2020-02-09 21:28:24 +02:00
marqs
85c295c5e2
make pll_reconfig more robust
2019-10-12 22:56:10 +03:00
marqs
9feb96888b
fix PLL reference clock switchover logic
2019-10-09 23:58:55 +03:00
marqs
ba4614a4f8
correct even/odd field naming
2019-10-08 01:07:25 +03:00
marqs
b22365af20
add timeout to pll_reconfig and update postprocess pipeline diagram
2019-10-07 23:20:44 +03:00
marqs
3a12592c53
fix linebuf read address timing bottleneck
2019-10-07 01:25:33 +03:00
marqs
9d496383c3
optimize clock network
...
* replace all clock muxes with a single cycloneive_clkctrl to minimize skew
* use a single dynamically configured PLL to comply with cycloneive_clkctrl
2019-10-06 23:54:32 +03:00
marqs
d1fd30019f
osd_generator: add M9K support to allow larger character array
2019-10-05 11:33:59 +03:00
marqs
6266976114
first OSD implementation
2019-10-03 02:03:43 +03:00
marqs
aa43991534
add mask color option
2019-09-30 19:31:05 +03:00
marqs
5e0277fb48
add Panasonic hack for improving line count tolerance with line2x
2019-07-01 19:15:57 +03:00
marqs
9e81fb5922
Scanline updates and fixes
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* Enable overlay pattern customization
* Fix non-alternating mode with line4x interlace sources
* Add alternate interval option for pre-linedoubled sources
2019-03-23 00:09:46 +02:00
paulb-nl
f276cda190
Add support for GBI 360p
2018-10-13 17:33:10 +02:00
marqs
7914a2ee83
clean up and update README
2018-10-08 00:37:42 +03:00
marqs
4676cbd2f0
integrate zero-riscy
2018-10-06 13:19:12 +03:00
marqs
22e49300df
fix line2x reverse LPF trigger
2018-04-18 23:14:24 +03:00
marqs
70ab55c1fa
fix optimized mode mask & position offsets
2018-04-15 23:41:26 +03:00
marqs
37650ca22b
misc improvements
...
* add character LCD backlight timeout option
* increase h.mask range
* show accurate (fpga-calculated) timings on infoscreen
2018-03-28 20:09:40 +03:00
marqs
9ad696dbc3
optimize away one pp stage and unify code formatting
2018-03-12 01:25:23 +02:00
borti4938
6877faa0b6
remove _bb.v files
2018-03-10 19:26:40 +01:00
borti4938
852054cdd0
finer granulated steps for hybrid sl settings
2018-03-07 10:21:18 +01:00
borti4938
985aeb1a93
use explicite ramstyle for post-processing pipeline to keep registers in logic (as suggested in pull-request #21 comments)
2018-03-07 09:45:27 +01:00
borti4938
45ca4e9268
undo changes as suggested in pull-request #21 comments
2018-03-07 09:43:37 +01:00
borti4938
0828addc83
Merge branch 'release' of https://github.com/marqs85/ossc into upstream
2018-03-07 08:29:49 +01:00
marqs
0ab31b30b4
simplify timing constraints
2018-03-07 09:21:19 +02:00
borti4938
5922e64f55
registered outputs to HDMI-TX after final mux
2018-03-06 13:08:47 +01:00
borti4938
209130b167
misc updates:
...
- integrate mask and border generation more deeply into the post processing chain
- delay RLPF by one PP stage (reduce logic length after large mux)
- synthesise a registers after several adder logics
2018-03-06 13:08:20 +01:00
borti4938
d7ee965d89
add missing IP files
2018-03-06 09:36:38 +01:00
borti4938
670f515141
various post processing pipeline updates:
...
- increase number of pipeline stages for scanline generation
- alternative hybrid strength implementation
- add missing file declaration in qsf
2018-03-06 09:36:21 +01:00
borti4938
b10d7f3762
SL Multiplication:
...
- Hybrid value based on Y (Y calculated according to YCoCg appr.)
- Use 8bit input as p-factor
2018-03-06 09:34:12 +01:00
borti4938
ba8ad6ce4c
add missing IP files
2018-03-06 09:33:28 +01:00
borti4938
0b51fd7758
- resolve conflicts from merge
...
- use hybrid contrast for both sl generation methods: multiplication and linear
2018-03-06 09:32:02 +01:00
borti4938
1a405c1e2e
Merge branch 'scanline_contrast' of https://github.com/paulb-nl/ossc into upstream
...
# Conflicts:
# rtl/scanconverter.v
# software/sys_controller/ossc/av_controller.c
2018-03-06 09:30:22 +01:00
paulb-nl
990bc1563e
Add Scanline contrast
...
Reduce scanline strength for bright pixels
2018-02-24 21:56:18 +01:00
borti4938
500a22f316
small simplification on reverse lpf implementation
2018-02-22 13:45:19 +01:00
borti4938
5249d313d8
scanlines generation via multiplication
2018-02-22 08:11:26 +01:00
paulb-nl
a39888845a
Add 32 step grayramp to test pattern
2018-01-20 22:08:10 +01:00
marqs
dd4ffde231
update to Quartus 17.1
2017-12-07 21:35:08 +02:00
marqs
a24d6b0e3a
Update latency tester
...
* Enable operation with all sources
* Measure strobe length on low-persistence displays
2017-10-28 12:10:54 +03:00
marqs
1bf279b2a7
Initial latency tester implementation
2017-10-22 22:45:29 +03:00
marqs
817012e23e
Fix Line2x RLPF trigger position
2017-10-22 22:32:13 +03:00
marqs
4b21a354b4
Fix and optimize reverse lpf activation
2017-10-12 02:31:19 +03:00
paulb-nl
ac16008076
Add reverse LPF feature
...
reverse LPF can be used to mostly reverse the blur on pre 1-CHIP SNES.
For best results use 256x240 optimized mode.
2017-09-27 22:43:26 +02:00
marqs
9d14cc776e
Misc small fixes and improvements
...
* Disable 480p scanlines in auto mode
* Remove inoperable 3x/4x processing modes from 1080i list
* Add 640x512 mode to 480p group and limit 480p sampler option to 525-line modes
* Fix occasional pixel repetion issue after HDMI<->DVI TX switch
* Add "Allow upsample2x" option
* Add comments to some unclear sections
2017-08-10 00:06:35 +03:00
marqs
2aee3294e3
Fix HDTV mode parameters
2017-05-30 21:16:03 +03:00
marqs
2577470abe
Clean up TX setup code and add compatibility options
2017-05-29 20:43:24 +03:00
marqs
d98c23c8c1
Update project files to Quartus 17.0.
2017-05-29 19:15:34 +03:00
marqs
4f36278cb7
Sync processing rewritten and some issues fixed
...
* add 480i/576i line3x/4x
* clean up RTL and SDC
* update AVI infoframe properly
* add HDMI IT content option
2017-05-18 23:36:37 +03:00
marqs
01b5fe20ee
Sync and masking improvements
...
* detect VSM=1 properly
* increase mask brightness
* add L2 optimized modes
* fix internal vsync alignment
2017-05-18 23:36:37 +03:00
