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1517 Commits

Author SHA1 Message Date
Chris Lattner
bee9836c0f Vector function results go into V2 according to GCC. The darwin ABI doc 
doesn't say where they go :-/


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27579 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 01:38:39 +00:00
Chris Lattner
06c24350a9 Move some return-handling code from lowerarguments to the ISD::RET handling stuff. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27577 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 01:21:43 +00:00
Chris Lattner
a1d95e16df properly mark vector selects as expanded to select_cc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27544 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 22:59:15 +00:00
Chris Lattner
710ff32983 Add VRRC select support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27543 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 22:45:08 +00:00
Nate Begeman
957e1674e7 Disable switch lowering for targets based on the selection dag isel, 
letting the code generator handle them directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27539 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 19:46:55 +00:00
Chris Lattner
79d9a88165 Implement PowerPC/CodeGen/vec_splat.ll:spltish to use vsplish instead of a 
constant pool load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27538 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 07:14:26 +00:00
Chris Lattner
140a58f9df Change the interface to the predicate that determines if vsplti* can be used. 
No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27536 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 06:46:53 +00:00
Jim Laskey
6b92b8e50d Make sure that debug labels are defined within the same section and after the 
entry point of a function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27494 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 20:44:42 +00:00
Jim Laskey
4188699f80 Foundation for call frame information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27491 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-07 16:34:46 +00:00
Chris Lattner
1c80103016 Add an item 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27470 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:16:19 +00:00
Chris Lattner
90217999bd Make sure to return the result in the right type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27469 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:12:19 +00:00
Chris Lattner
f24380e78e Match vpku[hw]um(x,x). 
Convert vsldoi(x,x) to work the same way other (x,x) cases work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27467 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 22:28:36 +00:00
Chris Lattner
caad163496 Add support for matching vmrg(x,x) patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27463 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 22:02:42 +00:00
Chris Lattner
116cc48e30 Pattern match vmrg* instructions, which are now lowered by the CFE into shuffles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27457 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 21:11:54 +00:00
Chris Lattner
58d665c182 remove two done items 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27453 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 19:19:38 +00:00
Chris Lattner
d0608e191f Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to 
lower it and LLVM to have one fewer intrinsic.  This implements
CodeGen/PowerPC/vec_shuffle.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27450 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 18:26:28 +00:00
Chris Lattner
ddb739e5ea Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of into 
vperm with a perm mask lvx'd from the constant pool.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27448 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 17:23:16 +00:00
Chris Lattner
d8242b49b2 Add all of the data stream intrinsics and instructions. woo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27442 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 22:27:14 +00:00
Chris Lattner
99bdc654e5 Fix a typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27440 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 20:15:25 +00:00
Chris Lattner
9b42bdd7bc Fix CodeGen/PowerPC/2006-04-05-splat-ish.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27439 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 17:39:25 +00:00
Evan Cheng
278158b487 Fallthrough to expand if a VECTOR_SHUFFLE cannot be custom lowered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27433 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 06:09:26 +00:00
Chris Lattner
3827f712da add vsl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27425 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 01:16:22 +00:00
Chris Lattner
0d2cf6b1d1 add vmladduhm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27423 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 00:49:48 +00:00
Chris Lattner
4d9100ddc9 Add m[tf]vscr instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27421 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 00:03:57 +00:00
Chris Lattner
8b4684247a add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27419 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 23:45:11 +00:00
Chris Lattner
72e241cff7 Add missing byte merges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27418 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 23:43:56 +00:00
Chris Lattner
a046d4ac11 Add FP -> Int Conversions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27417 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 23:25:02 +00:00
Chris Lattner
3f0b7ff39f add average intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27416 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 23:14:00 +00:00
Chris Lattner
298b684229 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27414 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 22:43:55 +00:00
Chris Lattner
098e699f21 Fix some broken logic that would cause us to codegen {2147483647,2147483647,2147483647,2147483647} as 'vspltisb v0, -1'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 22:28:35 +00:00
Chris Lattner
7ff7e67458 Ask legalize to promote all vector shuffles to be v16i8 instead of having to 
handle all 4 PPC vector types.   This simplifies the matching code and allows
us to eliminate a bunch of patterns.  This also adds cases we were missing,
such as CodeGen/PowerPC/vec_splat.ll:splat_h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27400 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 17:25:31 +00:00
Chris Lattner
684ad7702f Plug in the byte and short splats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27387 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 00:05:13 +00:00
Chris Lattner
b68314480d Revert accidentally committed hunks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27386 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 23:58:04 +00:00
Chris Lattner
01cae0799d Make sure to mark unsupported SCALAR_TO_VECTOR operations as expand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27385 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 23:55:43 +00:00
Chris Lattner
4f91a4c497 Force use of a frame-pointer if there is anything on the stack that is aligned 
more than the OS keeps the stack aligned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27381 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 22:03:29 +00:00
Chris Lattner
c461a51234 Add the full set of min/max instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27372 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 15:58:28 +00:00
Chris Lattner
220d2b89d6 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27360 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 07:20:00 +00:00
Chris Lattner
bbe77de450 Inform the dag combiner that the predicate compares only return a low bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27359 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 06:26:07 +00:00
Chris Lattner
02b72556d7 Remove done item 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 05:28:54 +00:00
Chris Lattner
c55bfd0265 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27348 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:59:11 +00:00
Chris Lattner
541f91b17c Custom lower all BUILD_VECTOR's so that we can compile vec_splat_u8(8) into 
"vspltisb v0, 8" instead of a constant pool load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27335 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 00:43:36 +00:00
Chris Lattner
c3837d4917 Implement vnot using VNOR instead of using 'vspltisb v0, -1' and vxor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27331 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-01 22:41:47 +00:00
Chris Lattner
348ba3f9bf Shrinkify some more intrinsic definitions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27322 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:41:56 +00:00
Chris Lattner
6cea814f2c Pull operand asm string into base class, shrinkifying intrinsic definitions. 
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:34:05 +00:00
Chris Lattner
b5c4d17a6c Fix 80 column violations :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27315 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:57:36 +00:00
Chris Lattner
7376a5e129 fix a pasto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 21:19:06 +00:00
Chris Lattner
a9cb441642 Add vperm support for all datatypes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27307 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 20:00:35 +00:00
Chris Lattner
e3fea5a1c1 Rearrange code a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27306 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:52:36 +00:00
Chris Lattner
32a988a095 Add, sub and shuffle are legal for all vector types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:48:58 +00:00
Chris Lattner
9f7e127133 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27302 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 19:00:22 +00:00
Chris Lattner
33497cc992 note to self: *save* file, then check it in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27291 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 06:04:53 +00:00
Chris Lattner
4468c22458 Implement an item from the readme, folding vcmp/vcmp. instructions with 
identical instructions into a single instruction.  For example, for:

void test(vector float *x, vector float *y, int *P) {
  int v = vec_any_out(*x, *y);
  *x = (vector float)vec_cmpb(*x, *y);
  *P = v;
}

we now generate:

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v0, v1, v0
        mfcr r4, 2
        stvx v0, 0, r3
        rlwinm r3, r4, 27, 31, 31
        xori r3, r3, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

instead of:

_test:
        mfspr r2, 256
        oris r6, r2, 57344
        mtspr 256, r6
        lvx v0, 0, r4
        lvx v1, 0, r3
        vcmpbfp. v2, v1, v0
        mfcr r4, 2
***     vcmpbfp v0, v1, v0
        rlwinm r4, r4, 27, 31, 31
        stvx v0, 0, r3
        xori r3, r4, 1
        stw r3, 0(r5)
        mtspr 256, r2
        blr

Testcase here: CodeGen/PowerPC/vcmp-fold.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27290 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 06:02:07 +00:00
Chris Lattner
9492151e32 compactify some more instruction definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27288 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 05:38:32 +00:00
Chris Lattner
5f7b01963f Compactify comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27287 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 05:32:57 +00:00
Chris Lattner
a17b1557ad Lower vector compares to VCMP nodes, just like we lower vector comparison 
predicates to VCMPo nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27285 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 05:13:27 +00:00
Chris Lattner
8f5d316ff2 These are done 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27284 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 04:53:21 +00:00
Chris Lattner
36f4b0da9d Mark INSERT_VECTOR_ELT as expand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27276 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:48:55 +00:00
Chris Lattner
8768bf6ee3 Add the rest of the vmul instructions and the vmulsum* instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27268 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 23:39:06 +00:00
Chris Lattner
3c4f4e9f1b Use a new tblgen feature to significantly shrinkify instruction definitions that 
directly correspond to intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27266 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 23:21:27 +00:00
Chris Lattner
30a6abaef0 Add a bunch of new instructions for intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27265 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-30 23:07:36 +00:00
Chris Lattner
f3a627262c add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27243 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 00:24:13 +00:00
Chris Lattner
d732a2915b add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27227 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 18:56:23 +00:00
Jim Laskey
a99791886d Expose base register for DwarfWriter. Refactor code accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 13:48:33 +00:00
Nate Begeman
816cee2216 Fix a couple typos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27216 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 04:18:18 +00:00
Nate Begeman
98e70cc124 Add a few more altivec intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27215 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 04:15:58 +00:00
Chris Lattner
ecc219b8d4 implement a bunch more intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27209 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 02:29:37 +00:00
Chris Lattner
7f20b13518 Use normal lvx for scalar_to_vector instead of lve*x. They do the exact 
same thing and we have a dag node for the former.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27205 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 01:43:22 +00:00
Chris Lattner
48b61a729d Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 00:40:33 +00:00
Jim Laskey
414e682bac Translate llvm target registers to dwarf register numbers properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 20:18:45 +00:00
Chris Lattner
3ee9ffb0e5 Add a bunch of notes from my journey thus far. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27170 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:41:00 +00:00
Chris Lattner
b86bd2cee2 Split out altivec notes into their own README 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27168 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:04:16 +00:00
Chris Lattner
fb143ce459 Fix the JIT encoding of VSEL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27160 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 03:34:17 +00:00
Chris Lattner
eeaf72af39 Fix the JIT encoding of VSPLTI* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27159 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 03:28:57 +00:00
Nate Begeman
f15485a8d0 SelectionDAGISel can now natively handle Switch instructions, in the same 
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 01:32:24 +00:00
Chris Lattner
bd6be6f52d add vsel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27153 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 22:38:43 +00:00
Chris Lattner
6d92caddc4 Codegen vector predicate compares. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27151 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 10:06:40 +00:00
Evan Cheng
5b6a01b59c Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27149 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 09:52:32 +00:00
Chris Lattner
b8a45c2798 Add all of the altivec comparison instructions. Add patterns for the 
non-predicate altivec compare intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27143 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 04:57:17 +00:00
Chris Lattner
5d72907e00 Add and 8/16-bit adds, add all integer subtracts, add saturating subtract 
intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27142 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 02:39:02 +00:00
Chris Lattner
e7d959c069 implement the vsldoi intrinsic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27139 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 00:41:48 +00:00
Chris Lattner
af9136bc0c fix the pattern for vandc, it's NOT vnand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 23:10:40 +00:00
Chris Lattner
6509ae859a add patterns for VANDC/VNOR, implementing 
CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27135 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 23:05:29 +00:00
Chris Lattner
2430a5f0c7 Add some logical operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27127 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 22:16:05 +00:00
Chris Lattner
984f38bf4f implement a bunch of intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27118 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 08:01:02 +00:00
Chris Lattner
b22a04d881 Move all Altivec stuff out into a new PPCInstrAltivec.td file. 
Add a bunch of patterns for different datatypes, e.g. bit_convert, undef and
zero vector support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:51:43 +00:00
Chris Lattner
8d052bc711 Add some basic patterns for other datatypes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27116 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:39:07 +00:00
Chris Lattner
150ffa7842 add all supported formats to the vector register file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27115 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:36:56 +00:00
Chris Lattner
5a2025465b Add support for __builtin_altivec_vnmsubfp /vmaddfp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27112 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:05:55 +00:00
Chris Lattner
420736dc85 #include Intrinsics.h into all dag isels 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:47:10 +00:00
Chris Lattner
9c61dcf1aa Codegen things like: 
<int -1, int -1, int -1, int -1>
and
 <int 65537, int 65537, int 65537, int 65537>

Using things like:
  vspltisb v0, -1
and:
  vspltish v0, 1

instead of using constant pool loads.

This implements CodeGen/PowerPC/vec_splat.ll:splat_imm_i{32|16}.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27106 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:12:06 +00:00
Jim Laskey
47622e3721 Add dwarf register numbering to register data. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27081 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:15:58 +00:00
Chris Lattner
057f09bc0b add another note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27077 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 20:04:27 +00:00
Chris Lattner
8edd11f33d Fix a bad JIT encoding of VPERM. Why is VPERM D,A,B,C but vfmadd is D,A,C,B ?? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27069 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:24:43 +00:00
Chris Lattner
54e869e18c Like the comment says, prefer to use the implicit add done by [r+r] addressing 
modes than emitting an explicit add and using a base of r0.  This implements
Regression/CodeGen/PowerPC/mem-rr-addr-mode.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27068 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 17:58:06 +00:00
Chris Lattner
7fbcef7102 Disable the i32->float G5 optimization. It is unsafe, as documented in the 
comment.

This fixes 177.mesa, and McCat/09-vor with the td scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27060 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 07:53:47 +00:00
Chris Lattner
64b3a08bc6 add support for using vxor to build zero vectors. This implements 
Regression/CodeGen/PowerPC/vec_zero.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27059 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 07:48:08 +00:00
Chris Lattner
9d5da1d96c Gabor points out that we can't spell. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27049 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 07:12:19 +00:00
Chris Lattner
716aefcd91 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27000 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 21:28:44 +00:00
Chris Lattner
dc6af72781 Add PPC vector bit-convert support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26995 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 19:54:27 +00:00
Jim Laskey
f1d78e8335 Add support to locate local variables in frames (early version.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26994 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 18:12:57 +00:00
Jim Laskey
99db0442f0 Change interface to DwarfWriter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26991 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 18:09:44 +00:00
Chris Lattner
bc641b9d8b Eliminate IntrinsicLowering from TargetMachine. 
Make the CBE and V9 backends create their own, since they're the only ones that use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26974 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 05:43:16 +00:00
Chris Lattner
9d86a9dff2 This has been implemented. Tweak it into another note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26944 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 05:33:23 +00:00
Chris Lattner
ecfe55e65b When possible, custom lower 32-bit SINT_TO_FP to this: 
_foo2:
        extsw r2, r3
        std r2, -8(r1)
        lfd f0, -8(r1)
        fcfid f0, f0
        frsp f1, f0
        blr

instead of this:

_foo2:
        lis r2, ha16(LCPI2_0)
        lis r4, 17200
        xoris r3, r3, 32768
        stw r3, -4(r1)
        stw r4, -8(r1)
        lfs f0, lo16(LCPI2_0)(r2)
        lfd f1, -8(r1)
        fsub f0, f1, f0
        frsp f1, f0
        blr

This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s
with llcbeta (16.7% and 38.1% respectively).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26943 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 05:30:33 +00:00
Chris Lattner
e5ba580ab0 Add support for "ri" addressing modes where the immediate is a 14-bit field 
which is shifted left two bits before use.  Instructions like STD use this
addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26942 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 05:26:03 +00:00
Chris Lattner
eb8b09f69f Fix the JIT encoding of the VAForm_1 instructions, including vmaddfp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26935 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 01:44:36 +00:00
Chris Lattner
9b3bd467d0 These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26930 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 20:51:05 +00:00
Chris Lattner
f3ce43210a Don't emit pseudo instructions! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26926 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 20:19:37 +00:00
Nate Begeman
c0a8b6df2a Update readme 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26924 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 18:58:20 +00:00
Chris Lattner
13feb58aa1 Print absolute memory references like this: 
lwz r2, 8(0)
instead of this:
       lwz r2, 8(r0)

This fixes the llc/llc-beta failures on PPC last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26922 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 17:21:13 +00:00
Chris Lattner
8151914321 With Evan's latest tblgen patch, this code is obsolete, thanks Evan! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26917 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 06:37:40 +00:00
Chris Lattner
8593f9891d When codegen'ing vector MUL using VFMADD, *add* the 0, don't *mul* the 0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26913 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 00:51:38 +00:00
Chris Lattner
ef040dd4a3 minor note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26912 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 00:47:09 +00:00
Chris Lattner
d97964457e Handle constant addresses more efficiently, folding the low bits into the 
disp field of the load/store if possible.  This compiles
CodeGen/PowerPC/load-constant-addr.ll to:

_test:
        lis r2, 2838
        lfs f1, 26848(r2)
        blr

instead of:

_test:
        lis r2, 2838
        ori r2, r2, 26848
        lfs f1, 0(r2)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26908 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 22:38:22 +00:00
Chris Lattner
23baa1b310 remove dead variable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26907 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 22:37:23 +00:00
Chris Lattner
bd83afd3cd Fix a couple of bugs in permute/splat generate, thanks to Nate for actually 
figuring these out! :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26904 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 18:26:51 +00:00
Chris Lattner
e376e00247 reenable this hack, the tblgen version isn't quite ready 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26902 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 17:54:43 +00:00
Chris Lattner
32f57d9e26 Fix the pattern for VADDUWM, add i32 splat 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26901 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 17:51:58 +00:00
Evan Cheng
e63d746ef6 Use tblgen'd VECTOR_SHUFFLE selection code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26900 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 08:14:16 +00:00
Chris Lattner
dd4d2d0e40 Add support for generating vspltw, instead of a vperm instruction with a 
constant pool load.  This generates significantly nicer code for splats.

When tblgen gets bugfixed, we can remove the custom selection code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26898 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 06:51:10 +00:00
Chris Lattner
88a99ef7cc Implement PPC::isSplatShuffleMask and PPC::getVSPLTImmediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26897 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 06:37:44 +00:00
Chris Lattner
ef819f8fbb fix duplicate definition errors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26896 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 06:33:01 +00:00
Chris Lattner
3c0f9cc90c Check in some intermediate code that adds a skeleton for matching vsplt* 
instructions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26894 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 06:15:45 +00:00
Chris Lattner
08e25de4d3 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 05:05:55 +00:00
Chris Lattner
556aae0df0 add vsplat instructions, fix sched description for vperm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26888 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 04:47:33 +00:00
Chris Lattner
f1d0b2beda Custom lower arbitrary VECTOR_SHUFFLE's to VPERM. 
TODO: leave specific ones as VECTOR_SHUFFLE's and turn them into specialized
operations like vsplt*


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26887 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 01:53:53 +00:00
Chris Lattner
2bc6dc27e9 Claim to have v16i8 for perm masks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26886 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 01:53:02 +00:00
Chris Lattner
abdff1ee6d add the vperm instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26883 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 01:00:56 +00:00
Chris Lattner
28097d086f Add a note about the MUL -> FMADD vector bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26874 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 22:08:08 +00:00
Chris Lattner
b2177b9405 Custom lower SCALAR_TO_VECTOR into lve*x. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26868 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 06:55:52 +00:00
Chris Lattner
ab515b09bf PPC doesn't have SCALAR_TO_VECTOR 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26865 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 06:17:19 +00:00
Chris Lattner
528180ed7b add support for vector undef 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26863 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 06:10:09 +00:00
Chris Lattner
a17409dfd6 minor fixes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26857 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 05:43:01 +00:00
Chris Lattner
28b1a0b532 notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26856 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 05:33:30 +00:00
Chris Lattner
0a7bff01d0 we don't use lmw/stmw. When we want them they are easy enough to add 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26853 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 04:33:37 +00:00
Chris Lattner
a064d28843 rename these nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26848 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 01:13:28 +00:00
Nate Begeman
79691bc1f3 Fix subfic to match subc by default instead of sub so that it is correctly 
cost-modeled as producing a flag.  This fixes the test I just added for neg


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26835 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-17 22:41:37 +00:00
Nate Begeman
81e8097377 Remove BRTWOWAY* 
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26814 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-17 01:40:33 +00:00
Chris Lattner
e261c474ca remove dead variable 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26813 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 23:52:08 +00:00
Nate Begeman
1ad9b3a3cc Notes on how to kill the eeevil brtwoway, and make ppc branch selector 
more target independant, generate better code, and be less conservative.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26809 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 22:37:48 +00:00
Chris Lattner
be80fc8d09 Strangely, calls clobber call-clobbered vector regs. Whodathoughtit? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26808 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 22:35:59 +00:00
Chris Lattner
ed51169cd8 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26807 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 22:25:55 +00:00
Chris Lattner
9c09c9ec9d teach the ppc backend how to spill/reload vector regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26806 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 22:24:02 +00:00
Chris Lattner
419ed53006 add callee saved vector regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26805 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 22:07:06 +00:00
Evan Cheng
714554d707 Added a way for TargetLowering to specify what values can be used as the 
scale component of the target addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26802 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 21:47:42 +00:00
Chris Lattner
8aa777d5ea in functions that use a lot of callee saved regs, this can be more than 
5 instructions away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26801 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 21:31:45 +00:00
Chris Lattner
335fd3c7c2 Add support for copying registers. still needed: spilling and reloading them 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26800 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 20:03:58 +00:00
Nate Begeman
2df992883b Another case we could do better on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26795 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 18:50:44 +00:00
Chris Lattner
4bb1895072 Save/restore VRSAVE once per function, not once per block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26793 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-16 18:25:23 +00:00
Nate Begeman
133decdceb Update scheduling info for vrsave instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26776 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-15 05:25:05 +00:00
Chris Lattner
a08610c8a5 Fix an off by one error that caused PPC LLC failures last night. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26758 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-14 17:56:49 +00:00
Evan Cheng
9c543b2299 PPC LSR pass should use target lowering hooks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26743 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-13 23:56:51 +00:00
Evan Cheng
c4c6257c1a Added getTargetLowering() to TargetMachine. Refactored targets to support this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26742 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-13 23:20:37 +00:00
Chris Lattner
1877ec9b02 For functions that use vector registers, save VRSAVE, mark used 
registers, and update it on entry to each function, then restore it on exit.

This compiles:

void func(vfloat *a, vfloat *b, vfloat *c) {
        *a = *b * *c + *c;
}

to this:

_func:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        lvx v0, 0, r5
        lvx v1, 0, r4
        vmaddfp v0, v1, v0, v0
        stvx v0, 0, r3
        mtspr 256, r2
        blr

GCC produces this (which has additional stack accesses):

_func:
        mfspr r0,256
        stw r0,-4(r1)
        oris r0,r0,0xc000
        mtspr 256,r0
        lvx v0,0,r5
        lvx v1,0,r4
        lwz r12,-4(r1)
        vmaddfp v0,v0,v1,v0
        stvx v0,0,r3
        mtspr 256,r12
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26733 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-13 21:52:10 +00:00
Chris Lattner
64ce964673 Fix a couple of bugs that broke the alpha tester build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26722 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-13 05:23:59 +00:00
Chris Lattner
3faad495bc Handle cracked instructions in dispatch group formation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26721 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-13 05:20:04 +00:00
Chris Lattner
fd97734f36 Mark instructions that are cracked by the PPC970 decoder as such. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26720 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-13 05:15:10 +00:00
Chris Lattner
88d211f823 Several big changes: 
1. Use flags on the instructions in the .td file to indicate the PPC970 unit
   type instead of a table in the .cpp file.  Much cleaner.
2. Change the hazard recognizer to build d-groups according to the actual
   algorithm used, not my flawed understanding of it.
3. Model "must be in the first slot" and "must be the only instr in a group"
   accurately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26719 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-12 09:13:49 +00:00
Chris Lattner
9c2c38674a blr is a branch too 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26710 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-11 21:49:49 +00:00
Chris Lattner
e928a72772 teach the JIT to encode vector registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26697 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-10 20:19:50 +00:00
Chris Lattner
b0d21ef20c Change the interface for getting a target HazardRecognizer to be more clean. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26608 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-08 04:25:59 +00:00
Chris Lattner
49f398b96a add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26605 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-08 00:25:47 +00:00
Jim Laskey
7809811e4e Use "llvm.metadata" section for debug globals. Filter out these globals in the 
asm printer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26599 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-07 22:00:35 +00:00
Chris Lattner
b84225b080 add another missing store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26595 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-07 16:26:48 +00:00
Chris Lattner
ab5801cb28 add a couple more load/store instrs, add a newline to the end of file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26594 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-07 16:19:46 +00:00
Nate Begeman
3acbe5d4f0 This kinda sorta implements "things that have to lead a dispatch group". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26591 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-07 08:30:27 +00:00
Chris Lattner
2046371e70 add some new instructions to the classifier. With this, we correctly insert 
a nop into Freebench/neural, which speeds it up from 136->129s (~5.4%).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26590 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-07 07:14:55 +00:00
Chris Lattner
7ce64852e8 add some comments that describe what we model 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26588 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-07 06:44:19 +00:00
Chris Lattner
c664418820 Implement a very very simple hazard recognizer for LSU rejects and ctr set/read 
flushes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26587 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-07 06:32:48 +00:00
Chris Lattner
5a63c47fb5 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26585 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-07 04:42:59 +00:00
Chris Lattner
bbf1c72d51 implement TII::insertNoop 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26562 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-05 23:49:55 +00:00
Chris Lattner
9601a86a64 Copysign needs to be expanded everywhere. Note that Alpha and IA64 should 
implement copysign as a native op if they have it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26541 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-05 05:08:37 +00:00
Chris Lattner
0f6ab6ff97 Implement CodeGen/PowerPC/or-addressing-mode.ll, which is also PR668. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26450 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 07:14:48 +00:00
Chris Lattner
00d18f0879 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26448 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 06:36:20 +00:00
Chris Lattner
5126984b1d Compile this: 
void foo(float a, int *b) { *b = a; }

to this:

_foo:
        fctiwz f0, f1
        stfiwx f0, 0, r4
        blr

instead of this:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        stw r2, 0(r4)
        blr

This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26447 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 05:50:56 +00:00
Chris Lattner
8c13d0a573 Use a target-specific dag-combine to implement CodeGen/PowerPC/fp-int-fp.ll. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26445 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 04:57:39 +00:00
Evan Cheng
d30bf01e90 Vector op lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26438 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 01:11:20 +00:00
Chris Lattner
bf751e2d6f Add a subtarget feature for the stfiwx instruction. I know the G5 has it, 
but I don't know what other PPC impls do.  If someone could update the proc
table, I would appreciate it :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26421 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 07:08:22 +00:00
Chris Lattner
f4c8575c27 remove implemented item 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26418 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 06:36:04 +00:00
Nate Begeman
6e53ceb0d4 readme updates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26405 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 22:08:36 +00:00
Chris Lattner
2c003e26e5 Add memory printing support for PPC. Input memory operands now work with 
inline asms! :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26365 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 20:27:40 +00:00
Chris Lattner
e5d8861126 Implement selection of inline asm memory operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26348 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 02:13:12 +00:00
Evan Cheng
d0839f3071 PPC JIT relocation model should be DynamicNoPIC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26338 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 22:18:07 +00:00
Chris Lattner
e3f01570c1 Implement the PPC inline asm "L" modifier. This allows us to compile: 
long long test(long long X) {
  __asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
  return X;
}

to:
        foo r2 r3 r2 r3


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 19:31:10 +00:00
Evan Cheng
4c1aa86657 - Added option -relocation-model to set relocation model. Valid values include static, pic, 
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26315 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 20:19:42 +00:00
Jim Laskey
0420f2aaf9 Coordinate activities with llvm-gcc4 and dwarf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26314 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 19:02:11 +00:00
Chris Lattner
1efa40f6a4 split register class handling from explicit physreg handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 00:56:39 +00:00
Chris Lattner
4217ca8dc1 Updates to match change of getRegForInlineAsmConstraint prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 23:11:00 +00:00
Evan Cheng
d2ee218b49 Moved PICEnabled to include/llvm/Target/TargetOptions.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26272 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-18 00:08:58 +00:00
Nate Begeman
551bf3f800 kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 05:43:56 +00:00
Evan Cheng
298ebf2bd8 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26231 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 08:27:56 +00:00
Chris Lattner
0d7db6f79a If we have zero initialized data with external linkage, use .zerofill to 
emit it (instead of .space), saving a bit of space in the .o file.

For example:
int foo[100];
int bar[100] = {};

when compiled with C++ or -fno-common results in shrinkage from 1160 to 360
bytes of space.  The X86 backend can also do this on darwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26185 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 22:18:23 +00:00
Chris Lattner
33d5082779 Make sure that weak functions are aligned properly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26181 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 20:42:33 +00:00
Chris Lattner
45b3976db7 Switch to using getCALLSEQ_START instead of using our own creation calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26142 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-13 08:55:29 +00:00
Nate Begeman
789fd42320 Add missing patterns for andi. and andis., fixing test/Regression/CodeGen/ 
PowerPC/and-imm.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-12 09:09:52 +00:00
Evan Cheng
7e9b26fc73 Match getTargetNode() changes (now return SDNode* instead of SDOperand). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26085 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 07:17:49 +00:00
Evan Cheng
34167215a8 Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26067 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 00:37:58 +00:00
Chris Lattner
418caa1356 Darwin doesn't support #APP/#NO_APP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26066 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 23:42:22 +00:00
Chris Lattner
6f4a072e1f Rename BSel -> PPCBSel for the benefit of doxygen users. 
Move the methods out of line.
Remove unused Debug.h stuff.
Teach getNumBytesForInstruction to know the size of an inline asm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26064 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 19:33:26 +00:00
Chris Lattner
4d73a5a204 Emit the 'mr' pseudoop for easier reading. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26053 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 06:56:40 +00:00
Chris Lattner
8d3f490991 Move emails from nate into public places 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26051 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 06:43:51 +00:00
Chris Lattner
ad3bc8d8ad Implement getConstraintType for PPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26042 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-07 20:16:30 +00:00
Chris Lattner
763317de1b Add the simple PPC integer constraints 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26027 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-07 00:47:13 +00:00
Chris Lattner
815ef5b3dd Change prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26022 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-06 22:18:19 +00:00
Jim Laskey
984cb3773f We seem to have settled to __DWARF for section name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26015 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-06 14:16:15 +00:00
Evan Cheng
7564e0b46d Complex pattern isel code shouldn't select nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26010 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 08:45:01 +00:00
Evan Cheng
ba2f0a9ee5 Use SelectRoot() as entry of any tblgen based isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 06:46:41 +00:00
Chris Lattner
213845367c add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25984 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 05:27:35 +00:00
Chris Lattner
7d8d5a522f Use the asmprinter to find out what the preferred alignment of a global is. 
This patch speeds up 172.mgrid from 31.81s to 11.39s on darwin/ppc.
Many many thanks to Nate for tracking down the root cause of the issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25979 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 01:30:45 +00:00
Nate Begeman
a6973c348b Remove some stuff that now works 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25963 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 07:29:35 +00:00
Chris Lattner
1541bc3a23 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25944 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 22:06:45 +00:00
Chris Lattner
33c1dab0bd remove some target-indep and implemented notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25930 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 06:22:11 +00:00
Nate Begeman
a63fee898b Flesh out a couple of the items in the README 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25928 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 05:17:06 +00:00
Chris Lattner
d463f7f698 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25921 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-03 01:49:49 +00:00
Chris Lattner
39b248b79e update a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25918 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 23:50:22 +00:00
Nate Begeman
3b478b31e2 add 64b gpr store to the possible list of isStoreToStackSlot opcodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25916 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 21:07:50 +00:00
Chris Lattner
6524287c53 implement isStoreToStackSlot for PPC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25914 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:16:12 +00:00
Chris Lattner
4083960147 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25913 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 20:12:32 +00:00
Chris Lattner
275b8846d5 new example 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25903 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 07:37:11 +00:00
Nate Begeman
93c740bbbb Update the README 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25902 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 07:27:56 +00:00
Chris Lattner
588732748b add a method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25884 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 22:38:46 +00:00
Chris Lattner
5a7efc9d4f add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25876 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 17:54:23 +00:00
Nate Begeman
750ac1bdfa Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 07:19:44 +00:00
Chris Lattner
0ddc18047d another testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25862 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 00:28:12 +00:00
Evan Cheng
b8973bd8f5 Allow the specification of explicit alignments for constant pool entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25855 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 22:23:14 +00:00
Chris Lattner
ddc787dfdc add info about the inline asm register constraints for PPC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25853 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 19:20:21 +00:00
Nate Begeman
4477590ef6 Codegen 
bool %test(int %X) {
  %Y = seteq int %X, 13
  ret bool %Y
}

as

_test:
        addi r2, r3, -13
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

rather than

_test:
        cmpwi cr7, r3, 13
        mfcr r2
        rlwinm r3, r2, 31, 31, 31
        blr

This has very little effect on most code, but speeds up analyzer 23% and
mason 11%


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25848 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 08:17:29 +00:00
Chris Lattner
83e64baaef example nate pointed out 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25841 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 07:16:34 +00:00
Chris Lattner
56b6964473 add the 'lucas' optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25830 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 02:55:28 +00:00
Chris Lattner
37dd6f1b79 Functions that are lazily streamed in from the .bc file are *not* external. 
This fixes llvm-test/SingleSource/UnitTests/2006-01-29-SimpleIndirectCall.c
and PR704


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25793 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 20:49:17 +00:00
Chris Lattner
d9b55dd21a Now that OpActions is big enough, we can specify actions for vector types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25784 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 08:41:37 +00:00
Chris Lattner
3fd327fe7f disable this for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25778 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 07:31:33 +00:00
Chris Lattner
ec4a0c7c6b Request expansion of ConstantVec nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25773 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 06:32:58 +00:00
Chris Lattner
a54aa94197 Targets all now request ConstantFP to be legalized into TargetConstantFP. 
'fpimm' in .td files is now TargetConstantFP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25771 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 06:26:08 +00:00
Chris Lattner
e00ebf0aca Fix a bug in my elimination of ISD::CALL this morning. PPC now has to 
provide the expansion for i64 calls itself


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25735 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 07:33:03 +00:00
Chris Lattner
969097968c add a note about how we should implement this FIXME from the legalizer: 
// FIXME: revisit this when we have some kind of mechanism by which targets
    // can decided legality of vector constants, of which there may be very
    // many.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25733 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 05:40:47 +00:00
Nate Begeman
eb20ed6c86 Add a couple more things to the readme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25724 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 01:22:10 +00:00
Chris Lattner
281b55ebec Use PPCISD::CALL instead of ISD::CALL 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25717 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 23:34:02 +00:00
Chris Lattner
bba534dc66 Make llvm.frame/returnaddr not crash on ppc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25710 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 22:25:06 +00:00
Nate Begeman
ee625573b5 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 21:09:22 +00:00
Evan Cheng
19c9550744 Subtarget feature can now set any variable to any value 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25678 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 08:09:42 +00:00
Chris Lattner
cedc6f4b30 PHI and INLINEASM are now built-in instructions provided by Target.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25674 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 01:46:15 +00:00
Jim Laskey
b3e789ac25 Set up MachineDebugInfo to scan for debug information form "llvm.db"g globals. 
Global Variable information is now pulled from "llvm.dbg.globals"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25655 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 20:21:46 +00:00
Evan Cheng
0577a22c67 Set SchedulingForLatency to be the default scheduling preference for all. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25607 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 18:52:42 +00:00
Nate Begeman
acc398c195 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 18:21:52 +00:00
Evan Cheng
7558b0e80c Default scheduling preference is SchedulingForLatency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25603 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 09:15:54 +00:00
Jim Laskey
52060a0e71 Crude Dwarf global variable debugging. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25569 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-24 00:49:18 +00:00
Chris Lattner
2c2c6c61f1 Add explicit #includes of <iostream> 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-22 23:41:00 +00:00
Chris Lattner
86a5484079 Add explicit #includes of <iostream> 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25509 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-22 22:53:01 +00:00
Chris Lattner
bc1c215453 trivial formatting improvement: don't insert extra blank lines between .comm 
vars.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25492 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-21 01:35:26 +00:00