Bob Wilson
24645a1a6d
NEON does not support truncating vector stores. Radar 8598391.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:31:39 +00:00
Owen Anderson
4845f99008
Covert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:30:39 +00:00
Owen Anderson
60b75fad7e
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:26:43 +00:00
Owen Anderson
3b5dfcd8fd
Covert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117937 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:13:11 +00:00
Owen Anderson
2bcb989a0b
Covert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117935 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 18:03:16 +00:00
Rafael Espindola
d1d73b03af
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 17:10:53 +00:00
Rafael Espindola
c70a1d985a
Write the line info to .debug_line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117930 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 17:07:14 +00:00
Jim Grosbach
833c93c795
Mark ARM subtarget features that are available for the assembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 16:59:54 +00:00
Rafael Espindola
cc3acee7b3
Add support for .value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117922 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 15:29:07 +00:00
Rafael Espindola
484291c273
Implement .weakref.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 14:28:48 +00:00
Bill Wendling
504fb4fb8e
More tests to XFAIL. The arm-and-txt-peephole.ll test passes even when the
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peephole optimizer is disabled. That's not good at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117905 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:59:43 +00:00
Bill Wendling
59707e8055
Disable because peephole is disabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:48:44 +00:00
Chris Lattner
acc473fcf9
"mov[zs]x (mem), GR16" are not ambiguous: the mem
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must be 8 bits. Support this memory form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:41:10 +00:00
Chris Lattner
b501d4f673
Implement enough of the missing instalias support to get
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aliases installed and working. They now work when the
matched pattern and the result instruction have exactly
the same operand list.
This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.
Note that we do not accept instructions like:
movzx 0(%rsp), %rsi
GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand. It could be 8/16/32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:34:34 +00:00
Owen Anderson
b8d14a6611
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117900 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 05:23:58 +00:00
Chris Lattner
4164f6bbbf
make the asm matcher emitter reject instructions that have comments
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in their asmstring. Fix the two x86 "NOREX" instructions that have them.
If these comments are important, the instlowering stuff can print them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 04:44:29 +00:00
Chris Lattner
1a1ecc9f3c
fix an encoding mismatch where "sal %eax, 1" was not using the short encoding
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for shl. Caught by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117820 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 18:13:10 +00:00
Chris Lattner
905b8f7614
add a test for the ud2a alias.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117803 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 17:01:25 +00:00
Duncan Sands
ad6f541840
If a function does a volatile load from a global constant, do not
...
consider it to be readonly. In fact, don't even consider it to be
readonly if it does a volatile load from an AllocaInst either (it
is debatable as to whether readonly would be correct or not in this
case; play safe for the moment). This fixes PR8279.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117783 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 12:59:44 +00:00
Bob Wilson
f74a429816
Overhaul memory barriers in the ARM backend. Radar 8601999.
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There were a number of issues to fix up here:
* The "device" argument of the llvm.memory.barrier intrinsic should be
used to distinguish the "Full System" domain from the "Inner Shareable"
domain. It has nothing to do with using DMB vs. DSB instructions.
* The compiler should never need to emit DSB instructions. Remove the
ARMISD::SYNCBARRIER node and also remove the instruction patterns for DSB.
* Merge the separate DMB/DSB instructions for options only used for the
disassembler with the default DMB/DSB instructions. Add the default
"full system" option ARM_MB::SY to the ARM_MB::MemBOpt enum.
* Add a separate ARMISD::MEMBARRIER_MCR node for subtargets that implement
a data memory barrier using the MCR instruction.
* Fix up encodings for these instructions (except MCR).
I also updated the tests and added a few new ones to check for DMB options
that were not currently being exercised.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117756 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 00:54:37 +00:00
Bill Wendling
52925b60f1
Some instructions end with an "ls" prefix, but it doesn't indicate that they are
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conditional. Check for those instructions explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:50:21 +00:00
Evan Cheng
189c1ec4c1
Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:36:03 +00:00
Rafael Espindola
d179886f05
Be more strict on when we produce an undefined reference. In gas a file with
...
just
.type foo,@object
will produce an undefined reference to foo. On the other hand, a file with
just
.weakref bar, foo
will not. It is somewhat hard to support both in MC since both statements
should create the symbols. It should be possible if we really need to by
adding to the flags, but hopefully that is not necessary.
With this patch we do not produce a undefined reference in any of those cases.
The assembly file needs an actual use for the undefined reference to be
present.
This is in preparation for a patch implementing .weakref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 23:09:31 +00:00
Bob Wilson
822cb58d08
Change instcombine's getShuffleMask to represent undef with negative values.
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This code had previously used 2*N, where N is the mask length, to represent
undef. That is not safe because the shufflevector operands may have more
than N elements -- they don't have to match the result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117721 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:03:05 +00:00
Bob Wilson
46455096be
Remove DAG combiner patch to fold vector splats. Instcombiner does it now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:03:02 +00:00
Bob Wilson
4cac5facc3
Make instcombine a little more aggressive in combining vector shuffles.
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Allow splats even if they don't match either of the original shuffles,
possibly due to undef entries in the shuffles masks. Radar 8597790.
Also fix some 80-column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117719 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 22:02:50 +00:00
Owen Anderson
b20955f319
Update testcase since we're no longer doing the constant forwarding inline with correlated value propagation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117712 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 21:18:23 +00:00
Owen Anderson
05cee0cdb4
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117708 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 20:39:19 +00:00
Owen Anderson
9ae33fe396
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 20:23:45 +00:00
Owen Anderson
82c85b7490
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117699 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 20:17:07 +00:00
Owen Anderson
fea34d38b4
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117696 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 20:12:34 +00:00
Owen Anderson
5c4966e1e5
Covert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117694 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 19:56:07 +00:00
Owen Anderson
ffe2a4a77d
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117693 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 19:51:11 +00:00
Owen Anderson
9fcafb0269
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 19:45:32 +00:00
Owen Anderson
2457b55003
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117689 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 19:37:05 +00:00
Owen Anderson
cd410ac70c
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117686 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 19:17:08 +00:00
Owen Anderson
95d3711a15
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117685 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 19:09:08 +00:00
Owen Anderson
b0cb6b820b
Covert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117684 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 19:05:26 +00:00
Owen Anderson
afe18c7cac
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:58:30 +00:00
Owen Anderson
7af3f381ee
Convert this test to .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117682 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:48:59 +00:00
Owen Anderson
a007781bdf
Convert this file to less fragile .s form.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:41:40 +00:00
Owen Anderson
48469e11c9
Replace this test with the less fragile .s version. Still XFAIL'd, since the ASM parser doesn't parse vabal yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117679 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:31:26 +00:00
Owen Anderson
14a596258d
Covert this test to a .s file to reduce fragility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117676 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:18:40 +00:00
Evan Cheng
089751535d
Avoiding overly aggressive latency scheduling. If the two nodes share an
...
operand and one of them has a single use that is a live out copy, favor the
one that is live out. Otherwise it will be difficult to eliminate the copy
if the instruction is a loop induction variable update. e.g.
BB:
sub r1, r3, #1
str r0, [r2, r3]
mov r3, r1
cmp
bne BB
=>
BB:
str r0, [r2, r3]
sub r3, r3, #1
cmp
bne BB
This fixed the recent 256.bzip2 regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117675 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 18:09:28 +00:00
NAKAMURA Takumi
b087c8490f
test/Scripts/macho-dump: Make hack for Python-2.4. [PR7995]
...
With Python-2.4, Reader::read64 always returns (unexpected) long integer.
FileCheck detects failure on test/MC/MachO among '0' and '0L'.
CentOS5(aka RHEL5 clone) provides python-2.4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117637 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 01:14:16 +00:00
Dan Gohman
cd5c123a1d
Teach memdep to use pointsToConstantMemory to determine that loads
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from constant memory don't alias any stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117636 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 01:14:04 +00:00
Owen Anderson
1cfb043901
Convert this test to a .s file, so that it's not sensitive to codegen changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117633 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 01:01:56 +00:00
Dan Gohman
b338bcb0b4
Add a basic testcase for TBAA-aware DSE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117632 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 00:54:02 +00:00
Chris Lattner
14b93851cc
add simple support for addrmode5 operands, allowing
...
vldr.64 to work. I have no idea if this is fully right, but
it is in the right direction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117626 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 00:27:31 +00:00
Andrew Trick
7b78824fdb
The ARM jit cannot handle these tests as of 2010-10-27.
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(A PR will be linked to this rev.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117620 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 00:23:43 +00:00
Rafael Espindola
f4b0f3e616
Improvements to .section parsing:
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* If we have a M or a G, reject sections without the type
* Only parse the flag specific arguments if we have M or G
* Parse the corresponding arguments for M and G
We ignore the G arguments and flag for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117608 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:33:33 +00:00
Chris Lattner
94074a5e4d
most simple arm instructions match correctly now,
...
it looks like we're not handling [] operands though
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117607 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:31:07 +00:00
Chris Lattner
4e692ab5ee
fix the asmmatcher generator to handle targets with no RegisterPrefix
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(like ARM) correctly. With this change, we can now match "bx lr"
because we recognize lr as a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117606 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 21:28:42 +00:00
Rafael Espindola
787c33718d
Add support for the .string directive.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117592 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 20:02:27 +00:00
Rafael Espindola
1973d43792
Defined weak symbols should have non-zero value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117585 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 19:39:57 +00:00
Rafael Espindola
29129728f1
Fix relocations with renamed symbols.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117575 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 19:08:03 +00:00
Rafael Espindola
f571f9a8fe
Aliases defined with .symver should copy the binding of the symbols they alias.
...
Move the existing patching for undefined symbols so that all the patching
is done in the same function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117570 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 18:33:03 +00:00
Bob Wilson
0f1db1a6c6
Teach the DAG combiner to fold a splat of a splat. Radar 8597790.
...
Also do some minor refactoring to reduce indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117558 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 17:06:14 +00:00
Roman Divacky
50e7a78709
Implement .equ directive as a synonym to .set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117553 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 16:22:58 +00:00
Duncan Sands
c1d7807fd5
Testcase for PR8494 (invalid bitcode crashing the bitcode reader).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117552 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 15:57:30 +00:00
Rafael Espindola
aa8f1f0135
Implement R_X86_64_DTPOFF32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117548 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 15:11:03 +00:00
Rafael Espindola
b4d1721eff
Implement TLSLD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 15:02:40 +00:00
Rafael Espindola
0cf15d61b7
Implement DTPOFF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117546 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 14:48:59 +00:00
Rafael Espindola
a264f72d3f
Implement TLSLDM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117544 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 14:37:09 +00:00
Rafael Espindola
a0a2f8734c
Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117543 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 14:22:44 +00:00
Evan Cheng
7e2fe9150f
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 06:47:08 +00:00
Evan Cheng
9c3e8e28bd
Disable most of the ARM vfp / NEON MC tests. These are too fragile to be useful.
...
I'll work with Jim, Owen, and Bill on an alternative testing strategy until
the assembly parser is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117530 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 06:46:17 +00:00
NAKAMURA Takumi
abd9e01baf
test/Transforms/SimplifyLibCalls/floor.ll: Mark as XFAIL:win32 due to lack of nearbyintf on MSVC. [PR8466]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 06:46:04 +00:00
Evan Cheng
9e08ee5d16
Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117520 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 02:00:25 +00:00
Evan Cheng
0104d9de04
- Assign load / store with shifter op address modes the right itinerary classes.
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- For now, loads of [r, r] addressing mode is the same as the
[r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should
identify the former case and reduce the output latency by 1.
- Also identify [r, r << 2] case. This special form of shifter addressing mode
is "free".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 01:49:06 +00:00
Dale Johannesen
e49406fd63
Fix pastos in handling of AVX cvttsd2si, PR8491.
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Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 00:35:54 +00:00
Owen Anderson
cfd0e1f3ae
Add correct NEON encodings for vtbl and vtbx.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 00:18:46 +00:00
Owen Anderson
3eff4af42d
Add correct NEON encodings for vext, vtrn, vuzp, and vzip.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117512 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:56:39 +00:00
Dale Johannesen
f514f52790
Teach InstCombine not to use Add and Neg on FP. PR 8490.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117510 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:45:18 +00:00
Evan Cheng
f40deed62f
Shifter ops are not always free. Do not fold them (especially to form
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complex load / store addressing mode) when they have higher cost and
when they have more than one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:41:30 +00:00
Owen Anderson
0bccec368a
Tests for NEON encoding of vrev.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117502 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 22:54:49 +00:00
Owen Anderson
498ec20703
Provide correct encodings for NEON vcvt, which has its own special immediate encoding
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for specifying fractional bits for fixed point conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 22:49:00 +00:00
Owen Anderson
d2fbdb7f5c
Provide correct encodings for the get_lane and set_lane variants of vmov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 21:28:09 +00:00
Rafael Espindola
3cede2d0b2
Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117494 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 21:23:52 +00:00
Kevin Enderby
529b1a4398
Added the x86 instruction ud2b (2nd official undefined instruction).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:46:49 +00:00
Bob Wilson
f20700ca77
SelectionDAG shuffle nodes do not allow operands with different numbers of
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elements than the result vector type. So, when an instruction like:
%8 = shufflevector <2 x float> %4, <2 x float> %7, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
is translated to a DAG, each operand is changed to a concat_vectors node that appends 2 undef elements. That is:
shuffle [a,b], [c,d] is changed to:
shuffle [a,b,u,u], [c,d,u,u]
That's probably the right thing for x86 but for NEON, we'd much rather have:
shuffle [a,b,c,d], undef
Teach the DAG combiner how to do that transformation for ARM. Radar 8597007.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117482 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:38:28 +00:00
Rafael Espindola
bc82d8b84f
Implement R_X86_64_GOTTPOFF, R_X86_64_TLSGD and R_X86_64_TPOFF32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:28:07 +00:00
Owen Anderson
f587a9352a
Provide correct NEON encodings for vdup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117475 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 19:25:54 +00:00
Rafael Espindola
4fa3478fc2
Set default type and flags for .init and .fini.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:45:20 +00:00
Owen Anderson
82203218d1
Tests for NEON encoding of vmovl, vmovn, vqmovn, and vqmovun.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117469 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:17:12 +00:00
Owen Anderson
027c84dd3e
Tests for NEON encoding of vcls, vclz, and vcnt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:05:25 +00:00
Owen Anderson
df800f1b1b
Tests for NEON encoding of vneg and vqneg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117463 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:57:26 +00:00
Rafael Espindola
83ff4d2b0d
Produce an error for an invalid use of .symver.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:56:18 +00:00
Owen Anderson
633919c79a
Tests for NEON encoding of vabs and vqabs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:50:07 +00:00
Owen Anderson
0745c389d9
Add correct NEON encodings for vsli and vsri.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117459 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:40:08 +00:00
Owen Anderson
dd31ed67e6
Add correct NEON encodings for vsra and vrsra.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:29:29 +00:00
Rafael Espindola
bf052ac5d1
Symbols defined as the difference of other two end up in the ABS section.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 16:04:30 +00:00
Rafael Espindola
8818213247
Add support for the .symver directive. This is really ugly, but most of it is
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contained in the ELF object writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 15:18:17 +00:00
Kevin Enderby
e460890351
Yet another tweak to X86 instructions to add ud2a as an alias to ud2
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(still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 03:01:02 +00:00
Kevin Enderby
5a378076a4
Another tweak to X86 instructions to add the missing flex instruction (without
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the wait prefix).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 02:53:04 +00:00
Kevin Enderby
f4630ecc3f
Tweaks to X86 instructions to allow the 'w' suffix in places it makes
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sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler
allows for these instructions. Done differently than in r117031 that
caused a valgrind error which was later reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 02:32:19 +00:00
Kevin Enderby
41e8cc73cf
Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc
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will accept versions that the darwin assembler allows. Forms ending in "pi" and
forms without all the operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:59:28 +00:00
Owen Anderson
86ed2324a6
Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:50:46 +00:00
Owen Anderson
632c235a31
Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117402 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:58:41 +00:00
Jim Grosbach
8ac98cb665
FileCheck'ize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117401 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:26:47 +00:00
Owen Anderson
6a36ad75a4
Add tests for NEON encoding of vshll.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:21:47 +00:00
Owen Anderson
4ba5d61f2d
Tests for NEON encoding of vshr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:08:42 +00:00
Owen Anderson
3557d00a38
Provide correct NEON encodings for vshl, register and immediate forms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 20:56:57 +00:00
Rafael Espindola
61e3b91da7
Add support for .ident.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 19:35:47 +00:00
Owen Anderson
c8cb3535a9
Tests for NEON encoding of vrecpe, vrecps, vrsqrte, and vsqrts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117385 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:43:13 +00:00
Owen Anderson
6915cdab8f
Tests for NEON encodings of vpmin and vpmax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117382 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:31:47 +00:00
Owen Anderson
bc4118bd36
Add correct NEON encoding for vpadal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:18:03 +00:00
Owen Anderson
000e105d0f
Tests for NEON encoding of vpadd and vpaddl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:04:51 +00:00
Owen Anderson
a88ea03bf2
Add NEON encodings for vmov and vmvn of immediates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117374 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 17:40:54 +00:00
Rafael Espindola
e4f506ff4b
Implement some relaxations for arithmetic instructions. The limitation
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on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 14:09:12 +00:00
Kalle Raiskila
505faa6b12
Change v64 datalayout in SPU.
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The SPU ABI does not mention v64, and all examples
in C suggest v128 are treated similarily to arrays,
we use array alignment for v64 too. This makes the
alignment of e.g. [2 x <2 x i32>] behave "intuitively"
and similar to as if the elements were e.g. i32s.
This also makes an "unaligned store" test to be
aligned, with different (but functionally equivalent)
code generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 10:45:47 +00:00
Bob Wilson
7c730e7790
When the "true" and "false" blocks of a diamond if-conversion are the same,
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do not double-count the duplicate instructions by counting once from the
beginning and again from the end. Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end. Radar 8589805.
This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction. That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117333 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:02:24 +00:00
Owen Anderson
93ef3fd9c0
Tests for NEON encoding of vmax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117327 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 23:45:34 +00:00
Owen Anderson
a13067e366
Tests for NEON encoding of vmin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117326 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 23:35:36 +00:00
Dale Johannesen
d155d7e428
An stdcall function calling a non-stdcall function
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cannot use tailcall. PR 8461.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 22:17:05 +00:00
Owen Anderson
5258b61966
Add correct encodings for NEON vabal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117315 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:29:04 +00:00
Owen Anderson
410aebc670
Add correct NEON encodings for vaba.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117309 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:52:57 +00:00
Owen Anderson
28bae6106f
Tests for NEON encoding of vabdl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:36:28 +00:00
Owen Anderson
b7e1d77ff5
Add tests for NEON encoding of vabd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117302 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:29:27 +00:00
Daniel Dunbar
b1e0f76352
MC/AsmParser: Fix relative precedence of {+,-} and comparison ops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117299 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:18:56 +00:00
Daniel Dunbar
bdf90d679b
MC/AsmLexer: Fix bug in source location for Slash token.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117298 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:18:53 +00:00
Daniel Dunbar
048a19abe6
tweak test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117297 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:18:49 +00:00
Daniel Dunbar
6b13effe82
MC/AsmParser: Rewrite test to actually check some parts of expression parsing,
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now that we have macros and friends. Uncovered a bug in macro expansion...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:18:41 +00:00
Owen Anderson
31e6ed890a
Attempt to provide correct encodings for NEON vbit and vbif, even though we can't test them at the moment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117294 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:17:22 +00:00
Owen Anderson
4110b4325d
Provide correct NEON encodings for vbsl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117293 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 20:13:13 +00:00
Owen Anderson
162875a9f3
Add correct instruction encodings for vbic, vorn, and vmvn.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117282 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:43:52 +00:00
Owen Anderson
8c71eff594
Provide correct NEON encodings for vand, veor, and vorr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117279 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:28:30 +00:00
Owen Anderson
c61ec2a2b0
Add tests for NEON encoding of vtst.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117277 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:10:34 +00:00
Owen Anderson
d0c5b6170f
Add NEON encoding tests for vcgt and vacgt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 18:03:59 +00:00
Rafael Espindola
cecbc3d282
Add support for emitting ARM file attributes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117275 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:50:35 +00:00
Owen Anderson
10c15e5d58
Add tests for NEON encodings of vcge and vacge.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117274 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:49:32 +00:00
Owen Anderson
4fe20bbd66
Add a warning about our inability to test the encoding of vceq with immediate zero.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117273 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:33:02 +00:00
Owen Anderson
a2041f1807
Add tests for NEON encoding of vceq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117270 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:20:26 +00:00
Owen Anderson
8b7ce020c3
Add tests for NEON encoding of vsubhn and vrsubhn.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117269 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 17:12:46 +00:00
Dan Gohman
17a0bf996f
Fix a case where instcombine was stripping metadata (and alignment)
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from stores when folding in bitcasts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117265 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 16:16:27 +00:00
Duncan Sands
5f28475b30
Fix PR8445: a block with no predecessors may be the entry block, in which case
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it isn't unreachable and should not be zapped. The check for the entry block
was missing in one case: a block containing a unwind instruction. While there,
do some small cleanups: "M" is not a great name for a Function* (it would be
more appropriate for a Module*), change it to "Fn"; use Fn in more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-24 12:23:30 +00:00
Owen Anderson
c052a8c772
Add tests for NEON encoding of vqsub.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117214 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 18:02:16 +00:00
Michael J. Spencer
c527407010
X86: Emit _fltused instead of __fltused on Windows x64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117205 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 09:06:59 +00:00
Mikhail Glushenkov
a73e586495
Remove -llvmc-temp-hack from tblgen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-23 07:32:53 +00:00
Owen Anderson
61f34bc4bc
Add tests for NEON encoding of vhsub.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:58:22 +00:00
Jim Grosbach
48c9f2081d
Add a CMP test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117187 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:48:01 +00:00
Owen Anderson
884f228692
Add tests for NEON encoding of vsubw.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:46:07 +00:00
Jim Grosbach
b2331553f8
tidy up
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117185 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:46:04 +00:00
Owen Anderson
2b6b97c815
Add tests for NEON encoding of vsubl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:36:36 +00:00
Owen Anderson
313252022d
Add tests for NEON encoding of vsub.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117177 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:21:04 +00:00
Owen Anderson
c9db331433
Add tests for NEON encoding of vqdmlsl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117173 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:08:47 +00:00
Owen Anderson
353f8668b8
Add tests for NEON encoding of vmlsl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:02:27 +00:00
Jim Grosbach
432a8142ef
tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:15:48 +00:00
Jim Grosbach
f8da5f5dfa
ARM mode encoding information for CLZ, RBIT, REV*, and PKH*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:12:16 +00:00
Jim Grosbach
871bf8752f
Remove duplicate test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:04:28 +00:00
Jim Grosbach
d0ad5d52b8
tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117157 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 22:01:56 +00:00
Jim Grosbach
487119a08c
FileCheck-ize a few tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117156 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 21:55:03 +00:00
Bob Wilson
364f17c471
Teach instcombine to set the alignment arguments for NEON load/store intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117154 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 21:41:48 +00:00
Owen Anderson
458509476b
Add tests for the correct encoding of NEON vmls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117145 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 20:31:24 +00:00
Owen Anderson
9b26497273
Add correct NEON encodings for vqdmlal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117134 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 19:35:48 +00:00
Jim Grosbach
385e136dce
Add the encoding information for the rest of the ARM mode multiply instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 19:15:30 +00:00
Owen Anderson
92205842ca
Provide correct encodings for NEON vmlal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117131 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 19:05:25 +00:00
Owen Anderson
18341e9e31
Provide correct NEON encodings for vmla.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117126 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:54:37 +00:00
Stuart Hastings
ef4fc2cd6d
Temporarily revert r117079; it broke a tester. Radar 6635085.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:44:22 +00:00
Jim Grosbach
3870b750e6
More ARM multiply instuction binary encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117121 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 18:35:16 +00:00
Owen Anderson
81faa805ce
Add testscases for encoding of NEON vdqmull.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117115 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:57:37 +00:00
Jim Grosbach
9463d0e400
More ARM multiply instruction encoding information.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 17:16:17 +00:00
NAKAMURA Takumi
9cf3b58ebb
test/Makefile: Force lit -j1 on Cygwin.
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lit -jN causes crash on Cygwin's python.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117093 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 09:40:37 +00:00
Andrew Trick
0966ec0861
Reverting r117031 to cleanup valgrind errors.
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It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117087 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 03:58:29 +00:00
Sean Callanan
751752e7ca
Fixed handling of immediate operand sizes, which
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weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix. Also added
a test case for this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117084 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 01:24:11 +00:00
Stuart Hastings
b13214f9d1
Test case for r117075. Radar 6635085.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117079 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:43:32 +00:00
Owen Anderson
4ceccc4e57
Add tests for NEON encoding of vmull.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117077 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:19:53 +00:00
Jim Grosbach
3686046a2c
ARM binary encodings for MVN variants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:19:32 +00:00
Owen Anderson
de5370fcbb
Add tests for NEON encoding of vqdmulh and vqrdmulh.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117074 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:05:33 +00:00
Jim Grosbach
3fea19105d
ARM Binary encoding information for BFC/BFI instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117072 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 22:03:21 +00:00
Owen Anderson
636ad14c8a
Add tests for NEON vmul encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 21:51:58 +00:00
Owen Anderson
7eca0e17ba
Rename this test to better reflect its contents.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117067 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 21:40:15 +00:00
Owen Anderson
35ea7a4022
Add tests for NEON encodings of vaddhn and vraddhn.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:56:57 +00:00
Owen Anderson
4bcb949e18
Add tests for NEON encodings of vqadd, which was already correctly encoded.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 20:42:04 +00:00
Owen Anderson
1e93466c3a
Add correct NEON encodings for vhadd and vrhadd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:55:04 +00:00
Owen Anderson
9d50559bae
Add correct encodings for NEON vaddw.s* and vaddw.u*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:20:25 +00:00
Owen Anderson
e0e6dc3f4e
Provide correct NEON encodings for vaddl.u* and vaddl.s*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:09:17 +00:00
Rafael Espindola
8c8bc05a38
Do not recurse into symbol refs that have a variant kind. This prevents us
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from losing the variant when producing a relocation on an alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 18:00:20 +00:00
Kevin Enderby
0b9325c97d
More tweaks to X86 instructions to allow the 'w' suffix in places it makes
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sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler allows
for these instructions. Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 17:16:46 +00:00
Bill Wendling
ba3f881007
Fix whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117002 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 06:25:08 +00:00
Wesley Peck
4e9141fd4c
Recommit 116986 with capitalization typo fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116993 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:57:26 +00:00
Andrew Trick
5b7a825ec5
putback r116983 and fix simple-fp-encoding.ll tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:40:16 +00:00
Wesley Peck
60e7127e86
Reverting the commit 116986. It was breaking the build on llvm-x86_64-linux though it
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compiles on OS X. I'll ensure that it builds on a linux machine before committing
again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:34:22 +00:00
Owen Anderson
d9707e3d85
Revert r116983, which is breaking all the buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:11:16 +00:00
Wesley Peck
13a949071c
Major update of the MicroBlaze backend. The new features are:
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1. A delay slot filler that searches for valid instructions
to fill the delay slot with. Previously NOPs would always
be inserted into delay slots.
2. Support for MC based instruction printer added.
3. Support for MC based machine code generation and ELF
file generation. ELF file generation does not yet
completely work as much of the ELF support infrastructure
is still x86/x86-64 specific.
4. General clean up of the MBlaze backend code. Much of the
tablegen code has been cleanup and simplified.
Bug Fixes:
1. Removed duplicate periods from subtarget feature descriptions.
2. Many of the instructions had bad machine code information
in the tablegen files. Much of this has been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116986 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 03:09:55 +00:00
Evan Cheng
d6865de2d2
Add missing scheduling itineraries for transfers between core registers and VFP registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116983 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 01:12:00 +00:00
Owen Anderson
d7795540d0
Implement correct encodings for NEON vadd, both integer and floating point.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:48:00 +00:00
Bill Wendling
01aabdac44
Add encoding for moving a value between two ARM core registers and a doublework
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extension register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 23:37:40 +00:00
Bill Wendling
7d31a169af
Add encodings for movement between ARM core registers and single-precision
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registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116961 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:44:54 +00:00
Dan Gohman
561ac17d20
Add some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116957 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:04:02 +00:00
Evan Cheng
134982daa9
More accurate estimate / tracking of register pressure.
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- Initial register pressure in the loop should be all the live defs into the
loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116956 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:03:58 +00:00
Dale Johannesen
e4d31593c5
Fix crash introduced in 116852. 8573915.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:03:37 +00:00
Jason W Kim
7ab2af03d8
Cut unneeded global variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116953 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 22:01:39 +00:00
Rafael Espindola
64e6719ee8
Handle _GLOBAL_OFFSET_TABLE_ correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20 16:46:08 +00:00
Dale Johannesen
575cd148ce
Enable using vdup for vector constants which are splat of
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integers by default, and remove the controlling flag, now
that LICM will hoist such vdup's. 8003375.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116852 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 20:00:17 +00:00
Evan Cheng
2312842de0
Re-enable register pressure aware machine licm with fixes. Hoist() may have
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erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116845 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 18:58:51 +00:00
Jason W Kim
f7d5278fb3
Fixing r116753 r116756 r116777
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The failures in r116753 r116756 were caused by a python issue -
Python likes to append 'L' suffix to stringified numbers if the number
is larger than a machine int. Unfortunately, this causes a divergence of
behavior between 32 and 64 bit python versions.
I re-crafted elf-dump/common_dump to take care of these issues by:
1. always printing 0x (makes for easy sed/regex)
2. always print fixed length (exactly 2 + numBits/4 digits long)
by mod ((2^numBits) - 1)
3. left-padded with '0'
There is a residual common routine that is also used by
macho-dump (dataToHex) , so I left the 'section_data' test values alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116823 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:39:10 +00:00
Daniel Dunbar
9869413802
Revert r116781 "- Add a hook for target to determine whether an instruction def
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is", which breaks some nightly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 17:14:24 +00:00
Mikhail Glushenkov
99fca5de96
GlobalOpt: EvaluateFunction() must not evaluate stores to weak_odr globals.
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Fixes PR8389.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 16:47:23 +00:00
Che-Liang Chiou
21239d6f3c
Add test case mov.ll for PTX device function
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 13:21:51 +00:00
Rafael Espindola
19785995f6
Fix PR8300 by remembering to keep the bitcast in all cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116788 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 02:02:57 +00:00
Evan Cheng
11e8b74a7a
- Add a hook for target to determine whether an instruction def is
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"long latency" enough to hoist even if it may increase spilling. Reloading
a value from spill slot is often cheaper than performing an expensive
computation in the loop. For X86, that means machine LICM will hoist
SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
instructions.
- Enable register pressure aware machine LICM by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:55:07 +00:00
Eric Christopher
1dcb1eafbc
Speculatively revert 116753 and 116756 to attempt to fix the bots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116777 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:19:49 +00:00
Bob Wilson
3454ed9545
Support alignment for NEON vld-lane and vst-lane instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116776 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:16:32 +00:00
Kevin Enderby
87f4a1a433
Added a few tweaks to the Intel Descriptor-table support instructions to allow
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word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes. This is again for use just with assembly source for llvm-mc .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19 00:01:44 +00:00
Eric Christopher
6e5367d6a3
Revert r116220 - thus turning arm fast isel back on by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116762 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 22:53:53 +00:00
Jason W Kim
4a23a376c0
Get rid of unneeded FormatOutput global variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116756 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 21:59:38 +00:00
Jason W Kim
e7d4a4c6c8
Changed elf-dump to output hex format by default.
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Also updated tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 21:32:41 +00:00
Dan Gohman
fb8096dee5
Don't pass the raw invalid pointer used to represent conflicting
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TBAA information to AliasAnalysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116751 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 21:28:00 +00:00
Dan Gohman
992ac3e6c6
Add a basic testcase for TBAA-aware LICM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 21:00:09 +00:00
Rafael Espindola
eada304793
Implement R_386_GOT32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 20:47:21 +00:00
Rafael Espindola
ce2d3c5775
Relocate with .bss instead of using the symbol. Matches gas behavior.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 20:25:33 +00:00
Dan Gohman
bdcbf6152b
Run tbaa before basicaa, since that's how it's expected to be used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 18:45:59 +00:00
Rafael Espindola
aa85c21633
Produce ELF::R_386_GOTPC relocations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 18:36:12 +00:00
Dan Gohman
01b58f637c
Make TypeBasedAliasAnalysis default to doing nothing, with a command-line
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option to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 18:17:47 +00:00
Dan Gohman
c1be92f3bb
Make BasicAliasAnalysis a normal AliasAnalysis implementation which
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does normal initialization and normal chaining. Change the default
AliasAnalysis implementation to NoAlias.
Update StandardCompileOpts.h and friends to explicitly request
BasicAliasAnalysis.
Update tests to explicitly request -basicaa.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116720 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 18:04:47 +00:00
Kevin Enderby
7aef62ff8c
Added a handful of x86-32 instructions that were missing so that llvm-mc would
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be more complete. These are only expected to be used by llvm-mc with assembly
source so there is no pattern, [], in the .td files. Most are being added to
X86InstrInfo.td as Chris suggested and only comments about register uses are
added. Suggestions welcome on the .td changes as I'm not sure on every detail
of the x86 records. More missing instructions will be coming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 17:04:36 +00:00
Rafael Espindola
9edab3a9e1
Produce a R_386_PLT32 when needed. Moved the default cases of switches to the
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start for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116715 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 16:58:03 +00:00
Rafael Espindola
c97f80efc8
Handle GOTOFF correctly on i386.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116711 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 16:38:04 +00:00
Kalle Raiskila
940e7965f1
Improve lowering of sext to i128 on SPU.
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The old algorithm inserted a 'rotqmbyi' instruction which was
both redundant and wrong - it made shufb select bytes from the
wrong end of the input quad.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116701 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-18 09:34:19 +00:00
Rafael Espindola
f230df9af4
Add a MCObjectFormat class so that code common to all targets that use a
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single object format can be shared.
This also adds support for
mov zed+(bar-foo), %eax
on ELF and COFF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116675 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 18:23:53 +00:00
Benjamin Kramer
d30dcfe331
Unbreak test on non-COFF targets.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116669 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 11:27:13 +00:00
Michael J. Spencer
4cee2890a6
MC-COFF: Add support for default-null weak externals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116666 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 08:25:57 +00:00
Michael J. Spencer
84ac4d5a2a
X86-Windows: Emit an undefined global __fltused symbol when targeting Windows
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if any floating point arguments are passed to an external function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116665 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-16 08:25:41 +00:00
Owen Anderson
6549121c66
Generalize MemCpyOpt's handling of call slot forwarding to function properly when the call slot
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forwarding is implemented with a load/store pair rather than a memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116637 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 22:52:12 +00:00
Mikhail Glushenkov
900152bf88
llvmc: Add a test for the -c flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116611 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 19:30:49 +00:00
Jim Grosbach
8abe32af38
ARM mode encoding information for UBFX and SBFX instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 17:15:16 +00:00
Jakob Stoklund Olesen
c279c9079b
FileCheckize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116581 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 16:06:42 +00:00
Rafael Espindola
5df0b65e8f
Refactor code a bit and avoid creating unnecessary entries in the string
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map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116579 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 15:39:06 +00:00
Bob Wilson
cfbece50f6
ARM instructions that are both predicated and set the condition codes
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have been printed with the "S" modifier after the predicate. With ARM's
unified syntax, they are supposed to go in the other order. We fixed this
for Thumb when we switched to unified syntax but missed changing it for
ARM. Apparently we don't generate these instructions often because no one
noticed until now. Thanks to Bill Wendling for the testcase!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-15 03:23:44 +00:00
Jim Grosbach
53e7dcbd47
Simplify test file a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116540 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 23:32:44 +00:00
Jim Grosbach
8faff9c759
Add testcase for RRX and ASRS (which effectively tests MOVs, since those
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are just forms of that instruction).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116538 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 23:29:18 +00:00
Jim Grosbach
7032f922b1
Refactor the MOVsr[al]_flag and RRX pseudo-instructions to really be pseudos
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and let the ARMExpandPseudoInsts pass fix them up into the real (MOVs)
instruction form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116534 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 22:57:13 +00:00
Jim Grosbach
792e9796b3
Tweak the ARM backend to use the RRX mnemonic instead of the 'mov a, b, rrx'
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pseudonym.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116512 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 20:43:44 +00:00
Jim Grosbach
1de588df69
MOVi16 and MOVT ARM mode encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116498 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 18:54:27 +00:00
Rafael Espindola
a0949b50dc
Remove some code duplication.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116484 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 16:34:44 +00:00
Mikhail Glushenkov
263cfecd4f
Comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116476 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 13:43:20 +00:00
Bill Wendling
bbbdcd453d
Add support for vmov.f64/.f32 encoding. There's a bit of a hack going on
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here. The f32 in FCONSTS is handled as a double instead of a float in the
code. So the encoding of the immediate into the instruction isn't exactly in
line with the documentation in that regard. But given that we know it's handled
as a double, it doesn't cause any harm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 02:33:26 +00:00
Bill Wendling
946a2740a5
Add encoding for 'fmstat'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 01:19:34 +00:00
Bill Wendling
88cf038436
- Add encodings for multiply add/subtract instructions in all their glory.
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- Add missing patterns for some multiply add/subtract instructions.
- Add encodings for VMRS and VMSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116464 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 01:02:08 +00:00
Chris Lattner
a5bbde8efd
fix a bug I introduced, no idea how this didn't repro right.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 00:30:00 +00:00
Chris Lattner
15ea094474
hack to unbreak buildbots
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 00:26:10 +00:00
Chris Lattner
eafc5cb80d
add uadd_ov/usub_ov to apint, consolidate constant folding
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logic to use the new APInt methods. Among other things this
implements rdar://8501501 - llvm.smul.with.overflow.i32 should constant fold
which comes from "clang -ftrapv", originally brought to my attention from PR8221.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116457 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-14 00:05:07 +00:00
Jim Grosbach
b3af5de2d9
Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern
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and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116432 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 21:00:04 +00:00
Bill Wendling
67a704de03
Add MC encodings for VCVT* instrunctions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116431 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 20:58:46 +00:00
Jim Grosbach
b35ad41fef
Add ARM mode encoding for [SU]XT[BH] and [SU]XTA[BH] instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 19:56:10 +00:00
Jim Grosbach
24989ecc70
Add ARM mode operand encoding information for ADDE/SUBE instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116412 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 18:00:52 +00:00
Rafael Espindola
6d8628061b
Fix another case where we were preferring instructions with large
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immediates instead of 8 bits ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116410 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 17:14:25 +00:00
Rafael Espindola
dba81cf40e
Fix PR8365 by adding a more specialized Pat that checks if an 'and' with
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8 bit constants can be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116403 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 13:31:20 +00:00
Bill Wendling
6932643a37
Add encodings for VNEG and VSQRT. Also add encodings for VMOV, but not a test
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just yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-13 01:17:33 +00:00