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6472 Commits

Author SHA1 Message Date
Rafael Espindola
06c1e7eacb implement LowerConstantPool and LowerGlobalAddress 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29433 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 12:58:43 +00:00
Evan Cheng
db3cc3d7d6 Factor topological order code to SelectionDAG. Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29430 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 08:17:22 +00:00
Chris Lattner
f76d180c95 Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll. 
The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29420 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-31 23:26:50 +00:00
Rafael Espindola
6d581e8d15 handle GlobalValue::InternalLinkage in doFinalization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29417 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-31 20:38:13 +00:00
Evan Cheng
ca3202893c Remove a duplicate pattern. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29414 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-31 18:43:10 +00:00
Evan Cheng
043eb829cc Remove a duplicate pattern/ 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-31 18:42:49 +00:00
Chris Lattner
dacbe7b171 Make functions with an "asm" name propagate that asm name into the cbe.c file. 
This fixes link errors on programs with these on targets with prefixes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29390 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 20:58:47 +00:00
Chris Lattner
0d72a20630 Fix some ppc64 issues with vector code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29384 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 16:45:47 +00:00
Evan Cheng
37e1803a66 Can't spell. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29383 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 06:33:41 +00:00
Evan Cheng
ba27731f35 Some clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29382 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 06:05:06 +00:00
Evan Cheng
f2dfafcbc1 Rename IsFoldableBy to CanBeFoldedleBy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 01:03:48 +00:00
Evan Cheng
2584d93acf Node selected into address mode cannot be folded. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 00:49:31 +00:00
Evan Cheng
2641cad180 Remove InFlightSet hack. No longer needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 00:47:19 +00:00
Evan Cheng
63ce5682e2 Another duh. Determine topological order before any target node is added. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29371 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 00:10:59 +00:00
Evan Cheng
0e2c36fcc2 Brain cramp.. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29370 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 23:35:40 +00:00
Evan Cheng
b3c334674d Allocating too large an array for ReachibilityMatrix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29367 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 22:35:40 +00:00
Evan Cheng
5fa5de80e2 Calculate the portion of reachbility matrix on demand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29366 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 22:10:00 +00:00
Evan Cheng
8cbc93aadb isNonImmUse is replaced by IsFoldableBy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29365 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 21:19:10 +00:00
Evan Cheng
f141cc46fa Resolve BB references with relocation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 18:21:10 +00:00
Evan Cheng
7e6e441394 synchronizeICache removeed from TargetJITInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29348 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 17:33:48 +00:00
Evan Cheng
a8df1b4296 Use reachbility information to determine whether a node can be folded into another during isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29346 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 16:44:36 +00:00
Rafael Espindola
b01c4bbb45 emit global constants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29344 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 11:38:51 +00:00
Evan Cheng
33e9ad96c8 Remove NodeDepth 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29338 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 06:40:15 +00:00
Jim Laskey
ea348585c8 Use the predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29322 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 02:05:13 +00:00
Nate Begeman
2f1ae88445 Support jump tables when in PIC relocation model 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 01:13:04 +00:00
Jim Laskey
30ffe1b776 Prevent creation of MachineDebugInfo for intel unless it is darwin. RC842. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29317 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 01:12:23 +00:00
Evan Cheng
ae1d33f82d New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29310 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-26 21:49:52 +00:00
Chris Lattner
35d86fef1f Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29307 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-26 21:12:04 +00:00
Evan Cheng
55fc28076f - Refactor the code that resolve basic block references to a TargetJITInfo 
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29276 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-25 20:40:54 +00:00
Evan Cheng
55371739de Can't commute shufps. The high / low parts elements come from different vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29275 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-25 20:25:40 +00:00
Rafael Espindola
fac00a93a9 implement function calling of functions with up to 4 arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29274 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-25 20:17:20 +00:00
Evan Cheng
46cd65dfa6 Done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29262 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 23:07:23 +00:00
Rafael Espindola
44819cb20a implemented sub 
correctly update the stack pointer in the prologue and epilogue


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 12:26:16 +00:00
Evan Cheng
625518002d This opt is now handled in DAG combine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29243 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 08:26:46 +00:00
Evan Cheng
1e1a88e8cc A splat of a vector constant of all zero or all one is the vector constant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29234 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 23:09:47 +00:00
Evan Cheng
3c62934268 Missing a space. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29233 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 22:52:28 +00:00
Evan Cheng
cbac2fa23a Clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29228 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 21:37:39 +00:00
Evan Cheng
abb4d7829f New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29215 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 21:29:30 +00:00
Jim Laskey
c06fe8a5ac Do once flag never set to true. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29214 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 19:33:08 +00:00
Jim Laskey
613f1f83fd Tidy up a few things. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29213 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 19:32:06 +00:00
Jim Laskey
f19807cecb Reduce size of routine. Shrinks .o by 37%. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29210 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 17:53:32 +00:00
Chris Lattner
2a785500e0 bswapped load/store instructions are only availble in indexed addressing form. 
As such, use xoaddr (indexed only), not xaddr for address selection.

This fixes CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll, a crash compiling lencod.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29208 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 17:15:36 +00:00
Jim Laskey
e29c2f5ca0 Bug#834 ICE (crash in code generator?) when building PCH . 
Missing Darwin check in Intel ATT ASM printer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29204 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 11:54:50 +00:00
Evan Cheng
1c96953d2d Misc. new entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29202 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 06:06:24 +00:00
Evan Cheng
1693e489e6 INC / DEC instructions have shorter code size than ADD32ri8, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29194 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 00:27:29 +00:00
Evan Cheng
e6f32034db Add code size to target instruction use it as the 3rd isel sorting tie-breaker. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29193 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 00:24:41 +00:00
Rafael Espindola
355746359e initial prologue and epilogue implementation. Need to define add and sub before finishing it :-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29175 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-18 17:00:30 +00:00
Chris Lattner
303c695529 Make the implicit def instructions look like other instrs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-18 16:33:26 +00:00
Rafael Espindola
84b19be6ab skeleton of a lowerCall implementation for ARM 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29159 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-16 01:02:57 +00:00
Chris Lattner
ba4733d901 Remove what little AIX support we have. It has never been tested and isn't 
complete.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-15 01:24:23 +00:00
Chris Lattner
a3b5939caa Add an out-of-line virtual method for X86DwarfWriter to give it a home. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29153 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-14 23:05:05 +00:00
Chris Lattner
518f9c7ad0 Add missing PPC64 extload/truncstores 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29140 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-14 04:42:02 +00:00
Chris Lattner
1eeedaea59 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29139 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-14 04:07:29 +00:00
Chris Lattner
a606b70cf5 Another fix in the rotate encodings, needed when the first two operands are not 
the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-13 21:52:41 +00:00
Chris Lattner
45c04fc676 Print negative immediates as negative values instead of large constants 
when using the immshifted addressing mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29130 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 23:24:02 +00:00
Chris Lattner
b2c0650ad3 Fix encoding of rotates, such as rldicl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29128 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 22:08:13 +00:00
Chris Lattner
3bc8a765a9 Implement PPC64 relocations types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29125 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 21:23:20 +00:00
Chris Lattner
3d6721a4a1 An overaggressive #ifdef allows a function to fall off the bottom of the 
function instead of returning a value.  This sometimes allowed the ppc32 jit
to be used in 64-bit mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29123 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 20:42:10 +00:00
Chris Lattner
6d3465793f Add information preventing several register class constraints from working. 
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-12 16:59:49 +00:00
Chris Lattner
be6a039ad4 The PPC64 JIT needs register numbers to encode instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29114 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 20:53:55 +00:00
Evan Cheng
f7eb5d0b02 Emit inc / dec of registers as one byte instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29110 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 19:49:49 +00:00
Jim Laskey
16d42c6ac6 It was pointed out that DEBUG() is only available with -debug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 18:25:13 +00:00
Jim Laskey
e37fe9b3a1 Ensure that dump calls that are associated with asserts are removed from 
non-debug build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 17:58:07 +00:00
Rafael Espindola
a4e64359aa add the memri memory operand 
this makes it possible for ldr instructions with non-zero immediate


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29103 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 11:36:48 +00:00
Chris Lattner
f4dff84c86 Implement the inline asm 'A' constraint. This implements PR825 and 
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29101 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 02:54:03 +00:00
Chris Lattner
804e067042 In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29096 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 00:48:23 +00:00
Evan Cheng
20adf47dbc New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29091 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 21:42:16 +00:00
Evan Cheng
1e60c098cc Fixed stack objects do not specify alignments, but their offsets are known. 
Use that information when doing the transformation to merge multiple loads
into a 128-bit load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29090 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 21:37:44 +00:00
Chris Lattner
d998938459 Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps 
into i16/i32 load/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29089 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 20:56:58 +00:00
Chris Lattner
5c5f4ca6f1 Mark internal function static 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29085 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 19:53:12 +00:00
Rafael Espindola
aefe14299a create the raddr addressing mode that matches any register and the frame index 
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-10 01:41:35 +00:00
Evan Cheng
206ee9d86c X86 target specific DAG combine: turn build_vector (load x), (load x+4), 
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).

e.g.

__m128 test(float a, float b, float c, float d) {
  return _mm_set_ps(d, c, b, a);
}

_test:
        movups 4(%esp), %xmm0
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-07 08:33:52 +00:00
Chris Lattner
90ac1c0775 Undisable ppc64 jit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29011 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-06 17:10:42 +00:00
Evan Cheng
152ed05353 Added option -code-model to set code model (only used in 64-bit) mode. Valid 
values include small, kernel, medium, large, and default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29009 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-06 01:53:36 +00:00
Evan Cheng
60c07e1aea Reorg. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28999 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-05 22:17:51 +00:00
Evan Cheng
507b0aa062 Fix JIT on non MacOS X i386 systems. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28992 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-05 07:09:13 +00:00
Andrew Lenharth
441a57041d These are already implemented 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28990 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-03 18:00:29 +00:00
Andrew Lenharth
78c252c93d 0 offsets for memory operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28989 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-03 17:57:34 +00:00
Evan Cheng
775ff18257 Should just use xorps to clear XMM registers for all data types. pxor is also one byte longer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28984 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 18:04:54 +00:00
Evan Cheng
be33dd95d8 Let X86CompilationCallback pass previous frame and return address to X86CompilationCallback2. Remove alloca hack. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28982 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 01:48:36 +00:00
Evan Cheng
09c545790d Add shift and rotate by 1 instructions / patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28980 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 00:36:51 +00:00
Evan Cheng
a8e83ec8c3 Always use xorps to clear XMM registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28979 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 00:34:23 +00:00
Evan Cheng
d3f6981174 Move .literal4 and .literal8 support into AsmPrinter.cpp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28978 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 00:33:06 +00:00
Chris Lattner
2c79de8018 Hide x86 symbols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28976 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 23:27:49 +00:00
Chris Lattner
9525528a7d Use hidden visibility to make symbols in an anonymous namespace get 
dropped.  This shrinks libllvmgcc.dylib another 67K


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 23:17:24 +00:00
Chris Lattner
2a41a98fb7 shrink libllvmgcc.dylib another 25K 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28971 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 22:00:36 +00:00
Evan Cheng
33c36f306a Doh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28963 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 17:56:43 +00:00
Evan Cheng
ee12e8f28d Oops. Need to keep CP index. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28958 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 07:55:24 +00:00
Evan Cheng
07103d312a Darwin puts float and double literal constants into literal4 and literal8 sections. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28957 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 07:35:41 +00:00
Andrew Lenharth
7794bd3f94 this case isn't handled 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28948 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 23:19:14 +00:00
Rafael Espindola
49e4415587 handle the "mov reg1, reg2" case in isMoveInstr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 21:52:45 +00:00
Chris Lattner
cccef1c6ff Don't match 64-bit bitfield inserts into rlwimi's. todo add rldimi. :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28944 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 21:08:52 +00:00
Chris Lattner
6b76b96c69 Fix ppc64 jump tables 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28941 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:46:17 +00:00
Evan Cheng
4df24f2caf Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28938 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:34:14 +00:00
Chris Lattner
9f029a61e9 Print stubs for external globals right. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28936 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:20:53 +00:00
Chris Lattner
f89437d049 Implement 64-bit select, bswap, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28935 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:14:52 +00:00
Chris Lattner
e4172be920 Add a pattern for i64 sra. Print 8-byte units with a space between the .quad 
and the data


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28934 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 20:07:26 +00:00
Chris Lattner
7ffa9abdad Fix rewriting frame offsets with ixaddr instructions, which implicitly shift 
the offset two bits to the left.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28933 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:55:49 +00:00
Chris Lattner
5f9faeaa78 PPC doesn't have bit converts to/from i64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28932 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:40:08 +00:00
Chris Lattner
2e6b77d803 Add 64-bit MTCTR so that indirect calls work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28931 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:36:44 +00:00
Chris Lattner
1fd81107f3 Fix an incorrect store pattern. This fixes em3d. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28930 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:22:50 +00:00
Chris Lattner
563ecfbf82 Implement 64-bit undef, sub, shl/shr, srem/urem 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28929 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 18:18:41 +00:00
Chris Lattner
7b0c58cd25 Use i32 for shift amounts instead of i64. This gets bisort working. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28927 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 17:34:57 +00:00
Chris Lattner
00659b1781 Add zextload from i32 -> i64, with this, perimeter works. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28926 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 17:30:08 +00:00
Chris Lattner
7e097e4633 Print darwin stub stuff correctly in 64-bit mode. With this, treeadd works in 
ppc64 mode!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28923 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 01:02:25 +00:00
Chris Lattner
529c233498 Fix variable shadowing issue 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28922 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 00:10:13 +00:00
Chris Lattner
c08f902bb7 Implement a bunch of 64-bit cleanliness work. With this, treeadd builds (but 
doesn't work right).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28921 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 00:04:13 +00:00
Chris Lattner
041e9d345f Rearrange compares, add ADDI8, add sext from 32-to-64 bit register 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28920 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-26 23:53:10 +00:00
Chris Lattner
c91a4757b6 Improve PPC64 calling convention support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28919 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-26 22:48:35 +00:00
Chris Lattner
924c576e9f Remove two more definitions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28918 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-26 22:47:37 +00:00
Chris Lattner
7b4e478768 remove two unused instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28917 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-26 22:44:13 +00:00
Evan Cheng
da08d2c39a Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28910 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-24 08:36:10 +00:00
Jim Laskey
89d67faf30 Add and sort "sections" in debug lines. This always stepping through 
code in sections other than ".text", including weak sections like ctors and
dtors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28909 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-23 12:51:53 +00:00
Evan Cheng
74cb064a35 Eliminate unneeded parameter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28907 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-22 00:02:55 +00:00
Evan Cheng
22f71315df variable_ops instructions such as call can have any number of operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28906 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 23:37:07 +00:00
Andrew Lenharth
df97cc67a6 Add memory operand and int regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28896 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 15:42:36 +00:00
Andrew Lenharth
1725599574 inline asm, at least for floats 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28895 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 13:37:27 +00:00
Andrew Lenharth
d1aab35d1a fix argument problem 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28893 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 01:00:43 +00:00
Chris Lattner
ef95710583 Correct returns of 64-bit values, though they seemed to work before... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28892 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 00:34:03 +00:00
Chris Lattner
7f7b346e3d Make these predicates correct in 64-bit mode too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:21:20 +00:00
Chris Lattner
b410dc9977 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:18:58 +00:00
Chris Lattner
96dc5e5f6d remove unused flag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28888 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:15:07 +00:00
Chris Lattner
f2c5bca165 add some logical ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28887 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:11:59 +00:00
Chris Lattner
4b25b40486 remove some unused patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28886 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:11:36 +00:00
Chris Lattner
3ae5eef027 Add some more immediate patterns. This allows us to compile: 
void test6() {
  Y = 0xABCD0123BCDE4567;
}

into:

_test6:
        lis r2, -21555
        lis r3, ha16(_Y)
        ori r2, r2, 291
        rldicr r2, r2, 32, 31
        oris r2, r2, 48350
        ori r2, r2, 17767
        std r2, lo16(_Y)(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28885 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:03:01 +00:00
Chris Lattner
eded521a17 Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is 
set, so disable the pattern in that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28884 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 22:38:59 +00:00
Chris Lattner
0ea70b219a Add some 64-bit logical ops. 
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation.  For example, we now compile this:

static unsigned long long Y;
void test3() {
  Y = 0xF0F00F00;
}

into:

_test3:
        li r2, 3840
        lis r3, ha16(_Y)
        xoris r2, r2, 61680
        std r2, lo16(_Y)(r3)
        blr

GCC produces:

_test3:
        li r0,0
        lis r2,ha16(_Y)
        ori r0,r0,61680
        sldi r0,r0,16
        ori r0,r0,3840
        std r0,lo16(_Y)(r2)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28883 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 22:34:10 +00:00
Evan Cheng
e3db4daa16 __i386__, __i386, etc. are not defined for x86-64. Use __x86_64__. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28881 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 22:11:12 +00:00
Chris Lattner
dd58343857 64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 21:39:30 +00:00
Chris Lattner
f27bb6de10 Add some patterns for globals, so we can now compile this: 
static unsigned long long X, Y;
void test1() {
  X = Y;
}

into:

_test1:
        lis r2, ha16(_Y)
        lis r3, ha16(_X)
        ld r2, lo16(_Y)(r2)
        std r2, lo16(_X)(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28879 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 21:23:06 +00:00
Chris Lattner
4e85e64007 Remove some now-unneeded casts from instruction patterns. With the casts 
removed, tblgen produces identical output to with them in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28867 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:39:56 +00:00
Chris Lattner
047854f2b7 Add some patterns for ppc64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28866 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:38:36 +00:00
Chris Lattner
30da68acce Remove some ugly now-redundant casts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28864 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:25:29 +00:00
Chris Lattner
a973993c0c Fix some mismatched type constraints 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28862 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:12:37 +00:00
Evan Cheng
b21495043e Minor clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28860 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-19 19:25:30 +00:00
Rafael Espindola
58421d7d08 initial implementation of ARMRegisterInfo::eliminateFrameIndex 
fixes test/Regression/CodeGen/ARM/ret_arg5.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-18 00:08:07 +00:00
Evan Cheng
357edf8a4f A new entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28848 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-17 00:45:49 +00:00
Chris Lattner
b1d26f6665 Implement the getPointerRegClass method, which is required for the ptr_rc 
magic to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28847 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-17 00:01:04 +00:00
Evan Cheng
54edc84000 Later models likely to have Yonah like attributes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28843 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:58:49 +00:00
Chris Lattner
a24b7618f8 Upgrade some load/store instructions to use the proper addressing mode stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:41 +00:00
Chris Lattner
66d7ebb777 In 64-bit mode, addr mode operands use G8RC instead of GPRC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28840 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:03 +00:00
Chris Lattner
059ca0f5b7 fix some assumptions that pointers can only be 32-bits. With this, we can 
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:01:35 +00:00
Chris Lattner
956f43c310 Split 64-bit instructions out into a separate .td file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28838 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:22:01 +00:00
Chris Lattner
8fa05dac39 Force 64-bit register availability in 64-bit mode. For real. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:05:06 +00:00
Chris Lattner
af89fa609b Remove the -darwin and -aix llc options, inferring darwinism and aixism from 
the target triple & subtarget info.  woo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:50:48 +00:00
Chris Lattner
1790d44d0d Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:22:52 +00:00
Chris Lattner
acbc07aa22 Remove ctor with each piece specifyable (which causes overload ambiguities), 
add a new init method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28828 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:11:26 +00:00
Chris Lattner
7c1fb5f08c Document the subtarget features better, make sure that 64-bit mode, 64-bit 
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 17:50:12 +00:00
Chris Lattner
a7a5854f1c Rename some subtarget features. A CPU now can *have* 64-bit instructions, 
can in 32-bit mode we can choose to optionally *use* 64-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 17:34:12 +00:00
Chris Lattner
94de9a8951 First baby step towards ppc64 support. This adds a new -march=ppc64 backend 
that is currently just like ppc32 :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 01:37:27 +00:00
Chris Lattner
8e173de059 Add a note that Nate noticed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28808 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 21:33:31 +00:00
Jim Laskey
f8a01a9661 1. Support standard dwarf format (was bootstrapping in Apple format.) 
2. Add vector support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28807 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 20:51:43 +00:00
Evan Cheng
31f7be9fb7 Vector extract / insert index operand should have ptr type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28798 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:19:05 +00:00
Evan Cheng
a7dc4a59cb Type of extract_element index operand should be iPTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:18:06 +00:00
Evan Cheng
015188ffbc Type of vector extract / insert index operand should be iPTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:14:54 +00:00
Evan Cheng
fae2994302 X86 call instructions can take variable number of operands. Parameters of 
vector types are passed via XMM registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28789 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 22:24:55 +00:00
Chris Lattner
4b5a352f25 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28787 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 21:26:18 +00:00
Evan Cheng
b69d113201 Add argument registers to the end of call operand list (partial fix). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28783 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 18:17:40 +00:00
Jim Laskey
014f98c7e5 Place dwarf headers at earliest possible point. Well behaved when skipping 
functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28781 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 11:35:03 +00:00
Andrew Lenharth
c8aba85e1c I am sure I had commited this workaround before. Perhaps soon I should sort it all out 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28772 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 20:34:47 +00:00
Andrew Lenharth
0e4dd01ffc It really helps to be returning to the correct place 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28769 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 18:27:39 +00:00
Evan Cheng
004fb92615 Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28764 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 05:14:44 +00:00
Chris Lattner
e67304fb78 Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register 
allocated, thus live across the save/reload.  This fixes

llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg

and probably others, with -regalloc=local.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28761 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 23:59:16 +00:00
Chris Lattner
b47e0897a0 Fix spilling and reloading of CR regs to reload the right values. This fixes 
Olden/power (and probably others) with -regalloc=local.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28760 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 21:50:57 +00:00
Andrew Lenharth
f2b806a1aa Let the alpha breakage begin. First Formals and RET. next Calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28753 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 18:09:24 +00:00
Rafael Espindola
337c4ad6e7 lower more then 4 formal arguments. The offset is currently hard coded. 
implement SelectFrameIndex


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28751 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 12:28:08 +00:00
Chris Lattner
cf00631719 Work around a nasty tblgen bug where it doesn't add operands for varargs 
nodes correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28745 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-10 01:15:02 +00:00
Chris Lattner
4a45abf66e Fix a problem exposed by the local allocator. CALL instructions are not marked 
as using incoming argument registers, so the local allocator would clobber them
between their set and use.  To fix this, we give the call instructions a variable
number of uses in the CALL MachineInstr itself, so live variables understands
the live ranges of these register arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28744 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-10 01:14:28 +00:00
Evan Cheng
e5e228df19 Comments to appease sabre. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28737 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-09 06:25:10 +00:00
Evan Cheng
b12223e284 Minor compilation speed improvement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28736 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-09 06:24:42 +00:00
Chris Lattner
c0bad5706e Add support for "m" inline asm constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28728 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-08 18:03:49 +00:00
Evan Cheng
e8bd0a332a Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28703 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 23:30:24 +00:00
Chris Lattner
475c55393a Now that PR633 is implemented, the CBE can know to emit _setjmp/_longjmp 
when available.  This speeds up hexxagon from 18.61s to 16.61s with the CBE on
PPC Mac OS (for reference, LLC is 15.48s and GCC is 23.35s).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28697 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 21:45:47 +00:00
Chris Lattner
001db453f5 Add PowerPC intrinsics to support dcbz[l] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28696 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 21:29:23 +00:00
Rafael Espindola
4b02367d54 add R0 to liveout 
expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28691 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-05 22:26:14 +00:00
Evan Cheng
c21051ff96 A few new entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28683 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-04 09:08:00 +00:00
Evan Cheng
f8614db52e Be consistent with gcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28682 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-04 07:24:07 +00:00
Andrew Lenharth
a5cc38bcbd ignore ordered/unordered for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28679 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-04 00:25:51 +00:00
Evan Cheng
3649b0efa5 Cygwin support. Patch by Anton Korobeynikov! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28672 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 22:38:37 +00:00
Evan Cheng
aede9b9598 Use xor to clear a register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28667 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 21:20:34 +00:00
Evan Cheng
94b1453278 Incorrect AT&T opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28666 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 21:09:10 +00:00
Chris Lattner
d9477607dc Add mingw support, patch contributed by Anton 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28661 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 18:54:01 +00:00
Chris Lattner
08a9a985dc Silence -pedantic warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 17:17:06 +00:00
Chris Lattner
078d1826d2 Silence -pedantic warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28630 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 17:13:10 +00:00
Evan Cheng
2675534b7f Typos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28617 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 05:53:27 +00:00
Reid Spencer
a2e05ea997 For PR786: 
Don't warn about -pedantic errors. Add a note to the PR instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28616 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 05:49:51 +00:00
Reid Spencer
72f42bbc9b For PR786: 
Turn -pedantic and -Wno-long-long compile flags on by default. In a few
places, avoid the warnings by removing these options in the local makefile.
One notable exception: lib/Target/CBackend/Writer.cpp. These warnings are
left on as a reminder to developers to clean them up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28614 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 01:55:21 +00:00
Reid Spencer
18c8b49e7d Use archive libraries instead of object files for VMCore, BCReader, 
BCWriter, and bzip2 libraries. Adjust the various makefiles to accommodate
these changes. This was done to speed up link times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28610 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 01:30:27 +00:00
Evan Cheng
04b2562502 Remove a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28607 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 00:30:39 +00:00
Evan Cheng
cbe70e1c4b Rename ASM modifier trunc8, trunc16 to subreg8, subreg16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28606 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 22:34:26 +00:00
Reid Spencer
2bc320de0c Fix casting so there's no warning on Alpha. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28605 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 22:26:11 +00:00
Evan Cheng
f91c10153c Sign extender 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28603 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 22:05:11 +00:00
Evan Cheng
190717d3cf Rename instructions for consistency sake. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28594 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 19:00:07 +00:00
Evan Cheng
9d09b89f39 Select vector_shuffle v1, undef <2, 3, ?, ?> to MOVHLPS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28582 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 00:51:37 +00:00
Evan Cheng
8f692e2457 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28581 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 00:50:42 +00:00
Evan Cheng
5a47282149 A new entry 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28579 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 23:56:31 +00:00
Evan Cheng
b5e406afc3 MAXP{D|S} and MINP{D|S} are commutable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28578 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 23:47:30 +00:00
Evan Cheng
efeaed8fb4 Commute shufps / shufpd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28577 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 23:34:30 +00:00
Evan Cheng
a0eaf2d0c5 Somehow I lost a condition when I was shuffling some code around. Anyway, 
only transform a shufps to pshufd when the first two operands are the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28575 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 22:13:36 +00:00
Evan Cheng
aa3c1410b4 Fix a build breaker. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28574 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:45:53 +00:00
Evan Cheng
51da42c28f Oops. PSHUFD is only available with SSE2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28573 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:30:59 +00:00
Chris Lattner
9e18ef5262 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28572 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:29:15 +00:00
Chris Lattner
7b05350906 Always reserve space for 8 spilled GPRs. GCC apparently assumes that this 
space will be available, even if the callee isn't varargs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28571 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:21:04 +00:00
Evan Cheng
ccba76bb25 Allow shufps x, x, mask to be converted to pshufd x, mask to save a move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28565 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 20:26:50 +00:00
Evan Cheng
eaf1e31775 Remove bogus comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28564 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 20:24:48 +00:00
Rafael Espindola
85ede37ca9 Expand ret into "CopyToReg;BRIND" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28559 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 17:33:19 +00:00
Evan Cheng
5a622f2e06 Add a note about integer multiplication by constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28551 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 07:37:37 +00:00
Evan Cheng
e6ad27e917 A addressing mode folding enhancement: 
Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
  return (x << 3) + 7;
}

This can be codegen'd as:
leal 7(,%eax,8), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28550 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 06:59:36 +00:00
Evan Cheng
8c65fa564a Some new entries about truncate / anyext 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28548 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 06:23:50 +00:00
Chris Lattner
a5135ba0c9 Ignore generated files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28520 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-27 01:23:30 +00:00
Evan Cheng
6848be1a27 Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 23:10:12 +00:00
Evan Cheng
3fddf241d8 Vector argument must be passed in memory location aligned on 16-byte boundary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28505 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 20:37:47 +00:00
Evan Cheng
1d6a9b3b6c Mac OS X ABI document lied. The first four XMM registers are used to pass 
vector arguments, not three.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28504 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 19:22:06 +00:00
Evan Cheng
052fb5110f Minor update to make the code more clear 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28499 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:39:59 +00:00
Evan Cheng
f9d62dc6e5 Update more comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28498 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:37:16 +00:00
Evan Cheng
f9ff7c54be Fix some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28497 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:25:43 +00:00
Evan Cheng
6f707999a1 No need to handle illegal types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28496 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 18:22:49 +00:00
Rafael Espindola
a1334cdfb2 On ARM, alignment is in bits 
Add lr as a hard coded operand of bx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28494 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 10:56:17 +00:00
Evan Cheng
138a24e4d4 Remove a couple of bogus casts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28493 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 08:04:31 +00:00
Evan Cheng
57c0788e02 Minor bug caught by Ashwin Chandra 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28491 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 06:22:34 +00:00
Evan Cheng
cc1fc220a0 Consistency 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28488 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 23:31:23 +00:00
Evan Cheng
25e71d10a0 Some clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28483 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 22:38:31 +00:00
Chris Lattner
8b5fbc5cd4 Add support for the missing FP condition codes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28482 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 22:26:02 +00:00
Evan Cheng
a9bb445db0 Remove some dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28481 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 22:25:52 +00:00
Evan Cheng
932ad51fea X86 / Cygwin asm / alignment fixes. 
Patch contributed by Anton Korobeynikov!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28480 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 21:59:08 +00:00
Evan Cheng
6b5783d0b1 Build breakage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28475 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 18:56:34 +00:00
Chris Lattner
8e2a04e21d Fix build failure of povray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28473 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 18:06:16 +00:00
Chris Lattner
5d634ce466 Fix Benchmarks/MallocBench/cfrac 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28471 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 16:54:16 +00:00
Rafael Espindola
2f99b6bd96 implement initial version of ARMAsmPrinter::printOperand 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28470 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 12:57:06 +00:00
Rafael Espindola
c3c1a86aa0 port the ARM backend to use ISD::CALL instead of LowerCallTo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28469 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 11:00:18 +00:00
Evan Cheng
32fe1035a7 Switch X86 over to a call-selection model where the lowering code creates 
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28463 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:59:30 +00:00
Evan Cheng
4360bdcf1f CALL node change (arg / sign pairs instead of just arguments). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28462 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:57:32 +00:00
Evan Cheng
6a3d5a62f0 Assert if InflightSet is not cleared after instruction selecting a BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28459 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:24:28 +00:00
Evan Cheng
afe358e7d4 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 20:46:25 +00:00
Reid Spencer
19b7e0e0ca For PR786: 
Minor tweaks in public headers and a few .cpp files so that LLVM can build
successfully with -pedantic and projects using LLVM with -pedantic don't
get warnings from LLVM. There's still more -pedantic warnings to fix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28453 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 19:21:13 +00:00
Reid Spencer
077b387207 For PR786: 
Remove a spurious ;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28452 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 19:05:21 +00:00
Chris Lattner
d74ea2bbd8 Patches to make the LLVM sources more -pedantic clean. Patch provided 
by Anton Korobeynikov!  This is a step towards closing PR786.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 17:04:05 +00:00
Chris Lattner
2ef5e89dc9 Fix CodeGen/Generic/vector.ll:test_div with altivec. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28445 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 00:15:25 +00:00
Chris Lattner
5734012375 Handle SETO* like we handle SET*, restoring behavior after Evan's setcc 
change.  This fixes PowerPC/fnegsel.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28443 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 00:06:44 +00:00
Chris Lattner
0c54d8964d Print struct return functions and calls as actually returning the hidden 
argument struct pointer, enabling ABI compatibility for the CBE with
platforms with strange struct-return ABIs.  This fixes 252.eon and
CoyoteBench/fftbench on Darwin/X86 among other things.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28442 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 23:39:48 +00:00
Chris Lattner
c6d0567324 Fix file header comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28441 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 23:20:42 +00:00
Evan Cheng
4db3af3511 Better way to check for vararg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28440 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 21:08:24 +00:00
Evan Cheng
25caf63cd2 Remove PreprocessCCCArguments and PreprocessFastCCArguments now that 
FORMAL_ARGUMENTS nodes include a token operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28439 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 21:06:34 +00:00
Chris Lattner
2d2970905c Implement an annoying part of the Darwin/X86 abi: the callee of a struct 
return argument pops the hidden struct pointer if present, not the caller.

For example, in this testcase:

struct X { int D, E, F, G; };
struct X bar() {
  struct X a;
  a.D = 0;
  a.E = 1;
  a.F = 2;
  a.G = 3;
  return a;
}
void foo(struct X *P) {
  *P = bar();
}

We used to emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
        addl $28, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
        ret

This is correct on Linux/X86 but not Darwin/X86.  With this patch, we now
emit:

_foo:
        subl $28, %esp
        movl 32(%esp), %eax
        movl %eax, (%esp)
        call _bar
***     addl $24, %esp
        ret
_bar:
        movl 4(%esp), %eax
        movl $0, (%eax)
        movl $1, 4(%eax)
        movl $2, 8(%eax)
        movl $3, 12(%eax)
***     ret $4

For the record, GCC emits (which is functionally equivalent to our new code):

_bar:
        movl    4(%esp), %eax
        movl    $3, 12(%eax)
        movl    $2, 8(%eax)
        movl    $1, 4(%eax)
        movl    $0, (%eax)
        ret     $4
_foo:
        pushl   %esi
        subl    $40, %esp
        movl    48(%esp), %esi
        leal    16(%esp), %eax
        movl    %eax, (%esp)
        call    _bar
        subl    $4, %esp
        movl    16(%esp), %eax
        movl    %eax, (%esi)
        movl    20(%esp), %eax
        movl    %eax, 4(%esi)
        movl    24(%esp), %eax
        movl    %eax, 8(%esi)
        movl    28(%esp), %eax
        movl    %eax, 12(%esi)
        addl    $40, %esp
        popl    %esi
        ret

This fixes SingleSource/Benchmarks/CoyoteBench/fftbench with LLC and the
JIT, and fixes the X86-backend portion of PR729.  The CBE still needs to
be updated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28438 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 18:50:38 +00:00
Evan Cheng
80235d508e -enable-unsafe-fp-math implies -enable-finite-only-fp-math 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28437 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 18:18:46 +00:00
Evan Cheng
95942d76f4 Added option -enable-finite-only-fp-math. When on, the codegen can assume that 
FP arithmetic arguments and results are never NaNs or +=Infs. This includes
ignoring parity flag (PF) when checking for FP equality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28432 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 06:39:12 +00:00
Rafael Espindola
4b442b528a implement minimal versions of 
ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28431 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 02:48:20 +00:00
Evan Cheng
435bcd7f5f A isel deficiency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28427 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-22 05:54:49 +00:00
Evan Cheng
3c380e71e1 Back out indirect branch load folding hack. It broke some tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28425 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-21 06:28:50 +00:00
Chris Lattner
e8263e6437 Add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28424 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-21 03:57:07 +00:00