6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-24 23:29:41 +00:00
Code Issues Projects Releases Wiki Activity
49,379 Commits 39 Branches 0 Tags 277 MiB
dced03fc84
Commit Graph

1249 Commits

Author SHA1 Message Date
Evan Cheng
6267422318 Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74228 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 23:34:10 +00:00
David Goodwin
0919a916bf Use MVN for ~t2_so_imm immediates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74223 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 23:11:21 +00:00
David Goodwin
c9ee1189c5 Add Def/Use of CPSR for Thumb-1 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74219 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 22:49:55 +00:00
Evan Cheng
9e03cbefc5 Unbreak mingw build. Patch by Viktor Kutuzov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74212 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 22:04:44 +00:00
Evan Cheng
1e249e3705 ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74200 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 20:59:23 +00:00
David Goodwin
9a36bdbaf1 Test commit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74185 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 17:52:32 +00:00
Bob Wilson
e481f12749 Revert 74164. We'll want to use this method later. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74176 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 16:03:07 +00:00
Bob Wilson
c9028e69f1 Remove unused hasV6T2Ops method. We already have a separate feature to 
identify Thumb2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74164 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 05:20:31 +00:00
Douglas Gregor
4b73893d82 Add missing dependencies to the CMake build system. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74161 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 05:03:06 +00:00
Evan Cheng
0aa1d8c52d Change thumb2 instruction definitions so if-converter so add predicate operands and / or flip the 's' bit to set the condition flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74158 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 02:08:06 +00:00
Evan Cheng
b6c29d5512 Add thumb2 add sp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74156 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 01:21:30 +00:00
Evan Cheng
7dcf4a826c Some reorg and additional comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74152 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 01:05:06 +00:00
Devang Patel
e4c0c0fab8 No need to code gen MDNodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74150 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 00:47:42 +00:00
Evan Cheng
a09b9ca10f Add Thumb2 pc relative add. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74141 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 23:47:58 +00:00
Evan Cheng
023dd3fb0b 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74138 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 23:14:45 +00:00
Chris Lattner
1f522feabf sink dwarf finalization out of each target into AsmPrinter::doFinalization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74097 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:54:37 +00:00
Chris Lattner
0a7befa8bd eliminate the ExtWeakSymbols set from AsmPrinter. This eliminates 
a bunch of code from all the targets, and eliminates nondeterministic
ordering of directives being emitted in the output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74096 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 18:52:01 +00:00
Nick Lewycky
b825aaa028 Unbreak build on Linux by removing Darwinism. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74046 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 01:08:42 +00:00
Dan Gohman
fd6325cbb2 Revert this accidental commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74042 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 00:55:55 +00:00
Dan Gohman
6bbcba18db Move the special cases for constants out of getUnknown and into 
createSCEV. Also, recognize UndefValue in createSCEV.

Change getIntegerSCEV's comment to avoid mentioning FP types,
and re-implement it in terms of getConstant instead of getUnknown.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74041 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 00:54:57 +00:00
Bob Wilson
a96751fc8f Provide InitializeAllTargets and InitializeNativeTarget functions in the 
C bindings.  Change all the backend "Initialize" functions to have C linkage.
Change the "llvm/Config/Targets.def" header to use C-style comments to avoid
compile warnings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74026 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 23:59:40 +00:00
Evan Cheng
b8f7706911 Test instructions operands were printed in the wrong order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73990 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:56:37 +00:00
Evan Cheng
a67efd1226 Proper patterns for thumb2 shift and rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73987 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:39:13 +00:00
Evan Cheng
e870af4837 Code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73986 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:38:34 +00:00
Evan Cheng
09c39fcf83 Add IsThumb1Only to most 16-bit thumb instructions since we want to isel 32-bit instructions when they are available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73985 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:38:13 +00:00
Evan Cheng
e499f97058 Rename SelectShifterOperand to SelectThumb2ShifterOperandReg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73975 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 18:14:38 +00:00
Douglas Gregor
7e9e36a23e Eliminate object-relinking support from CMake. Fixes PR 4429 and 
cleans up the CMake-based build system a bit. Started by a patch from
Xerxes Rånby.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73969 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 17:57:35 +00:00
Evan Cheng
83a2129332 Obvious typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73967 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 17:54:26 +00:00
Evan Cheng
f49810c7e6 Initial Thumb2 support. Majority of the work is done by David Goodwin. There are 
also some contribution from Jim Grosbach, Bob Wilson, and Evan Cheng.

I've done my best to consolidate the patches with those that were done by
Viktor Kutuzov and Anton Korzh from Access Softek, Inc. Let me know if missed
anything. I've completely reorganized the thumb2 td file, made more extensive
uses of multiclass, etc.

Test cases will be contributed later after I re-organize what's in svn first.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73965 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 17:48:47 +00:00
Evan Cheng
e07715cfba Minor reorg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 05:25:29 +00:00
Evan Cheng
3850a6ae9d Replace isTwoAddress with operand constraint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73947 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 05:23:49 +00:00
Bob Wilson
5bafff36c7 Add support for ARM's Advanced SIMD (NEON) instruction set. 
This is still a work in progress but most of the NEON instruction set
is supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 23:27:02 +00:00
Bob Wilson
1c76d0ee5c Add explicit types for shift count constants. This is in preparation for 
another change that makes the types ambiguous (at least as far as tablegen
is concerned).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73909 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 22:08:29 +00:00
Bob Wilson
9170ab6685 Use thumb2 for ARM architectures V6T2 and later. Fix a bug in checking 
for "thumb" and add a check for V6T2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73905 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 21:28:22 +00:00
Bob Wilson
54fc124d72 For Darwin on ARMv6 and newer, make register r9 available for use as a 
caller-saved register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73901 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 21:01:46 +00:00
Evan Cheng
8dcbbdd00e hasFP should return true if frame address is taken. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73893 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 18:38:48 +00:00
Bob Wilson
e64e3cf9ad Fix llvm-gcc build for armv6t2 and later architectures. The hasV6T2Ops 
predicate does not check if Thumb mode is enabled, and when in ARM mode
there are still some checks for constant-pool use that need to run.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73887 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 17:29:13 +00:00
Devang Patel
e9fe6c7729 Remove unused field. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73815 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 01:07:54 +00:00
Evan Cheng
ae69a2a12b Enable arm pre-allocation load / store multiple optimization pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73791 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 23:17:27 +00:00
Devang Patel
14a55d952c Move up dwarf writer initialization in common AsmPrinter class. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73784 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 21:54:26 +00:00
Evan Cheng
b1019480b6 Add comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73761 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 07:06:07 +00:00
Evan Cheng
7a42b08be8 Should be using Bcc (average) latency to determine if-conversion threshold, not BL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73759 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 06:56:26 +00:00
Evan Cheng
974fe5d691 Transfer dead markers when a ldrd is changed into a ldm or a pair of ldr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73749 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:59:04 +00:00
Evan Cheng
8557c2bcb8 Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73747 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:51:50 +00:00
Eli Friedman
6b7bb42c36 Mark a few Thumb instructions commutable; just happened to spot this 
while experimenting.  I'm reasonably sure this is correct, but please 
tell me if these instructions have some strange property which makes this
change unsafe.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73746 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:43:08 +00:00
Chris Lattner
4e0f25b603 merge the common darwin settings from the X86/PPC/ARM targets 
into DarwinTargetAsmInfo.cpp.  The remaining differences should
be evaluated.  It seems strange that x86/arm has .zerofill but ppc
doesn't, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73742 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 00:08:39 +00:00
Chris Lattner
a93ca92379 move mangler quote handling from asm printers to TargetAsmInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73738 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:41:35 +00:00
Chris Lattner
b839c3f577 simplify macro debug info directive handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:31:37 +00:00
Evan Cheng
cd828618b8 Remove UseThumbBacktraces. Just check if subtarget is darwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73734 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 23:14:30 +00:00
Evan Cheng
b13bafe5c1 On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73720 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 20:37:15 +00:00
Evan Cheng
f9f1da17f8 - Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints. 
- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping.
- More fixes to get ARM load / store double word working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73671 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 02:04:01 +00:00
Bob Wilson
ff6de36558 ARM unified syntax is not specific to ELF; use it for Darwin, too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73665 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-18 00:36:17 +00:00
Anton Korobeynikov
7c4f7dd43a Fix asm string from MOVi16 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73661 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 23:43:36 +00:00
Anton Korobeynikov
d61eca5330 Thumb2 instructions are enabled only in unified assembler mode. 
Emit switch directive for it. I have no idea whether this is
requirement for Darwin or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73660 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 23:43:18 +00:00
Anton Korobeynikov
52237119a9 Initial support for some Thumb2 instructions. 
Patch by Viktor Kutuzov and Anton Korzh from Access Softek, Inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73622 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-17 18:13:58 +00:00
Douglas Gregor
1555a23335 Introduce new headers whose inclusion forces linking and 
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73543 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 20:12:29 +00:00
Anton Korobeynikov
385f5a99ec Address review comments: add 3 ARM calling conventions. 
Dispatch C calling conv. to one of these conventions based on
target triple and subtarget features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73530 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 18:50:49 +00:00
Anton Korobeynikov
2932795309 GNU as refuses to assemble "pop {}" instruction. Do not emit such 
(this is the case when we have thumb vararg function with single
callee-saved register, which is handled separately).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73529 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-16 18:49:08 +00:00
Evan Cheng
88cc7c4194 On Darwin, frame pointer r7 is never available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73434 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 22:32:01 +00:00
Anton Korobeynikov
bb62962342 Rename methods for the sake of consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 21:46:20 +00:00
Evan Cheng
675860758e Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73422 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 21:18:20 +00:00
Evan Cheng
d780f35794 Do not form ldrd / strd if the two dests / srcs are the same. Code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73413 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 20:54:56 +00:00
Evan Cheng
7f04428738 Silence a warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73406 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 19:36:32 +00:00
Evan Cheng
358dec5180 Part 1. 
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent.
- Allow targets to specify alternative register allocation orders based on allocation hint.

Part 2.
- Use the register allocation hint system to implement more aggressive load / store multiple formation.
- Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g.
v1025 = LDR v1024, 0
v1026 = LDR v1024, 0
=>
v1025,v1026 = LDRD v1024, 0

If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair.

- Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions.

This is work in progress, not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-15 08:28:29 +00:00
Evan Cheng
e7d6df7353 Add a ARM specific pre-allocation pass that re-schedule loads / stores from 
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73291 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-13 09:12:55 +00:00
Evan Cheng
cd799b99cb Mark some pattern-less instructions as neverHasSideEffects. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73252 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-12 20:46:18 +00:00
Anton Korobeynikov
2e7ccfce98 Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73098 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:59:50 +00:00
Anton Korobeynikov
dada95b5b3 Revert hunk commited by accident 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73097 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:57:18 +00:00
Anton Korobeynikov
0eebf653a7 The attached patches implement most of the ARM AAPCS-VFP hard float 
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73095 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 22:53:56 +00:00
Anton Korobeynikov
fbbf1eeccf Separate V6 from V6T2 since the latter has some extra nice instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 21:20:36 +00:00
Anton Korobeynikov
a7b0ded2a2 Add helper for checking of Thumb1 mode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73080 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-08 20:31:02 +00:00
Dan Gohman
2392efef1b Add explicit keywords. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72969 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 23:05:51 +00:00
Evan Cheng
925492279a Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72955 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 19:08:58 +00:00
Evan Cheng
87d59e49e9 When merging multiple load / store instructions. Use the DebugLoc of the first one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72952 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 18:19:23 +00:00
Evan Cheng
5ba71887f9 Code clean up: return vector by reference rather than by value. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72950 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 17:56:14 +00:00
Dan Gohman
c965ee223c Remove some unnecessary #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72948 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-05 16:32:58 +00:00
Evan Cheng
1488326156 Re-apply 72756 with fixes. One of those was introduced by we changed MachineInstrBuilder::addReg() interface. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72826 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-04 01:15:28 +00:00
Evan Cheng
70fd60bd57 Temporarily revert 72756 for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72757 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 07:40:47 +00:00
Evan Cheng
9d5fb981b0 Fold preceding / trailing base inc / dec into the single load / store as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72756 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-03 06:14:58 +00:00
Anton Korobeynikov
70459bef9c Implement review feedback. Make thumb2 'normal' subtarget feature 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72698 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 20:00:48 +00:00
Bruno Cardoso Lopes
434dd4fd94 Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:57:37 +00:00
Anton Korobeynikov
d260c248ab Do not emit "generic" CPU string. This fixes PR4291. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-01 19:03:17 +00:00
Bruno Cardoso Lopes
a3f99f9033 First patch in the direction of splitting MachineCodeEmitter in two subclasses: 
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 20:51:52 +00:00
Bill Wendling
51b16f4737 Untabification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72604 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-30 01:09:53 +00:00
Anton Korobeynikov
d4022c3fbb Add placeholder for thumb2 stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72593 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-29 23:41:08 +00:00
Chris Lattner
0c85aabfdc fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72395 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-25 19:51:07 +00:00
Anton Korobeynikov
6d7d2aa38a Add ARMv7 architecture, Cortex processors and different FPU modes handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72337 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:51:43 +00:00
Anton Korobeynikov
88ce667003 Emit ARM Build Attributes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:51:20 +00:00
Anton Korobeynikov
41a024385f Propagate CPU string out of SubtargetFeatures 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72335 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-23 19:50:50 +00:00
Bob Wilson
2f95461ee2 Only 64-bit targets support TImode libcalls. Disable the TImode shift libcalls 
for ARM.  This fixes rdar://6908807.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72269 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-22 17:38:41 +00:00
Bob Wilson
261f2a2337 Minor formatting fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72172 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-20 16:30:25 +00:00
Bob Wilson
6aa219a18c Fix pr4227: Handle large immediate values in inline assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72138 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 21:27:57 +00:00
Bob Wilson
86c212e894 Follow up on new support for memory operands in ARM inline assembly. 
This fixes pr4233.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72115 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 18:33:02 +00:00
Bob Wilson
04746eae49 Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and 
the stack.  Patch by Sandeep Patel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72106 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 10:02:36 +00:00
Bob Wilson
224c244f56 Fix pr4091: Add support for "m" constraint in ARM inline assembly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72105 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-19 05:53:42 +00:00
Bob Wilson
e6abdffe06 Fix pr4202: Disable CodePlacementOpt for ARM. The ARMConstantIslandPass has 
to run last because it needs to know the exact size and position of every
basic block.  Currently CodePlacementOpt is set up to run last.  It might be
worthwhile to investigate reordering these passes, but for now, let's just
make it work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72037 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-18 20:55:32 +00:00
Jim Grosbach
f957012866 Update the names of the exception handling sjlj instrinsics to 
llvm.eh.sjlj.* for better clarity as to their purpose and scope. Add
a description of llvm.eh.sjlj.setjmp to ExceptionHandling.html.
(llvm.eh.sjlj.longjmp documentation coming when that implementation is
added).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71758 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-14 00:46:35 +00:00
Jim Grosbach
6aa7197fb5 Spelling correction s/builting/builtin/ and remove trailing whitespace in a few places 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71735 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 22:32:43 +00:00
Evan Cheng
6ebf7bc740 Run code placement optimization for targets that want it (arm and x86 for now). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71726 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 21:42:09 +00:00
Bill Wendling
587daedce2 Change MachineInstrBuilder::addReg() to take a flag instead of a list of 
booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.

I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71722 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-13 21:33:08 +00:00
Jim Grosbach
0e0da734bb Add support for GCC compatible builtin setjmp and longjmp intrinsics. This is 
a supporting preliminary patch for GCC-compatible SjLJ exception handling. Note that these intrinsics are not designed to be invoked directly by the user, but
rather used by the front-end as target hooks for exception handling.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71610 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 23:59:14 +00:00
Jim Grosbach
c93f961874 correct register class for tADDspi to GPR since the register will always be SP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 22:30:18 +00:00
Bob Wilson
39bf051ec2 Fix up a few minor typos in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71563 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:35:29 +00:00
Bob Wilson
8494526a23 Fix 80-col violations and remove trailing whitespace. No functional changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71562 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-12 17:09:30 +00:00
Duncan Sands
777d2306b3 Rename PaddedSize to AllocSize, in the hope that this 
will make it more obvious what it represents, and stop
it being confused with the StoreSize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-05-09 07:06:46 +00:00
Bill Wendling
98a366d547 Instead of passing in an unsigned value for the optimization level, use an enum, 
which better identifies what the optimization is doing. And is more flexible for
future uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 23:29:43 +00:00
Bill Wendling
be8cc2a3de Second attempt: 
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-29 00:15:41 +00:00
Bill Wendling
c69d56f115 r70270 isn't ready yet. Back this out. Sorry for the noise. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-28 01:04:53 +00:00
Bill Wendling
2e9d5f912a Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to 
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-28 00:21:31 +00:00
Bob Wilson
8091524d98 Change LowerCallResult method so that CCValAssign::BCvt can be used with 
f64 types.  This is not used for anything yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70006 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-25 00:33:20 +00:00
Bob Wilson
d55bd51f31 Adjust a comment to reflect what the code does. Splitting a 64-bit argument 
between registers and the stack may be required with the APCS ABI, but it
isn't tied to using a particular version of the ARM architecture.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 17:05:01 +00:00
Bob Wilson
4d59e1d666 Fix up some problems with getCopyToReg and getCopyFromReg nodes being 
chained and "flagged" together.  I also made a few changes to handle the
chain and flag values more consistently.  I found these problems by
inspection so I'm not aware of anything that breaks because of them
(thus no testcase).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69977 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 17:00:36 +00:00
Bob Wilson
1c2c462d0f Remove unnecessary references to f32 types. After specifying that f32 
should be bit-converted to i32, it is sufficient to list only i32 in
subsequent definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69973 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-24 16:55:25 +00:00
Bob Wilson
998e125a87 Move duplicated AddLiveIn function from X86 and ARM backends to be a method 
in the MachineFunction class, renaming it to addLiveIn for consistency with
the same method in MachineBasicBlock.  Thanks for Anton for suggesting this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69615 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-20 18:36:57 +00:00
Bob Wilson
e3fa9ef936 Move the AddLiveIn function definition closer to its uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69382 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:42:34 +00:00
Bob Wilson
e65586b37b Rearrange code to reduce indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:40:45 +00:00
Bob Wilson
dee46d7f6d Clean up formatting, remove trailing whitespace, fix comment typos and 
punctuation.  No functional changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69378 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 20:35:10 +00:00
Bob Wilson
1f595bb429 Use CallConvLower.h and TableGen descriptions of the calling conventions 
for ARM.  Patch by Sandeep Patel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69371 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-17 19:07:39 +00:00
Bob Wilson
2c7dab1864 Fix PR3795: Apply Dan's suggested fix for 
ARMTargetLowering::isLegalAddressingMode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68619 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-08 17:55:28 +00:00
Jim Grosbach
30eae3c022 PR2985 / <rdar://problem/6584986> 
When compiling in Thumb mode, only the low (R0-R7) registers are available
for most instructions. Breaking the low registers into a new register class
handles this. Uses of R12, SP, etc, are handled explicitly where needed
with copies inserted to move results into low registers where the rest of
the code generator can deal with them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68545 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-07 20:34:09 +00:00
Bob Wilson
8f3434647d Handle 'a' modifier in ARM inline assembly. 
Patch by Richard Pennington.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68464 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-06 21:46:51 +00:00
Bob Wilson
eec4b2d730 Wrap some lines to fix indentation problems. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68405 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 21:08:42 +00:00
Bob Wilson
1b46a68015 Fix some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-03 20:53:25 +00:00
Bob Wilson
bf6396bed0 Fix PR3862: Recognize some ARM-specific constraints for immediates in inline 
assembly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68218 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-04-01 17:58:54 +00:00
Bob Wilson
d83712ad67 Fix comment to match function name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68050 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-30 18:49:37 +00:00
Jim Grosbach
0ede14f5c0 remove trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67874 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-27 23:06:27 +00:00
Evan Cheng
9d7b5309c2 tADDhirr is a thumb instruction. Do not allow this code to be reached in non-thumb mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67765 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-26 19:09:01 +00:00
Evan Cheng
42bf74be14 CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-25 01:47:28 +00:00
Evan Cheng
f1c0ae9de5 Do not emit comments unless -asm-verbose. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67580 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-24 00:17:40 +00:00
Bob Wilson
2a14c521ca Fix a few more indentation problems and an 80-column violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67416 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-20 23:16:43 +00:00
Bob Wilson
2dc4f54324 No functional changes. Fix indentation and whitespace only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67412 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-20 22:42:55 +00:00
Evan Cheng
1606e8e4cd Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues. 
1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants.
2. MachineConstantPool alignment field is also a log2 value.
3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values.
4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries.
5. Asm printer uses expensive data structure multimap to track constant pool entries by sections.
6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic.


Solutions:
1. ConstantPoolSDNode alignment field is changed to keep non-log2 value.
2. MachineConstantPool alignment field is also changed to keep non-log2 value.
3. Functions that create ConstantPool nodes are passing in non-log2 alignments.
4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT.
5. Asm printer uses cheaper data structure to group constant pool entries.
6. Asm printer compute entry offsets after grouping is done.
7. Change JIT code to compute entry offsets on the fly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66875 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-13 07:51:59 +00:00
Chris Lattner
d1980a5acd Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))" 
related transformations out of target-specific dag combine into the
ARM backend.  These were added by Evan in r37685 with no testcases
and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll).

Add some simple X86-specific (for now) DAG combines that turn things
like cond ? 8 : 0  -> (zext(cond) << 3).  This happens frequently
with the recently added cp constant select optimization, but is a
very general xform.  For example, we now compile the second example
in const-select.ll to:

_test:
        movsd   LCPI2_0, %xmm0
        ucomisd 8(%esp), %xmm0
        seta    %al
        movzbl  %al, %eax
        movl    4(%esp), %ecx
        movsbl  (%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl    4(%esp), %eax
        leal    4(%eax), %ecx
        movsd   LCPI2_0, %xmm0
        ucomisd 8(%esp), %xmm0
        cmovbe  %eax, %ecx
        movsbl  (%ecx), %eax
        ret

This passes multisource and dejagnu.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66779 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-12 06:52:53 +00:00
Duncan Sands
4dc2b39bf8 It makes no sense to have a ODR version of common 
linkage, so remove it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66690 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-11 20:14:15 +00:00
Chris Lattner
eda2ec35a1 fix PR3785, a valgrind error on test/CodeGen/ARM/pr3502.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66660 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-11 16:14:25 +00:00
Evan Cheng
8c6b991635 ARM target now also recognize triplets like thumbv6-apple-darwin and set thumb mode and arch subversion. Eventually thumb triplets will go way and replaced with function notes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66435 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-09 20:25:39 +00:00
Evan Cheng
6501153fc0 ARM isLegalAddressImmediate should check if type is a simple type now that optimizer can create values of funky scalar types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66429 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-09 19:15:00 +00:00
Evan Cheng
4b1747430a Recognize triplets starting with armv5-, armv6- etc. And set the ARM arch version accordingly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66365 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-08 04:02:49 +00:00
Duncan Sands
667d4b8de6 Introduce new linkage types linkonce_odr, weak_odr, common_odr 
and extern_weak_odr.  These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global.  In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time.   This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function.  If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body.  The
code generators on the other hand map weak and weak_odr linkage
to the same thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-07 15:45:40 +00:00
Dan Gohman
0f8b53f19d Fix a bunch of Doxygen syntax issues. Escape special characters, 
and put @file directives on their own comment line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65920 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-03-03 02:55:14 +00:00
Bill Wendling
57f0db833d Overhaul my earlier submission due to feedback. It's a large patch, but most of 
them are generic changes.

- Use the "fast" flag that's already being passed into the asm printers instead
  of shoving it into the DwarfWriter.

- Instead of calling "MI->getParent()->getParent()" for every MI, set the
  machine function when calling "runOnMachineFunction" in the asm printers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-24 08:30:20 +00:00
Bill Wendling
ef4cfc749a Propagate debug loc info through prologue/epilogue. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65298 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-23 00:42:30 +00:00
Dan Gohman
97357614b5 Factor out the code to add a MachineOperand to a MachineInstrBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64891 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 05:45:50 +00:00
Evan Cheng
caa0c2cadd GV with null value initializer shouldn't go to BSS if it's meant for a mergeable strings section. Currently it only checks for Darwin. Someone else please check if it should apply to other targets as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64877 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-18 02:19:52 +00:00
Dale Johannesen
8a43d98644 and one more file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64430 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 02:26:21 +00:00
Dale Johannesen
b67284057e Remove refs to non-DebugLoc versions of BuildMI from ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64429 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-13 02:25:56 +00:00
Dale Johannesen
21b5541814 Eliminate a couple of non-DebugLoc BuildMI variants. 
Modify callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64409 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 23:08:38 +00:00
Chris Lattner
8c4d1b2bcf fix PR3538 for ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64384 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 17:38:23 +00:00
Bill Wendling
d1c321a89a Move debug loc info along when the spiller creates new instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64342 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-12 00:02:55 +00:00
Evan Cheng
dc54d317e7 Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty 
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64124 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-09 07:14:22 +00:00
Dan Gohman
1fdbc1dd4e Constify TargetInstrInfo::EmitInstrWithCustomInserter, allowing 
ScheduleDAG's TLI member to use const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64018 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 16:15:20 +00:00
Dale Johannesen
b300d2aa3e Get rid of the last non-DebugLoc versions of getNode! 
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base.  There's no
sensible way to associate debug info with these.  I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. 
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-07 00:55:49 +00:00
Dale Johannesen
e8d7230f48 Remove more non-DebugLoc getNode variants. Use 
getCALLSEQ_{END,START} to permit passing no DebugLoc
there.  UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 23:05:02 +00:00
Dale Johannesen
de06470330 Remove more non-DebugLoc versions of getNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 21:50:26 +00:00
Dale Johannesen
f5f5dce897 Eliminate remaining non-DebugLoc version of getTargetNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63951 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 19:16:40 +00:00
Evan Cheng
770bcc7b15 Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 17:43:24 +00:00
Dale Johannesen
f90b2a7742 get rid of some non-DebugLoc getTargetNode variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63909 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 02:08:06 +00:00
Dale Johannesen
ed2eee63a6 Get rid of one more non-DebugLoc getNode and 
its corresponding getTargetNode.  Lots of
caller changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63904 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-06 01:31:28 +00:00
Evan Cheng
b3379fbc60 A few more isAsCheapAsAMove. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63852 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-05 08:42:55 +00:00
Dale Johannesen
a05dca4f9e Remove non-DebugLoc forms of CopyToReg and CopyFromReg. 
Adjust callers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63789 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 23:02:30 +00:00
Dale Johannesen
33c960f523 Remove non-DebugLoc versions of getLoad and getStore. 
Adjust the many callers of those versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63767 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-04 20:06:27 +00:00
Dale Johannesen
0f502f6f44 Add some DL propagation to places that didn't 
have it yet.  More coming.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63673 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 22:26:09 +00:00
Bill Wendling
9bc96a5720 Create DebugLoc information in FastISel. Several temporary methods were 
created. Specifically, those BuildMIs which use
"DebugLoc::getUnknownLoc()". I'll remove them soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63584 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-02-03 00:55:04 +00:00
Dale Johannesen
7d2ad624fa Make LowerCallTo and LowerArguments take a DebugLoc 
argument.  Adjust all callers and overloaded versions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63444 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-30 23:10:59 +00:00
Duncan Sands
1465d61bdd Rename getAnalysisToUpdate to getAnalysisIfAvailable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63198 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 13:14:17 +00:00
Evan Cheng
d1e7d9a88b Suppress a compile time warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63161 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-28 00:53:34 +00:00
Chris Lattner
4469c53cfc silence a warning when assertions are disabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62976 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-25 23:08:00 +00:00
Evan Cheng
04ee5a1d92 Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-20 19:12:24 +00:00
Evan Cheng
bdfc582edf ARMCompilationCallback should not save / restore vfp registers if vfp is not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62299 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-16 02:16:37 +00:00
Rafael Espindola
bb46f52027 Add the private linkage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 20:18:42 +00:00
Dan Gohman
79ce276083 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph 
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 19:20:50 +00:00
Dan Gohman
73e0914848 Const-qualify getPreIndexedAddressParts and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62259 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-15 16:29:45 +00:00
Duncan Sands
ceb4d1aecb Rename getABITypeSize to getTypePaddedSize, as 
suggested by Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62099 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-12 20:38:59 +00:00
Misha Brukman
9b8f542e27 Removed trailing whitespace from Makefiles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61991 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-09 16:44:42 +00:00
Devang Patel
eb3fc28914 Convert DwarfWriter into a pass. 
Now Users request DwarfWriter through getAnalysisUsage() instead of creating an instance of DwarfWriter object directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61955 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-08 23:40:34 +00:00
Dan Gohman
d68a07650c Tidy up #includes, deleting a bunch of unnecessary #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-01-05 17:59:02 +00:00
Evan Cheng
38b6fd67a6 Fix a 80 col. violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60901 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-11 22:02:02 +00:00
Evan Cheng
e5ad88e97f Preliminary ARM debug support based on patch by Mikael of FlexyCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60851 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-10 21:54:21 +00:00
Evan Cheng
5788d1a169 Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60828 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-10 02:32:19 +00:00
Evan Cheng
c3ccc1aaaf Clean up some ARM GV asm printing out; minor fixes to match what gcc does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60621 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-06 02:00:55 +00:00
Evan Cheng
ae94e59416 Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60571 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-05 01:06:39 +00:00
Bill Wendling
a8103dad4e Temporarily revert r60519. It was causing a bootstrap failure: 
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -DHAVE_CONFIG_H -I. -I../../../llvm-gcc.src/libgomp -I. -I../../../llvm-gcc.src/libgomp/config/posix -I../../../llvm-gcc.src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT barrier.lo -MD -MP -MF .deps/barrier.Tpo -c ../../../llvm-gcc.src/libgomp/barrier.c  -fno-common -DPIC -o .libs/barrier.o
checking for sys/file.h... /var/folders/zG/zGE-ZJOGFiGjv0B5cs5oYE+++TM/-Tmp-//cc34Jg5P.s:13:non-relocatable subtraction expression, "_gomp_tls_key" minus "L1$pb"
/var/folders/zG/zGE-ZJOGFiGjv0B5cs5oYE+++TM/-Tmp-//cc34Jg5P.s:13:symbol: "_gomp_tls_key" can't be undefined in a subtraction expression
make[4]: *** [barrier.lo] Error 1
make[4]: *** Waiting for unfinished jobs....
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -DHAVE_CONFIG_H -I. -I../../../llvm-gcc.src/libgomp -I. -I../../../llvm-gcc.src/libgomp/config/posix -I../../../llvm-gcc.src/libgomp -Wall -pthread -Werror -O2 -g -O2 -MT alloc.lo -MD -MP -MF .deps/alloc.Tpo -c ../../../llvm-gcc.src/libgomp/alloc.c -o alloc.o >/dev/null 2>&1
yes
checking for sys/param.h... make[3]: *** [all-recursive] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libgomp] Error 2
make[1]: *** Waiting for unfinished jobs....



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60527 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-04 04:07:00 +00:00
Evan Cheng
eb83dfde66 Visibility hidden GVs do not require extra load of symbol address from the GOT or non-lazy-ptr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60519 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-04 01:56:50 +00:00
Dan Gohman
c54baa2d43 Split foldMemoryOperand into public non-virtual and protected virtual 
parts, and add target-independent code to add/preserve
MachineMemOperands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60488 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 18:43:12 +00:00
Dan Gohman
15511cf166 Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60487 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 18:15:48 +00:00
Dan Gohman
f033b5a393 Update a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60484 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 17:10:41 +00:00
Rafael Espindola
952b839ce9 Fix bug 3140. 
Print a single parameter .file directive if we have an ELF target.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60480 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 11:01:37 +00:00
Dan Gohman
41474baac8 Add a sanity-check to tablegen to catch the case where isSimpleLoad 
is set but mayLoad is not set. Fix all the problems this turned up.

Change code to not use isSimpleLoad instead of mayLoad unless it
really wants isSimpleLoad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60459 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 02:30:17 +00:00
Dan Gohman
c70f329543 Fix a missing #include. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60458 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-03 02:10:00 +00:00
Duncan Sands
aaffa05d0a There are no longer any places that require a 
MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60349 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-01 11:41:29 +00:00
Duncan Sands
1607f05cb7 Change the interface to the type legalization method 
ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60348 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-12-01 11:39:25 +00:00
Evan Cheng
027fdbe3ba Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59953 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-24 07:34:46 +00:00
Anton Korobeynikov
7751ad92da Make a convenient helper for printing offsets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59872 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-22 16:15:34 +00:00
Evan Cheng
97c573d5de Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59696 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-20 02:25:51 +00:00
Evan Cheng
e3066abfcf Eliminate a compile time warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59678 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-19 23:21:33 +00:00
Dan Gohman
cbad42cfd1 Add more const qualifiers. This fixes build breakage from r59540. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59542 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-18 19:49:32 +00:00
Oscar Fuentes
92adc19be9 Adds extern "C" ints to the .cpp files that use RegisterTarget, as 
well as 2 files that use "Registrator"s. These are to be used by the
MSVC builds, as the Win32 linker does not include libs that are
otherwise unreferenced, even if global constructors in the lib have
side-effects.

Patch by Scott Graham!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59378 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-15 21:36:30 +00:00
Evan Cheng
7e2cc91d2d Fix fuitos encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59344 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-15 00:40:57 +00:00
Evan Cheng
a956255ebf Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59314 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-14 20:09:11 +00:00
Evan Cheng
ffa6d962a7 Handle the rest of pseudo instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59275 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 23:36:57 +00:00
Evan Cheng
28f312949e Lazy compilation callback save / restore VFP registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59274 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 23:28:54 +00:00
Evan Cheng
35b0bfd06d Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59258 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 19:22:28 +00:00
Evan Cheng
3c902e81fa fsub{d|s} encoding bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59234 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 07:59:48 +00:00
Evan Cheng
67fd91f3df Missed a break statement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59231 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 07:46:59 +00:00
Evan Cheng
148cad8b30 Fix pre- and post-indexed load / store encoding bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59230 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-13 07:34:59 +00:00
Evan Cheng
cb5798285a Remove the incorrect assertion. We don't have enough information before relocation to set U bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59170 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 21:37:59 +00:00
Evan Cheng
607f1b41a2 Address mode immediate offset has already been divided by 4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59117 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 08:21:12 +00:00
Evan Cheng
3f4924efff Fix a VFP binary arithmetic instruction encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59116 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 08:14:21 +00:00
Evan Cheng
706329143d Fix address mode 3 immediate offset mode encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59109 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 07:34:37 +00:00
Evan Cheng
3c4a4ffa3d Consolidate formats; fix FCMPED etc. encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59107 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 07:18:38 +00:00
Evan Cheng
80a119842d Fix VFP conversion instruction encodings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59104 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 06:41:41 +00:00
Evan Cheng
d06d48d2b5 Fix encoding of single-precision VFP registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59102 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 02:19:38 +00:00
Evan Cheng
580c0dfaed VFP fld / fst immediate field is multiplied by 4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59100 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-12 01:02:24 +00:00
Evan Cheng
0a0ab1387a Fix FMDRR encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59088 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 22:46:12 +00:00
Evan Cheng
cb5201f3b2 Handle floating point constpool_entry's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59087 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 22:19:31 +00:00
Evan Cheng
cd8e66a1ef Encode VFP load / store instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59084 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 21:48:44 +00:00
Evan Cheng
78be83d7c2 Encode VFP conversion instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59074 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 19:40:26 +00:00
Evan Cheng
96581d3633 Encode VFP arithmetic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59016 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-11 02:11:05 +00:00
Evan Cheng
588920b9a5 Correct PIC function stub codegen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59006 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-10 23:14:47 +00:00
Evan Cheng
9ed2f80910 Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58949 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-10 01:08:07 +00:00
Anton Korobeynikov
0b45c9957f Temporary revert my last commit: it seems it's triggering some subtle bug in backend 
and breaks llvm-gcc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58926 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 23:05:05 +00:00
Anton Korobeynikov
0f56953567 Factor out offset printing code into generic AsmPrinter. 
FIXME: it seems, that most of targets don't support
offsets wrt CPI/GlobalAddress', was it intentional?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58917 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 17:21:38 +00:00
Evan Cheng
ae166410b9 Moved InvalidateInstructionCache to ARMJITInfo::emitFunctionStub which knows size of stub. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58899 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 08:16:49 +00:00
Evan Cheng
ce4a70bd76 Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58897 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 08:02:53 +00:00
Evan Cheng
3cc8223a3c Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58896 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 07:38:22 +00:00
Evan Cheng
103325179a Fix relocation for calls to external symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58893 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 07:22:33 +00:00
Evan Cheng
05c356e65a Skip over two-address use operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58883 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 01:44:13 +00:00
Evan Cheng
e96a490d7a Handle ARM machine constantpool entry with non-lazy ptr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58882 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 01:31:27 +00:00
Evan Cheng
f1bbb9577a Use ARMFunctionInfo to track number of constpool entries and jumptables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58877 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-08 00:51:41 +00:00
Evan Cheng
413a89f318 More code clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58872 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-07 22:57:53 +00:00
Evan Cheng
437c1738ef Get PIC jump table working. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58869 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-07 22:30:53 +00:00
Dan Gohman
e5f4de42b5 Flush the raw_ostream after emitting the assembly for a function. 
This is a temporary fix for the -print-emitted-asm option, where
errs() is used as the stream, in the case where other code is
using stderr without using errs()' buffer. Hopefully soon we'll
fix errs() to be non-buffered instead. Patch by Preston Gurd.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58859 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-07 19:49:17 +00:00
Evan Cheng
4df60f5491 Jump table JIT support. Work in progress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58836 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-07 09:06:08 +00:00
Evan Cheng
8b59db3f2c Encode misc arithmetic instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58828 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-07 01:41:35 +00:00
Evan Cheng
97f48c39fd Encode extend instructions; more clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58818 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 22:15:19 +00:00
Evan Cheng
12c3a533c5 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm. 
- Consolidate instruction formats.
- Other clean up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58808 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 17:48:05 +00:00
Evan Cheng
d87293ce78 Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58800 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 08:47:38 +00:00
Evan Cheng
eb4f52eb62 Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58793 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 03:35:07 +00:00
Evan Cheng
9092213a5e Fix so_imm encoding bug; add support for MOVi2pieces. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58790 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 02:25:39 +00:00
Evan Cheng
fbc9d412ef Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58789 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-06 01:21:28 +00:00
Evan Cheng
83b5cf0272 Encode pic load / store instructions; fix some encoding bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58780 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-05 23:22:34 +00:00
Evan Cheng
edda31c412 Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58764 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-05 18:35:52 +00:00
Dan Gohman
8be6bbe5bf Eliminate the ISel priority queue, which used the topological order for a 
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.

The impact on most targets is that AddToISelQueue calls can be simply removed.

In the x86 target, there are two additional notable changes.

The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.

Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-05 04:14:16 +00:00
Evan Cheng
3eb22e835f Actually ARM / Mac OS X does have UINTTOFP_I64_F{64|32} libcalls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58725 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-04 22:19:55 +00:00
Evan Cheng
c7c77297e2 Custom lower bit_convert i64 -> f64 into FMDRR. This is now happening with legalizetypes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58714 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-04 19:57:48 +00:00
Evan Cheng
142c15e052 Debug output tweak. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58708 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-04 17:58:53 +00:00
Evan Cheng
e7fe672445 LDM_RET restores pc, do not set 's' bit which would restore CPSR from SPSR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58707 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-04 17:57:07 +00:00
Evan Cheng
b0b53491ef For some targets, it's not possible to place GVs in the same memory buffer as the MachineCodeEmitter allocated memory. Code and data has different read / write / execution privilege requirements. 
This is a short term workaround. The current solution is for the JIT memory manager to manage code and data memory separately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58688 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-04 09:30:48 +00:00
Evan Cheng
e953b89b0d Stylistic change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58683 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-04 06:10:06 +00:00
Evan Cheng
25e04788bf Handle ARM machine constantpool entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58671 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-11-04 00:50:32 +00:00