llvm-6502/test/CodeGen/X86
Evan Cheng 206d1856ad Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g.
%reg1498<def> = MOV32rm %reg1024, 1, %reg0, 12, %reg0, Mem:LD(4,4) [sunkaddr39 + 0]
        %reg1506<def> = MOV32rm %reg1024, 1, %reg0, 8, %reg0, Mem:LD(4,4) [sunkaddr42 + 0]
        %reg1486<def> = MOV32rr %reg1506
        %reg1486<def> = XOR32rr %reg1486, %reg1498, %EFLAGS<imp-def,dead>
        %reg1510<def> = MOV32rm %reg1024, 1, %reg0, 4, %reg0, Mem:LD(4,4) [sunkaddr45 + 0]

=>

        %reg1498<def> = MOV32rm %reg2036, 1, %reg0, 12, %reg0, Mem:LD(4,4) [sunkaddr39 + 0]
        %reg1506<def> = MOV32rm %reg2037, 1, %reg0, 8, %reg0, Mem:LD(4,4) [sunkaddr42 + 0]
        %reg1486<def> = MOV32rr %reg1506
        %reg1486<def> = XOR32rr %reg1486, %reg1498, %EFLAGS<imp-def,dead>
        %reg1510<def> = MOV32rm %reg2038, 1, %reg0, 4, %reg0, Mem:LD(4,4) [sunkaddr45 + 0]

From linearscan's point of view, each of reg2036, 2037, and 2038 are separate registers, each is "killed" after a single use. The reloaded register is available and it's often clobbered right away. e.g. In thise case reg1498 is allocated EAX while reg2036 is allocated RAX. This means we end up with multiple reloads from the same stack slot in the same basic block.

Now linearscan recognize there are other reloads from same SS in the same BB. So it'll "downgrade" RAX (and its aliases) after reg2036 is allocated until the next reload (reg2037) is done. This greatly increase the likihood reloads from SS are reused.

This speeds up sha1 from OpenSSL by 5.8%. It is also an across the board win for SPEC2000 and 2006.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 08:01:12 +00:00
..
2002-12-23-LocalRAProblem.ll
2002-12-23-SubProblem.ll
2003-08-03-CallArgLiveRanges.ll
2003-08-23-DeadBlockTest.ll
2003-11-03-GlobalBool.ll
2004-02-12-Memcpy.ll
2004-02-13-FrameReturnAddress.ll
2004-02-14-InefficientStackPointer.ll
2004-02-22-Casts.ll
2004-03-30-Select-Max.ll
2004-04-09-SameValueCoalescing.ll
2004-04-13-FPCMOV-Crash.ll
2004-06-10-StackifierCrash.ll
2004-10-08-SelectSetCCFold.ll
2005-01-17-CycleInDAG.ll
2005-02-14-IllegalAssembler.ll
2005-05-08-FPStackifierPHI.ll
2006-01-19-ISelFoldingBug.ll
2006-03-01-InstrSchedBug.ll
2006-03-02-InstrSchedBug.ll
2006-04-04-CrossBlockCrash.ll
2006-04-27-ISelFoldingBug.ll
2006-05-01-SchedCausingSpills.ll
2006-05-02-InstrSched1.ll
2006-05-02-InstrSched2.ll
2006-05-08-CoalesceSubRegClass.ll
2006-05-08-InstrSched.ll
2006-05-11-InstrSched.ll
2006-05-17-VectorArg.ll
2006-05-22-FPSetEQ.ll
2006-05-25-CycleInDAG.ll
2006-07-10-InlineAsmAConstraint.ll
2006-07-12-InlineAsmQConstraint.ll
2006-07-19-ATTAsm.ll
2006-07-20-InlineAsm.ll
2006-07-28-AsmPrint-Long-As-Pointer.ll
2006-07-31-SingleRegClass.ll
2006-08-07-CycleInDAG.ll
2006-08-16-CycleInDAG.ll
2006-08-21-ExtraMovInst.ll
2006-09-01-CycleInDAG.ll
2006-10-02-BoolRetCrash.ll
2006-10-07-ScalarSSEMiscompile.ll
2006-10-09-CycleInDAG.ll
2006-10-10-FindModifiedNodeSlotBug.ll
2006-10-12-CycleInDAG.ll
2006-10-13-CycleInDAG.ll
2006-10-19-SwitchUnnecessaryBranching.ll Add an explicit -asm-verbose to these tests, to make it 2009-03-31 18:20:47 +00:00
2006-11-12-CSRetCC.ll
2006-11-17-IllegalMove.ll
2006-11-27-SelectLegalize.ll
2006-11-28-Memcpy.ll
2006-12-19-IntelSyntax.ll
2007-01-08-InstrSched.ll
2007-01-13-StackPtrIndex.ll
2007-01-29-InlineAsm-ir.ll
2007-02-04-OrAddrMode.ll
2007-02-19-LiveIntervalAssert.ll
2007-02-25-FastCCStack.ll
2007-03-01-SpillerCrash.ll
2007-03-15-GEP-Idx-Sink.ll
2007-03-16-InlineAsm.ll
2007-03-18-LiveIntervalAssert.ll
2007-03-24-InlineAsmMultiRegConstraint.ll
2007-03-24-InlineAsmPModifier.ll
2007-03-24-InlineAsmVectorOp.ll
2007-03-24-InlineAsmXConstraint.ll
2007-03-26-CoalescerBug.ll
2007-04-08-InlineAsmCrash.ll
2007-04-11-InlineAsmVectorResult.ll
2007-04-17-LiveIntervalAssert.ll
2007-04-24-Huge-Stack.ll
2007-04-24-VectorCrash.ll
2007-04-25-MMX-PADDQ.ll
2007-04-27-InlineAsm-IntMemInput.ll
2007-05-05-VecCastExpand.ll
2007-05-07-InvokeSRet.ll
2007-05-14-LiveIntervalAssert.ll
2007-05-15-maskmovq.ll
2007-05-17-ShuffleISelBug.ll
2007-06-04-tailmerge4.ll Add an explicit -asm-verbose to these tests, to make it 2009-03-31 18:20:47 +00:00
2007-06-04-X86-64-CtorAsmBugs.ll
2007-06-05-LSR-Dominator.ll
2007-06-14-branchfold.ll
2007-06-15-IntToMMX.ll
2007-06-28-X86-64-isel.ll
2007-06-29-DAGCombinerBug.ll
2007-06-29-VecFPConstantCSEBug.ll
2007-07-03-GR64ToVR64.ll
2007-07-10-StackerAssert.ll
2007-07-18-Vector-Extract.ll
2007-08-01-LiveVariablesBug.ll
2007-08-09-IllegalX86-64Asm.ll
2007-08-10-SignExtSubreg.ll Revert 67132. This is breaking some objective-c apps. 2009-03-25 20:20:11 +00:00
2007-08-13-AppendingLinkage.ll
2007-08-13-SpillerReuse.ll
2007-09-03-X86-64-EhSelector.ll
2007-09-05-InvalidAsm.ll
2007-09-06-ExtWeakAliasee.ll
2007-09-17-ObjcFrameEH.ll
2007-09-18-ShuffleXformBug.ll
2007-09-27-LDIntrinsics.ll
2007-10-04-AvoidEFLAGSCopy.ll
2007-10-05-3AddrConvert.ll
2007-10-12-CoalesceExtSubReg.ll
2007-10-12-SpillerUnfold1.ll
2007-10-12-SpillerUnfold2.ll
2007-10-14-CoalescerCrash.ll
2007-10-15-CoalescerCrash.ll
2007-10-16-CoalescerCrash.ll
2007-10-16-fp80_select.ll
2007-10-16-IllegalAsm.ll
2007-10-17-IllegalAsm.ll
2007-10-19-SpillerUnfold.ll
2007-10-28-inlineasm-q-modifier.ll
2007-10-29-ExtendSetCC.ll
2007-10-30-LSRCrash.ll
2007-10-31-extractelement-i64.ll
2007-11-01-ISelCrash.ll
2007-11-02-BadAsm.ll
2007-11-03-x86-64-q-constraint.ll
2007-11-04-LiveIntervalCrash.ll
2007-11-04-LiveVariablesBug.ll
2007-11-04-rip-immediate-constant.ll
2007-11-06-InstrSched.ll
2007-11-07-MulBy4.ll
2007-11-14-Coalescer-Bug.ll
2007-11-30-LoadFolding-Bug.ll
2007-11-30-TestLoadFolding.ll
2007-12-11-FoldImpDefSpill.ll
2007-12-16-BURRSchedCrash.ll
2007-12-18-LoadCSEBug.ll
2008-01-08-IllegalCMP.ll
2008-01-08-SchedulerCrash.ll
2008-01-09-LongDoubleSin.ll
2008-01-16-FPStackifierAssert.ll
2008-01-16-InvalidDAGCombineXform.ll
2008-01-16-Trampoline.ll
2008-01-25-EmptyFunction.ll
2008-02-05-ISelCrash.ll
2008-02-06-LoadFoldingBug.ll
2008-02-08-LoadFoldingBug.ll
2008-02-14-BitMiscompile.ll
2008-02-18-TailMergingBug.ll
2008-02-20-InlineAsmClobber.ll Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. 2009-03-23 08:01:15 +00:00
2008-02-22-LocalRegAllocBug.ll
2008-02-22-ReMatBug.ll
2008-02-25-InlineAsmBug.ll
2008-02-25-X86-64-CoalescerBug.ll
2008-02-26-AsmDirectMemOp.ll
2008-02-27-DeadSlotElimBug.ll
2008-02-27-PEICrash.ll
2008-03-06-frem-fpstack.ll
2008-03-07-APIntBug.ll
2008-03-10-RegAllocInfLoop.ll
2008-03-12-ThreadLocalAlias.ll
2008-03-13-TwoAddrPassCrash.ll
2008-03-14-SpillerCrash.ll
2008-03-18-CoalescerBug.ll
2008-03-19-DAGCombinerBug.ll
2008-03-23-DarwinAsmComments.ll Add an explicit -asm-verbose to these tests, to make it 2009-03-31 18:20:47 +00:00
2008-03-25-TwoAddrPassBug.ll
2008-03-31-SpillerFoldingBug.ll
2008-04-02-unnamedEH.ll
2008-04-08-CoalescerCrash.ll
2008-04-09-BranchFolding.ll
2008-04-15-LiveVariableBug.ll
2008-04-16-CoalescerBug.ll
2008-04-16-ReMatBug.ll
2008-04-17-CoalescerBug.ll
2008-04-24-MemCpyBug.ll
2008-04-24-pblendw-fold-crash.ll
2008-04-26-Asm-Optimize-Imm.ll
2008-04-28-CoalescerBug.ll
2008-04-28-CyclicSchedUnit.ll
2008-05-01-InvalidOrdCompare.ll
2008-05-09-PHIElimBug.ll
2008-05-09-ShuffleLoweringBug.ll
2008-05-12-tailmerge-5.ll
2008-05-21-CoalescerBug.ll
2008-05-22-FoldUnalignedLoad.ll
2008-05-28-CoalescerBug.ll
2008-05-28-LocalRegAllocBug.ll
2008-06-04-MemCpyLoweringBug.ll
2008-06-13-NotVolatileLoadStore.ll
2008-06-13-VolatileLoadStore.ll
2008-06-16-SubregsBug.ll
2008-06-18-BadShuffle.ll
2008-06-25-VecISelBug.ll
2008-07-07-DanglingDeadInsts.ll
2008-07-09-ELFSectionAttributes.ll
2008-07-11-SHLBy1.ll
2008-07-11-SpillerBug.ll
2008-07-16-CoalescerCrash.ll
2008-07-19-movups-spills.ll
2008-07-22-CombinerCrash.ll
2008-07-23-VSetCC.ll
2008-08-05-SpillerBug.ll Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g. 2009-04-20 08:01:12 +00:00
2008-08-06-RewriterBug.ll
2008-08-17-UComiCodeGenBug.ll
2008-08-19-SubAndFetch.ll
2008-08-23-64Bit-maskmovq.ll
2008-08-23-X86-64AsmBug.ll
2008-08-25-AsmRegTypeMismatch.ll
2008-08-31-EH_RETURN32.ll
2008-08-31-EH_RETURN64.ll
2008-09-05-sinttofp-2xi32.ll
2008-09-09-LinearScanBug.ll
2008-09-11-CoalescerBug2.ll
2008-09-11-CoalescerBug.ll
2008-09-17-inline-asm-1.ll
2008-09-18-inline-asm-2.ll Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. 2009-03-23 08:01:15 +00:00
2008-09-19-RegAllocBug.ll
2008-09-25-sseregparm-1.ll
2008-09-26-FrameAddrBug.ll
2008-09-29-ReMatBug.ll
2008-09-29-VolatileBug.ll
2008-10-02-Atomics32-2.ll
2008-10-06-MMXISelBug.ll
2008-10-06-x87ld-nan-1.ll
2008-10-06-x87ld-nan-2.ll
2008-10-07-SSEISelBug.ll
2008-10-11-CallCrash.ll
2008-10-13-CoalescerBug.ll
2008-10-16-SpillerBug.ll Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g. 2009-04-20 08:01:12 +00:00
2008-10-16-VecUnaryOp.ll
2008-10-17-Asm64bitRConstraint.ll
2008-10-20-AsmDoubleInI32.ll
2008-10-24-FlippedCompare.ll
2008-10-27-CoalescerBug.ll
2008-10-27-StackRealignment.ll
2008-10-29-ExpandVAARG.ll
2008-11-03-F80VAARG.ll
2008-11-06-testb.ll
2008-11-13-inlineasm-3.ll
2008-11-29-DivideConstant16bit.ll
2008-11-29-DivideConstant16bitSigned.ll
2008-11-29-ULT-Sign.ll
2008-12-01-loop-iv-used-outside-loop.ll
2008-12-01-SpillerAssert.ll
2008-12-02-dagcombine-1.ll
2008-12-02-dagcombine-2.ll
2008-12-02-dagcombine-3.ll
2008-12-02-IllegalResultType.ll
2008-12-05-SpillerCrash.ll
2008-12-16-BadShift.ll
2008-12-16-dagcombine-4.ll
2008-12-19-EarlyClobberBug.ll Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. 2009-03-23 08:01:15 +00:00
2008-12-22-dagcombine-5.ll
2008-12-23-crazy-address.ll
2008-12-23-dagcombine-6.ll
2009-01-12-CoalescerBug.ll
2009-01-13-DoubleUpdate.ll
2009-01-16-SchedulerBug.ll
2009-01-16-UIntToFP.ll
2009-01-18-ConstantExprCrash.ll
2009-01-25-NoSSE.ll
2009-01-26-WrongCheck.ll
2009-01-27-NullStrings.ll
2009-01-29-LocalRegAllocBug.ll
2009-01-31-BigShift2.ll
2009-01-31-BigShift3.ll
2009-01-31-BigShift.ll
2009-02-01-LargeMask.ll
2009-02-03-AnalyzedTwice.ll
2009-02-04-sext-i64-gep.ll
2009-02-05-CoalescerBug.ll
2009-02-07-CoalescerBug.ll
2009-02-08-CoalescerBug.ll
2009-02-11-codegenprepare-reuse.ll
2009-02-12-DebugInfoVLA.ll
2009-02-12-InlineAsm-nieZ-constraints.ll
2009-02-12-SpillerBug.ll
2009-02-20-PreAllocSplit-Crash.ll
2009-02-21-ExtWeakInitializer.ll
2009-02-25-CommuteBug.ll
2009-02-26-MachineLICMBug.ll
2009-03-03-BitcastLongDouble.ll
2009-03-03-BTHang.ll
2009-03-05-burr-list-crash.ll
2009-03-07-FPConstSelect.ll
2009-03-09-APIntCrash.ll
2009-03-09-SpillerBug.ll
2009-03-10-CoalescerBug.ll
2009-03-11-CoalescerBug.ll
2009-03-12-CPAlignBug.ll
2009-03-13-PHIElimBug.ll Reapply r67049, with the test adjusted for darwin 2009-03-17 09:46:22 +00:00
2009-03-16-PHIElimInLPad.ll Add an explicit -asm-verbose to these tests, to make it 2009-03-31 18:20:47 +00:00
2009-03-16-SpillerBug.ll Spiller may unfold load / mod / store instructions as an optimization when the would be loaded value is available in a register. It needs to check if it's legal to clobber the register. Also, the register can contain values of multiple spill slots, make sure to check all instead of just the one being unfolded. 2009-03-17 01:23:09 +00:00
2009-03-23-i80-fp80.ll Fix internal representation of fp80 to be the 2009-03-23 21:16:53 +00:00
2009-03-23-LinearScanBug.ll Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases. 2009-03-23 22:57:19 +00:00
2009-03-23-MultiUseSched.ll Add a testcase for the scheduling heuristic introduced in r67586. 2009-03-24 16:38:27 +00:00
2009-03-25-TestBug.ll Add -march=x86. 2009-03-26 23:03:32 +00:00
2009-03-26-NoImplicitFPBug.ll Forgot this test. 2009-03-30 06:17:34 +00:00
2009-04-09-InlineAsmCrash.ll reg0 references are not real registers. This fixes a crash on the 2009-04-09 16:50:43 +00:00
2009-04-12-FastIselOverflowCrash.ll fix a cross-block fastisel crash handling overflow intrinsics. 2009-04-12 07:51:14 +00:00
2009-04-12-picrel.ll In X86DAGToDAGISel::MatchWrapper, if base or index are set, avoid matching 2009-04-12 23:00:38 +00:00
2009-04-13-2AddrAssert-2.ll Fix PR3934 part 2. findOnlyInterestingUse() was not setting IsCopy and IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side. 2009-04-14 00:32:25 +00:00
2009-04-13-2AddrAssert.ll PR3934: Fix a bogus two-address pass assertion. 2009-04-13 20:04:24 +00:00
2009-04-14-IllegalRegs.ll Some of GR8_NOREX registers are only available in 64-bit mode. 2009-04-14 16:57:43 +00:00
2009-04-16-SpillerUnfold.ll Adjust XFAIL syntax, maybe that will help. The other 2009-04-18 02:01:23 +00:00
2009-04-17-tls-fast.ll For general dynamic TLS access we must use 2009-04-17 14:35:58 +00:00
2009-04-20-LinearScanOpt.ll Added a linearscan register allocation optimization. When the register allocator spill an interval with multiple uses in the same basic block, it creates a different virtual register for each of the reloads. e.g. 2009-04-20 08:01:12 +00:00
2009-04-scale.ll fix PR3995. A scale must be 1, 2, 4 or 8. 2009-04-16 12:34:53 +00:00
20081212.ll
20090313-signext.ll Revert 67132. This is breaking some objective-c apps. 2009-03-25 20:20:11 +00:00
abi-isel.ll In X86DAGToDAGISel::MatchWrapper, if base or index are set, avoid matching 2009-04-12 23:00:38 +00:00
add-trick32.ll
add-trick64.ll
add-with-overflow.ll
aliases.ll CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose. 2009-03-25 01:47:28 +00:00
aligned-comm.ll
all-ones-vector.ll
alloca-align-rounding.ll this is apparently passing now. Evan/Dan, please check 2009-03-17 20:23:43 +00:00
and-or-fold.ll
and-su.ll Fix a TargetLowering optimization so that it doesn't duplicate 2009-04-03 20:11:30 +00:00
anyext-uses.ll Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND, 2009-04-09 03:51:29 +00:00
arg-cast.ll
asm-block-labels.ll
asm-global-imm.ll
asm-indirect-mem.ll
atomic_op.ll
Atomics-32.ll
Atomics-64.ll
avoid-loop-align.ll
bitcast2.ll
bitcast-int-to-vector.ll
bitcast.ll
break-anti-dependencies.ll
bswap-inline-asm.ll Recognize bswapl as bswap too. 2009-03-17 02:45:40 +00:00
bswap.ll
bt.ll
byval2.ll
byval3.ll
byval4.ll
byval5.ll
byval6.ll
byval7.ll Implement support for using modeling implicit-zero-extension on x86-64 2009-04-08 00:15:30 +00:00
byval.ll
call-imm.ll Disable the "call to immediate" optimization on x86-64. It is 2009-03-18 00:43:52 +00:00
call-push.ll
clz.ll
cmp0.ll
cmp1.ll
cmp2.ll
cmp-test.ll
coalescer-commute1.ll
coalescer-commute2.ll
coalescer-commute3.ll
coalescer-commute4.ll
coalescer-commute5.ll
coalescer-remat.ll
combine-lds.ll
commute-cmov.ll
commute-intrinsic.ll
commute-two-addr.ll
compare_folding.ll
compare-add.ll
complex-fca.ll
const-select.ll Revert 67132. This is breaking some objective-c apps. 2009-03-25 20:20:11 +00:00
constant-pool-remat-0.ll
convert-2-addr-3-addr-inc64.ll
copysign-zero.ll
critical-edge-split.ll
cstring.ll
dag-rauw-cse.ll
dagcombine-buildvector.ll Try SSE2? 2009-04-04 10:24:24 +00:00
dagcombine-cse.ll
darwin-bzero.ll
darwin-no-dead-strip.ll
darwin-stub.ll
dg.exp
div_const.ll
divrem.ll
dollar-name.ll
dyn-stackalloc.ll Fully escape the grep string for this test. 2009-04-08 00:54:40 +00:00
epilogue.ll
extend.ll
extern_weak.ll
extmul64.ll
extmul128.ll
extract-combine.ll
extractelement-from-arg.ll
extractelement-load.ll
extractelement-shuffle.ll
extractps.ll
fabs.ll
fast-cc-callee-pops.ll
fast-cc-merge-stack-adj.ll
fast-cc-pass-in-regs.ll
fast-isel-bail.ll Don't attempt to handle aggregate argument values in FastISel; let 2009-04-07 20:40:11 +00:00
fast-isel-call.ll
fast-isel-gep-sext.ll
fast-isel-i1.ll
fast-isel-mem.ll
fast-isel-phys.ll
fast-isel-shift-imm.ll
fast-isel-tls.ll
fast-isel-trunc.ll
fast-isel.ll
fastcall-correct-mangling.ll
fastcc-2.ll
fastcc-byval.ll
fastcc-sret.ll
fastcc.ll
field-extract-use-trunc.ll
fildll.ll
fold-add.ll
fold-and-shift.ll
fold-call-2.ll
fold-call-3.ll
fold-call.ll
fold-imm.ll
fold-load.ll
fold-mul-lohi.ll
fold-pcmpeqd-0.ll
fold-pcmpeqd-1.ll
fold-pcmpeqd-2.ll
fp2sint.ll
fp_constant_op.ll
fp_load_cast_fold.ll
fp_load_fold.ll
fp-immediate-shorten.ll
fp-in-intregs.ll
fp-stack-2results.ll
fp-stack-compare.ll
fp-stack-direct-ret.ll
fp-stack-ret-conv.ll
fp-stack-ret-store.ll
fp-stack-ret.ll
fp-stack-retcopy.ll
fp-stack-set-st1.ll
fsxor-alignment.ll
full-lsr.ll
ga-offset.ll
h-register-addressing-32.ll Implement x86 h-register extract support. 2009-04-13 16:09:41 +00:00
h-register-addressing-64.ll Implement x86 h-register extract support. 2009-04-13 16:09:41 +00:00
h-register-store.ll Implement x86 h-register extract support. 2009-04-13 16:09:41 +00:00
h-registers-0.ll When the result of an EXTRACT_SUBREG, INSERT_SUBREG, or SUBREG_TO_REG 2009-04-14 22:17:14 +00:00
h-registers-1.ll When the result of an EXTRACT_SUBREG, INSERT_SUBREG, or SUBREG_TO_REG 2009-04-14 22:17:14 +00:00
h-registers-2.ll Fix the RUN lines so that this test actually tests. 2009-04-14 22:50:17 +00:00
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis-4.ll
hidden-vis.ll
i2k.ll
i64-mem-copy.ll
i128-and-beyond.ll
i128-immediate.ll
i128-mul.ll
i128-ret.ll
i256-add.ll
iabs.ll
illegal-asm.ll Update test for pr3864. 2009-03-23 18:27:36 +00:00
illegal-insert.ll
illegal-vector-args-return.ll
imp-def-copies.ll
imul-lea-2.ll Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g. 2009-03-28 05:57:29 +00:00
imul-lea.ll
inline-asm-2addr.ll Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed. 2009-03-30 21:34:07 +00:00
inline-asm-flag-clobber.ll
inline-asm-fpstack.ll
inline-asm-mrv.ll
inline-asm-out-regs.ll Implement x86 h-register extract support. 2009-04-13 16:09:41 +00:00
inline-asm-pic.ll
inline-asm-x-scalar.ll
inline-asm.ll
ins_subreg_coalesce-1.ll
ins_subreg_coalesce-2.ll
ins_subreg_coalesce-3.ll
insertelement-copytoregs.ll
insertelement-legalize.ll
invalid-shift-immediate.ll
isel-sink2.ll Don't force promotion of return arguments on the callee. 2009-03-17 23:43:59 +00:00
isel-sink3.ll
isel-sink.ll
isint.ll
isnan2.ll
isnan.ll
ispositive.ll
iv-users-in-other-loops.ll Expand GEPs in ScalarEvolution expressions. SCEV expressions can now 2009-04-16 03:18:22 +00:00
jump_sign.ll
ldzero.ll
lea-2.ll
lea-3.ll
lea-4.ll
lea-recursion.ll
lea.ll
legalizedag_vec.ll
lfence.ll
limited-prec.ll
live-out-reg-info.ll Fix live-out reg logic to not insert over-aggressive AssertZExt 2009-03-31 01:38:29 +00:00
local-liveness.ll
long-setcc.ll
longlong-deadload.ll
loop-hoist.ll
loop-strength-reduce2.ll
loop-strength-reduce3.ll
loop-strength-reduce4.ll
loop-strength-reduce5.ll
loop-strength-reduce6.ll
loop-strength-reduce7.ll
loop-strength-reduce8.ll
loop-strength-reduce-2.ll
loop-strength-reduce-3.ll
loop-strength-reduce.ll
lsr-negative-stride.ll
lsr-sort.ll
maskmovdqu.ll
memcpy-2.ll
memcpy.ll
memmove-0.ll
memmove-1.ll
memmove-2.ll
memmove-3.ll
memmove-4.ll
memset64-on-x86-32.ll
memset-2.ll
memset.ll
mfence.ll
mingw-alloca.ll
mmx-arg-passing2.ll
mmx-arg-passing.ll
mmx-arith.ll
mmx-bitcast-to-i64.ll
mmx-copy-gprs.ll
mmx-emms.ll
mmx-insert-element.ll
mmx-pinsrw.ll
mmx-punpckhdq.ll
mmx-s2v.ll
mmx-shift.ll
mmx-shuffle.ll
mmx-vzmovl-2.ll
mmx-vzmovl.ll
movgs.ll
mul64.ll
mul128.ll
mul-legalize.ll
mul-remat.ll
mul-shift-reassoc.ll
multiple-return-values-cross-block.ll
multiple-return-values.ll
nancvt.ll
neg_fp.ll
negate-add-zero.ll
negative_zero.ll
negative-sin.ll
negative-subscript.ll
nobt.ll
nofence.ll
nosse-error1.ll
nosse-error2.ll
nosse-varargs.ll
opt-ext-uses.ll
optimize-smax.ll
or-branch.ll
overlap-shift.ll
packed_struct.ll
peep-test-0.ll
peep-test-1.ll
peep-test-2.ll
peep-vector-extract-concat.ll
peep-vector-extract-insert.ll
phys_subreg_coalesce-2.ll
phys_subreg_coalesce.ll
pic_jumptable.ll CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose. 2009-03-25 01:47:28 +00:00
pic-1.ll
pic-2.ll
pic-3.ll
pic-4.ll
pic-5.ll
pic-6.ll
pic-cpool.ll
pic-jtbl.ll
pic-load-remat.ll
pmul.ll
postalloc-coalescing.ll
pr1462.ll
pr1489.ll
pr1505.ll
pr1505b.ll
pr2177.ll
pr2182.ll
pr2326.ll
pr2623.ll
pr2656.ll
pr2659.ll
pr2849.ll
pr2924.ll
pr2982.ll
pr3154.ll
pr3216.ll
pr3241.ll
pr3243.ll
pr3244.ll
pr3250.ll
pr3317.ll
pr3366.ll
pr3457.ll
pr3495-2.ll
pr3495.ll Expand GEPs in ScalarEvolution expressions. SCEV expressions can now 2009-04-16 03:18:22 +00:00
pr3522.ll
pre-split1.ll
pre-split2.ll
pre-split3.ll
pre-split4.ll Remove the "fast" cases for spill and restore point determination, as these were subtlely wrong in obscure cases. Patch the testcase 2009-03-31 08:27:09 +00:00
pre-split5.ll
pre-split6.ll
pre-split7.ll
pre-split8.ll
pre-split9.ll
pre-split10.ll
prefetch.ll
private.ll
rdtsc.ll
red-zone.ll
regpressure.ll
rem-2.ll
rem.ll
remat-constant.ll
remat-mov0.ll
ret-addr.ll
ret-i64-0.ll
ret-mmx.ll
rip-rel-address.ll
rodata-relocs.ll Tweak test for recent relro stuff 2009-03-30 15:28:40 +00:00
rot16.ll
rot32.ll
rot64.ll
rotate2.ll
rotate.ll
scalar_sse_minmax.ll
scalar-extract.ll
scalar-min-max-fill-operand.ll
select-no-cmov.ll
select-zero-one.ll
select.ll
setoeq.ll
setuge.ll
sext-load.ll
sext-ret-val.ll Add a test case for PR3779: when to promote the function return value. 2009-03-25 20:30:19 +00:00
sext-select.ll
sext-trunc.ll Revert 67132. This is breaking some objective-c apps. 2009-03-25 20:20:11 +00:00
sfence.ll
shift-and.ll
shift-coalesce.ll
shift-codegen.ll
shift-combine.ll
shift-double.ll
shift-folding.ll
shift-i128.ll Fully general expansion of integer shift of any size. 2009-03-31 19:39:24 +00:00
shift-i256.ll Fully general expansion of integer shift of any size. 2009-03-31 19:39:24 +00:00
shift-one.ll
shl_elim.ll
shrink-fp-const1.ll
shrink-fp-const2.ll
sincos.ll
small-byval-memcpy.ll
smul-with-overflow-2.ll
smul-with-overflow-3.ll
smul-with-overflow.ll
soft-fp.ll
split-eh-lpad-edges.ll Revert 67132. This is breaking some objective-c apps. 2009-03-25 20:20:11 +00:00
split-select.ll
split-vector-rem.ll
sret.ll
sse41-extractps-bitcast-0.ll
sse41-extractps-bitcast-1.ll
sse41-pmovx.ll
sse_reload_fold.ll
sse-align-0.ll
sse-align-1.ll
sse-align-2.ll
sse-align-3.ll
sse-align-4.ll
sse-align-5.ll
sse-align-6.ll
sse-align-7.ll
sse-align-8.ll
sse-align-9.ll
sse-align-10.ll
sse-align-11.ll
sse-align-12.ll
sse-fcopysign.ll
sse-load-ret.ll
sse-varargs.ll
stack-align.ll
store_op_load_fold2.ll
store_op_load_fold.ll
store-fp-constant.ll
store-global-address.ll
storetrunc-fp.ll
stride-nine-with-base-reg.ll Expand GEPs in ScalarEvolution expressions. SCEV expressions can now 2009-04-16 03:18:22 +00:00
stride-reuse.ll
sub-with-overflow.ll
subclass-coalesce.ll
subreg-to-reg-0.ll
subreg-to-reg-1.ll Fix PR3934 part 2. findOnlyInterestingUse() was not setting IsCopy and IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side. 2009-04-14 00:32:25 +00:00
subreg-to-reg-2.ll Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86 2009-03-23 07:19:58 +00:00
subreg-to-reg-3.ll Implement support for using modeling implicit-zero-extension on x86-64 2009-04-08 00:15:30 +00:00
subreg-to-reg-4.ll Implement support for using modeling implicit-zero-extension on x86-64 2009-04-08 00:15:30 +00:00
subreg-to-reg-5.ll Implement support for using modeling implicit-zero-extension on x86-64 2009-04-08 00:15:30 +00:00
subreg-to-reg-6.ll Implement support for using modeling implicit-zero-extension on x86-64 2009-04-08 00:15:30 +00:00
switch-zextload.ll Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND, 2009-04-09 03:51:29 +00:00
swizzle.ll
tailcall1.ll
tailcall-i1.ll Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1). 2009-03-28 08:33:27 +00:00
tailcall-stackalign.ll
tailcall-structret.ll Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1). 2009-03-28 08:33:27 +00:00
tailcall-void.ll Make check in CheckTailCallReturnConstraints for ignorable instructions between 2009-03-28 12:36:29 +00:00
tailcallbyval64.ll
tailcallbyval.ll
tailcallfp2.ll
tailcallfp.ll
tailcallpic1.ll
tailcallpic2.ll
tailcallstack64.ll
test-nofold.ll
testl-commute.ll
tls1-pic.ll Add tests for the parts of X86-64 TLS that are already implemented. 2009-04-12 10:43:41 +00:00
tls1.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls2-pic.ll Add tests for the parts of X86-64 TLS that are already implemented. 2009-04-12 10:43:41 +00:00
tls2.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls3-pic.ll Add tests for the parts of X86-64 TLS that are already implemented. 2009-04-12 10:43:41 +00:00
tls3.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls4-pic.ll Add tests for the parts of X86-64 TLS that are already implemented. 2009-04-12 10:43:41 +00:00
tls4.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls5.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls6.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls7.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls8.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls9.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls10.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls11.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls12.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls13.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls14.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
tls15.ll X86-64 TLS support for local exec and initial exec. 2009-04-13 13:02:49 +00:00
trap.ll
trunc-to-bool.ll
twoaddr-coalesce-2.ll
twoaddr-coalesce.ll Implement support for using modeling implicit-zero-extension on x86-64 2009-04-08 00:15:30 +00:00
twoaddr-delete.ll
twoaddr-pass-sink.ll
twoaddr-remat.ll
uint_to_fp-2.ll
uint_to_fp.ll
umul-with-carry.ll
urem-i8-constant.ll
v4f32-immediate.ll
variable-sized-darwin-bzero.ll
variadic-node-pic.ll
vec_add.ll
vec_align.ll
vec_call.ll
vec_clear.ll
vec_ctbits.ll
vec_extract-sse4.ll
vec_extract.ll
vec_fneg.ll
vec_i64.ll Added a x86 dag combine to increase the chances to use a 2009-04-03 02:43:30 +00:00
vec_ins_extract-1.ll
vec_ins_extract.ll
vec_insert_4.ll
vec_insert-2.ll
vec_insert-3.ll
vec_insert-5.ll
vec_insert-6.ll
vec_insert-7.ll
vec_insert-8.ll
vec_insert.ll
vec_loadhl.ll
vec_logical.ll
vec_return.ll
vec_select.ll
vec_set-2.ll
vec_set-3.ll
vec_set-4.ll
vec_set-5.ll
vec_set-6.ll
vec_set-7.ll
vec_set-8.ll
vec_set-9.ll
vec_set-A.ll
vec_set-B.ll
vec_set-C.ll
vec_set-D.ll
vec_set-E.ll
vec_set-F.ll
vec_set-G.ll
vec_set-H.ll
vec_set-I.ll
vec_set-J.ll
vec_set.ll
vec_shift2.ll
vec_shift3.ll
vec_shift.ll
vec_shuffle-2.ll
vec_shuffle-3.ll
vec_shuffle-4.ll
vec_shuffle-5.ll
vec_shuffle-6.ll
vec_shuffle-7.ll
vec_shuffle-8.ll
vec_shuffle-9.ll
vec_shuffle-10.ll
vec_shuffle-11.ll
vec_shuffle-12.ll
vec_shuffle-13.ll
vec_shuffle-14.ll
vec_shuffle-15.ll
vec_shuffle-16.ll
vec_shuffle-17.ll
vec_shuffle-18.ll
vec_shuffle-19.ll
vec_shuffle-20.ll
vec_shuffle-21.ll
vec_shuffle-22.ll
vec_shuffle-23.ll
vec_shuffle-24.ll
vec_shuffle-25.ll
vec_shuffle-26.ll
vec_shuffle-27.ll
vec_shuffle-28.ll
vec_shuffle-29.ll
vec_shuffle-30.ll
vec_shuffle-31.ll
vec_shuffle-32.ll
vec_shuffle-33.ll
vec_shuffle-34.ll
vec_shuffle-35.ll
vec_shuffle-36.ll
vec_shuffle-37.ll
vec_shuffle.ll
vec_splat-2.ll
vec_splat-3.ll
vec_splat-4.ll
vec_splat.ll
vec_ss_load_fold.ll
vec_zero_cse.ll
vec_zero-2.ll
vec_zero.ll
vector-intrinsics.ll
vector-rem.ll
vector-variable-idx.ll
vector.ll
vfcmp.ll
volatile.ll
vortex-bug.ll
vshift_scalar.ll
vshift_split2.ll
vshift_split.ll
vshift-1.ll
vshift-2.ll
vshift-3.ll
vshift-4.ll
weak.ll
widen_arith-1.ll
widen_arith-2.ll
widen_arith-3.ll
widen_arith-4.ll
widen_arith-5.ll
widen_arith-6.ll
widen_cast-1.ll
widen_cast-2.ll
widen_cast-3.ll
widen_cast-4.ll
widen_cast-5.ll
widen_cast-6.ll
widen_conv-1.ll
widen_conv-2.ll
widen_conv-3.ll
widen_conv-4.ll
widen_select-1.ll
widen_shuffle-1.ll
widen_shuffle-2.ll
x86-64-and-mask.ll
x86-64-arg.ll
x86-64-asm.ll
x86-64-dead-stack-adjust.ll
x86-64-disp.ll
x86-64-frameaddr.ll
x86-64-gv-offset.ll
x86-64-malloc.ll Fix codegen to compute the size of an allocation by multiplying the 2009-03-17 19:36:00 +00:00
x86-64-mem.ll
x86-64-pic-1.ll
x86-64-pic-2.ll
x86-64-pic-3.ll
x86-64-pic-4.ll
x86-64-pic-5.ll
x86-64-pic-6.ll
x86-64-pic-7.ll
x86-64-pic-8.ll
x86-64-pic-9.ll
x86-64-pic-10.ll
x86-64-pic-11.ll
x86-64-ret0.ll
x86-64-shortint.ll
x86-64-sret-return.ll
x86-64-varargs.ll
x86-frameaddr2.ll
x86-frameaddr.ll
xmm-r64.ll
xor_not.ll
xor-undef.ll
xorl.ll
zero-remat.ll
zext-inreg-0.ll
zext-inreg-1.ll