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1406 Commits

Author SHA1 Message Date
Chris Lattner
3700f90c19 Work around a GCC 3.3.5 bug noticed by a user. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29490 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-03 00:18:59 +00:00
Evan Cheng
c384d6c398 - Change AssignTopologicalOrder to return vector of SDNode* by reference. 
- Tweak implementation to avoid using std::map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29479 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-02 22:00:34 +00:00
Jim Laskey
eb577ba3b8 Final polish on machine pass registries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29471 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-02 12:30:23 +00:00
Jim Laskey
9373beba60 Now that the ISel is available, it's possible to create a default instruction 
scheduler creator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29452 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 19:14:14 +00:00
Jim Laskey
9ff542f2cc 1. Change use of "Cache" to "Default". 
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.

More to follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29450 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 18:29:48 +00:00
Jim Laskey
13ec702c43 Introducing plugable register allocators and instruction schedulers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29434 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 14:21:23 +00:00
Evan Cheng
e6f35d8a5c Added AssignTopologicalOrder() to assign each node an unique id based on their topological order. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29431 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 08:20:41 +00:00
Evan Cheng
8825a485e2 PIC jump table entries are always 32-bit even in 64-bit mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29422 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-08-01 01:03:13 +00:00
Evan Cheng
2641cad180 Remove InFlightSet hack. No longer needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-28 00:47:19 +00:00
Nate Begeman
4d9bbdc440 Code cleanups, per review 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29347 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 16:46:58 +00:00
Evan Cheng
7c16d776cb AssignNodeIds should return unsigned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29343 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 07:36:47 +00:00
Evan Cheng
091cba1b91 AssignNodeIds assign each node in the DAG an unique id. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29337 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 06:39:06 +00:00
Nate Begeman
2f1ae88445 Support jump tables when in PIC relocation model 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-27 01:13:04 +00:00
Chris Lattner
c9cf4f1a75 Fix a case where LegalizeAllNodesNotLeadingTo could take exponential time. 
This manifested itself as really long time to compile
Regression/CodeGen/Generic/2003-05-28-ManyArgs.ll on ppc.
This is PR847.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29313 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-26 23:55:56 +00:00
Reid Spencer
7107c3badf For PR780: 
1. Move IncludeFile.h to System library
2. Move IncludeFile.cpp to System library
3. #1 and #2 required to prevent cyclic library dependencies for libSystem
4. Convert all existing uses of Support/IncludeFile.h to System/IncludeFile.h
5. Add IncludeFile support to various lib/System classes.
6. Add new lib/System classes to LinkAllVMCore.h
All this in an attempt to pull in lib/System to what's required for VMCore


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29287 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-26 16:18:00 +00:00
Reid Spencer
9160a6a18f Initialize some variables the compiler warns about. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29277 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-25 20:44:41 +00:00
Jim Laskey
60f09928a0 Use an enumeration to eliminate data relocations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29249 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 20:57:35 +00:00
Evan Cheng
917ec983df If a shuffle is a splat, check if the argument is a build_vector with all elements being the same. If so, return the argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29242 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 08:25:53 +00:00
Chris Lattner
02b04b4d34 Build more debugger/selectiondag libraries as archives instead of .o files. 
This works around bugs in some versions of the cygwin linker.

Patch contributed by Anton Korobeynikov.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29239 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-21 00:10:47 +00:00
Evan Cheng
e7bec0dbb5 If a shuffle is unary, i.e. one of the vector argument is not needed, turn the 
operand into a undef and adjust mask accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29232 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 22:44:41 +00:00
Chris Lattner
a15cf7045e Mems can be in the output list also. This is the second half of a fix for 
PR833


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29224 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 19:02:21 +00:00
Andrew Lenharth
ae6153f943 80 cols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29221 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 17:43:27 +00:00
Andrew Lenharth
ed41f1bb19 Reduce number of exported symbols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29220 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-20 17:28:38 +00:00
Chris Lattner
917d2c9dc2 Add an out-of-line virtual method for the sdnode class to give it a home. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29192 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-19 00:00:37 +00:00
Jim Laskey
16d42c6ac6 It was pointed out that DEBUG() is only available with -debug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 18:25:13 +00:00
Jim Laskey
e37fe9b3a1 Ensure that dump calls that are associated with asserts are removed from 
non-debug build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 17:58:07 +00:00
Chris Lattner
25a022c780 Fix CodeGen/Alpha/2006-07-03-ASMFormalLowering.ll and PR818. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-11 01:40:09 +00:00
Evan Cheng
42f75a926a Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29072 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-07-07 21:37:21 +00:00
Evan Cheng
322812e603 Ugly hack! Add helper functions InsertInFlightSetEntry and 
RemoveInFlightSetEntry. They are used in place of direct set operators to
reduce instruction selection function stack size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28987 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-29 23:57:05 +00:00
Chris Lattner
9525528a7d Use hidden visibility to make symbols in an anonymous namespace get 
dropped.  This shrinks libllvmgcc.dylib another 67K


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28975 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 23:17:24 +00:00
Chris Lattner
f8c68f694c Shave another 27K off libllvmgcc.dylib with visibility hidden 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28973 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 22:17:39 +00:00
Chris Lattner
360e8200ec Mark these two classes as hidden, shrinking libllbmgcc.dylib by 25K 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28970 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 21:58:30 +00:00
Chris Lattner
883a52de66 Fix CodeGen/Generic/2006-06-28-SimplifySetCCCrash.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28965 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-28 18:29:47 +00:00
Reid Spencer
9d5b532de9 For PR801: 
Refactor the Graph writing code to use a common implementation which is
now in lib/Support/GraphWriter.cpp. This completes the PR.

Patch by Anton Korobeynikov. Thanks, Anton!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28925 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-27 16:49:46 +00:00
Evan Cheng
a844126c43 Consistency. EXTRACT_ELEMENT index operand should have ptr type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28795 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:11:54 +00:00
Evan Cheng
8d3af5e7d0 Instructions with variable operands (variable_ops) can have a number required 
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28791 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 07:22:16 +00:00
Chris Lattner
c4fa603347 Port some bugfixes in shift handling from SimplifyDemandedBits over to 
ComputeMaskedBits.  DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28768 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 16:52:37 +00:00
Jim Laskey
9bfa2dcff6 TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28765 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 13:08:58 +00:00
Chris Lattner
a3bb86dd6b Make sure to update the CFG correctly if a switch only has a default dest. 
This fixes CodeGen/Generic/2006-06-12-LowerSwitchCrash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28755 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 18:25:29 +00:00
Andrew Lenharth
232c910b8a Start on my todo list 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28752 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 16:07:18 +00:00
Chris Lattner
0c48fd4610 Fix X86/inline-asm.ll:test2, a case where an input value was implicitly 
truncated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28733 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-08 18:27:11 +00:00
Chris Lattner
cf752aa502 Fix Regression/CodeGen/X86/inline-asm.ll, a case where inline asm causes 
implement extension of a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28731 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-08 18:22:48 +00:00
Reid Spencer
fcadfbbdef For PR798: 
Provide GraphViz support for MingW32. Patch provided by Anton Korobeynikov


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28688 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-05 16:26:06 +00:00
Reid Spencer
18c8b49e7d Use archive libraries instead of object files for VMCore, BCReader, 
BCWriter, and bzip2 libraries. Adjust the various makefiles to accommodate
these changes. This was done to speed up link times.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28610 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 01:30:27 +00:00
Evan Cheng
4c6f2f9e92 commuteInstruction() does not always create a new MI! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28592 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 18:03:39 +00:00
Evan Cheng
16eee25c66 Eliminate a memory leak. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28585 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 07:13:03 +00:00
Evan Cheng
7b336a8746 visitVBinOp: Can't fold divide by zero! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28584 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-31 06:08:35 +00:00
Evan Cheng
6b8e5a9318 Make sure the register pressure reduction schedulers work for non-uniform 
latency targets, e.g. PPC32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28561 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 18:05:39 +00:00
Evan Cheng
19564e3d83 When a priority_queue is empty, the behavior of top() operator is 
non-deterministic. Returns NULL when it's empty!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28560 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 18:04:34 +00:00
Chris Lattner
729c6d1da8 Fix a nasty dag combiner bug that caused nondeterminstic crashes (MY FAVORITE!): 
SimplifySelectOps would eliminate a Select, delete it, then return true.

The clients would see that it did something and return null.

The top level would see a null return, and decide that nothing happened,
proceeding to process the node in other ways: boom.

The fix is simple: clients of SimplifySelectOps should return the select
node itself.

In order to catch really obnoxious boogs like this in the future, add an
assert that nodes are not deleted.  We do this by checking for a sentry node
type that the SDNode dtor sets when a node is destroyed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28514 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-27 00:43:02 +00:00
Evan Cheng
d61c4820c9 Make CALL node consistent with RET node. Signness of value has type MVT::i32 
instead of MVT::i1. Either is fine except MVT::i32 is probably a legal type
for most (if not all) platforms while MVT::i1 is not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28511 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 23:13:20 +00:00
Evan Cheng
8e7d056bc5 Change RET node to include signness information of the return values. e.g. 
RET chain, value1, sign1, value2, sign2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28509 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 23:09:09 +00:00
Evan Cheng
3b78823868 Turn on -sched-commute-nodes by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28465 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 08:37:31 +00:00
Evan Cheng
f6d62c2e2a CALL node change: now including signness of every argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28461 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:55:32 +00:00
Chris Lattner
d74ea2bbd8 Patches to make the LLVM sources more -pedantic clean. Patch provided 
by Anton Korobeynikov!  This is a step towards closing PR786.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 17:04:05 +00:00
Evan Cheng
80235d508e -enable-unsafe-fp-math implies -enable-finite-only-fp-math 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28437 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 18:18:46 +00:00
Vladimir Prus
124729155d Fix missing include 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28435 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 13:43:15 +00:00
Evan Cheng
f6f9581983 Incorrect SETCC CondCode used for FP comparisons. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28433 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-23 06:40:47 +00:00
Evan Cheng
21d03f2de0 lib/Target/Target.td 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28386 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 20:42:07 +00:00
Chris Lattner
d202ca4d98 Fix the result of the call to use a correct vbitconvert. There is no need to 
use getPackedTypeBreakdown at all here.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28365 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 20:49:36 +00:00
Chris Lattner
1b8daae71b Correct a previous patch which broke CodeGen/PowerPC/vec_call.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28364 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 20:43:21 +00:00
Evan Cheng
7e399c14ab Another typo. Pointed out by Nate Begeman. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28353 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:22:14 +00:00
Evan Cheng
6c43f35d74 Fixed a LowerCallTo and LowerArguments bug. They were introducing illegal 
VBIT_VECTOR nodes. There were some confusion about the semantics of
getPackedTypeBreakdown(). e.g. for <4 x f32> it returns 1 and v4f32, not 4,
and f32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28352 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:16:39 +00:00
Evan Cheng
e9b3da17cd Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:10:06 +00:00
Chris Lattner
c5d7d7c715 When we legalize target nodes, do not use getNode to create a new node, 
use UpdateNodeOperands to just update the operands!  This is important because
getNode will allocate a new node if the node returns a flag and this breaks
assumptions in the legalizer that you can legalize some things multiple times
and get exactly the same results.

This latent bug was exposed by my ppc patch last night, and this fixes
gsm/toast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28348 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 18:00:08 +00:00
Chris Lattner
b248e16afd Add an assertion, avoid some unneeded work for each call. No functionality 
change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28347 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 17:55:45 +00:00
Chris Lattner
da098e7d10 Add support for calls that pass and return legal vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28340 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 23:39:44 +00:00
Chris Lattner
f4ec817299 Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo 
produce it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28338 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 22:53:20 +00:00
Andrew Lenharth
3e348494bb this should be 128 I think 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28330 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 17:45:23 +00:00
Andrew Lenharth
dae9cbe8d4 Move this code to a common place 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28329 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 17:42:15 +00:00
Chris Lattner
8c0c10c2b9 Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend, 
it doesn't currently use/maintain the chain properly.  Also, make the
X86ISelLowering.cpp file 80-col clean.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 06:45:34 +00:00
Chris Lattner
966454129d Move function-live-in-handling code from the sdisel code to the scheduler. 
This code should be emitted after legalize, so it can't be in sdisel.

Note that the EmitFunctionEntryCode hook should be updated to operate on the
DAG.  The X86 backend is the only one currently using this hook.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28315 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 06:10:58 +00:00
Chris Lattner
e2e41730cc Legalize FORMAL_ARGUMENTS nodes correctly, we don't want to legalize them once 
for each argument.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28313 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-16 05:49:56 +00:00
Evan Cheng
8820ad5154 Fixing 2006-05-01-SchedCausingSpills.ll; some clean up 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28279 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-13 08:22:24 +00:00
Evan Cheng
ee00a1d12c Revert an un-intended change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-13 05:53:47 +00:00
Chris Lattner
a2d079a776 Merge identical code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28274 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-13 02:11:14 +00:00
Chris Lattner
b5d9319bc5 Remove dead vars 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28255 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 18:06:45 +00:00
Chris Lattner
f1343c1b79 remove dead vars 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28254 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 18:04:28 +00:00
Chris Lattner
5eed34d208 Comment out dead variables 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28252 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 17:57:54 +00:00
Chris Lattner
e41102bb61 Compile: 
%tmp152 = setgt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %tmp159 = setlt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %bothcond2 = or bool %tmp152, %tmp159           ; <bool> [#uses=1]

To setne, not setune, which causes an assertion fault.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 17:03:46 +00:00
Owen Anderson
07000c6f01 Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 06:33:49 +00:00
Evan Cheng
626da3d9ae Duh. That could take a long time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28235 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 06:05:18 +00:00
Chris Lattner
21a57dc751 Two simplifications for token factor nodes: simplify tf(x,x) -> x. 
simplify tf(x,y,y,z) -> tf(x,y,z).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28233 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 05:01:37 +00:00
Evan Cheng
13d41b9d72 Add capability to scheduler to commute nodes for profit. 
If a two-address code whose first operand has uses below, it should be commuted
when possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-12 01:58:24 +00:00
Evan Cheng
e165a78551 Refactor scheduler code. Move register-reduction list scheduler to a 
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-11 23:55:42 +00:00
Evan Cheng
90db0358bb Templatify RegReductionPriorityQueue 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28212 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-10 06:16:44 +00:00
Nate Begeman
ec57fd91af Fix PR773 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 18:20:51 +00:00
Evan Cheng
b63b067925 Add pseudo dependency to force a def&use operand to be scheduled last (unless 
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28201 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 07:13:34 +00:00
Evan Cheng
60e8c71c9f Debugging info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28200 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-09 06:55:15 +00:00
Chris Lattner
4b37e87ab9 Make the case I just checked in stronger. Now we compile this: 
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

to:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srwi r2, r2, 1
        extsh r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28175 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 21:18:59 +00:00
Chris Lattner
eaeda56649 Implement and_sext.ll:test3, generating: 
_test4:
        srawi r3, r3, 16
        blr

instead of:

_test4:
        srwi r2, r3, 16
        extsh r3, r2
        blr

for:

short test4(unsigned X) {
  return (X >> 16);
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 20:59:41 +00:00
Chris Lattner
a850446a0b Compile this: 
short test4(unsigned X) {
  return (X >> 16);
}

to:

_test4:
        movl 4(%esp), %eax
        sarl $16, %eax
        ret

instead of:

_test4:
        movl $-65536, %eax
        andl 4(%esp), %eax
        sarl $16, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 20:51:54 +00:00
Chris Lattner
2cfd6746ae Fold shifts with undef operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28167 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 17:29:49 +00:00
Chris Lattner
1b7371331f When tracking demanded bits, if any bits from the sext of an SRA are demanded, 
then so is the input sign bit.  This fixes mediabench/g721 on X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28166 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 17:22:53 +00:00
Nate Begeman
17c275ff2c Make emission of jump tables a bit less conservative; they are now required 
to be only 31.25% dense, rather than 75% dense.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28165 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 16:51:36 +00:00
Nate Begeman
5c742681ed Fix PR772 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28161 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-08 01:35:01 +00:00
Chris Lattner
822db93e57 Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us 
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28155 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 23:48:13 +00:00
Chris Lattner
e60351bb72 Add some more sign propagation cases 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28154 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 23:40:29 +00:00
Chris Lattner
310b578023 Simplify some code, add a couple minor missed folds 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28152 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 23:06:26 +00:00
Chris Lattner
b9ebacdb4d constant fold sign_extend_inreg 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28151 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 23:05:41 +00:00
Chris Lattner
541a24f7af remove cases handled elsewhere 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28150 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 22:43:44 +00:00
Chris Lattner
d6f7fe76a6 Add some more simple sign bit propagation cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 22:39:59 +00:00
Chris Lattner
ee4ea92358 Use the new TargetLowering::ComputeNumSignBits method to eliminate 
sign_extend_inreg operations.  Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:

short test(short X, short x) {
  int Y = X+x;
  return (Y >> 1);
}
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

into:

_test:
        add r2, r3, r4
        srawi r3, r2, 1
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test:
        add r2, r3, r4
        srawi r2, r2, 1
        extsh r3, r2
        blr
_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r2, r2, 1
        extsh r3, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28146 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:30:03 +00:00
Chris Lattner
5c3e21d687 Add some really really simple code for computing sign-bit propagation. 
This will certainly be enhanced in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28145 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:27:13 +00:00
Chris Lattner
f0df8824eb When inserting casts, be careful of where we put them. We cannot insert 
a cast immediately before a PHI node.

This fixes Regression/CodeGen/Generic/2006-05-06-GEP-Cast-Sink-Crash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28143 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 09:10:37 +00:00
Chris Lattner
c93dfda905 Fold (trunc (srl x, c)) -> (srl (trunc x), c) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28138 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-06 00:11:52 +00:00
Chris Lattner
b72773bb88 Fold trunc(any_ext). This gives stuff like: 
27,28c27
<       movzwl %di, %edi
<       movl %edi, %ebx
---
>       movw %di, %bx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28137 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 22:56:26 +00:00
Chris Lattner
06afe07037 Shrink shifts when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 22:53:17 +00:00
Chris Lattner
fe8babf689 Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 22:32:12 +00:00
Chris Lattner
e564dbb51c Fold (fpext (load x)) -> (extload x) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28130 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:34:35 +00:00
Chris Lattner
903236468c More aggressively sink GEP offsets into loops. For example, before we 
generated:

        movl 8(%esp), %eax
        movl %eax, %edx
        addl $4316, %edx
        cmpb $1, %cl
        ja LBB1_2       #cond_false
LBB1_1: #cond_true
        movl L_QuantizationTables720$non_lazy_ptr, %ecx
        movl %ecx, (%edx)
        movl L_QNOtoQuantTableShift720$non_lazy_ptr, %edx
        movl %edx, 4460(%eax)
        ret
...

Now we generate:

        movl 8(%esp), %eax
        cmpb $1, %cl
        ja LBB1_2       #cond_false
LBB1_1: #cond_true
        movl L_QuantizationTables720$non_lazy_ptr, %ecx
        movl %ecx, 4316(%eax)
        movl L_QNOtoQuantTableShift720$non_lazy_ptr, %ecx
        movl %ecx, 4460(%eax)
        ret

... which uses one fewer register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28129 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 21:17:49 +00:00
Chris Lattner
0d8dae749c Fold some common code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28124 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:32:04 +00:00
Chris Lattner
540121f1ec Implement: 
// fold (and (sext x), (sext y)) -> (sext (and x, y))
  // fold (or  (sext x), (sext y)) -> (sext (or  x, y))
  // fold (xor (sext x), (sext y)) -> (sext (xor x, y))
  // fold (and (aext x), (aext y)) -> (aext (and x, y))
  // fold (or  (aext x), (aext y)) -> (aext (or  x, y))
  // fold (xor (aext x), (aext y)) -> (aext (xor x, y))


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28123 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:31:05 +00:00
Chris Lattner
a3dc3f692c Pull and through and/or/xor. This compiles some bitfield code to: 
mov EAX, DWORD PTR [ESP + 4]
        mov ECX, DWORD PTR [EAX]
        mov EDX, ECX
        add EDX, EDX
        or EDX, ECX
        and EDX, -2147483648
        and ECX, 2147483647
        or EDX, ECX
        mov DWORD PTR [EAX], EDX
        ret

instead of:

        sub ESP, 4
        mov DWORD PTR [ESP], ESI
        mov EAX, DWORD PTR [ESP + 8]
        mov ECX, DWORD PTR [EAX]
        mov EDX, ECX
        add EDX, EDX
        mov ESI, ECX
        and ESI, -2147483648
        and EDX, -2147483648
        or EDX, ESI
        and ECX, 2147483647
        or EDX, ECX
        mov DWORD PTR [EAX], EDX
        mov ESI, DWORD PTR [ESP]
        add ESP, 4
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28122 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 06:10:43 +00:00
Chris Lattner
5ffc066912 Implement a variety of simplifications for ANY_EXTEND. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28121 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:58:59 +00:00
Chris Lattner
35e5c14b80 Factor some code, add these transformations: 
// fold (and (trunc x), (trunc y)) -> (trunc (and x, y))
  // fold (or  (trunc x), (trunc y)) -> (trunc (or  x, y))
  // fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y))


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28120 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 05:51:50 +00:00
Jeff Cohen
4b75e73791 Fix VC++ compilation error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 01:47:05 +00:00
Chris Lattner
7e598096ea Sink noop copies into the basic block that uses them. This reduces the number 
of cross-block live ranges, and allows the bb-at-a-time selector to always
coallesce these away, at isel time.

This reduces the load on the coallescer and register allocator.  For example
on a codec on X86, we went from:

   1643 asm-printer           - Number of machine instrs printed
    419 liveintervals         - Number of loads/stores folded into instructions
   1144 liveintervals         - Number of identity moves eliminated after coalescing
   1022 liveintervals         - Number of interval joins performed
    282 liveintervals         - Number of intervals after coalescing
   1304 liveintervals         - Number of original intervals
     86 regalloc              - Number of times we had to backtrack
1.90232 regalloc              - Ratio of intervals processed over total intervals
     40 spiller               - Number of values reused
    182 spiller               - Number of loads added
    121 spiller               - Number of stores added
    132 spiller               - Number of register spills
      6 twoaddressinstruction - Number of instructions commuted to coalesce
    360 twoaddressinstruction - Number of two-address instructions

to:

   1636 asm-printer           - Number of machine instrs printed
    403 liveintervals         - Number of loads/stores folded into instructions
   1155 liveintervals         - Number of identity moves eliminated after coalescing
   1033 liveintervals         - Number of interval joins performed
    279 liveintervals         - Number of intervals after coalescing
   1312 liveintervals         - Number of original intervals
     76 regalloc              - Number of times we had to backtrack
1.88998 regalloc              - Ratio of intervals processed over total intervals
      1 spiller               - Number of copies elided
     41 spiller               - Number of values reused
    191 spiller               - Number of loads added
    114 spiller               - Number of stores added
    128 spiller               - Number of register spills
      4 twoaddressinstruction - Number of instructions commuted to coalesce
    356 twoaddressinstruction - Number of two-address instructions

On this testcase, this change provides a modest reduction in spill code,
regalloc iterations, and total instructions emitted.  It increases the number
of register coallesces.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28115 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-05 01:04:50 +00:00
Evan Cheng
14a6db8bd9 Initial support for register pressure aware scheduling. The register reduction 
scheduler can go into a "vertical mode" (i.e. traversing up the two-address
chain, etc.) when the register pressure is low.
This does seem to reduce the number of spills in the cases I've looked at. But
with x86, it's no guarantee the performance of the code improves.
It can be turned on with -sched-vertically option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 19:16:39 +00:00
Chris Lattner
8b915b4ed2 Remove and simplify some more machineinstr/machineoperand stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:16:01 +00:00
Chris Lattner
2d90ac7ca6 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 18:05:43 +00:00
Chris Lattner
ea50fabfd4 Remove a bunch more SparcV9 specific stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-04 01:15:02 +00:00
Nate Begeman
f4360a4789 Finish up the initial jump table implementation by allowing jump tables to 
not be 100% dense.  Increase the minimum threshold for the number of cases
in a switch statement from 4 to 6 in order to create a jump table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28079 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 03:48:02 +00:00
Evan Cheng
c9a83a45ba Bottom up register pressure reduction work: clean up some hacks and enhanced 
the heuristic to further reduce spills for several test cases. (Note, it may
not necessarily translate to runtime win!)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28076 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 02:10:45 +00:00
Owen Anderson
a69571c799 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-03 01:29:57 +00:00
Evan Cheng
22608c2d1f Dis-favor stores more 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28035 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 09:20:44 +00:00
Evan Cheng
f229a5d4be Bottom up register-pressure reduction scheduler now pushes store operations 
up the schedule. This helps code that looks like this:

loads ...
computations (first set) ...
stores (first set) ...
loads
computations (seccond set) ...
stores (seccond set) ...

Without this change, the stores and computations are more likely to
interleave:

loads ...
loads ...
computations (first set) ...
computations (second set) ...
computations (first set) ...
stores (first set) ...
computations (second set) ...
stores (stores set) ...

This can increase the number of spills if we are unlucky.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28033 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 09:14:40 +00:00
Evan Cheng
3766d66b91 Didn't mean ScheduleDAGList.cpp to make the last checkin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28030 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 08:56:34 +00:00
Evan Cheng
10dbd3ead8 Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28029 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-01 08:54:57 +00:00
Chris Lattner
25c344a758 Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c 
with some changes I have to the new CFE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28022 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 23:33:20 +00:00
Evan Cheng
55d0fa1bfa Remove the temporary option: -no-isel-fold-inflight 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28012 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 18:54:11 +00:00
Evan Cheng
020c41f21e TargetLowering::LowerArguments should return a VBIT_CONVERT of 
FORMAL_ARGUMENTS SDOperand in the return result vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28009 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 05:25:15 +00:00
Evan Cheng
552c4a8494 Added a temporary option -no-isel-fold-inflight to control whether a "inflight" 
node can be folded.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28003 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-28 02:09:19 +00:00
Evan Cheng
f7179bb56e Insert a VBIT_CONVERT between a FORMAL_ARGUMENT node and its vector uses 
(VAND, VADD, etc.). Legalizer will assert otherwise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27991 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 08:29:42 +00:00
Chris Lattner
a83385fb7b Fix Regression/CodeGen/Generic/2006-04-26-SetCCAnd.ll and 
PR748.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27987 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-27 05:01:07 +00:00
Evan Cheng
3b0d286d00 Don't forget return void. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27974 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-25 23:03:35 +00:00
Nate Begeman
9453eea49b Fix the updating of the machine CFG when a PHI node was in a successor of 
the jump table's range check block.  This re-enables 100% dense jump tables
by default on PPC & x86


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27952 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-23 06:26:20 +00:00
Nate Begeman
05f9466cf0 Turn of jump tables for a bit, there are still some issues to work out with 
updating the machine CFG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27949 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 23:51:56 +00:00
Nate Begeman
37efe67645 JumpTable support! What this represents is working asm and jit support for 
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-22 18:53:45 +00:00
Chris Lattner
4a1cd9c61e The BFS scheduler is apparently nondeterminstic (causes many llvmgcc bootstrap 
miscompares).  Switch RISC targets to use the list-td scheduler, which isn't.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27933 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 17:16:16 +00:00
Chris Lattner
ef027f940c Fix a couple more memory issues 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27930 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-21 15:32:26 +00:00
Chris Lattner
fedced7bc3 Fix a really subtle and obnoxious memory bug that caused issues with an 
llvm-gcc4 boostrap.  Whenever a node is deleted by the dag combiner, it
*must* be returned by the visit function, or the dag combiner will not
know that the node has been processed (and will, e.g., send it to the
target dag combine xforms).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27922 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 23:55:59 +00:00
Evan Cheng
44f1f09b4e Turn a VAND into a VECTOR_SHUFFLE is applicable. 
DAG combiner can turn a VAND V, <-1, 0, -1, -1>, i.e. vector clear elements,
into a vector shuffle with a zero vector. It only does so when TLI tells it
the xform is profitable.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27874 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 08:56:16 +00:00
Chris Lattner
62b5772959 Implement folding of a bunch of binops with undef 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27863 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-20 05:39:12 +00:00
Chris Lattner
89a1b380a4 Simplify some code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27846 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-19 23:17:50 +00:00
Chris Lattner
80edfb3af5 Fix handling of calls in functions that use vectors. This fixes a crash on 
the code in GCC PR26546.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27780 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 22:10:08 +00:00
Chris Lattner
8d5a894501 Codegen insertelement with constant insertion points as scalar_to_vector 
and a shuffle.  For this:

void %test2(<4 x float>* %F, float %f) {
        %tmp = load <4 x float>* %F             ; <<4 x float>> [#uses=2]
        %tmp3 = add <4 x float> %tmp, %tmp              ; <<4 x float>> [#uses=1]
        %tmp2 = insertelement <4 x float> %tmp3, float %f, uint 2               ; <<4 x float>> [#uses=2]
        %tmp6 = add <4 x float> %tmp2, %tmp2            ; <<4 x float>> [#uses=1]
        store <4 x float> %tmp6, <4 x float>* %F
        ret void
}

we now get this on X86 (which will get better):

_test2:
        movl 4(%esp), %eax
        movaps (%eax), %xmm0
        addps %xmm0, %xmm0
        movaps %xmm0, %xmm1
        shufps $3, %xmm1, %xmm1
        movaps %xmm0, %xmm2
        shufps $1, %xmm2, %xmm2
        unpcklps %xmm1, %xmm2
        movss 8(%esp), %xmm1
        unpcklps %xmm1, %xmm0
        unpcklps %xmm2, %xmm0
        addps %xmm0, %xmm0
        movaps %xmm0, (%eax)
        ret

instead of:

_test2:
        subl $28, %esp
        movl 32(%esp), %eax
        movaps (%eax), %xmm0
        addps %xmm0, %xmm0
        movaps %xmm0, (%esp)
        movss 36(%esp), %xmm0
        movss %xmm0, 8(%esp)
        movaps (%esp), %xmm0
        addps %xmm0, %xmm0
        movaps %xmm0, (%eax)
        addl $28, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27765 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-17 19:21:01 +00:00
Chris Lattner
2efce0a589 Add support for promoting stores from one legal type to another, allowing us 
to write one pattern for vector stores instead of 4.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27730 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-16 01:36:45 +00:00
Chris Lattner
547a16f273 Make these predicates return true for bit_convert(buildvector)'s as well as 
buildvectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27723 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-15 23:38:00 +00:00
Chris Lattner
3824e50b1e Make this assertion better 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27695 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-14 06:08:35 +00:00
Evan Cheng
cc9876124e Promote vector AND, OR, and XOR 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27632 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 21:20:24 +00:00
Evan Cheng
41f6cbbeb2 Vector type promotion for ISD::LOAD and ISD::SELECT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27606 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 16:33:18 +00:00
Chris Lattner
fdfded5588 Implement support for the formal_arguments node. To get this, targets shouldcustom legalize it and remove their XXXTargetLowering::LowerArguments overload 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27604 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 16:20:43 +00:00
Chris Lattner
9d956250f5 Don't memoize vloads in the load map! Don't memoize them anywhere here, let 
getNode do it.  This fixes CodeGen/Generic/2006-04-11-vecload.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27602 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-12 03:25:41 +00:00
Evan Cheng
98f8aeb45f Only get Tmp2 for cases where number of operands is > 1. Fixed return void. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27586 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 06:33:39 +00:00
Chris Lattner
b49e52c7e2 add some todos 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27580 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 02:00:08 +00:00
Chris Lattner
f87324e44d Add basic support for legalizing returns of vectors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27578 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-11 01:31:51 +00:00
Evan Cheng
db3c626eb9 Missing break 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27559 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-10 18:54:36 +00:00
Chris Lattner
b22e35a3c3 Add code generator support for VSELECT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27542 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 22:22:57 +00:00
Chris Lattner
17614ea63d Canonicalize vvector_shuffle(x,x) -> vvector_shuffle(x,undef) to enable patterns 
to match again :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27533 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 05:34:25 +00:00
Chris Lattner
3e104b1116 Codegen shufflevector as VVECTOR_SHUFFLE 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27529 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 04:15:24 +00:00
Chris Lattner
4ddd283f69 add a sanity check: LegalizeOp should return a value that is the same type 
as its input.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27528 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 04:13:17 +00:00
Evan Cheng
f6bf87f2cc INSERT_VECTOR_ELT lowering bug: 
store vector to $esp
  store element to $esp + sizeof(VT) * index
  load  vector from $esp
The bug is VT is the type of the vector element, not the type of the vector!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27517 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 01:46:37 +00:00
Chris Lattner
67f1351498 Stub out shufflevector 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27514 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-08 01:19:25 +00:00
Evan Cheng
c04766a228 1. If both vector operands of a vector_shuffle are undef, turn it into an undef. 
2. A shuffle mask element can also be an undef.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27472 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-06 23:20:43 +00:00
Chris Lattner
2e2ef95350 Make a vector live across blocks have the correct Vec type. This fixes 
CodeGen/X86/2006-04-04-CrossBlockCrash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27436 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 06:54:42 +00:00
Evan Cheng
18dd6d0a2a Exapnd a VECTOR_SHUFFLE to a BUILD_VECTOR if target asks for it to be expanded 
or custom lowering fails.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27432 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-05 06:07:11 +00:00
Chris Lattner
e44be60ee9 Do not create ZEXTLOAD's unless we are before legalize or the operation is 
legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27402 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 17:39:18 +00:00
Chris Lattner
4352cc9e21 * Add supprot for SCALAR_TO_VECTOR operations where the input needs to be 
promoted/expanded (e.g. SCALAR_TO_VECTOR from i8/i16 on PPC).
* Add support for targets to request that VECTOR_SHUFFLE nodes be promoted
  to a canonical type, for example, we only want v16i8 shuffles on PPC.
* Move isShuffleLegal out of TLI into Legalize.
* Teach isShuffleLegal to allow shuffles that need to be promoted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27399 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 17:23:26 +00:00
Chris Lattner
08da55eeff Constant fold bitconvert(undef) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27391 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-04 01:02:22 +00:00
Chris Lattner
97c2073270 Add a missing check, this fixes UnitTests/Vector/sumarray.c 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27375 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 17:29:28 +00:00
Chris Lattner
a4c5d8c6b4 Add a missing check, which broke a bunch of vector tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 17:21:50 +00:00
Andrew Lenharth
cf4fb61f6c back this out 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27367 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-03 03:16:50 +00:00
Andrew Lenharth
50a0d426e8 This should be a win of every arch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27364 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 21:42:45 +00:00
Chris Lattner
1b5232a937 relax assertion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27358 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 06:19:46 +00:00
Chris Lattner
1482b5fc7a Allow targets to compute masked bits for intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27357 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 06:15:09 +00:00
Chris Lattner
350bec0fb9 Add a little dag combine to compile this: 
int %AreSecondAndThirdElementsBothNegative(<4 x float>* %in) {
entry:
        %tmp1 = load <4 x float>* %in           ; <<4 x float>> [#uses=1]
        %tmp = tail call int %llvm.ppc.altivec.vcmpgefp.p( int 1, <4 x float> < float 0x7FF8000000000000, float 0.000000e+00, float 0.000000e+00, float 0x7FF8000000000000 >, <4 x float> %tmp1 )           ; <int> [#uses=1]
        %tmp = seteq int %tmp, 0                ; <bool> [#uses=1]
        %tmp3 = cast bool %tmp to int           ; <int> [#uses=1]
        ret int %tmp3
}

into this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        mtspr 256, r2
        blr

instead of this:

_AreSecondAndThirdElementsBothNegative:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI1_0)
        lis r5, ha16(LCPI1_0)
        lvx v0, 0, r3
        lvx v1, r5, r4
        vcmpgefp. v0, v1, v0
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        xori r3, r3, 1
        cntlzw r3, r3
        srwi r3, r3, 5
        mtspr 256, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27356 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 06:11:11 +00:00
Chris Lattner
4aab2f4ab5 Implement promotion for EXTRACT_VECTOR_ELT, allowing v16i8 multiplies to work with PowerPC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27349 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 05:06:04 +00:00
Chris Lattner
bc70cf8be9 Implement the Expand action for binary vector operations to break the binop 
into elements and operate on each piece.  This allows generic vector integer
multiplies to work on PPC, though the generated code is horrible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27347 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:57:31 +00:00
Chris Lattner
e58a780166 Intrinsics that just load from memory can be treated like loads: they don't 
have to serialize against each other.  This allows us to schedule lvx's
across each other, for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27346 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:41:14 +00:00
Chris Lattner
edab1b9133 Constant fold all of the vector binops. This allows us to compile this: 
"vector unsigned char mergeLowHigh = (vector unsigned char)
( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 );
vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));"

aka:

void %test2(<16 x sbyte>* %P) {
  store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P
  ret void
}

into this:

_test2:
        mfspr r2, 256
        oris r4, r2, 32768
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        lvx v0, r5, r4
        stvx v0, 0, r3
        mtspr 256, r2
        blr

instead of this:

_test2:
        mfspr r2, 256
        oris r4, r2, 49152
        mtspr 256, r4
        li r4, lo16(LCPI2_0)
        lis r5, ha16(LCPI2_0)
        vspltisb v0, 8
        lvx v1, r5, r4
        vxor v0, v1, v0
        stvx v0, 0, r3
        mtspr 256, r2
        blr

... which occurs here:
http://developer.apple.com/hardware/ve/calcspeed.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27343 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:25:57 +00:00
Chris Lattner
5e46a19ec8 Add a new -view-legalize-dags command line option 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27342 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 03:07:27 +00:00
Chris Lattner
6258fb2592 Implement constant folding of bit_convert of arbitrary constant vbuild_vector nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27341 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:53:43 +00:00
Chris Lattner
5e08a11039 These entries already exist 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27340 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:51:27 +00:00
Chris Lattner
97d23335ad Add some missing node names 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27339 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 02:41:18 +00:00
Chris Lattner
f8814cf8b8 Prefer larger register classes over smaller ones when a register occurs in 
multiple register classes.  This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27334 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-04-02 00:24:45 +00:00
Chris Lattner
f1d0c623c6 Delete identity shuffles, implementing CodeGen/Generic/vector-identity-shuffle.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27317 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 22:16:43 +00:00
Chris Lattner
c741ea424a Do not endian swap split vector loads. This fixes UnitTests/Vector/sumarray-dbl on PPC. 
Now all UnitTests/Vector/* tests pass on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27299 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:22:37 +00:00
Chris Lattner
d9731af75b Do not endian swap the operands to a store if the operands came from a vector. 
This fixes UnitTests/Vector/simple.c with altivec.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27298 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:20:46 +00:00
Chris Lattner
29cd7db310 Remove dead *extloads. This allows us to codegen vector.ll:test_extract_elt 
to:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 12, r32
        ;;
        ldfs f8 = [r8]
        mov ar.pfs = r3
        br.ret.sptk.many rp

instead of:

test_extract_elt:
        alloc r3 = ar.pfs,0,1,0,0
        adds r8 = 28, r32
        adds r9 = 24, r32
        adds r10 = 20, r32
        adds r11 = 16, r32
        ;;
        ldfs f6 = [r8]
        ;;
        ldfs f6 = [r9]
        adds r8 = 12, r32
        adds r9 = 8, r32
        adds r14 = 4, r32
        ;;
        ldfs f6 = [r10]
        ;;
        ldfs f6 = [r11]
        ldfs f8 = [r8]
        ;;
        ldfs f6 = [r9]
        ;;
        ldfs f6 = [r14]
        ;;
        ldfs f6 = [r32]
        mov ar.pfs = r3
        br.ret.sptk.many rp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27297 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:10:41 +00:00
Chris Lattner
e4b953939c Delete dead loads in the dag. This allows us to compile 
vector.ll:test_extract_elt2 into:

_test_extract_elt2:
        lfd f1, 32(r3)
        blr

instead of:

_test_extract_elt2:
        lfd f0, 56(r3)
        lfd f0, 48(r3)
        lfd f0, 40(r3)
        lfd f1, 32(r3)
        lfd f0, 24(r3)
        lfd f0, 16(r3)
        lfd f0, 8(r3)
        lfd f0, 0(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27296 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 18:06:18 +00:00
Chris Lattner
1597221eac Implement PromoteOp for VEXTRACT_VECTOR_ELT. Thsi fixes 
Generic/vector.ll:test_extract_elt on non-sse X86 systems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 17:55:51 +00:00
Chris Lattner
2ae2e98d4f Scalarized vector stores need not be legal, e.g. if the vector element type 
needs to be promoted or expanded.  Relegalize the scalar store once created.
This fixes CodeGen/Generic/vector.ll:test1 on non-SSE x86 targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27293 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 17:37:22 +00:00
Chris Lattner
7e02151ce2 Make sure to pass enough values to phi nodes when we are dealing with 
decimated vectors.  This fixes UnitTests/Vector/sumarray-dbl.c


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27280 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 02:12:18 +00:00
Chris Lattner
70c2a61e0a Significantly improve handling of vectors that are live across basic blocks, 
handling cases where the vector elements need promotion, expansion, and when
the vector type itself needs to be decimated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27278 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 02:06:56 +00:00
Chris Lattner
a6c9de4293 Was returning the wrong type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27277 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:50:09 +00:00
Evan Cheng
eb0b461cf4 Expand INSERT_VECTOR_ELT to store vec, sp; store elt, sp+k; vec = load sp; 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27274 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 01:27:51 +00:00
Chris Lattner
79227e2906 Modify the TargetLowering::getPackedTypeBreakdown method to also return the 
unpromoted element type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27273 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:46:36 +00:00
Chris Lattner
dc87929609 Implement TargetLowering::getPackedTypeBreakdown 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27270 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-31 00:28:56 +00:00
Chris Lattner
2bbd81064a Bug fixes: handle constantexpr insert/extract element operations 
Handle constantpacked vectors with constantexpr elements.

This fixes CodeGen/Generic/vector-constantexpr.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-29 00:11:43 +00:00
Chris Lattner
cef896e50c When building a VVECTOR_SHUFFLE node from extract_element operations, make 
sure to build it as SHUFFLE(X, undef, mask), not SHUFFLE(X, X, mask).

The later is not canonical form, and prevents the PPC splat pattern from
matching.  For a particular splat, we go from generating this:

	li r10, lo16(LCPI1_0)
	lis r11, ha16(LCPI1_0)
	lvx v3, r11, r10
	vperm v3, v2, v2, v3

to generating:

	vspltw v3, v2, 3


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27236 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 22:19:47 +00:00
Chris Lattner
66445d3e0a Canonicalize VECTOR_SHUFFLE(X, X, Y) -> VECTOR_SHUFFLE(X,undef,Y') 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27235 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 22:11:53 +00:00
Chris Lattner
d7648c8934 Turn a series of extract_element's feeding a build_vector into a 
vector_shuffle node.  For this:

void test(__m128 *res, __m128 *A, __m128 *B) {
  *res = _mm_unpacklo_ps(*A, *B);
}

we now produce this code:

_test:
        movl 8(%esp), %eax
        movaps (%eax), %xmm0
        movl 12(%esp), %eax
        unpcklps (%eax), %xmm0
        movl 4(%esp), %eax
        movaps %xmm0, (%eax)
        ret

instead of this:

_test:
        subl $76, %esp
        movl 88(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, (%esp)
        movaps %xmm0, 32(%esp)
        movss 4(%esp), %xmm0
        movss 32(%esp), %xmm1
        unpcklps %xmm0, %xmm1
        movl 84(%esp), %eax
        movaps (%eax), %xmm0
        movaps %xmm0, 16(%esp)
        movaps %xmm0, 48(%esp)
        movss 20(%esp), %xmm0
        movss 48(%esp), %xmm2
        unpcklps %xmm0, %xmm2
        unpcklps %xmm1, %xmm2
        movl 80(%esp), %eax
        movaps %xmm2, (%eax)
        addl $76, %esp
        ret

GCC produces this (with -fomit-frame-pointer):

_test:
        subl    $12, %esp
        movl    20(%esp), %eax
        movaps  (%eax), %xmm0
        movl    24(%esp), %eax
        unpcklps        (%eax), %xmm0
        movl    16(%esp), %eax
        movaps  %xmm0, (%eax)
        addl    $12, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27233 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 20:28:38 +00:00
Chris Lattner
5b2316e2b0 Teach Legalize how to pack VVECTOR_SHUFFLE nodes into VECTOR_SHUFFLE nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27232 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 20:24:43 +00:00
Chris Lattner
354cde9a7e new node 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27231 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 19:54:42 +00:00
Chris Lattner
4fbdd59f4f Don't crash on X^X if X is a vector. Instead, produce a vector of zeros. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27229 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 19:11:05 +00:00
Chris Lattner
f35b29765b Add an assertion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27228 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 19:04:49 +00:00
Jim Laskey
bf7637d590 More bulletproofing of llvm.dbg.declare. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27224 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 13:45:20 +00:00
Chris Lattner
48b61a729d Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27201 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-28 00:40:33 +00:00
Jim Laskey
8c39020359 Reactivate llvm.dbg.declare. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27192 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 23:31:10 +00:00
Chris Lattner
67995340fb Disable dbg_declare, it currently breaks the CFE build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27182 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 21:36:03 +00:00
Chris Lattner
13fc2f1d27 Fix legalization of intrinsics with chain and result values 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27181 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 20:28:29 +00:00
Chris Lattner
401ec7f6a9 Unbreak the build on non-apple compilers :-( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27173 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 16:10:59 +00:00
Evan Cheng
23cc8708c3 Try again 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27171 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 08:10:26 +00:00
Evan Cheng
f48b50a7ef Incorrect check for FP all one's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27169 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 07:26:17 +00:00
Evan Cheng
a8df166fbe Change isBuildVectorAllOnesInteger to isBuildVectorAllOnes. Also check for 
floating point cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27165 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 06:58:47 +00:00
Chris Lattner
70a248d284 Instead of printing "INTRINSIC" on intrinsic node, print the intrinsic name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27164 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 06:45:25 +00:00
Nate Begeman
f15485a8d0 SelectionDAGISel can now natively handle Switch instructions, in the same 
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-27 01:32:24 +00:00
Jim Laskey
fbcf23c3c1 Bullet proof against undefined args produced by upgrading ols-style debug info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27155 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 22:46:27 +00:00
Evan Cheng
4a147842eb Add ISD::isBuildVectorAllZeros predicate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27147 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 09:50:58 +00:00
Chris Lattner
10d7fa62ff Allow targets to custom lower their own intrinsics if desired. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27146 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-26 09:12:51 +00:00
Chris Lattner
452e8354d5 Fix a bug in ISD::isBuildVectorAllOnesInteger that caused it to always return 
false


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27131 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 22:59:28 +00:00
Chris Lattner
61d4399dfc Implement the ISD::isBuildVectorAllOnesInteger predicate 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27130 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 22:57:01 +00:00
Chris Lattner
6ea2dee6f6 Don't call SimplifyDemandedBits on vectors 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27128 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 22:19:00 +00:00
Chris Lattner
7255a54561 fix inverted conditional 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27089 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 22:49:42 +00:00
Evan Cheng
73d7b6029a Only to vector shuffle for {x,x,y,y} cases when SCALAR_TO_VECTOR is free. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27071 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:45:20 +00:00
Jim Laskey
0892cee81f Rename for truth in advertising. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27063 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 09:50:27 +00:00
Chris Lattner
2eb8653157 prefer to generate constant pool loads over splats. This prevents us from 
using a splat for {1.0,1.0,1.0,1.0}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27055 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 07:29:17 +00:00
Chris Lattner
45053fc7fc fix spello 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27053 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 07:15:07 +00:00
Chris Lattner
d1f04d40a0 legalize vbit_convert nodes whose result is a legal type. 
Legalize intrinsic nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27036 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 02:26:29 +00:00
Chris Lattner
0eade319cd Lower target intrinsics into an INTRINSIC node 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27035 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 02:22:33 +00:00
Chris Lattner
e8a30fdf51 fix some bogus assertions: noop bitconverts are legal 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27032 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 02:20:47 +00:00
Evan Cheng
033e681666 Lower BUILD_VECTOR to VECTOR_SHUFFLE if there are two distinct nodes (and if 
the target can handle it). Issue two SCALAR_TO_VECTOR ops followed by a
VECTOR_SHUFFLE to select from the two vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27023 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 01:17:21 +00:00
Chris Lattner
3e8f3ce8f6 Identify the INTRINSIC node 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27020 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 01:04:30 +00:00
Evan Cheng
677274b1cb Typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27008 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 23:24:51 +00:00
Chris Lattner
7692eb4201 add support for splitting casts. This implements 
CodeGen/Generic/vector.ll:test_cast_2.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26999 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 21:16:34 +00:00
Jim Laskey
43970fec32 Handle new forms of llvm.dbg intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26988 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 18:06:46 +00:00
Chris Lattner
408c428096 simplify some code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26972 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-23 05:29:04 +00:00
Chris Lattner
7e358908b8 Fix a typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26965 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 22:20:49 +00:00
Chris Lattner
e25ca692c0 Implement simple support for vector casting. This can currently only handle 
casts between legal vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26961 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 20:09:35 +00:00
Chris Lattner
841c882f5d Endianness does not affect the order of vector fields. This fixes 
SingleSource/UnitTests/Vector/build.c


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26936 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 01:46:54 +00:00
Chris Lattner
3b9fa89fca Enclose some variables in a scope to avoid error with some gcc versions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26934 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-22 00:12:37 +00:00
Chris Lattner
e35c218f3e add expand support for extractelement 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26931 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 21:02:03 +00:00
Chris Lattner
384504cea6 add some trivial support for extractelement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26928 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 20:44:12 +00:00
Chris Lattner
1c6191ffe7 Add a hacky workaround for crashes due to vectors live across blocks. 
Note that this code won't work for vectors that aren't legal on the
target.  Improvements coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26925 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-21 19:20:37 +00:00
Chris Lattner
87100e0b83 If a target supports splatting with SHUFFLE_VECTOR, lower to it from BUILD_VECTOR(x,x,x,x) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26885 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 01:52:29 +00:00
Chris Lattner
54a30b9639 TargetData doesn't know the alignment of vectors :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26884 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-20 01:51:46 +00:00
Chris Lattner
fb194b9e73 Add very basic support for VECTOR_SHUFFLE 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 23:56:04 +00:00
Chris Lattner
4d3abee618 Allow SCALAR_TO_VECTOR to be custom lowered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26867 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 06:47:21 +00:00
Chris Lattner
ce87215131 Add SCALAR_TO_VECTOR support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26866 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-19 06:31:19 +00:00