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Author SHA1 Message Date
Evan Cheng
538ccb0d99 Avoid uncessary array copying. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105955 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-14 20:18:40 +00:00
Chris Lattner
6b601536ff fix a nasty bug where we were not treating available_externally 
symbols as declarations in the X86 backend.  This would manifest
on darwin x86-32 as errors like this with -fvisibility=hidden:

symbol '__ZNSbIcED1Ev' can not be undefined in a subtraction expression

This fixes PR7353.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105954 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-14 20:11:56 +00:00
Chris Lattner
e58867e55e jump threading can't split a critical edge from an indirectbr. This 
fixes PR7356.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-14 19:45:43 +00:00
Chris Lattner
ef66df4da8 fix a -Wbool-conversions warning from clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105943 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-14 18:28:57 +00:00
Chris Lattner
98cdfc779d fix a -Wbool-conversions warning from clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105942 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-14 18:28:34 +00:00
Eli Friedman
e103194851 Add back some possible optimizations for va_arg, with wording that makes it 
more clear what exactly is missing.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105934 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-14 07:03:30 +00:00
Benjamin Kramer
c05cb8d561 SimplifyCFG: don't turn volatile stores to null/undef into unreachable. Fixes PR7369. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105914 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-13 14:35:54 +00:00
Rafael Espindola
21d238fdba Merge getStoreRegOpcode and getLoadRegOpcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105900 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 20:13:29 +00:00
Chris Lattner
2a9a8ae081 improve verifier error about unterminated block to include 
function name, patch by Yuri


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105887 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 15:50:24 +00:00
Eli Friedman
8c47d3b73f Add README entry; based on testcase from Bill Hart. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105878 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 05:54:27 +00:00
Bruno Cardoso Lopes
2dcf6d6019 make the avx intrinsics 3 address 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105876 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 03:12:14 +00:00
Bruno Cardoso Lopes
11ae95c175 Add some basic fp intrinsics for AVX 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105873 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 02:38:32 +00:00
Bill Wendling
94366111d3 When performing the Horrible Hack(tm-Duncan) on the EH code to convert a 
clean-up to a catch-all after inlining, take into account that there could be
filter IDs as well. The presence of filters don't mean that the selector catches
anything. It's just metadata information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105872 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 02:34:29 +00:00
Bruno Cardoso Lopes
cf125d02a0 More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rm 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105870 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 01:53:48 +00:00
Bruno Cardoso Lopes
7be0d2c8e9 More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr 
Handle OpSize TSFlag for AVX



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105869 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 01:23:26 +00:00
Evan Cheng
729aab3dd3 Allow target to provide its own hazard recognizer to post-ra scheduler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105862 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 00:12:18 +00:00
Evan Cheng
44acc24117 Code formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105861 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 00:11:53 +00:00
Bruno Cardoso Lopes
e4f6907a7a Add some comments about REX fields 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105860 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-12 00:03:52 +00:00
Bruno Cardoso Lopes
c902a59f4c More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm) 
Introduce the VEX_X field


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105859 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-11 23:50:47 +00:00
Bob Wilson
1114f568bc Add a missing bitcast. This code used to only handle conversions between 
i64 and f64 types, but now it also handle Neon vector types, so the f64 result
of VMOVDRR may need to be converted to a Neon type.  Radar 8084742.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105845 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-11 22:45:25 +00:00
Bob Wilson
1a913ed178 Add instruction encoding for the Neon VMOV immediate instruction. This changes 
the machine instruction representation of the immediate value to be encoded
into an integer with similar fields as the actual VMOV instruction.  This makes
things easier for the disassembler, since it can just stuff the bits into the
immediate operand, but harder for the asm printer since it has to decode the
value to be printed.  Testcase for the encoding will follow later when MC has
more support for ARM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105836 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-11 21:34:50 +00:00
Stuart Hastings
215aa15a0d Support for nested functions/classes in debug output. (Again.) Radar 7424645. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105828 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-11 20:08:44 +00:00
Stuart Hastings
3893ce1b1b Delete duplicate function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105827 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-11 20:05:01 +00:00
Duncan Sands
fc6afa92d6 Avoid "variable 'bits' set but not used [-Wunused-but-set-variable]" 
warnings with gcc-4.6, by not setting bits when the result is not
used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105790 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-10 16:23:15 +00:00
Evan Cheng
302ef834e0 Code refactoring, no functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105775 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-10 02:09:31 +00:00
Evan Cheng
aa4b5429ef Delete code that's not safe. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105774 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-10 02:08:20 +00:00
Jim Grosbach
db03adb346 be slightly more subtle about skipping dbg_value instructions; otherwise, if a 
dbg_value immediately follows a sequence of ldr/str instructions that should
be combined into an ldm/stm and is the last instruction in the block, then
combine may end up being skipped.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105758 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 22:21:24 +00:00
Jakob Stoklund Olesen
3013a20684 Mark physregs defined by inline asm as implicit. 
This is a bit of a hack to make inline asm look more like call instructions.
It would be better to produce correct dead flags during isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105749 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 20:05:00 +00:00
Evan Cheng
68fc2daf8f Allow target to place 2-address pass inserted copies in better spots. Thumb2 will use this to try to avoid breaking up IT blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105745 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 19:26:01 +00:00
Bill Wendling
d64ba3ee62 It's an error to translate this: 
%reg1025 = <sext> %reg1024
    ...
   %reg1026 = SUBREG_TO_REG 0, %reg1024, 4

into this:

   %reg1025 = <sext> %reg1024
    ...
   %reg1027 = EXTRACT_SUBREG %reg1025, 4
   %reg1026 = SUBREG_TO_REG 0, %reg1027, 4

The problem here is that SUBREG_TO_REG is there to assert that an implicit zext
occurs. It doesn't insert a zext instruction. If we allow the EXTRACT_SUBREG
here, it will give us the value after the <sext>, not the original value of
%reg1024 before <sext>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105741 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 19:00:55 +00:00
Evan Cheng
1d451dff63 Revert 105540, 105542, 105544, 105546, and 105548 to unbreak bootstrapping. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 18:59:43 +00:00
Kenneth Uildriks
42c7d23c6d Pulled CodeMetrics out of InlineCost.h and made it a bit more general, so it can be reused from PartialSpecializationCost 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105725 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 15:11:37 +00:00
Kalle Raiskila
43d225dc8b Fix SPU to cope with vector insertelement to an undef position. 
We default to inserting to lane 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105722 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 09:58:17 +00:00
Kalle Raiskila
c6166c6bca Handle loading from/storing to undef pointers on SPU by inserting a 
random load/store, rather than crashing llc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 08:29:41 +00:00
Evan Cheng
34aa423814 Typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105677 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 03:49:12 +00:00
Eli Friedman
092f9c116a A few new x86-64 specific README entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105674 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 02:43:17 +00:00
Evan Cheng
d847124211 Thumb2 IT blocks are fairly expensive. When there are multiple selects using 
the same condition, it's important to make sure they are scheduled together
to avoid forming multiple IT blocks. I'm adding a pre-regalloc pass that forms
IT blocks early (by re-scheduling instructions and split basic blocks) to
attempt to fix this. This is not turned on by default since I am not sure this
is the right fix.

Another issue is llvm selects are modeled as two-address conditional moves.
This can be very bad when the copies before the conditional moves are not
coalesced away. Teach IT formation pass to move the copies above the IT block
(when legal) to avoid breaking the IT block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 01:46:50 +00:00
Jakob Stoklund Olesen
c3c2517fed Add argument name comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105665 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-09 00:40:31 +00:00
Kevin Enderby
09712b57ce Incremental improvement to the handling of the x86 "Jump if rCX Zero" 
instruction.  Added the 64-bit version "jrcxz" so it is recognized and also
added the checks for incorrect uses of "jcxz" in 64-bit mode and "jrcxz" in
32-bit mode.  Still to do is to correctly handle the encoding of the
instruction adding the Address-size override prefix byte, 0x67, when the width
of the count register is not the same as the mode the machine is running in.
Which for example means the encoding of "jecxz" depends if you are assembling
as a 32-bit target or a 64-bit target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105661 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 23:48:44 +00:00
Eric Christopher
497f1eb2b8 Split out these asserts so it's more apparent why we're not assembling 
that rip-relative address when executing in 32-bit mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105656 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 22:57:33 +00:00
Jim Grosbach
6335ac67b6 fix copy/paste/modify think-o 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 22:53:32 +00:00
Bruno Cardoso Lopes
99405df044 Reapply r105521, this time appending "LLU" to 64 bit 
immediates to avoid breaking the build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 22:51:23 +00:00
Eric Christopher
544153653b Ensure that mov and not lea are used to stick the address into 
the register.  While we're at it, make sure it's in the right one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105645 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 22:04:25 +00:00
Jim Grosbach
b84adb3b80 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105634 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 20:06:55 +00:00
Daniel Dunbar
ef45832d7c Use const_iterator where appropriate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105620 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 17:21:57 +00:00
Daniel Dunbar
18ed7b27eb DeltaAlgorithm: Tweak split to split by first/second half instead of even/odd, since adjacent changes are more likely to be related. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105613 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 16:21:26 +00:00
Daniel Dunbar
73c6031a25 ADT: Add DAGDeltaAlgorithm, which is a DAG minimization algorithm built on top of the standard 'delta debugging' algorithm. 
- This can give substantial speedups in the delta process for inputs we can construct dependency information for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105612 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 16:21:22 +00:00
Benjamin Kramer
d164d3d9e7 Use realloc instead of malloc+memcpy when growing a POD SmallVector. A smart 
realloc implementation can try to expand the allocated memory block in-place,
avoiding the copy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105605 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 11:44:30 +00:00
Kalle Raiskila
e77ff11a34 Flag SPU's function call sequence together. 
Discussed here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2010-June/032107.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 07:55:16 +00:00
Bob Wilson
dd726e5bce Fix up a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105591 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-08 00:42:08 +00:00
Bob Wilson
53dd2454d5 Further changes for Neon vector shuffles: 
- change isShuffleMaskLegal to show that all shuffles with 32-bit and 64-bit
  elements are legal
- the Neon shuffle instructions do not support 64-bit elements, but we were
  not checking for that before lowering shuffles to use them
- remove some 64-bit element vduplane patterns that are no longer needed


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105586 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 23:53:38 +00:00
Bob Wilson
66dc4e2acd Fix a mistake in my previous change r105437: don't access operand 2 and assume 
that it is an immediate before checking that the instruction is an
EXTRACT_SUBREG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105585 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 23:48:46 +00:00
Dan Gohman
ba1fe14245 Add some basic debug output. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105561 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 22:32:10 +00:00
Jim Grosbach
8077e76f93 Handle dbg_value instructions (i.e., skip them) when generating IT blocks. 
rdar://7797940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105557 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 21:48:47 +00:00
Jim Grosbach
66f360e990 Cleanup. Process the dbg_values separately 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105554 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 21:28:55 +00:00
Dan Gohman
b9539745c5 Make bugpoint dead-argument-hacking actually work, and actually test it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105551 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 20:20:33 +00:00
Dan Gohman
fd447eff22 The FoldingSet hash data includes pointer values, so it isn't 
determinstic. Instead, give SCEV objects an arbitrary sequence
number.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105548 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 19:36:14 +00:00
Dan Gohman
5e5dd68c7f Optimize this code somewhat by taking advantage of the fact 
that the operands are sorted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105546 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 19:20:57 +00:00
Bill Wendling
d942df2f9e Another place where the code wanted to access the argument list and not all of 
the operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105545 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 19:18:58 +00:00
Dan Gohman
1f23d63ddf Micro-optimize this, to speed up this hotspot in debug builds a little. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105544 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 19:16:37 +00:00
Dan Gohman
ef07158c11 Micro-optimize this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105542 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 19:12:54 +00:00
Jim Grosbach
41a628237c Move exit check where it really belongs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105541 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 19:12:21 +00:00
Dan Gohman
4d52c6d622 Optimize ScalarEvolution's SCEVComplexityCompare predicate: don't go 
scrounging through SCEVUnknown contents and SCEVNAryExpr operands;
instead just do a simple deterministic comparison of the precomputed
hash data.

Also, since this is more precise, it eliminates the need for the slow
N^2 duplicate detection code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105540 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 19:06:13 +00:00
Bill Wendling
22a5b29820 Create new accessors to get arguments for call/invoke instructions. It breaks 
encapsulation to force the users of these classes to know about the internal
data structure of the Operands structure. It also can lead to errors, like in
the MSIL writer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105539 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-07 19:05:06 +00:00
Kenneth Uildriks
3a4340d4cb Partial specialization was not checking the callsite to make sure it was using the same constants as the specialization, leading to calls to the wrong specialization. Patch by Takumi Nakamura\! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105528 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 14:50:21 +00:00
Duncan Sands
431c3e7404 This bug is also present in MSVC10. Requested by Elrood on IRC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105527 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 12:40:43 +00:00
Chris Lattner
1087f54ddb revert r105521, which is breaking the buildbots with stuff like this: 
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105524 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
3eca98bb3a Initial AVX support for some instructions. No patterns matched 
yet, only assembly encoding support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105521 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 03:53:24 +00:00
Dale Johannesen
cf296fa162 Improvements to tail call code. No functional effect 
unless using -arm-tail-calls.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105515 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 00:51:39 +00:00
Dan Gohman
fdbef823ad getFoldedOffsetOf no longer does anything special with vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105514 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 00:47:34 +00:00
Stuart Hastings
6d56b9fabc Revert 105492 & 105493 due to a testcase regression. Radar 7424645. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105511 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 00:39:29 +00:00
Dan Gohman
25fcaff409 LSR needs to remember inserted instructions even in postinc mode, because 
there could be multiple subexpressions within a single expansion which
require insert point adjustment. This fixes PR7306.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105510 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 00:33:07 +00:00
Dale Johannesen
88004c25c7 Fix some liveout handling related to tail calls, see comments. 
I don't think this ever resulted in problems on x86, but it
would on ARM.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105509 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-05 00:30:45 +00:00
Evan Cheng
2b4e727c6f Re-apply 105308 with fix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105502 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 23:28:13 +00:00
Dan Gohman
a15ec5dfcc Don't track users of undef values; they aren't interesting for 
register pressure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105501 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 23:16:05 +00:00
Jim Grosbach
870c80540d Make if-conversion ignore dbg_value instructions in its analysis. rdar://7797940 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105498 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 23:01:26 +00:00
Stuart Hastings
0f1b813567 Support for nested functions/classes in debug output. Radar 7424645. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105492 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 22:36:03 +00:00
Devang Patel
93031ac032 Copy location info for current function argument from dbg.declare if respective store instruction does not have any location info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105490 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 22:27:30 +00:00
Jim Grosbach
1c8ab781d5 Skip dbg_value instructions when scanning instructions in register scavenging. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105481 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 20:18:30 +00:00
Dan Gohman
c87b40b1cd Fix normalization and de-normalization of non-affine SCEVs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105480 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 19:16:34 +00:00
Jakob Stoklund Olesen
6de07178e1 Keep track of the call instructions whose clobber lists were skipped during fast 
register allocation.

Process all of the clobber lists at the end of the function, marking the
registers as used in MachineRegisterInfo.

This is necessary in case the calls clobber callee-saved registers (sic).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105473 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 18:08:29 +00:00
Dale Johannesen
8fa8e7fe95 More thoroughly disable tails calls by default. 
8060143, although this doesn't fix the real problem with tail call.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 18:04:24 +00:00
Jim Grosbach
8af44b687b Another fix to prevent debug info from affecting codegen. rdar://7797940 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105470 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 17:57:34 +00:00
Jim Grosbach
958e4e1967 more dbg_value adjustments so debug info doesn't affect codegen 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 01:23:30 +00:00
Mon P Wang
f62546ab04 Fixed a bug during widening where we would avoid legalizing a node. When we 
replace an OpA with a widened OpB, it is possible to get new uses of OpA due to CSE
when recursively updating nodes.  Since OpA has been processed, the new uses are
not examined again.  The patch checks if this occurred and it it did, updates the
new uses of OpA to use OpB.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 01:20:10 +00:00
Jim Grosbach
d089a7ac70 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105441 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 00:15:00 +00:00
Bob Wilson
40cbe7d5d4 For NEON vectors with 32- or 64-bit elements, select BUILD_VECTORs and 
VECTOR_SHUFFLEs to REG_SEQUENCE instructions.  The standard ISD::BUILD_VECTOR
node corresponds closely to REG_SEQUENCE but I couldn't use it here because
its operands do not get legalized.  That is pretty awful, but I guess it
makes sense for other targets.  Instead, I have added an ARM-specific version
of BUILD_VECTOR that will have its operands properly legalized.
This fixes the rest of Radar 7872877.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105439 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-04 00:04:02 +00:00
Bob Wilson
26bf8f9a1b Add some missing checks in TwoAddressInstructionPass::CoalesceExtSubRegs. 
Check that all the instructions are in the same basic block, that the
EXTRACT_SUBREGs write to the same subregs that are being extracted, and that
the source and destination registers are in the same regclass.  Some of
these constraints can be relaxed with a bit more work.  Jakob suggested
that the loop that checks for subregs when NewSubIdx != 0 should use the
"nodbg" iterator, so I made that change here, too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105437 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 23:53:58 +00:00
Jim Grosbach
6ee358b4eb Cleanup 80-column and trim trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105435 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 23:49:57 +00:00
Jim Grosbach
3de755bb40 Teach the ARM load-store optimizer to deal with dbg_value instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105427 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 22:41:15 +00:00
Dale Johannesen
51e28e6348 Early implementation of tail call for ARM. 
A temporary flag -arm-tail-calls defaults to off,
so there is no functional change by default.
Intrepid users may try this; simple cases work
but there are bugs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105413 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 21:09:53 +00:00
Dan Gohman
400f75cb5e Fix SimplifyDemandedBits' AssertZext logic to demand all the bits. It 
needs to demand the high bits because it's asserting that they're zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105406 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 20:21:33 +00:00
Bob Wilson
3844173f6e Revert 105308. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105399 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 18:28:31 +00:00
Bill Wendling
869d60d39d Machine sink could potentially sink instructions into a block where the physical 
registers it defines then interfere with an existing preg live range.

For instance, if we had something like these machine instructions:

BB#0
  ... = imul ... EFLAGS<imp-def,dead>
  test ..., EFLAGS<imp-def>
  jcc BB#2 EFLAGS<imp-use>

BB#1
  ... ; fallthrough to BB#2

BB#2
  ... ; No code that defines EFLAGS
  jcc ... EFLAGS<imp-use>

Machine sink will come along, see that imul implicitly defines EFLAGS, but
because it's "dead", it assumes that it can move imul into BB#2. But when it
does, imul's "dead" imp-def of EFLAGS is raised from the dead (a zombie) and
messes up the condition code for the jump (and pretty much anything else which
relies upon it being correct).

The solution is to know which pregs are live going into a basic block. However,
that information isn't calculated at this point. Nor does the LiveVariables pass
take into account non-allocatable physical registers. In lieu of this, we do a
*very* conservative pass through the basic block to determine if a preg is live
coming out of it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105387 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 07:54:20 +00:00
Eric Christopher
30ef0e5658 Add first pass at darwin tls compiler support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105381 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 04:07:48 +00:00
Eric Christopher
7310064f4d One underscore, not two. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105379 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 04:02:59 +00:00
Eli Friedman
268637ed0f Implement expansion in type legalization for add/sub with overflow. The 
expansion is the same as that used by LegalizeDAG.

The resulting code sucks in terms of performance/codesize on x86-32 for a
64-bit operation; I haven't looked into whether different expansions might be
better in general.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105378 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 03:49:50 +00:00
Eli Friedman
db1bf34178 Remove some already-fixed README entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105377 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 01:47:31 +00:00
Eli Friedman
a04a2c0a50 Remove README entry which no longer compiles to something sane. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105376 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 01:16:51 +00:00
Eli Friedman
2ad7e433c9 Remove a fixed item, update a couple partially-fixed items. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105375 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 01:01:48 +00:00
Jakob Stoklund Olesen
8b89c64b5c Use the fast register allocator by default for -O0 builds. 
This affects both llvm-gcc and clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105372 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 00:39:06 +00:00
Jakob Stoklund Olesen
ead06be02f Use readsWritesVirtualRegister instead of counting uses and defs when inserting 
spills and reloads.

This means that a partial define of a register causes a reload so the other
parts of the register are preserved.

The reload can be prevented by adding an <imp-def> operand for the full
register. This is already done by the coalescer and live interval analysis where
relevant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105369 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 00:07:47 +00:00
Jakob Stoklund Olesen
02571a3a1f Add full register <imp-def> operands when the coalescer is creating partial 
register updates.

These operands tell the spiller that the other parts of the partially defined
register are don't-care, and a reload is not necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105361 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 23:22:11 +00:00
Devang Patel
6209869f83 Speedup bitcode writer. Do not walk all values for all functions to emit function local metadata. In one testcase, probably worst case scenario, the 70x speed up is seen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105360 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 23:05:04 +00:00
Bill Wendling
05c68374c1 Compulsive reformating. No functionalitical changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105359 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 23:04:26 +00:00
Jakob Stoklund Olesen
9edf7deb37 Slightly change the meaning of the reMaterialize target hook when the original 
instruction defines subregisters.

Any existing subreg indices on the original instruction are preserved or
composed with the new subreg index.

Also substitute multiple operands mentioning the original register by using the
new MachineInstr::substituteRegister() function. This is necessary because there
will soon be <imp-def> operands added to non read-modify-write partial
definitions. This instruction:

  %reg1234:foo = FLAP %reg1234<imp-def>

will reMaterialize(%reg3333, bar) like this:

  %reg3333:bar-foo = FLAP %reg333:bar<imp-def>

Finally, replace the TargetRegisterInfo pointer argument with a reference to
indicate that it cannot be NULL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105358 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 22:47:25 +00:00
Jim Grosbach
18f30e6f5e Clean up 80 column violations. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105350 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 21:53:11 +00:00
Rafael Espindola
42d075c4fb Remove the TargetRegisterClass member from CalleeSavedInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105344 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 20:02:30 +00:00
Eli Friedman
962f549d20 Fix comment so it doesn't include comments which are irrelevant to the x86 
backend.  Add a FIXME noting what can be fixed here.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105342 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 19:35:46 +00:00
Dan Gohman
71c62a2977 Use comments to document non-obvious code rather than 
mailing list archives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105341 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 19:13:40 +00:00
Devang Patel
354eb7ea96 Skip identical instruction while calculating DBG_VALUE range. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105340 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 19:05:13 +00:00
Bob Wilson
91a74da036 Rename canCombinedSubRegIndex method to something more grammatically correct 
and tidy up the comment describing it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105339 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 18:54:47 +00:00
Rafael Espindola
20fae65181 Replace ARM's getCalleeSavedRegClasses with a simpler solution 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105335 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 17:54:50 +00:00
Devang Patel
b9abe9f2ad Use local small vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105332 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 16:42:51 +00:00
Rafael Espindola
691820a1a0 Remove unused function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105325 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 15:44:20 +00:00
Jim Grosbach
086723d244 Not all entries in the range will have an SUnit. Check for that when looking 
for debug information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105324 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 15:29:36 +00:00
Rafael Espindola
6f07bd6ae8 cleanup 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105322 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 13:53:17 +00:00
Rafael Espindola
ce48c1de82 Remove uses of getCalleeSavedRegClasses from outside the 
backends and removes the virtual declaration. With that out of the way
I should be able to cleanup one backend at a time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105321 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 12:39:06 +00:00
Evan Cheng
9d709a8edb Enable machine cse of instructions which define physical registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105308 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 01:08:27 +00:00
Eli Friedman
a993f0a45f Don't try to custom-lower 64-bit add-with-overflow and friends on x86-32; the 
x86 backend currently doesn't know how to handle them.

This doesn't really fix anything because LegalizeTypes doesn't know how to
handle them either.  We do get a better error message, though.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105305 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 00:27:18 +00:00
Bob Wilson
b2c2a972b0 Fix an obvious mistake: don't change the operands until all of them have been 
checked and it is safe to proceed with the changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105304 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 00:16:08 +00:00
Eli Friedman
b242563741 Remove outdated README entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105303 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 00:10:36 +00:00
Jim Grosbach
533934e06e Update debug information when breaking anti-dependencies. rdar://7759363 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105300 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 23:48:44 +00:00
Jakob Stoklund Olesen
a5135f60dd Properly compose subregister indices when coalescing. 
The comment about ordering of subreg indices is no longer true.
This exposed a bug in the new substVirtReg method that is also fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105294 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 22:39:25 +00:00
Jim Grosbach
23d3d4595c Remove unused code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105293 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 21:56:30 +00:00
Devang Patel
f2e7767624 Ignore line number of debug value in undefined register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105292 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 21:43:09 +00:00
Jim Grosbach
69081e9291 fix think-o 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105291 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 21:35:50 +00:00
Dan Gohman
d8acddda58 Fix the allocation of shadow space for the Win64 calling convention 
in X86FastISel. Patch by Jan Sjodin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105290 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 21:09:47 +00:00
Jim Grosbach
aeafb374e2 Simplify things a bit more. Fix prototype to use SmallVectorImpl and 
change a few SmallVectors to vanilla C arrays.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105289 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 21:06:46 +00:00
Dan Gohman
10e7726e6c Fix the noalias checking so that it doesn't worry about 
an argument aliasing itself. Thanks Duncan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105288 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 20:51:40 +00:00
Devang Patel
9126c0d42a Keep track of incoming debug value of unused argument. 
Radar 7927666.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105285 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 19:59:01 +00:00
Dan Gohman
956b349034 Fill in missing support for ISD::FEXP, ISD::FPOWI, and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105283 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 18:35:14 +00:00
Jim Grosbach
2f3257ef04 Add a FIXME 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105282 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 18:06:35 +00:00
Jim Grosbach
0fd8b6283f mirror of r105280 changes for LowerInvoke, which uses the same basic logic here 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105281 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 18:04:56 +00:00
Jim Grosbach
dc58b25ebc When processing function arguments when splitting live ranges across invokes, 
handle structs passed by value via an extract/insert pair, as a bitcast
won't work on a struct. rdar://7742824

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105280 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 18:04:09 +00:00
Jim Grosbach
601f9d6c03 Use SmallVector instead of std::vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105279 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 17:56:41 +00:00
Bruno Cardoso Lopes
7f5b0d8099 Refactor some SSE 2 unpack instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105276 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 17:02:50 +00:00
Dan Gohman
4b1000d117 Don't call flush() at a library level which isn't checking for errors 
and doesn't know where the output is going.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105274 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 16:31:34 +00:00
Kalle Raiskila
11fe24624a Fix handling of 'load' nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105269 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 13:34:47 +00:00
Duncan Sands
2914ba6ec7 Fix PR7272: when inlining through a callsite with byval arguments, 
the newly created allocas may be used by inlined calls, so these
need to have their tail call flags cleared.  Fixes PR7272.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105255 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 21:00:26 +00:00
Chris Lattner
6c41ad8c9a fix PR6623: when optimizing for size, don't inline memcpy/memsets 
that are too large.  This causes the freebsd bootloader to be too
large apparently.

It's unclear if this should be an -Os or -Oz thing.  Thoughts welcome.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105228 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 17:30:14 +00:00
Chris Lattner
6b37861827 the 'limit' argument to FindOptimalMemOpLowering is unsigned, not uint64_t. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105226 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 17:12:23 +00:00
Benjamin Kramer
c29df3cac7 Avoid swap when a copy suffices. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105220 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 12:50:41 +00:00
Nick Lewycky
a9d6680cb1 The memcpy intrinsic only takes i8* for %src and %dst, so cast them to that 
first. Fixes PR7265.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105206 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 06:16:35 +00:00
Oscar Fuentes
10e02a017a Use llvm::next' instead of next' to make VC++ 2010 happy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105168 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-30 13:14:21 +00:00
Anton Korobeynikov
4ed81ecbcd Some A9 load/store cleanups 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105109 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 19:25:39 +00:00
Anton Korobeynikov
8207fce96f Some rough approximations for load/stores on A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105108 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 19:25:34 +00:00
Anton Korobeynikov
1098ef5fa4 NEON/VFP stuff can be issued only via Pipe1 on A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105107 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 19:25:29 +00:00
Anton Korobeynikov
1845a387e1 Add some integer instruction itineraries for A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105106 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 19:25:17 +00:00
Dan Gohman
462f6b57b6 Reorder some code in SelectionDAGBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105105 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 17:53:24 +00:00
Dan Gohman
7451d3e09d SelectionDAG shouldn't have a FunctionLoweringInfo member. RegsForValue 
shouldn't have a TargetLoweringInfo member. And FunctionLoweringInfo::set
doesn't needs its EnableFastISel argument.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105101 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 17:03:36 +00:00
Benjamin Kramer
0f9c658558 Remove unused function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105100 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 14:03:51 +00:00
Evan Cheng
701d4d309f Remove schedule-livein-copies. It's not being used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105095 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 02:23:39 +00:00
Evan Cheng
9c044674e6 Fix PR7193: if sibling call address can take a register, make sure there are enough registers available by counting inreg arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105092 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 01:35:22 +00:00
Jakob Stoklund Olesen
5a0d4fcb8d Handle composed subreg indices when processing REQ_SEQUENCE instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 00:14:14 +00:00
Evan Cheng
82e0a1a1a8 Doh. Machine LICM is re-initializing the CSE map over and over. Patch by Anna Zaks. rdar://8037934. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105065 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-29 00:06:36 +00:00
Jakob Stoklund Olesen
05ce489871 Merge the SystemZ subreg_even32 SubRegIndex into subreg_32bit. The SubRegIndices 
were overspecified when inheriting sub-subregisters, for instance:

R0Q:subreg_even32 = R0Q:subreg_32bit = R0Q:subreg_even:subreg_32bit.

This meant that composeSubRegIndices(subreg_even, subreg_32bit) was ambiguous.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105063 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 23:48:29 +00:00
Evan Cheng
046fa3f90a Fix some latency computation bugs: if the use is not a machine opcode do not just return zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105061 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 23:26:21 +00:00
Evan Cheng
c10f5434b4 Schedule high latency instructions for latency reduction even if they are not vfp / NEON instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105060 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 23:25:23 +00:00
Dale Johannesen
2f05cc06a2 Fix comment typos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105059 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 23:24:28 +00:00
Bruno Cardoso Lopes
f39e0ce4ec More SSE 1 & 2 merge, this time with logical instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105014 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 22:47:03 +00:00
Dan Gohman
dd05466ef4 Fix AliasDebugger to be aware of operand values too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105012 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 22:31:51 +00:00
Dan Gohman
aec2a0dbce Add lint checks for function attributes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105009 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 21:43:57 +00:00
Dan Gohman
2c048ea538 Split the logic behind CastInst::isNoopCast into a separate static function, 
as is done with most other cast opcode predicates.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105008 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 21:41:37 +00:00
Kevin Enderby
31cc9655b6 MC/X86: Add alias for movzx. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105005 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 21:20:21 +00:00
Kevin Enderby
5e394429ab MC/X86: Add alias for fwait. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105001 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 20:59:10 +00:00
Kevin Enderby
31b6c5b2f3 Fix the use of x86 control and debug registers so that the assertion failure in 
getX86RegNum() does not happen.  Patch by Shantonu Sen!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104994 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 19:01:27 +00:00
Jakob Stoklund Olesen
2da5337024 Add a TargetRegisterInfo::composeSubRegIndices hook with a default 
implementation that is correct for most targets. Tablegen will override where
needed.

Add MachineOperand::subst{Virt,Phys}Reg methods that correctly handle existing
subreg indices when sustituting registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104985 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 18:18:53 +00:00
Jim Grosbach
bc213209bf correct retattr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104980 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 18:03:48 +00:00
Jim Grosbach
c9792a3c1f Cosmetic cleanup. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104974 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 17:51:20 +00:00
Dan Gohman
13ec30b6a1 Fix lint's memcpy and memmove checks, and its basic block traversal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104970 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 17:44:00 +00:00
Jim Grosbach
5caeff5c01 make sure accesses to set up the jmpbuf don't get moved after it by the scheduler. Add a missing \n. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104967 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 17:37:40 +00:00
Dan Gohman
52c239566e Minor code simplification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104959 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:50:23 +00:00
Dan Gohman
9ba7f65743 Fix a redundant-return warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104958 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:50:01 +00:00
Dan Gohman
17d95965cb Detect self-referential values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104957 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:45:33 +00:00
Stuart Hastings
8ffc42f8ea Revert 104841, 104842, 104876 due to buildbot failures. Radar 7424645. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104953 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:41:07 +00:00
Dan Gohman
078f8595b5 Eli pointed out that va_arg instruction result values don't 
reference the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104951 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:34:49 +00:00
Dan Gohman
ff26d4e9ce Teach lint how to look through simple store+load pairs and other 
effective no-op constructs, to make it more effective on
unoptimized IR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:21:24 +00:00
Dan Gohman
dd9344f3fa Move FindAvailableLoadedValue isSafeToLoadUnconditionally out of 
lib/Transforms/Utils and into lib/Analysis so that Analysis passes
can use them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:19:17 +00:00
Dan Gohman
700012231d ConstantFoldConstantExpression can theoretically return null. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104948 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 16:12:08 +00:00
Dan Gohman
05d6253727 Teach instcombine to promote alloca array sizes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 15:09:00 +00:00
Dan Gohman
292fc87fe2 Add a lint check for returning the address of stack memory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104936 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 04:33:42 +00:00
Dan Gohman
28d2e0a39f Fix instcombine's handling of alloca to accept non-i32 types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104935 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 04:33:04 +00:00
Dan Gohman
a37dd3e6a5 Bitcode support for allocas with arbitrary array size types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104915 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 01:38:28 +00:00
Devang Patel
4251d85ae7 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104914 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 01:29:50 +00:00
Devang Patel
f7a3051471 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104913 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 01:17:51 +00:00
Dan Gohman
f75a7d3fbf Eliminate the restriction that the array size in an alloca must be i32. 
This will help reduce the amount of casting required on 64-bit targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104911 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 01:14:11 +00:00
Bob Wilson
13ef840807 Add the cc_out operand for t2RSBrs instructions. I missed this when I changed 
the instruction class for t2RSB to add that operand in svn r104582.
Radar 8033757.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104907 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 00:27:15 +00:00
Jakob Stoklund Olesen
700bfada63 Add a -regalloc=default option that chooses a register allocator based on the -O 
optimization level.

This only really affects llc for now because both the llvm-gcc and clang front
ends override the default register allocator. I intend to remove that code later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104904 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 23:57:25 +00:00
Jim Grosbach
0798eddd07 Update the saved stack pointer in the sjlj function context following either 
an alloca() or an llvm.stackrestore(). rdar://8031573



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104900 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 23:49:24 +00:00
Evan Cheng
12616727c7 Use report_fatal_error, not llvm_unreachable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104899 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 23:45:31 +00:00
Jim Grosbach
a65850230a back out 104862/104869. Can reuse stacksave after all. Very cool. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104897 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 23:11:57 +00:00
Dan Gohman
39f76bb6c8 Factor out the handler work from SignalHandler into a helper function, 
and change llvm::sys::RunInterruptHandlers to call that function directly
instead of calling SignalHandler, because the rest of SignalHandler
invokes side effects which aren't appropriate, including raising the
signal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104896 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 23:11:55 +00:00
Evan Cheng
84f60b7359 llvm can't correctly support 'H', 'Q' and 'R' modifiers. Just mark it an error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104891 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 22:08:38 +00:00
Kevin Enderby
bd658918df MC/X86: Add aliases for Jcc variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104890 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 21:33:19 +00:00
Dan Gohman
d27047f87d Eliminate some unnessary Path::exists() calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104888 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 20:51:54 +00:00
Dan Gohman
c2f500aaed Don't flush the raw_ostream in llvm::WriteBitcodeToFile; it's at 
the wrong level. Clients which need to leave the stream open but
which still require the bitcode bits to be on disk should call
flush themselves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104885 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 20:26:51 +00:00
Devang Patel
d8720f4ba3 Do not drop location info for inlined function args. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104884 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 20:25:04 +00:00
Bob Wilson
d984eb6073 Fix some bad fall-throughs in a switch statement. Both the 'Q' and 'R' cases 
should fall through to the 'H' case, but instead 'Q' was falling through to 'R'
so that it would do the wrong thing for a big-endian ARM target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104883 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 20:23:42 +00:00
Dale Johannesen
54feef2950 Mark some math lib intrinsic nodes Legal on SSE4.1. 
No functional effect as these nodes are not generated yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104879 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 20:12:41 +00:00
Dan Gohman
d928fb670f Don't special-case stdout in llvm::WriteBitcodeToFile; just consider 
it to be the caller's responsibility to provide a stream in binary
mode. This fixes a layering violation and avoids an outs() call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104878 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 20:06:51 +00:00
Duncan Sands
1d9b973fd7 Teach instCombine to remove malloc+free if malloc's only uses are comparisons 
to null.  Patch by Matti Niemenmaa.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104871 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 19:09:06 +00:00
Jim Grosbach
084fb0ea32 hook ISD::STACKADDR to an intrinsic 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104869 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 18:52:11 +00:00
Dan Gohman
4d3d6e1a0c FastISel doesn't yet handle callee-pop functions. 
To support this, move IsCalleePop from X86ISelLowering to X86Subtarget.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104866 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 18:43:40 +00:00
Jim Grosbach
ad9aaf038e add ISD::STACKADDR to get the current stack pointer. Will be used by sjlj EH 
to update the jmpbuf in the presence of VLAs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104862 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 18:23:48 +00:00
Bruno Cardoso Lopes
aa02ff1a2b Merge basic binops SSE 1 & 2 instruction classes. This is a step towards refactoring 
common code between SSE versions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104860 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 18:17:40 +00:00
Dan Gohman
30377e7809 Add basic error checking to MemoryBuffer::getSTDIN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104855 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 17:31:51 +00:00
Dan Gohman
95131fcb67 Use the return value of getMagicNumber instead of using a 
separate canRead() call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104853 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 17:18:38 +00:00
Dan Gohman
02d5824266 Don't bother clearing the Magic string when the magic number 
can't be read, since it isn't cleared on other error paths.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104852 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 17:14:10 +00:00
Dan Gohman
130de9c0b4 Don't bother checking canRead() before calling getMagicNumber(); 
getMagicNumber() does its own error checking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104851 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 17:12:23 +00:00
Devang Patel
55e9717e59 inlined function's arguments need a label to mark the start point because they are not directly attached to current function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104848 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 16:47:30 +00:00
Stuart Hastings
aa66d2f48a Support for nested functions/classes in debug output. Radar 7424645. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104841 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 16:16:54 +00:00
Eric Christopher
aeed4d81a8 Rearrange conditionals so we don't get caught with the correct type as wrong. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104793 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 00:52:31 +00:00
Devang Patel
80250686d5 Simplify. Eliminate unneeded debug_loc entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104785 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 23:55:23 +00:00
Jakob Stoklund Olesen
8b3ca84a8d Avoid counting InlineAsm as a call - it prevents loop unrolling. 
PR7026
Patch by Pekka Jääskeläinen!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104780 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 22:40:28 +00:00
Dan Gohman
a0f7ff334f Fix Lint printing warnings multiple times. Remove the ErrorStr 
option from lintModule, which was an artifact from being
based on Verifier code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104765 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 22:28:53 +00:00
Daniel Dunbar
dcbab9cf5a AsmMatcher/X86: Mark _REV instructions as "code gen only", they aren't expected 
to be matched.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104757 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 22:21:28 +00:00
Dan Gohman
882ddb492d Reinstate checking of stackrestore, with checking for both Read 
and Write, and add a comment explaining this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104756 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 22:21:25 +00:00
Jakob Stoklund Olesen
c8b9f6ce23 Give SubRegIndex names to all ARM subregisters. This will be required by 
TableGen shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104754 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 22:15:03 +00:00
Dan Gohman
749be11f4d Stackrestore is not a load. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104752 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 22:00:10 +00:00
Bill Wendling
804a231dd5 Add FIXME comment to remove this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104749 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 21:53:50 +00:00
Dan Gohman
df9c8bc569 Remove a TODO which isn't practical. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104748 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 21:50:41 +00:00
Daniel Dunbar
cb8326dc09 MC: Add TargetMachine support for setting the value of MCRelaxAll with 
-filetype=obj.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104747 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 21:48:55 +00:00
Jakob Stoklund Olesen
160a3bf74d Add StringRef::compare_numeric and use it to sort TableGen register records. 
This means that our Registers are now ordered R7, R8, R9, R10, R12, ...
Not R1, R10, R11, R12, R2, R3, ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104745 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 21:47:28 +00:00
Dan Gohman
113b3e2c6e Implement checking of the tail keyword. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104744 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 21:46:36 +00:00
Devang Patel
77051f58e9 There is no need to force an line number entry (using previous location) for a temp label at unknown location. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 21:23:46 +00:00
Bill Wendling
8d717c7d99 Add "setjmp_syscall", "savectx", "qsetjmp", "vfork", "getcontext" to the list of 
usual suspects that could "return twice".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104737 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 20:39:00 +00:00
Daniel Dunbar
83194de76a MC: When running with -mc-relax-all, we can eagerly relax instructions and avoid creating unnecessary MCInstFragments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104736 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 20:37:03 +00:00
Daniel Dunbar
2ac0c453b2 MC/Mach-O: Factor out EmitInstTo{Fragment,Data} for emitting MCInst's as MCInstFragments or appending onto an MCDataFragment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104735 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 20:37:00 +00:00
Jim Grosbach
23ff7cff52 Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry in 
ISD::. No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104734 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 20:22:18 +00:00
Devang Patel
394427b014 Update debug info when live-in reg is copied into a vreg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104732 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 20:18:50 +00:00
Kevin Enderby
b106543592 Fix the x86 move to/from segment register instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104731 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 20:10:45 +00:00
Bill Wendling
9af7e9a1b5 Move the check for "calls setjmp" to SelectionDAGISel so that it can be used by 
more than just the stack slot coloring algorithm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104722 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 19:46:12 +00:00
Devang Patel
b2b31a6f93 Identify instructions, that needs a label to mark debug info entity, in advance. This simplifies beginScope(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104720 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 19:37:24 +00:00
Dan Gohman
93d3433579 Eliminate the use of PriorityQueue and just use a std::vector, 
implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104718 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 18:52:00 +00:00
Dan Gohman
d89c258051 Delete an unused function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104716 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 18:34:12 +00:00
Daniel Dunbar
95506d40c5 MC: Change RelaxInstruction to only take the input and output instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104713 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 18:15:06 +00:00
Dan Gohman
d9c2af5409 Fix a typo in a comment that Gabor noticed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104711 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 18:03:53 +00:00
Daniel Dunbar
dae5b9f804 MC: Eliminate an unnecessary copy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 17:50:16 +00:00
Daniel Dunbar
8488252855 MC: Simplify MayNeedRelaxation to not provide the fixups, so we can query it 
before encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104707 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 17:45:29 +00:00
Devang Patel
b21a758bc2 Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104706 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 17:42:50 +00:00
Devang Patel
e2df84254d Do not construct location list backword! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104705 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 17:29:32 +00:00
Jakob Stoklund Olesen
ca561ffcf3 Replace the SubRegSet tablegen class with a less error-prone mechanism. 
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104704 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 17:27:12 +00:00
Daniel Dunbar
c90e30aa6f MC: Eliminate MCAsmFixup, replace with MCFixup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104699 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 15:18:56 +00:00
Daniel Dunbar
482ad802f1 MC: Use accessors for access to MCAsmFixup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104697 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 15:18:31 +00:00
Daniel Dunbar
c9adb8c61e MC: Change MCInst::dump_pretty to not include a trailing newline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104696 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 15:18:13 +00:00
Benjamin Kramer
1464c1d60a Kill unneeded SExt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104692 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 09:45:04 +00:00
Zhongxing Xu
c2798a18a7 SRetReturnReg was set in LowerFormalArguments(). So only assert it here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104691 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 08:10:02 +00:00
Daniel Dunbar
e614e393c7 MC: Eliminate MCFragment vtable, which was unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104689 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 06:50:57 +00:00
Shih-wei Liao
9f3b6a381a Coding style change (Adding 1 missing space.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 04:46:50 +00:00
Shih-wei Liao
45469f38b6 Adding the missing implementation for ARM::SBFX and ARM::UBFX. 
Fixing http://llvm.org/bugs/show_bug.cgi?id=7225.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 03:21:39 +00:00
Eric Christopher
174e597d46 Temporarily revert r104655 as it's breaking the bots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104664 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 01:59:55 +00:00
Jim Grosbach
54e13eceff fix off by 1 (insn) error in eh.sjlj.setjmp thumb code sequence. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104661 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 01:22:21 +00:00
Jakob Stoklund Olesen
b555609e73 Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism." 
This reverts commit 104654.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104660 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 01:21:14 +00:00
Dan Gohman
a4e4ffd389 Change push_all to a non-virtual function and implement it in the 
base class, since all the implementations are the same.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104659 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 01:10:55 +00:00
Dan Gohman
5eabaa2d7c Trim #include. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104657 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 00:55:59 +00:00
Bill Wendling
be22683202 Dale and Evan suggested putting the "check for setjmp" much earlier in the 
machine code generation. That's a good idea, so I made it so.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104655 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 00:32:40 +00:00
Jakob Stoklund Olesen
6a45d681e5 Replace the SubRegSet tablegen class with a less error-prone mechanism. 
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104654 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 00:28:19 +00:00
Shih-wei Liao
6d37a29588 Adding the missing implementation of Bitfield's "clear" and "insert". 
Fixing http://llvm.org/bugs/show_bug.cgi?id=7222.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 00:25:05 +00:00
Shih-wei Liao
5170b71143 To handle s* registers in emitVFPLoadStoreMultipleInstruction(). 
Fixing http://llvm.org/bugs/show_bug.cgi?id=7221.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 00:02:28 +00:00
Eric Christopher
96ac5156ca Start adding mach-o tls reloc support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104651 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 00:02:12 +00:00
Jakob Stoklund Olesen
76f0ad7bf5 Drop the SuperregHashTable. It is essentially the same as SubregHashTable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104650 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 23:43:18 +00:00
Devang Patel
c3f5f783a2 First cut at supporting .debug_loc section. 
This is used to track variable information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104649 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 23:40:22 +00:00
Benjamin Kramer
48aefe15d0 Properly promote operands when optimizing a single-character memcmp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 22:53:43 +00:00
Bill Wendling
f10bc81b4e Constify function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104646 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 22:02:22 +00:00
Dan Gohman
eddc114a66 Do one map lookup instead of two. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104645 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 21:59:42 +00:00
Dan Gohman
5b71dcedf0 Fix a missing newline in debug output. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104644 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 21:50:35 +00:00
Eric Christopher
04386ca726 Move the verbose asm output up a bit so it can be used in the special cases 
as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104642 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 21:49:43 +00:00
Bill Wendling
5edfbdc963 Okay, bear with me here... 
If you have a setjmp/longjmp situation, it's possible for stack slot coloring to
reuse a stack slot before it's really dead. For instance, if we have something
like this:

1:  y = g;
    x = sigsetjmp(env, 0);
    switch (x) {
    case 1:
      /* ... */
      goto run;  
    case 0:
  run:
      do_run(); /* marked as "no return" */
      break;
    case 3:
      if (...) {
        /* ... */
        goto run;
      }
      /* ... */
      break;
    }

2:  g = y;

"y" may be put onto the stack, so the expression "g = y" is relying upon the
fact that the stack slot containing "y" isn't modified between (1) and (2). But
it can be, because of the "no return" calls in there. A longjmp might come back
with 3, modify the stack slot, and then go to case 0. And it's perfectly
acceptable to reuse the stack slot there because there's no CFG flow from case 3
to (2).

The fix is to disable certain optimizations in these situations. Ideally, we'd
disable them for all "returns twice" functions. But we don't support that
attribute. Check for "setjmp" and "sigsetjmp" instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104640 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 21:44:26 +00:00
Eric Christopher
02b46bc942 Add support for initialized global data for darwin tls. Update comments 
and testcases accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104635 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 21:28:50 +00:00
Kevin Enderby
cf50a5390c Changed the encoding of X86 floating point stack operations where both operands 
are st(0).  These can be encoded using an opcode for storing in st(0) or using
an opcode for storing in st(i), where i can also be 0.  To allow testing with
the darwin assembler and get a matching binary the opcode for storing in st(0)
is now used.  To do this the same logical trick is use from the darwin assembler
in converting things like this:

fmul %st(0), %st

into this:

fmul %st(0)

by looking for the second operand being X86::ST0 for specific floating point
mnemonics then removing the second X86::ST0 operand.  This also has the add
benefit to allow things like:

fmul %st(1), %st

that llvm-mc did not assemble.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104634 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 20:52:34 +00:00
Jakob Stoklund Olesen
b53985239c Separate unrelated cases that once shared a numeric value 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104629 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 19:49:40 +00:00
Jakob Stoklund Olesen
1fc8e759a7 Print symbolic SubRegIndex names on machine operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104628 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 19:49:38 +00:00
Jakob Stoklund Olesen
4fda9670f0 Remove NumberHack entirely. 
SubRegIndex instances are now numbered uniquely the same way Register instances
are - in lexicographical order by name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104627 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 19:49:33 +00:00
Daniel Dunbar
39e2dd7bab MC/X86: Add a hack to allow recognizing 'cmpltps' and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104626 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 19:49:32 +00:00
Dale Johannesen
86234c30a7 Fix another variant of PR 7191. Also add a testcase 
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite.  8023512.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104624 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 18:47:23 +00:00
Daniel Dunbar
79373680ed MC/X86: Define explicit immediate forms of cmp{ss,sd,ps,pd}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104622 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 18:40:53 +00:00
Kevin Enderby
04ac770be9 The BT64ri8 record in X86Instr64bit.td was missing a REX_W which is required 
for the 64-bit version of the Bit Test instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104621 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 18:16:58 +00:00
Dale Johannesen
61734eb117 Fix PR 7191. I have been unable to create a .ll file that fails, sorry. 
(oye, a word which should be better known to people writing tree
traversals, means grandchild.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104619 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 17:50:03 +00:00
Eric Christopher
7e2f5aaa67 Make sure aeskeygenassist uses an unsigned immediate field. 
Fixes rdar://8017638


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104617 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 17:33:22 +00:00
Jakob Stoklund Olesen
48d0c163fb Ignore NumberHack and give each SubRegIndex instance a unique enum value instead. 
This passes lit tests, but I'll give it a go through the buildbots to smoke out
any remaining places that depend on the old SubRegIndex numbering.

Then I'll remove NumberHack entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104615 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 17:21:04 +00:00
Jakob Stoklund Olesen
c159fba712 Use enums instead of literals for SystemZ subregisters 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104612 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 17:04:18 +00:00
Jakob Stoklund Olesen
22c0e97c56 Use enums instead of literals for X86 subregisters. 
The cases in getMatchingSuperRegClass cannot be broken up until the enums have
unique values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104611 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 17:04:16 +00:00
Zonr Chang
f3c770a2cb Add missing implementation to the materialization of VFP misc. instructions (vmrs, vmsr and vmov (immediate)) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 10:23:52 +00:00
Zonr Chang
f86399be0c Add support to MOVimm32 using movt/movw for ARM JIT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104587 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 08:42:45 +00:00
Bob Wilson
a85df80ed7 Allow t2MOVsrl_flag and t2MOVsra_flag instructions to be predicated. 
I don't know of any particular reason why that would be important, but
neither can I see any reason to disallow it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104583 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 04:51:47 +00:00
Bob Wilson
4876bdb69e Fix up instruction classes for Thumb2 RSB instructions to be consistent with 
Thumb2 ADD and SUB instructions: allow RSB instructions be changed to set the
condition codes, and allow RSBS instructions to be predicated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104582 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 04:43:08 +00:00
Bob Wilson
ab3912e3ce Clean up indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104580 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 03:36:52 +00:00
Jakob Stoklund Olesen
b7a3170917 Disable invalid coalescer assertion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104574 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 00:15:18 +00:00
Jakob Stoklund Olesen
e00fa64c16 Use enums instead of literals in the ARM backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104573 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 00:15:15 +00:00
Bill Wendling
ef473bfc44 Print out the name of the function during SSC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104572 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 23:16:04 +00:00
Jakob Stoklund Olesen
33276d95ef Switch SubRegSet to using symbolic SubRegIndices 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104571 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 23:03:18 +00:00
Bob Wilson
c21763fd99 Allow Thumb2 MVN instructions to set condition codes. The immediate operand 
version of t2MVN already allowed that, but not the register versions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104570 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 22:41:19 +00:00
Jakob Stoklund Olesen
f27462eb29 Lose the dummies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104564 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 21:47:01 +00:00
Jakob Stoklund Olesen
09bc029865 Replace the tablegen RegisterClass field SubRegClassList with an alist-like data 
structure that represents a mapping without any dependencies on SubRegIndex
numbering.

This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104563 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 21:46:58 +00:00
Evan Cheng
3946043a80 Avoid adding duplicate function live-in's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104560 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 21:33:37 +00:00
Dan Gohman
e350690e3b Fix an mmx movd encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104552 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 20:51:08 +00:00
Kevin Enderby
ca956dc0f6 MC/X86: Add aliases for CMOVcc variants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104549 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 20:32:23 +00:00
Bob Wilson
d303846e16 Clean up some extra whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104544 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 20:08:34 +00:00
Bob Wilson
bb7ecb2bf5 Thumb2 RSBS instructions were being printed without the 'S' suffix. 
Fix it by changing the T2I_rbin_s_is multiclass to handle the CPSR
output and 'S' suffix in the same way as T2I_bin_s_irs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104531 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 18:44:06 +00:00