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14221 Commits

Author SHA1 Message Date
Andrew Trick
0005cc7a0a Excluding ARM JIT tests until someone can fix this compilation path. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138676 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 23:39:30 +00:00
Owen Anderson
f1eab597b2 Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138675 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 23:32:08 +00:00
Owen Anderson
d7568e1c35 Correct encoding of BL with immediate offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138673 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 22:54:51 +00:00
Eli Friedman
43f51aeca8 Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 21:21:21 +00:00
Bill Wendling
1f4a32f5ac Revert r138606 until LowerInvoke has been converted to the new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138656 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 21:11:23 +00:00
Owen Anderson
9ab0f25fc1 invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138653 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 20:43:14 +00:00
Andrew Trick
ae5ea6cab0 valgrind: Always suppress tblgen leaks. 
I'll clean up the rest of the XFAIL: vg_leak lines if this works.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138652 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 20:41:20 +00:00
Bill Wendling
2b18881185 Don't sink landingpad instructions during ind-var simplification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138651 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 20:40:15 +00:00
Andrew Trick
6ca06cd8a8 Use %% for literals in RUN lines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138647 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 20:09:48 +00:00
Owen Anderson
96425c8464 Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 18:09:22 +00:00
Benjamin Kramer
06a531ff63 We don't care if TableGen leaks memory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138634 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 17:00:30 +00:00
Owen Anderson
5a18f20dab Add a testcase for r138625. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138626 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 06:45:08 +00:00
Craig Topper
8fd13b6de5 Fix disassembling of VCVTSD2SI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138623 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 04:49:29 +00:00
Eli Friedman
069e2ed794 Atomic load/store on ARM/Thumb. 
I don't really like the patterns, but I'm having trouble coming up with a
better way to handle them.

I plan on making other targets use the same legalization
ARM-without-memory-barriers is using... it's not especially efficient, but
if anyone cares, it's not that hard to fix for a given target if there's
some better lowering.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138621 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 02:59:24 +00:00
Benjamin Kramer
98d6d2372f SimplifyCFG: If we have a PHI node that can evaluate to NULL and do a load or store to the address returned by the PHI node then we can consider this incoming value as dead and remove the edge pointing there, unless there are instructions that can affect control flow executed in between. 
In theory this could be extended to other instructions, eg. division by zero, but it's likely that it will "miscompile" some code because people depend on div by zero not trapping. NULL pointer dereference usually leads to a crash so we should be on the safe side.

This shrinks the size of a Release clang by 16k on x86_64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138618 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-26 01:22:29 +00:00
Bill Wendling
1a9a2d0d6b Update to the new EH scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 23:48:37 +00:00
Bruno Cardoso Lopes
6292eceea0 Add support for AVX 256-bit version of MOVDDUP! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138588 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 21:40:37 +00:00
Owen Anderson
99906830e8 Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138575 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 18:30:18 +00:00
Andrew Trick
b9ca5124f8 ARM fix for missing implicit operands on ldmia_ret. 
rdar://10005094: miscompile of 176.gcc


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138568 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 17:50:53 +00:00
Craig Topper
113061d39b Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138552 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 07:42:00 +00:00
Craig Topper
ea03659d23 Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138551 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 06:57:46 +00:00
Bill Wendling
8b6af8a2a9 LSR wants to split the landing pad's critical edge. Let it do it, but use the 
proper function to do it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138550 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 05:55:40 +00:00
Bruno Cardoso Lopes
07b7f672a0 Add support for 256-bit versions of VSHUFPD and VSHUFPS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138546 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 02:58:26 +00:00
Bill Wendling
76cf779bb8 Update tests to the newest EH syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138541 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 01:30:18 +00:00
Bill Wendling
c5fb9d86b0 Add feature test for the new exception handling stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138539 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-25 01:19:13 +00:00
Eli Friedman
f8f90f0174 Hook up 64-bit atomic load/store on x86-32. I plan to write more efficient implementations eventually. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138505 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 22:33:28 +00:00
Evan Cheng
5fbe5e783e Some autoconf tests use module level inline asm to test compiler's handling of 
.cfi_startproc. e.g. libffi:

 $ cat confopt.c 
asm (".cfi_startproc\n\t.cfi_endproc");

int main () { return 0; }

Teach MC / dwarf emission to handle these cfi directives which essentially
create an empty frame.

rdar://10017184


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138504 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 22:31:37 +00:00
Jim Grosbach
070260cb29 Update tests for 138501. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138502 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 22:30:18 +00:00
Jim Grosbach
f69c804036 Thumb parsing and encoding for SUB (SP minu immediate). 
Fix FiXME in test file. Remove FIXME for SUB (SP minus register) since that
form is Thumb2 only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138494 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 21:42:27 +00:00
Jim Grosbach
72f39f8436 Thumb parsing and encoding support for ADD SP instructions. 
Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138488 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 21:22:15 +00:00
Eli Friedman
bbc87a3a9a Basic tests for atomic load and store on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138486 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 21:16:59 +00:00
Nadav Rotem
4c7c0f2353 Implement Constant::isAllOnesValue(). Fix ConstantFolding to use the new api. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138469 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 20:18:38 +00:00
Owen Anderson
ddaa513fce Port over more encoding tests to decoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138441 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 17:08:34 +00:00
Richard Osborne
8f9c5cca4f Add Uses=[SP] to call instructions. This fixes a miscompilation with a 
variable sized alloca.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138433 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 13:32:43 +00:00
Craig Topper
13894fa135 Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138427 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-24 06:14:18 +00:00
Bruno Cardoso Lopes
d8b7dd5252 Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit 
permutations. Also tidy up some patterns and make them close to their
instruction definition!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138392 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 22:06:37 +00:00
Eric Christopher
acc8f2d938 Revert "Address Duncan's CR request:" 
This reverts commit 20a05be15e. (svn rev 138340)

Conflicts:

	test/Transforms/InstCombine/bitcast.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138366 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 20:11:10 +00:00
Jim Grosbach
99e84e07ff Thumb parsing and encoding for WFE, WFI and YIELD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138364 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 20:02:30 +00:00
Jim Grosbach
3284db5bfb Thumb parsing and encoding for UXTB and UXTH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138363 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 19:59:32 +00:00
Jim Grosbach
010bebc696 Thumb parsing and encoding for TST. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138362 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 19:53:17 +00:00
Jim Grosbach
4b6658dd0a Thumb parsing and encoding for SXTB and SXTH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138361 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 19:51:42 +00:00
Jim Grosbach
ec8b866434 Thumb parsing and encoding for SVC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138360 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 19:49:10 +00:00
Jim Grosbach
414b02357a Thumb parsing and encoding for SUB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138359 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 19:45:45 +00:00
Nick Lewycky
726ebd6ff3 PerformSubCombine to work on integers larger than i128. Fixes a crasher. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138354 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 19:01:24 +00:00
Jim Grosbach
743c0fa779 Thumb parsing and encoding for STRH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138352 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 18:56:20 +00:00
Jim Grosbach
aec3a61c8b Thumb parsing and encoding for STRB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138349 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 18:43:06 +00:00
Jim Grosbach
803b1aa8ef Thumb parsing and encoding for tSTRspi. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138348 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 18:39:41 +00:00
Jim Grosbach
4c821d800a Thumb parsing and encoding for STR. 
Not including tSTRspi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138347 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 18:33:38 +00:00
Jim Grosbach
1e84f19337 Thumb parsing and encoding for STM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138345 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 18:15:37 +00:00
Nadav Rotem
46634f5f92 Fix a typo in the test from the previous commit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138342 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 17:56:54 +00:00
Owen Anderson
82265a2c72 Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138341 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 17:51:38 +00:00
Nadav Rotem
20a05be15e Address Duncan's CR request: 
1. Cleanup the tests in ConstantFolding.cpp
2. Implement isAllOnes for Constant, ConstantFP, ConstantVector





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138340 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 17:48:43 +00:00
Owen Anderson
e732cb0043 Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138337 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 17:37:32 +00:00
Owen Anderson
b4ff9698bd Port more assemble tests over to disassembly tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138336 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 17:26:35 +00:00
Craig Topper
a534780da0 Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138321 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 04:36:33 +00:00
Bruno Cardoso Lopes
3bde6fe0df Introduce a pass to insert vzeroupper instructions to avoid AVX to 
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138317 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-23 01:14:17 +00:00
Jim Grosbach
7e99b5c8a3 Thumb parsing and encoding for SETEND. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138312 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:58:02 +00:00
Jim Grosbach
04d55f1905 Thumb parsing and encoding for SBC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138311 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:55:58 +00:00
Jim Grosbach
934755ac04 Thumb parsing and encoding for RSB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138308 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:47:13 +00:00
Jim Grosbach
3f57a9a2cf Thumb parsing and encoding for ROR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138304 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:40:51 +00:00
Jim Grosbach
ab585e6146 Thumb parsing and encoding for REV/REV16/REVSH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138303 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:39:25 +00:00
Owen Anderson
c6788c83b4 t2SMLAD is a four-register instruction, not a three-register one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138301 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:31:45 +00:00
Owen Anderson
22d35086fe Correct operand naming of t2USAT16 to allow proper decoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138300 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:27:47 +00:00
Owen Anderson
2379fc235f Match operand naming to allow correct decoding of t2LDRSH_POST. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138298 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:22:05 +00:00
Jim Grosbach
6dcafc0d0b Improve error checking for tPUSH and tPOP register lists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138295 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:17:34 +00:00
Jim Grosbach
762f70bc49 Tidy up. Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138293 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:13:54 +00:00
Owen Anderson
2c9f83533b Provide a correct decoder hook for Thumb2 shifted registers. Found by randomized testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138292 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:10:16 +00:00
Jim Grosbach
0c2165bbd0 Thumb parsing and encoding for PUSH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138290 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:05:11 +00:00
Jim Grosbach
10fd9ad8f3 Fix think-o. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138288 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:04:26 +00:00
Jim Grosbach
7260c6a4ea Thumb assemmbly parsing diagnostic improvements for LDM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138287 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:01:07 +00:00
Jim Grosbach
d937d95125 Thumb assembly parsing and encoding for POP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138286 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 23:00:19 +00:00
Owen Anderson
838130e3b9 Provide operand encoding information for half-precision VCVT instructions. Found by randomized testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138273 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 21:34:00 +00:00
Bruno Cardoso Lopes
2ac8111159 Add support for breaking 256-bit int VETCC into two 128-bit ones, 
avoding scalarization of the compare. Reduces code from 59 to 6
instructions. Fix PR10712.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138271 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 20:31:04 +00:00
Owen Anderson
357ec6850b Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming majority of decoder crashes detected by randomized testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138269 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 20:27:12 +00:00
Owen Anderson
2cbf210450 Fix another batch of VLD/VST decoding crashes discovered by randomized testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138255 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 18:42:13 +00:00
Owen Anderson
f1c8e3e70e Correct writeback handling of duplicating VLD instructions. Discovered by randomized testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138251 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 18:22:06 +00:00
Owen Anderson
88b7ccc7f0 Port another swathe of Thumb1 encoding tests over to decoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138250 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 18:05:49 +00:00
Owen Anderson
b113ec55e8 Fix an incorrect shift when decoding SP-relative stores in Thumb1-mode. Add more tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138246 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 17:56:58 +00:00
Jim Grosbach
011af5ca80 Thumb assembly parsing and encoding for ORR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138245 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 17:41:44 +00:00
Dan Gohman
1b31ea8f93 Constant pointers to objects don't need reference counting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138242 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 17:29:11 +00:00
Dan Gohman
986b865c03 Make a few tests slightly more strict. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138241 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 17:27:02 +00:00
Duncan Sands
3c0e5dc40f Testcase for PR10663. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138231 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-22 10:32:09 +00:00
Jim Grosbach
fbe1681490 Fix AsmParser binary precedence for shift operators. 
rdar://9976729



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138208 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 16:24:13 +00:00
Jim Grosbach
2f4bdc5db9 Tidy up. Whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138207 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 16:10:09 +00:00
Nadav Rotem
1c9fe0361b Add constant folding support for bitcasts of splat vectors to integers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138206 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 14:02:29 +00:00
Eric Christopher
512e0fd8f3 Remove remainder of migrated or obsolete tests from FrontendC and remove 
the empty directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138181 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 01:04:56 +00:00
Eric Christopher
cbb9905d96 Remove migrated or obsolete tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138176 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 00:49:30 +00:00
Eric Christopher
f909c6692a Remove obsolete or migrated tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138173 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 00:38:20 +00:00
Chad Rosier
89a67a4d5e With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack loads." 
-verify-machineinstrs can be enabled for this test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138171 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 00:34:45 +00:00
Eric Christopher
a9fff89e56 Remove obsoleted test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138170 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 00:26:30 +00:00
Eric Christopher
3b763bd3ed Remove tests that were either migrated to clang or are obsolete. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138168 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 00:25:42 +00:00
Eric Christopher
ca020c124e Remove the rest of the files in FrontendC++ and the directory itself. 
All tests have been updated and migrated into clang or were obsolete.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138165 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 00:17:58 +00:00
Chad Rosier
e5038e191d VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg. 
Therefore, rather then generate a pseudo instruction, which is later expanded,
generate the necessary instructions in place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138163 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 00:17:25 +00:00
Eric Christopher
4cc2328e4e Remove migrated or obsolete tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138156 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-20 00:08:36 +00:00
Eric Christopher
483699c296 Remove migrated or obsolete tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138149 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 23:41:50 +00:00
Devang Patel
93d39be530 Do not use named md nodes to track variables that are completely optimized. This does not scale while doing LTO with debug info. New approach is to include list of variables in the subprogram info directly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138145 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 23:28:12 +00:00
Jim Grosbach
0780b6303b Thumb parsing and encoding support for NOP. 
The irony is not lost that this is not a completely trivial patchset.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138143 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 23:24:36 +00:00
Eric Christopher
cc29861901 Remove obsolete test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138141 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 23:18:12 +00:00
Eric Christopher
5c7ee3f5b2 Remove migrated test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138140 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 23:18:10 +00:00
Jim Grosbach
a17f669ef5 Use regex to remove false dependencies on register allocation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138137 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 23:10:31 +00:00
Eric Christopher
0e71288943 Remove obsolete or migrated tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138135 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 23:08:41 +00:00
Jim Grosbach
2c3f70e5d4 Thumb assembly parsing and encoding for NEG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138131 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:51:03 +00:00
Jim Grosbach
7a01069420 Be more lenient on tied operand matching for MUL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138124 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:30:46 +00:00
Bruno Cardoso Lopes
0c9acfcb50 Re-write part of VEX encoding logic, to be more easy to read! Also fix 
a bug and add a testcase!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138123 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:27:29 +00:00
Eric Christopher
87fdee6488 Remove tests migrated to clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138121 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:26:09 +00:00
Eric Christopher
1e057bee96 Remove previously migrated test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138120 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:26:06 +00:00
Jim Grosbach
7a32fa1c78 Update tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138116 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:19:48 +00:00
Eric Christopher
c0f3a1d860 Remove tests migrated to clang or are unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138115 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:17:09 +00:00
Jim Grosbach
c4762a9c91 Thumb assembly parsing and encoding for MVN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138109 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:09:23 +00:00
Jim Grosbach
88ae2bc6d5 Thumb assembly parsing and encoding for MUL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138108 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 22:07:46 +00:00
Eric Christopher
d1e36dedb5 Remove this test. The feature and test have already been migrated to clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138101 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 21:51:41 +00:00
Eric Christopher
bd11cae6fa Remove tests migrated to clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138100 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 21:51:39 +00:00
Eric Christopher
1679882794 Remove 2009-09-04-modify-crash.cpp as clang doesn't support 32-bit kext. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138087 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 21:21:28 +00:00
Eric Christopher
ea93661f91 Remove migrated tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138086 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 21:21:26 +00:00
Eric Christopher
cf15aa0a58 Remove migrated test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138085 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 21:21:24 +00:00
Eric Christopher
cccb1836a0 Remove this test. There are other, duplicates, in the clang test suite. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138084 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 21:21:21 +00:00
Eric Christopher
a510a1c931 Add file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138083 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 21:21:20 +00:00
Eric Christopher
ed4b3905dc Move 2010-03-22-empty-baseclass.cpp from a frontend+opt test to just 
an opt test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138082 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 21:21:14 +00:00
Jim Grosbach
584fb0e663 Add FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138077 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 20:48:54 +00:00
Jim Grosbach
4ec6e888ec Thumb assembly parsing and encoding for MOV. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138076 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 20:46:54 +00:00
Jim Grosbach
c7ebca335d Thumb assembly parsing and encoding for LSR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138065 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 19:34:22 +00:00
Jim Grosbach
560ef9f2fe Thumb assembly parsing and encoding for LSL(register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138064 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 19:30:58 +00:00
Jim Grosbach
1b7b68f087 Thumb assembly parsing and encoding for LSL(immediate). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138063 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 19:29:25 +00:00
Jim Grosbach
05b0156734 Thumb assembly parsing and encoding for LDRSB and LDRSH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138061 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 19:17:58 +00:00
Jim Grosbach
38466309d5 Thumb assembly parsing and encoding for LDRH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138060 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 18:55:51 +00:00
Jim Grosbach
48ff5ffe9e Thumb assembly parsing and encoding for LDRB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138059 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 18:49:59 +00:00
Jim Grosbach
09f6e0dfda Thumb assembly parsing and encoding for LDR(register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138056 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 18:35:06 +00:00
Jim Grosbach
67b95f902a Thumb assembly parsing and encoding for LDR(literal). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138052 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 18:20:48 +00:00
Jim Grosbach
ecd8589683 Thumb assembly parsing and encoding for LDR(immediate) form T2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138050 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 18:13:48 +00:00
Jim Grosbach
60f91a3d95 Thumb assembly parsing and encoding for LDR(immediate) form T1. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 17:55:24 +00:00
Craig Topper
e004d941ec Add TB encoding to VEX versions of SSE fp logical operations to fix disassembler 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138034 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 05:28:50 +00:00
Jakob Stoklund Olesen
7c6da77810 Add test case for r138018. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138033 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 04:30:24 +00:00
Bruno Cardoso Lopes
863e0f25b7 Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the 
implementation!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138029 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 02:23:56 +00:00
Dan Gohman
e6d5e88c12 Track a retain+release nesting level independently of the 
known-incremented level, because the two concepts can be used
to prove the saftey of a retain+release removal in different
ways.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138016 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-19 00:26:36 +00:00
Akira Hatanaka
5ac8547a41 Use subword loads instead of a 4-byte load when the size of a structure (or a 
piece of it) that is being passed by value is smaller than a word.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138007 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 23:39:37 +00:00
Owen Anderson
78affc9ea1 STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate. 
Found by randomized testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138003 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 22:47:44 +00:00
Owen Anderson
846dd95f87 Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs have it unset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138000 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 22:31:17 +00:00
Owen Anderson
14090bf263 Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions. 
Fixes a large class of disassembler crashes found by randomized testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137995 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 22:11:02 +00:00
Ivan Krasin
74af88a666 FastISel: avoid function calls between the materialization of the constant and its use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137993 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 22:06:10 +00:00
Jim Grosbach
93b3eff623 Thumb assembly parsing and encoding for LDM instruction. 
Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137986 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 21:50:53 +00:00
Owen Anderson
847a7ad800 More Thumb1 decoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137974 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 20:05:06 +00:00
Devang Patel
727df2ca81 Add another test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137969 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 18:50:25 +00:00
Devang Patel
3f52c51e00 Add test to check type uniquing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137968 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 18:40:49 +00:00
Jim Grosbach
1eba8a66b6 Thumb assembly parsing and encoding for EOR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137964 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 18:10:38 +00:00
Jim Grosbach
0d1511c022 Thumb assembly parsing and encoding for CMP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137963 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 18:08:29 +00:00
James Molloy
dbe46744c5 Test commit; adding test for invalid LDRD which was part of the patch for r137647 but seemingly didn't get svn add'ed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137960 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 18:03:02 +00:00
Jim Grosbach
7750b8df6a Thumb assembly parsing and encoding test for CMN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137957 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 17:55:03 +00:00
Owen Anderson
7cf6d7a083 Port over BL/BLX to disassembly tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137954 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 17:43:52 +00:00
Jim Grosbach
6ea80e964b ARM assembly parsing and encoding test for BX/BLX (register). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137949 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 17:02:28 +00:00
Jim Grosbach
ded439886a ARM assembly parsing and encoding test for BL/BLX (immediate). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137948 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 17:00:09 +00:00
Richard Osborne
c4dcf323cc Add intrinsics for SETEV, GETED, GETET. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137938 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 13:00:48 +00:00
Bruno Cardoso Lopes
24b90e2287 Cleanup vector logical ops in AVX and add use int versions for simple 
v2i64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137919 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-18 02:11:34 +00:00
Owen Anderson
3230e9537d Port new Thumb1 encoding tests over to decoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137902 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 23:37:33 +00:00
Jim Grosbach
37f88c7812 ARM assembly parsing and encoding test for BKPT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137898 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 23:11:13 +00:00
Jim Grosbach
5b657de62b ARM assembly parsing and encoding test for BIC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 23:00:53 +00:00
Jim Grosbach
395b453bed Thumb assembly parsing and encoding for B. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137891 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:57:40 +00:00
Jim Grosbach
00f5d98205 Thumb assembly parsing and encoding for ASR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137889 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:49:09 +00:00
Eli Friedman
56efe24431 Atomic load/store handling for the passes using memdep (GVN, DSE, memcpyopt). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137888 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:22:24 +00:00
Bruno Cardoso Lopes
0dd80b0d69 Fix PR10688. Add support for spliting 256-bit vector shifts when the 
shift amount is variable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137885 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 22:12:20 +00:00
Jim Grosbach
5a1cd045cd Thumb assembly parsing and encoding for ADR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137864 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 20:37:40 +00:00
Jim Grosbach
53727fc659 Add a couple of FIXMEs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137861 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 20:35:57 +00:00
Devang Patel
cbfadfc4b3 Fix test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137847 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 18:48:28 +00:00
Devang Patel
4be7fb0742 Remove superficial test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137846 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 18:39:13 +00:00
Devang Patel
0cd513269f Robustify test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137845 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 18:38:44 +00:00
Owen Anderson
4c81cf5dfc Start building a Thumb1 decoding test file based on the Thumb1 parsing/encoding test file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137840 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 18:21:36 +00:00
Eli Friedman
447f95202a Silly mistake from r137777; restore significant isStructTy() checks. While here, be a bit more defensive 
with unknown instructions.

Fixes PR10687.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137836 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 18:10:43 +00:00
Jim Grosbach
358499ea3b Thumb assembly parsing and encoding for ADC(register) instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137833 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 17:55:28 +00:00
Jim Grosbach
b1ee18ee69 Add missing '@' delimiter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137832 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 17:46:01 +00:00
Owen Anderson
83e3f67fb6 Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment. 
Patch by James Molloy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137830 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 17:44:15 +00:00
Bruno Cardoso Lopes
0e6d230abd Introduce matching patterns for vbroadcast AVX instruction. The idea is to 
match splats in the form (splat (scalar_to_vector (load ...))) whenever
the load can be folded. All the logic and instruction emission is
working but because of PR8156, there are no ways to match loads, cause
they can never be folded for splats. Thus, the tests are XFAILed, but
I've tested and exercised all the logic using a relaxed version for
checking the foldable loads, as if the bug was already fixed. This
should work out of the box once PR8156 gets fixed since MayFoldLoad will
work as expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137810 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:29:19 +00:00
Bruno Cardoso Lopes
666f500592 Update test to not use the scalar type to splat from a load 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137809 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:29:15 +00:00
Bruno Cardoso Lopes
fc0a702128 Now that we have a canonical way to handle 256-bit splats: 
vinsertf128 $1 + vpermilps $0, remove the old code that used to first
do the splat in a 128-bit vector and then insert it into a larger one.
This is better because the handling code gets simpler and also makes a
better room for the upcoming vbroadcast!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137807 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:29:10 +00:00
Akira Hatanaka
bb15e117d3 Add support for ext and ins. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:05:42 +00:00
Jim Grosbach
89e2aa6afd Thumb ADD(immediate) parsing support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137788 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 23:57:34 +00:00
Eli Friedman
bfd5040ddc An additional atomic test; related to r137662. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137786 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 23:29:17 +00:00
Jim Grosbach
194bd89829 Thumb parsing diagnostics for low-reg requirements on ADD and MOV. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137779 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 22:20:01 +00:00
Eli Friedman
054ddf799b A bunch of misc fixes to SCCPSolver::ResolvedUndefsIn, including a fix to stop 
making random bad assumptions about instructions which are not explicitly listed.  

Includes fix for rdar://9956541, a version of "undef ^ undef should return
0 because it's easier than arguing with users".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137777 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 22:06:31 +00:00
Eric Christopher
f213ad1a55 Remove tests that have been obsoleted or migrated to clang/optimizer tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137775 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 21:46:25 +00:00
Jim Grosbach
3912b73c74 Thumb assembly parsing and encoding for ADD(register) instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137759 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 21:34:08 +00:00
Eli Friedman
1fc291f0d3 Minor bug in SCCP found by inspection. (I don't think it's possible to hit this with a normal pass pipeline, but fixing for completeness.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137755 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 21:12:35 +00:00
Jim Grosbach
c2408d3ce5 Add testcase for r137746. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137754 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 21:11:21 +00:00
Jim Grosbach
be2ac8ca7b Tidy up formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 20:55:41 +00:00
Jim Grosbach
47a0d52b69 ARM thumb assembly parsing for arithmetic flag setting instructions. 
Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137746 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 20:45:50 +00:00
Bruno Cardoso Lopes
3b86598cfa Instead of always leaving the work to the generic legalizer when 
there is no support for native 256-bit shuffles, be more smart in some
cases, for example, when you can extract specific 128-bit parts and use
regular 128-bit shuffles for them. Example:

For this shuffle:
  shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
                <i32 1, i32 0, i32 7, i32 6>

This was expanded to:
  vextractf128  $1, %ymm1, %xmm2
  vpextrq $0, %xmm2, %rax
  vmovd %rax, %xmm1
  vpextrq $1, %xmm2, %rax
  vmovd %rax, %xmm2
  vpunpcklqdq %xmm1, %xmm2, %xmm1
  vpextrq $0, %xmm0, %rax
  vmovd %rax, %xmm2
  vpextrq $1, %xmm0, %rax
  vmovd %rax, %xmm0
  vpunpcklqdq %xmm2, %xmm0, %xmm0
  vinsertf128 $1, %xmm1, %ymm0, %ymm0
  ret

Now we get:
  vshufpd $1, %xmm0, %xmm0, %xmm0
  vextractf128  $1, %ymm1, %xmm1
  vshufpd $1, %xmm1, %xmm1, %xmm1
  vinsertf128 $1, %xmm1, %ymm0, %ymm0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137733 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 18:21:54 +00:00
Akira Hatanaka
a43d3e71ec Add test case for r137711. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137725 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 17:32:01 +00:00
Jim Grosbach
d0d3f7e01f ARM .align NOP padding uses different encoding pre-ARMv6. 
Patch by Kristof Beyls and James Malloy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137723 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 17:06:20 +00:00
Akira Hatanaka
614051a1c5 Fix handling of double precision loads and stores when Mips1 is targeted. 
Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This 
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.

Without the changes made in this patch, llc produces code that has the same 
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137711 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 03:51:51 +00:00
Eli Friedman
34fd67c7bc Fix test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137703 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 01:42:56 +00:00
Eli Friedman
2199dfb0e6 Revert a bit of r137667; the logic in question can safely handle atomic load/store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137702 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 01:28:22 +00:00
Eric Christopher
89a01a0cbd Migrate this test from llvm/test/FrontendC++/ptr-to-method-devirt.cpp and 
FileCheckize. It is more properly an optimizer test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137700 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-16 01:17:17 +00:00
Eli Friedman
8176388d65 Update SimplifyCFG for atomic operations. 
This commit includes a mention of the landingpad instruction, but it's not
changing the behavior around it.  I think the current behavior is correct,
though.  Bill, can you double-check that?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137691 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:59:28 +00:00
Eli Friedman
fd06b3cfa1 Add comments and test for atomic load/store and mem2reg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137690 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:55:52 +00:00
Owen Anderson
a9c989d55a Add a test file for Thumb2 NEON. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137687 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:42:20 +00:00
Bruno Cardoso Lopes
1deddbbd56 Reorder declarations of vmovmskp* and also put the necessary AVX 
predicate and TB encoding fields. This fix the encoding for the
attached testcase. This fixes PR10625.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137684 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 23:36:45 +00:00
Eli Friedman
cc4a0435b7 Update instcombine for atomic load/store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137664 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 22:09:40 +00:00
Bruno Cardoso Lopes
50b37c7920 Fix PR10656. It's only profitable to use 128-bit inserts and extracts 
when AVX mode is one. Otherwise is just more work for the type
legalizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137661 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:45:54 +00:00
Owen Anderson
c4bda5633a Add some more comprehensive VFP decoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137657 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 21:29:01 +00:00
Eric Christopher
801f10f716 Fix this test to avoid leaving a temporary file behind. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137651 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:55:03 +00:00
Eli Friedman
97671565ff Atomic load/store support in LICM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137648 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:52:09 +00:00
Owen Anderson
c537f3be0c Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact. 
Patch by James Molloy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137647 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:51:32 +00:00
Eric Christopher
f000957aad Add an ipsccp test. Migrated from test/FrontendC++. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137646 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:50:36 +00:00
Owen Anderson
95d01b8898 Add a test for Thumb1 LDRSH decoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137645 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:15:43 +00:00
Owen Anderson
bd37b721c8 Add testcase for STRH. Patch by James Molloy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137644 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:12:03 +00:00
Owen Anderson
5df7ef6cdb Fix incorrect encoding of UMAAL and friends. Patch by James Molloy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137641 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 20:08:25 +00:00
Owen Anderson
305e046e53 Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137636 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 19:00:06 +00:00
Owen Anderson
7a2e1770ea Fix problems decoding the to/from-lane NEON memory instructions, and add a comprehensive NEON decoding testcase. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137635 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-15 18:44:44 +00:00
Nick Lewycky
28b84ff4ce This transform is not safe. Thanks to Eli for pointing that out! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137575 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-14 04:51:49 +00:00
Nick Lewycky
7f0170c197 Don't attempt to add 'nsw' when intermediate instructions had no such guarantee. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137572 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-14 03:41:33 +00:00
Nick Lewycky
daf27ea899 Teach instcombine to preserve the nsw bit by doing an after-the-fact analysis 
when combining add and sub instructions. Patch by Pranav Bhandarkar!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137570 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-14 01:45:19 +00:00
Eli Friedman
9a0f436da2 Fix test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137556 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-13 17:06:34 +00:00
Bob Wilson
7dcd04abe0 Expand VMOVQQQQ pseudo instructions. 
Apparently we never added code to expand these pseudo instructions, and in
over a year, no one has noticed.  Our register allocator must be awesome!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137551 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-13 05:14:55 +00:00
Eli Friedman
f03bb260c9 Move "atomic" and "volatile" designations on instructions after the opcode 
of the instruction.

Note that this change affects the existing non-atomic load and store
instructions; the parser now accepts both forms, and the change is noted
in the release notes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137527 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 22:50:01 +00:00
Bruno Cardoso Lopes
53cae1362d The VPERM2F128 is a AVX instruction which permutes between two 256-bit 
vectors. It operates on 128-bit elements instead of regular scalar
types. Recognize shuffles that are suitable for VPERM2F128 and teach
the x86 legalizer how to handle them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137519 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 21:48:26 +00:00
Akira Hatanaka
5c21c9e78e Define unaligned load and store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 21:30:06 +00:00
Owen Anderson
0d09499cf3 Fix some remaining issues with decoding ARM-mode memory instructions, and add another batch of tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137502 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 20:36:11 +00:00
Owen Anderson
a211c2c7e9 Port over the basic ARM encodings test file to a decoding test file. Greatly increases our test coverage of basic ARM-mode instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137495 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 19:42:45 +00:00
Akira Hatanaka
11abf5bca9 Test case for 137484 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137486 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 18:12:06 +00:00
Jim Grosbach
7a8729effc Tidy up formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137471 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 17:43:31 +00:00
Jim Grosbach
46c38aff89 Tidy up formatting. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137464 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 17:01:02 +00:00
Benjamin Kramer
0d46ccfc5c MachOWriter: Don't crash on fixups with arithmetic, emit a relocation instead. This matches what as does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137414 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 01:51:29 +00:00
Dan Gohman
126a54f1fa Don't convert objc_autoreleaseReturnValue to objc_autorelease if the result 
is returned through a bitcast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137402 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 00:36:31 +00:00
Dan Gohman
a7f7db2ebd Don't let arbitrary calls disrupt nested retain+release pairs if 
the retains and releases all use the same SSA pointer value.

Also, don't let CFG hazards disrupt nested retain+release pair
optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137399 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 00:26:31 +00:00
Jim Grosbach
29e7b7deb4 Clean up formatting a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137393 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 23:57:17 +00:00
Jim Grosbach
857e1a7b3f ARM vector compare to zero instruction assembly parsing support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137389 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 23:51:13 +00:00
Andrew Trick
30039de2e9 A slew of unit tests for the recent LoopInfo::updateUnloop feature 
checked in at r137276 and r137341.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137385 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 23:38:09 +00:00
Andrew Trick
b1831c6640 Allow loop unrolling to get known trip counts from ScalarEvolution. 
SCEV unrolling can unroll loops with arbitrary induction variables. It
is a prerequisite for -disable-iv-rewrite performance. It is also
easily handles loops of arbitrary structure including multiple exits
and is generally more robust.

This is under a temporary option to avoid affecting default
behavior for the next couple of weeks. It is needed so that I can
checkin unit tests for updateUnloop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137384 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 23:36:16 +00:00
Akira Hatanaka
9029cf20e1 Enclose directive .cprestore with .set macro and nomacro to silence assembler 
warning. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137378 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:42:31 +00:00
Jim Grosbach
c69c26d95e Fix tests per now-correct encoding as of r137371. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137376 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:31:48 +00:00
Jim Grosbach
342ebd5f38 ARM STRT assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137372 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:18:00 +00:00
Jim Grosbach
dd32ba337a ARM load shifted register pre-index fix shift value asm parser encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137367 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 22:05:09 +00:00
Bruno Cardoso Lopes
ef8d6999f3 Add a dag combine to xform 256-bit shuffles into simple vector 
inserts and extracts. This simple combine makes us generate only 1
instruction instead of 11 in the v8 case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137362 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:50:44 +00:00
Bruno Cardoso Lopes
ec91640997 Fix the test added by Nadav in r137308. Make it more strict: 
1) check for the "v" version of movaps
2) add a couple of CHECK-NOT to guarantee the behavior
3) move to a more appropriate test file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137361 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:50:35 +00:00
Jim Grosbach
2ef8241ce7 ARM STRHT assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137358 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:39:41 +00:00
Jim Grosbach
7b8f46cf9e ARM STRH assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137353 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 21:17:22 +00:00
Owen Anderson
508e1d3db5 Fix decoding for indexed STRB and LDRB. Fixes <rdar://problem/9926161>. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137347 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:47:56 +00:00
Owen Anderson
9fe72bcd37 Improve operand validation for Thumb2 addressing modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137344 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:40:40 +00:00
Jim Grosbach
14605d1a67 ARM STRD assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137342 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:28:23 +00:00
Owen Anderson
26d2f0ac91 Continue to tighten decoding by performing more operand validation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137340 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:21:46 +00:00
Jim Grosbach
10348e70d5 ARM STRBT assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137337 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 20:04:56 +00:00
Jim Grosbach
961afdf1b6 Add FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137336 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 19:43:42 +00:00
Jim Grosbach
534de6cad8 ARM STRB assembly parsing and encoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137335 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 19:42:58 +00:00
Jim Grosbach
c15bd92d2f Fix a copy/paste error so that LDRB(register) actually gets tested. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137333 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 19:34:23 +00:00
Jim Grosbach
f91c14920c ARM STR(register) assembly parsing and encoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137332 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 19:26:17 +00:00
Jim Grosbach
548340c4bf ARM STR(immediate) assembly parsing and encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137331 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 19:22:40 +00:00
Owen Anderson
71156a6e00 Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137325 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 19:00:18 +00:00
Bruno Cardoso Lopes
59353b436a Fix PR10492 by teaching MOVHLPS and MOVLPS mask matching to be more strict. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137324 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:59:13 +00:00
Owen Anderson
2b7b238e84 Tighten operand decoding of addrmode2 instruction. The offset register cannot be PC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137323 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:55:42 +00:00
Owen Anderson
3dac0bec7e Correct immediate range for shifter operands. Patch by James Molloy, with additional encoding fixes added by me. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137322 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:41:59 +00:00
Owen Anderson
ae0bc5deaa Improve error checking in the new ARM disassembler. Patch by James Molloy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137320 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:24:51 +00:00
Jim Grosbach
f6713916fb ARM push of a single register encodes as pre-indexed STR. 
Per the ARM ARM, a 'push' of a single register encodes as an STR,
not an STM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-11 18:07:11 +00:00